JPS5737839A - Manufacture of hybrid integrated circuit - Google Patents

Manufacture of hybrid integrated circuit

Info

Publication number
JPS5737839A
JPS5737839A JP11318080A JP11318080A JPS5737839A JP S5737839 A JPS5737839 A JP S5737839A JP 11318080 A JP11318080 A JP 11318080A JP 11318080 A JP11318080 A JP 11318080A JP S5737839 A JPS5737839 A JP S5737839A
Authority
JP
Japan
Prior art keywords
pellet
bonding
printed
corners
bonding agent
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11318080A
Other languages
Japanese (ja)
Inventor
Masahiro Otani
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP11318080A priority Critical patent/JPS5737839A/en
Publication of JPS5737839A publication Critical patent/JPS5737839A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319—Arrangement of the layer connectors prior to mounting
    • H01L2224/83192—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319—Arrangement of the layer connectors prior to mounting
    • H01L2224/83194—Lateral distribution of the layer connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838—Bonding techniques
    • H01L2224/8385—Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/06—Polymers
    • H01L2924/078—Adhesive characteristics other than chemical
    • H01L2924/07802—Adhesive characteristics other than chemical not being an ohmic electrical conductor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/156—Material
    • H01L2924/15786—Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
    • H01L2924/15787—Ceramics, e.g. crystalline carbides, nitrides or oxides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901—Structure
    • H01L2924/1904—Component type
    • H01L2924/19041—Component type being a capacitor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901—Structure
    • H01L2924/1904—Component type
    • H01L2924/19043—Component type being a resistor

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Die Bonding (AREA)

Abstract

PURPOSE:To prevent the generation of defective products resulting from the pressed out bonding agnent when a pellet bonding work is performed by a method wherein a bonding agent is printed on the pellet in such a manner that the four corners will be coincided with the square-shaped pellet and the side sections are formed into concaved shape. CONSTITUTION:On the surface of the ceramic substrate 1 whereon a thin film capacitor 2, a thin film resistor 3, a conductive layer 4 and the like are formed, the bonding agent 5 is printed and the pellet 7 is bonded and fixed on the printed surface 5. This printed surface is formed in such a manner that the four corners are protruded so as to coincide with the corners of the pellet and that the side sections are formed into concaved shapes 11-13. Through these procedures, the pressing out of the bonding agent can be prevented even when the pellet is vibrated while a bonding work is performed, thereby enabling to improve adhessiveness as well as to prevent the generation of defective products resulting from the short-circuit and the like of the conductive layer 4.
JP11318080A 1980-08-18 1980-08-18 Manufacture of hybrid integrated circuit Pending JPS5737839A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11318080A JPS5737839A (en) 1980-08-18 1980-08-18 Manufacture of hybrid integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11318080A JPS5737839A (en) 1980-08-18 1980-08-18 Manufacture of hybrid integrated circuit

Publications (1)

Publication Number Publication Date
JPS5737839A true JPS5737839A (en) 1982-03-02

Family

ID=14605576

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11318080A Pending JPS5737839A (en) 1980-08-18 1980-08-18 Manufacture of hybrid integrated circuit

Country Status (1)

Country Link
JP (1) JPS5737839A (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7235425B2 (en) 2004-02-24 2007-06-26 Kabushiki Kaisha Toshiba Semiconductor device and fabrication method for the same
JP2010283376A (en) * 2009-03-10 2010-12-16 Sekisui Chem Co Ltd Method of manufacturing semiconductor chip stack, and semiconductor device
JP2012060021A (en) * 2010-09-10 2012-03-22 Sekisui Chem Co Ltd Semiconductor chip mounting body manufacturing method and semiconductor device
JP2014138024A (en) * 2013-01-15 2014-07-28 Nagase Chemtex Corp Method of manufacturing circuit member joint body, circuit member joint body, and circuit member
JP2015188026A (en) * 2014-03-27 2015-10-29 三菱電機株式会社 Power semiconductor device and method of manufacturing power semiconductor device
JP2019165085A (en) * 2018-03-19 2019-09-26 新電元工業株式会社 Manufacturing method of electronic component and conductive connection material mask

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7235425B2 (en) 2004-02-24 2007-06-26 Kabushiki Kaisha Toshiba Semiconductor device and fabrication method for the same
JP2010283376A (en) * 2009-03-10 2010-12-16 Sekisui Chem Co Ltd Method of manufacturing semiconductor chip stack, and semiconductor device
US8563362B2 (en) 2009-03-10 2013-10-22 Sekisui Chemical Co., Ltd. Method of producing semiconductor chip laminate comprising an adhesive that comprises a curing compound, curing agent and spacer particles
JP2012060021A (en) * 2010-09-10 2012-03-22 Sekisui Chem Co Ltd Semiconductor chip mounting body manufacturing method and semiconductor device
JP2014138024A (en) * 2013-01-15 2014-07-28 Nagase Chemtex Corp Method of manufacturing circuit member joint body, circuit member joint body, and circuit member
JP2015188026A (en) * 2014-03-27 2015-10-29 三菱電機株式会社 Power semiconductor device and method of manufacturing power semiconductor device
JP2019165085A (en) * 2018-03-19 2019-09-26 新電元工業株式会社 Manufacturing method of electronic component and conductive connection material mask

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