JPS56114361A - Semiconductor container - Google Patents

Semiconductor container

Info

Publication number
JPS56114361A
JPS56114361A JP1693180A JP1693180A JPS56114361A JP S56114361 A JPS56114361 A JP S56114361A JP 1693180 A JP1693180 A JP 1693180A JP 1693180 A JP1693180 A JP 1693180A JP S56114361 A JPS56114361 A JP S56114361A
Authority
JP
Japan
Prior art keywords
usage
container
conductor layer
layer
precision
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1693180A
Other languages
Japanese (ja)
Other versions
JPS6041859B2 (en
Inventor
Isao Okura
Takashi Kondo
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP1693180A priority Critical patent/JPS6041859B2/en
Publication of JPS56114361A publication Critical patent/JPS56114361A/en
Publication of JPS6041859B2 publication Critical patent/JPS6041859B2/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H01L23/5383—Multilayer substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15312—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a pin array, e.g. PGA

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)

Abstract

PURPOSE:To enable the semiconductor container in wide usage and in high precision to be obtained by a method wherein the container is composed of two parts, one is made to a common shape without depending on the usage and the other is formed fitted to the usage at low temperature and in high precision. CONSTITUTION:The semiconductor container 2 is constructed by an insulator layer 211, conductor layer 212, connecting means 213 constituting one layer and a module substrate part 21 by external lead terminals 214 and a multilayer wiring part 22 by a connecting means 223 through an insulator layer 221, conductor layer 222 and through hole. The semiconductor device 1 is arranged connected to the conductor layer 222 on the part 22. The part 21 has patterns common over, e.g., several kinds of the usages without being limited to the particular usage. On the other hand, the part 22 is formed in higher precision at low temperature than those of the part 21 and formed with a peculiar pattern fitted to the usage with respect to the comparatively smooth module substrate surface. Whereby the semiconducdor container rich in usability and high in precision can be attained.
JP1693180A 1980-02-13 1980-02-13 semiconductor container Expired JPS6041859B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1693180A JPS6041859B2 (en) 1980-02-13 1980-02-13 semiconductor container

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1693180A JPS6041859B2 (en) 1980-02-13 1980-02-13 semiconductor container

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP370787A Division JPS62174955A (en) 1987-01-10 1987-01-10 Manufacture of semiconductor package

Publications (2)

Publication Number Publication Date
JPS56114361A true JPS56114361A (en) 1981-09-08
JPS6041859B2 JPS6041859B2 (en) 1985-09-19

Family

ID=11929862

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1693180A Expired JPS6041859B2 (en) 1980-02-13 1980-02-13 semiconductor container

Country Status (1)

Country Link
JP (1) JPS6041859B2 (en)

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5842263A (en) * 1981-09-04 1983-03-11 Nec Corp Multichip package
JPS5958848A (en) * 1982-09-29 1984-04-04 Nec Corp Manufacture of ceramic wiring board
JPS6077452A (en) * 1983-09-22 1985-05-02 インタ−ナショナル　ビジネス　マシ−ンズ　コ−ポレ−ション Device for supplying plural integrated circuit operating voltage
JPS60183746A (en) * 1984-03-02 1985-09-19 Hitachi Ltd Semiconductor device
JPS6231146A (en) * 1985-08-02 1987-02-10 Nec Corp Multilayer wiring substrate
WO1998011605A1 (en) * 1995-06-19 1998-03-19 Ibiden Co., Ltd. Circuit board for mounting electronic parts
KR100218319B1 (en) * 1996-10-04 1999-09-01 구본준 Semiconductor package and socket
CN100433305C (en) * 1996-09-12 2008-11-12 揖斐电株式会社 Circuit-component carrying substrate

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE69835747T2 (en) * 1997-06-26 2007-09-13 Hitachi Chemical Co., Ltd. SUBSTRATE FOR MOUNTING SEMICONDUCTOR CHIPS

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5842263A (en) * 1981-09-04 1983-03-11 Nec Corp Multichip package
JPS5958848A (en) * 1982-09-29 1984-04-04 Nec Corp Manufacture of ceramic wiring board
JPS6077452A (en) * 1983-09-22 1985-05-02 インタ−ナショナル　ビジネス　マシ−ンズ　コ−ポレ−ション Device for supplying plural integrated circuit operating voltage
JPS60183746A (en) * 1984-03-02 1985-09-19 Hitachi Ltd Semiconductor device
JPS6231146A (en) * 1985-08-02 1987-02-10 Nec Corp Multilayer wiring substrate
WO1998011605A1 (en) * 1995-06-19 1998-03-19 Ibiden Co., Ltd. Circuit board for mounting electronic parts
KR100327887B1 (en) * 1996-09-12 2002-10-19 이비덴 가부시키가이샤 Electronic Circuit Component Mounting Board
CN100433305C (en) * 1996-09-12 2008-11-12 揖斐电株式会社 Circuit-component carrying substrate
USRE44251E1 (en) 1996-09-12 2013-06-04 Ibiden Co., Ltd. Circuit board for mounting electronic parts
KR100218319B1 (en) * 1996-10-04 1999-09-01 구본준 Semiconductor package and socket

Also Published As

Publication number Publication date
JPS6041859B2 (en) 1985-09-19

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