JPS5842263A - Multichip package - Google Patents

Abstract

PURPOSE:To obtain high density and minute wiring patterns and a large number of pins for outside connection for LSI chips by a method wherein the LSI chips are mounted on the surface of a ceramic multilayer circuit substrate, multilayer circuits are formed on the opposite face, and the pins are equipped on the surface thereof. CONSTITUTION:An electric power source layer 11b and through-holes 11c for conductors are formed in the inside layer of the ceramic multilayer circuit substrate 11. chip carriers 12 having structure mounting the LSI chips 12b on the ceramic circuit substrates 12a are connected to bonding pads 11a by connecting terminals 12d. Moreover multilayer circuits 13 consisting of organic insulating layers 13b and conductor wirings 13a are formed on the back of the ceramic multilayer substrate 11. The conductor wiring patterns 13a are connected electrically to pads 11d of the ceramic multilayer circuit substrate 11. Moreover pads 13c for installation of pins are formed on the surface of the multilayer circuits 13, and the pins 14 for outside connection are equipped thereto.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to the structure of a multi-chip package mounting a plurality of L8I chips.

In recent years, LSI systems have been increasingly used as a means to improve the price/performance ratio of systems. In order to fully reflect the performance of this LSI in a system, L8I implementation technology is required, which involves determining how to assemble L8I into a system. Multi-chip packaging is an important technology for this purpose, and as the integration and speed of L8I progress, this type of package will also require the formation of high-density, fine wiring patterns and a large number of external connection bins. ing.

Conventionally, this type of multi-chip package was used in the 8-electronic C08800/90G computer, and the one used in IBM's 43@ series and 3081 processors.
Those that have been mentioned are famous. The former multi-chip package has a multilayer circuit formed on an alumina ceramic substrate using thick film and thin film technology, and the signal line width is 1100J1.
Although we succeeded in forming a high-density fine pattern using the following method,
Since it is difficult to form through holes in an alumina ceramic substrate, the external connection bins must be formed on the same surface as the LSI chip mounting surface. Therefore, the size of the area in which the external connection bins are formed is limited, making it difficult to form a large number of external connection bins. On the other hand, although YaFi or alumina ceramic substrates are used for the latter, through-holes are formed and conductor wiring patterns are printed at a stage before sintering into a hexalamic, i.e., during the so-called green sheet stage.

For this reason, although it has been successful in forming a large number of external connection vias (particularly because they are all 1iK formed on the back surface of the substrate), it becomes difficult to miniaturize the wiring pattern. This is because the material of the wiring pattern is made of tungsten or molybdenum, which can withstand the Aluna sintering temperature, and has high electrical resistance and poor printability, making it impossible to miniaturize the pattern.

An object of the present invention is to provide a multi-chip package having a high-density, fine wiring pattern and a large number of external connection bins.

To achieve the above object, a multi-chip package according to the present invention includes a ceramic multilayer circuit board having a conductor inside and on the surface, and a ceramic multilayer circuit board mounted on the surface of the ceramic multilayer circuit board and electrically connected to the conductor. iru multiple L
Multiple L8s with 8I chip or flL8I chip
an I-chip carrier, a conductor wiring layer formed on the back surface of the ceramic multilayer circuit board and electrically connected to the conductor, and an organic resin or a low melting point inorganic glass;
It consists of a multilayer circuit made of an insulating layer of inorganic glass that can be sintered with N2, and an external connection via which is fixedly formed on the surface of the multilayer circuit and electrically connected to the conductor wiring layer.

Hereinafter, the present invention will be explained in more detail with reference to the drawings and the like.

FIG. 1 is a sectional view showing a first embodiment of the present invention.

As shown in FIG. 1, on the first surface of the ceramic multilayer circuit board 11, a bonding pad l1m for mounting the chip carrier 12 is formed. In addition, a power supply layer 11b and a through hole llc are formed in the inner layer. Furthermore, a pad lid for connection to the multilayer circuit 13 is formed on the second surface, that is, the back surface, of the ceramic multilayer circuit board 11. These bonding pads 11a, power supply layer 11b, and through holes 11C.

Tungsten is used as the conductor of the pad lid, and the surface Kti of the bonding pad 111 and the pad lid is
Gold plating is applied to prevent tungsten from oxidizing and corroding. A chip carrier 12d having a structure in which an L8I chip 12b is mounted on a ceramic circuit board 12a is connected to a bonding pad IIJI by a connecting terminal 121. A heat sink 12c is attached to the ceramic circuit board 12, which helps dissipate heat generated from the L8I chip 12b. Ceramics multilayer circuit board 11 and chip carrier ceramic circuit board 12a
It is made of a material with the same coefficient of thermal expansion as the 71 to prevent deterioration of the connection due to stress. On the opposite side of the ceramic multilayer circuit board 11 to the surface on which the chip carrier 12 is mounted, an organic insulating layer 13b and a conductor wiring 1 are provided.
A multilayer circuit 13 consisting of 3a is formed. Conductor wiring pattern 13at! It is electrically connected to the pad lid of the ceramic multilayer circuit board 11. Also, the multilayer circuit 13
A pin stand pad 13c is formed on the surface of the
An external connection bin 14 is attached here.

In the case of this embodiment, the conductor formed inside the ceramic multilayer circuit board 11 is a through hole l connecting the power supply layer 11b and the bonding pad 111 with the pad lid.
It is ie. Such a pattern does not need to be a fine pattern due to the circuit, and can be made into a common pattern regardless of the type of I8I chip mounted, so it can be easily formed by taking advantage of the features of the technology called the so-called green sheet method. can do. Further, the material of the signal conductor wiring on the back side of this ceramic multilayer circuit board 11 is gold (Au), and the material of the organic insulation 13
The material b is polyimide, and has achieved high reliability by Nire et al.

The conductor material used in the ceramic multilayer circuit board 11 is tungsten, and this metal oxidizes and ceases to be a conductor when exposed to high temperatures in the air. Therefore, when forming the multilayer circuit 13 on the circuit board 11, conventional thick film materials cannot be used. In the case of this example,
Since the gold is formed by selective plating and the organic insulation is made of polyimide, it is exposed to a temperature of at most 350C, and the tungsten (lla, lid) on the surface remains intact while the internal tungsten (llb, IIC) Fl remains as is. By plating with gold, the multilayer circuit 13 can be formed without oxidation. Furthermore, patterning of wiring and insulating through holes is carried out using photolithography, achieving high density and miniaturization. Pin stand pad 13ci
It is made of copper plating, and the bottle 14 is not soldered. Since the bins 14 can be attached over the entire surface of the multilayer circuit 13, a large number of them can be formed. LSI chip 12b;! Chip carrier 12
The chip carrier is connected to the substrate 11 by the chip carrier, and even if a defective chip occurs, it can be replaced in chip carrier units, making the work easier.

FIG. 12 is a sectional view showing a second embodiment of the present invention. The structural material of the ceramic multilayer circuit board 21 is almost the same as that shown in FIG. In the case of this figure, the bonding pad 21
The difference from FIG. 1 is that the through hole 21c connecting the pad 21d and the pad 21d passes straight through the inside, but this is not essential. This example is the first
The major difference from the embodiment is that the multilayer circuit 23
The material of the insulating layer 23b is low melting point inorganic glass, and the L8I chip 228 is mounted without using a chip carrier.
This means that the chips are directly pounded.

When low melting point inorganic glass is used for the insulating layer 23b, the multilayer circuit 23 can be formed without oxidizing tungsten, which is the conductor of the multilayer circuit board 21. By using a thick film conductor material that can be fired at a low temperature for the material of the conductor wiring layer 23a, the multilayer circuit 23 can be formed using only screen printing technology. Although the signal line width is not as fine as using photolithography, it is a value that is difficult to achieve when printing with tungsten or molybdenum paste.
! This is an effective means in the case of 100 μm to 300 μm. By directly mounting the L8I chips 221, it is possible to arrange the L8I chips at a higher density than when using a chip carrier. In this example, the so-called TAB
A chip is used, which has a face-down structure, and the pad 22b is bonded to the bonding pad 21aK by thermocompression. The chip 22m is fixed to the heat sink 22clC, so that heat dissipation is good.

FIG. 3 is a sectional view showing a third embodiment of the present invention. In this figure, the surface Kt! of the ceramic multilayer circuit board 31! L
There is a recess for attaching the SI chip 32, and the I and 8I chips 32m are mounted here and the chip lead 32 is mounted.
b is bonded by a bonding pad 31aK by thermocompression bonding.

A cold plate 35 is bonded between the depressions and at a raised area around the substrate. This cold plate mechanically protects the internal LSI and at the same time provides a conduction path Kt for heat generated from the chip.

Good heat dissipation can be achieved by cooling the cold plate with a liquid such as water or by attaching fins to air cooling. The insulating layer 33b of the multilayer circuit 33 is made of an inorganic glass material that can be sintered in a nitrogen atmosphere.

For firing in a nitrogen atmosphere 1. In this case, 900
The temperature can be raised to around 0.degree. C., and the material is not limited to low melting point inorganic glass as in the second embodiment. Copper (Cu) is used as the material for the signal conductor wiring 33m. K has various advantages such as low electrical resistance, easy patterning, and low cost.

As explained in detail above, the present invention has a structure in which a KL8I chip is mounted on the surface of a ceramic multilayer circuit board, a multilayer circuit is formed on the opposite side, and a bottle is attached to the surface, thereby creating a highly dense and fine wiring pattern. In addition, it is possible to provide a multi-chip package having a large number of external connection bins.

[Brief explanation of the drawing]

FIG. 1 is a sectional view showing a first embodiment of the present invention. FIG. 2 is a sectional view showing a second embodiment of the invention. FIG. 3 is a sectional view showing a third embodiment of the invention. It is. 11, 21, 31-... Ceramic multilayer circuit board 11
m, 21m, 31 Hatake - bonder pad 11b, 2
11e, 31b, - power supply layer 11c, 21c, 31cm through hole 11d, 21d
, 31d...Pad 12-L8I chip carrier 121-Cera2 circuit board 12b, 22a, 32a-L81f to j12c, 22
c.-Heat sink 12d-Connection terminals 22b, 32b-Chip leads 13.23, 33--Multilayer circuits 13m, 23m, 33m-Signal conductor wiring 13b, 23b
, 3: Th-insulating layer 13c, ! For attaching 3c and 33cm bottles (RAD 14
, 24 , 34...External connection bottle 3s-/cold bar V-tot Patent applicant H Hon Electric Co., Ltd. Agent Patent attorney I) Ro Hisashi

Claims (1)

[Claims] A ceramic multilayer circuit board having a conductor inside and on the surface, and the ceramic multilayer circuit board! A plurality of LSIs mounted on the surface of J1 and electrically connected to the conductor
Chip or 11, multiple LSIs having LSI chips
a chip carrier, a conductor wiring layer formed on a second surface opposite to the first surface of the ceramic multilayer circuit board and electrically connected to the conductor, and an organic resin, a low melting point inorganic glass, or N2. It is characterized by comprising a multilayer circuit made of an insulating layer of sinterable inorganic glass, and external connection pins fixedly formed on the surface of the multilayer circuit and electrically connected to the conductor wiring layer. Multi-chip package.