CA1307355C - Soft-faced semiconductor component backing - Google Patents
Soft-faced semiconductor component backingInfo
- Publication number
- CA1307355C CA1307355C CA000576364A CA576364A CA1307355C CA 1307355 C CA1307355 C CA 1307355C CA 000576364 A CA000576364 A CA 000576364A CA 576364 A CA576364 A CA 576364A CA 1307355 C CA1307355 C CA 1307355C
- Authority
- CA
- Canada
- Prior art keywords
- interface means
- layer
- soft pliable
- soft
- mounting
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49541—Geometry of the lead-frame
- H01L23/49562—Geometry of the lead-frame for devices being provided for in H01L29/00
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/373—Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
- H01L23/3737—Organic materials with or without a thermoconductive filler
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/40—Mountings or securing means for detachable cooling or heating arrangements ; fixed by friction, plugs or springs
- H01L23/4006—Mountings or securing means for detachable cooling or heating arrangements ; fixed by friction, plugs or springs with bolts or screws
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/40—Mountings or securing means for detachable cooling or heating arrangements ; fixed by friction, plugs or springs
- H01L23/4006—Mountings or securing means for detachable cooling or heating arrangements ; fixed by friction, plugs or springs with bolts or screws
- H01L2023/4037—Mountings or securing means for detachable cooling or heating arrangements ; fixed by friction, plugs or springs with bolts or screws characterised by thermal path or place of attachment of heatsink
- H01L2023/405—Mountings or securing means for detachable cooling or heating arrangements ; fixed by friction, plugs or springs with bolts or screws characterised by thermal path or place of attachment of heatsink heatsink to package
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/3011—Impedance
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Materials Engineering (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Abstract
SOFT-FACED SEMICONDUCTOR COMPONENT BACKING
ABSTRACT OF THE DISCLOSURE
A thermally conductive interface for positionably mounting encapsulated semiconductor devices onto a chassis or other mounting surface. The interface comprises a soft pliable plastic layer of a synthetic resin selected from the group consisting of silicone rubber, epoxy, polyester and polyurethane bonded to a planar surface of the sheath portion of an encapsulated semiconductor device. The pliable layer has a thickness less than about 10 mils and a hardness of between about 10 and 60 durometer.
ABSTRACT OF THE DISCLOSURE
A thermally conductive interface for positionably mounting encapsulated semiconductor devices onto a chassis or other mounting surface. The interface comprises a soft pliable plastic layer of a synthetic resin selected from the group consisting of silicone rubber, epoxy, polyester and polyurethane bonded to a planar surface of the sheath portion of an encapsulated semiconductor device. The pliable layer has a thickness less than about 10 mils and a hardness of between about 10 and 60 durometer.
Description
~IOFT~ CED E~EMICONDVCTOR COMPONENT El;AC~RINa BACXGROUND OF THE INVENTION
The present invention relate6 generally to an improved thermally conductive and preferably electrically lnsulatlve interface means for mounting a fully encapsulated semiconductor device or apparatus onto a mounting ~urface, and more particularly to 6uch an interface means for providing a thermally conductive mounting medlum between the ~heath portlon of ~n encapsulat.ed semiconductor apparatu~ and a chassis mountlng surface. In accordance with the pre~ent inv~ntion, ~ enhanced thermal cc,nductance is provided between the encapsulated device and the mounting surface, particularly through the elimination and/or reduction of unexpelled, retained, or captùred air between the individual ~urface~ making up the outer surface of the fully encapsulated devi~e and its mating mounting ~urface on a chas~is or the like.
It has long been known that a thermally conductive interface i~ desirable betw~en a semiconductor devic~ and a mounting pad such as an electrical cha6sis or the like. In this connection, an electrically insulative thermally conductiva layer i9 used a~ a mounting pad between the cha~si~ member and the 6urface of the sheath portion of an encapsulated semiconductor apparatu~. Such arrangement~, when appropriately de~igned in connection with the present invention, have been found to enhance the electrical propertie~ and life of the semiconductor device without adding significantly to the size and bulk of the semiconductor device, and without inter~ering with other normal assembly operation~. The interface per ~e may be applied directly to a surface of the fully encapsulated semiconductor levice, or, alternatively, to the chassis surface or other surface upon which the semiconductor device is mounted.
Recently, fully encapsulated semiconductor devices have been widely commercially utilized. In order to provide an appropriate interface means between the sheath portion of thQ
encapsulat,2d semiconductor apparatus and the chassis mountlng surface, ~illcone grea~e, or other mean~ have typlcally been sugge~ted ~o a~ to reduce the occurrence~ and pre~ence of air which i~ unexpelled, retained or otherwise captured between the mating mounting surface0. Such retained or captured air provide~
an increased thermal impedance between the encapsulated semiconductor device or as~embly and the mounting surface, and hot spots may develop during Qxposure o~ the ~emlconductor device to certain normally expected and encountered electrical operational parameter~. The present invention has been found to reduce the occurrences and presence of retained or captured air between the mating surface~ of the encap~ulated semiconductor apparatus and the chassis. In order to achieve this reduction of retained or captured air, a relatively thin layer of moderately soft and pliable material is provided, with this layer being thermally conductive and preferably electrically insulative. The combination of properties including the selection of cros~-sectional thicknes~ along with the softnes~ and pliability has been found to effectively reduce or eliminate the quantity of retained or captured air, thus improving the thermal properties of the assembly. The improvement in thermal properties, of course, expand~ the capability and lifetime of the ~emiconductor device being utilized in combination with the overall interface arrangement.
The present invention relate6 generally to an improved thermally conductive and preferably electrically lnsulatlve interface means for mounting a fully encapsulated semiconductor device or apparatus onto a mounting ~urface, and more particularly to 6uch an interface means for providing a thermally conductive mounting medlum between the ~heath portlon of ~n encapsulat.ed semiconductor apparatu~ and a chassis mountlng surface. In accordance with the pre~ent inv~ntion, ~ enhanced thermal cc,nductance is provided between the encapsulated device and the mounting surface, particularly through the elimination and/or reduction of unexpelled, retained, or captùred air between the individual ~urface~ making up the outer surface of the fully encapsulated devi~e and its mating mounting ~urface on a chas~is or the like.
It has long been known that a thermally conductive interface i~ desirable betw~en a semiconductor devic~ and a mounting pad such as an electrical cha6sis or the like. In this connection, an electrically insulative thermally conductiva layer i9 used a~ a mounting pad between the cha~si~ member and the 6urface of the sheath portion of an encapsulated semiconductor apparatu~. Such arrangement~, when appropriately de~igned in connection with the present invention, have been found to enhance the electrical propertie~ and life of the semiconductor device without adding significantly to the size and bulk of the semiconductor device, and without inter~ering with other normal assembly operation~. The interface per ~e may be applied directly to a surface of the fully encapsulated semiconductor levice, or, alternatively, to the chassis surface or other surface upon which the semiconductor device is mounted.
Recently, fully encapsulated semiconductor devices have been widely commercially utilized. In order to provide an appropriate interface means between the sheath portion of thQ
encapsulat,2d semiconductor apparatus and the chassis mountlng surface, ~illcone grea~e, or other mean~ have typlcally been sugge~ted ~o a~ to reduce the occurrence~ and pre~ence of air which i~ unexpelled, retained or otherwise captured between the mating mounting surface0. Such retained or captured air provide~
an increased thermal impedance between the encapsulated semiconductor device or as~embly and the mounting surface, and hot spots may develop during Qxposure o~ the ~emlconductor device to certain normally expected and encountered electrical operational parameter~. The present invention has been found to reduce the occurrences and presence of retained or captured air between the mating surface~ of the encap~ulated semiconductor apparatus and the chassis. In order to achieve this reduction of retained or captured air, a relatively thin layer of moderately soft and pliable material is provided, with this layer being thermally conductive and preferably electrically insulative. The combination of properties including the selection of cros~-sectional thicknes~ along with the softnes~ and pliability has been found to effectively reduce or eliminate the quantity of retained or captured air, thus improving the thermal properties of the assembly. The improvement in thermal properties, of course, expand~ the capability and lifetime of the ~emiconductor device being utilized in combination with the overall interface arrangement.
Th~ combination of physical properties and thickness of the interfac~ layer have been found to provlde no impediment to normal a~sembly operations or proces~ing. In other words, the pre~ence o~ the interface layer does not detract from the efficacy of normal assembly operationR, nor ha~ lt been ~ound to add any ~ignificant time to normal assembly operations. Thus, the interface layer of the present invention is compatible with those operations normally encountered in typical a~sembly and proce~sing program~. In order to enhance the thermal conductance lo between the encapsulated 0emiconductor apparatu~ and the mounting surface, an interface i8 provided which is both soft and pliable, and which i6 tough, durabl~ and capable of with~tanding exposure to those certain a~sembly processes and operations normally encountered with this type of device.
In order to ach~ove these improved re~ults, c~rtain properties and/or characteristics are required for the interface layer. Specifically, the layer is designed to be soft and pliable, with a thickne6s le6~ of than about lO mils. The hardne3s of the layer should preerably be between lO and 30 d~rometer on the A-Shore scale. The pliable characteri~tic permits the reduction and/or ellminatlon of retalned or captured air, with the thickness being such that good thermal conductivity is achieved between the sheath portion of the encapsulated semiconductor device and the mounting surface.
The desirable properties and/or characteristics required for the interface layer are not readily found in natural-occurrinq substances. The present invention, therefore, ~esks to provide this unusual combination of characteristics, including the physlcal property-of being soft and pliable, along with the characteristic of thermal conductivity.
In order to ach~ove these improved re~ults, c~rtain properties and/or characteristics are required for the interface layer. Specifically, the layer is designed to be soft and pliable, with a thickne6s le6~ of than about lO mils. The hardne3s of the layer should preerably be between lO and 30 d~rometer on the A-Shore scale. The pliable characteri~tic permits the reduction and/or ellminatlon of retalned or captured air, with the thickness being such that good thermal conductivity is achieved between the sheath portion of the encapsulated semiconductor device and the mounting surface.
The desirable properties and/or characteristics required for the interface layer are not readily found in natural-occurrinq substances. The present invention, therefore, ~esks to provide this unusual combination of characteristics, including the physlcal property-of being soft and pliable, along with the characteristic of thermal conductivity.
SUMMARY OF THE INVENTION
In accordance with the present invention, a thermally conductive interface means is provided for interposition between the sheath portion of an encapsulated semiconductor apparatus and a mounting surface to enhance the thermal conductivity between the encapsulated semiconductor device and the mounting surface wherein the interface means comprises a generally soft pliable Plastic layer of a synthetic resin, which is, nevertheless, tough, durable and of low thermal imPedance or resistance.
In this connection, the plastic layer is a synthetic resin selected from the group consisting fo silicone rubber.
epoxy resin, polyester, and polyurethane. The soft pliable layer preferably has a hardness of about 10 durometer on the A-Shore scale, with a range of hardness between 10 and 60 having been found to be acceptable.
In order to enhance the thermal conductivity of the material, the resin is preferably compounded with a substance to enhance such conductivity. In particular, the materials employed for enhancement of thermal conductivity include such electrical insulators as alumina, boron nitride, aluminum nitride and mixtures thereof, mixtures of alumina and boron nitride, finely divided metallic particles such as finely divided copper, aluminum, steel or the like. Such materials may be added to the silicone rubber in an amount ranging from between about 20% to 50% by volume of compound solids, balance resin solids.
Therefore, it is a primary object of the present invention to provide an imProved interface means for mounting and interposit.ioning between the sheath portion of an encapsulated semiconductor device ancl the mounting surface therefor, wherein the interface means comprises a generally soft pliable plastic layer of a 6ynthetic resin having a hardness of between about 10 and 60 durometer, A-Shore scale.
It is yet a further object of the present invention to provide an interface means for mounting between the sheath portion of an encapsulated aemiconductor apparatu~ and a mounting surface therefor, wherein a soft pliable pla~tic layer of ~ynthetic resin i~ provided, with the synthetic resin being selected from the group con6i~ting of silicone rubber, epoxy, polyester and polyurethane, and wherein the plastic material iB
filled with finely divided solids to enhance thermal conductivity.
Other and further objects of the present invention will become apparent to those skilled in the art upon a study of the following spec~fication, appended claims and accompanying drawing.
IN THE DRAWING
Figure 1 i8 a perspective view of a common type of encapsulated semiconductor device utilized in the past, and illustratlng a metallic lnterface mean~ in the form of a ground plane secured to a planar surface of the sheath portion: and Figure 2 i~ a perspective view of a fully encapsulated semiconductor apparatus, with the interface means of the present invention interposed between the sheath portion of the semiconductor device and the mounting surface therefor; and Figure 3 is a side elevational vlew of the Pully encap~ulated ~emiconductor device illustrated in Figure 2, and illustrating the device mounted upon the ~urface of a typical chassis, and with a mounting ~crew being utilized to secure the device OlltO the chassis surface.
DESCRIPTION OF THE PREFERRED EMBODIMENT
In accordance with the preferred embodim~nt o~ the present invention, and with particular reference to Figurea 2 and 3 of the drawin~, a fully encapsulated semiconductor apparatus 10 is shown, with the sheath portion being utilized in order to fully enclose or ~fully encapsulate~ a semiconductor device therewithin. Specifically, the fully encapsulated semiconductor apparatus 10 includes a sheath portion 11 from which there are extendlng conductive tab members 12-12. The nut ~nd bolt comblnation 14 couples semiconductor apparatus 10 to ba~e mounting plate or chassis 15. As a still further mounting means, a mounting clip may be employed to mechanically bia~ the sem$conductor device against the surface of the chassis.
Encapsulated semiconductor devices and/or apparatus of the type illustrated in Figures 2 and 3 are, of course, commercially available.
With continued attention being directed to Figures 2 and 3, interface means 16 is provided which i8 di~posed along the base portion of fully encapsulated ~emiconductor apparatus 10.
Interface means 16 i~ in the form of a generally soft pliable plastic layer or pad of a synthetic resin substance selected from the group consisting of silicone rubber, epoxy, polyester and polyurethane, preferably filled or compounded with a thermally conductive particulate solid such as alumina, boron nitride, mixtures of alumina and boron nitride, aluminum nitride, or finely divided metallic particles. Layer 16 LB, in turn, uniformly bonded to a planar surface of the sheath portion 11 of the encapsulated semiconductor device lO. In order to provide for and facilitate sub~equent ~sembly proce~es~ adhe~31ve layer 17 may be utilized over the outer ~urface of interfacn layer 16.
The outer surface of inter~ace layer 16 may he coated with a fllm of adhesive in order to facilitate bonding to the sur~ace of a chassis or other mounting member in lieu of the nut and bolt combination 14 as illustrated in Figure 3. Suitable adhesives such as pressure sensitive adhesives, thermally actuated adh~sives or solvent based adhe~ives may be u~d. A releasQ film for covering the pressure ~ensitive adhesive film when utilized lo may be employed. Such adhesives such as the pressure sensitiYe adhesives are, of course, commercially available.
With attention being directed to Figure 3 of the drawing, semiconductor device 10 is shown mounted upon the surface of chassis 15, with layer 16 forming the interface between the encapsulated semiconductor device 10 and chas~is 15 being shown in place. As indicated, the layer 16 is formed in place on the surface of encapsulatiny sheath 11, and thus neither impedes nor otherwise restricts or retards the assembly processes and/or operations normally encountered with this type of device.
When utilized, adhesive layer 17 provlde~ for ~ufflclent adhesion and cohe~lon so as to provlde a system o~ approprl~te strength and durabllity. The thickne~ is, as lndicated, A~
small as possible, preferably less than about 0.7 mil so as to provide little, if any, impedance or re~istance to thermal conductance. The softness characteristic or property of the layer, which is preferably in the range of between 10 and 30 durometer on the A-Shore scale, is adequate to reduce the presence and~or occurrences of captured, retained, or unexpelled air and it is this f~ature which provides for the advantageous characteri~tics of the system. Durometer hardness on thls scale ranging from between 10 and 60 have been found suitable.
In the preferred embodiment, layer 16 consists of silicone rubber, having a thickness of between about 5 and 10 mils. Such a thickness has been found to provide adequate pliability so as to reduce the presence of retained or captured air, along with adequate mechanical toughness without detracting from the electrical integrity of the overall device.
In an alternate preferrQd embodiment, laver 16 iB form~d in place on the eurface of mounting ~urface or cha6si~ 15, and i5 deslgned to receive the encap~ulated semlconductor device 10 thereon. In such an arrangement, therefore, the interface film is applied directly to the outer surface of cha6sis 15. In a subsequent ae6embly operation, therefore, sheathed semiconductor devices are mounted in place in a configuration consi6tent with the requirements of the assembly. Other feature~, ~uch a~
interface thickne6s and properties remain the eame as previously ~et forth.
As indicated in Figure 1, the conventional transistor and/or other semiconductor utilized in the past employs a metallic ground plane for direct contact with the cha~sis. In certain applications, however, the utilization of such a metallic member renders it difficult to achieve a fully uniform and fully contacting pair of mating surfaces. In such instances, the uneven characteristics or non-planar characterietic~ of the metallic member of the semiconductor device and/or the chassie member reduces the area of contact between the metallic pad member oP the ~emiconductor device and the surface of the mounting chas~is.
1 3~7355 It will be appreclated that thoee skilled ~n the art may depart from the example ~iven hereinabove without departing from the spirit and scope of the present invention.
What is claimed is:
In accordance with the present invention, a thermally conductive interface means is provided for interposition between the sheath portion of an encapsulated semiconductor apparatus and a mounting surface to enhance the thermal conductivity between the encapsulated semiconductor device and the mounting surface wherein the interface means comprises a generally soft pliable Plastic layer of a synthetic resin, which is, nevertheless, tough, durable and of low thermal imPedance or resistance.
In this connection, the plastic layer is a synthetic resin selected from the group consisting fo silicone rubber.
epoxy resin, polyester, and polyurethane. The soft pliable layer preferably has a hardness of about 10 durometer on the A-Shore scale, with a range of hardness between 10 and 60 having been found to be acceptable.
In order to enhance the thermal conductivity of the material, the resin is preferably compounded with a substance to enhance such conductivity. In particular, the materials employed for enhancement of thermal conductivity include such electrical insulators as alumina, boron nitride, aluminum nitride and mixtures thereof, mixtures of alumina and boron nitride, finely divided metallic particles such as finely divided copper, aluminum, steel or the like. Such materials may be added to the silicone rubber in an amount ranging from between about 20% to 50% by volume of compound solids, balance resin solids.
Therefore, it is a primary object of the present invention to provide an imProved interface means for mounting and interposit.ioning between the sheath portion of an encapsulated semiconductor device ancl the mounting surface therefor, wherein the interface means comprises a generally soft pliable plastic layer of a 6ynthetic resin having a hardness of between about 10 and 60 durometer, A-Shore scale.
It is yet a further object of the present invention to provide an interface means for mounting between the sheath portion of an encapsulated aemiconductor apparatu~ and a mounting surface therefor, wherein a soft pliable pla~tic layer of ~ynthetic resin i~ provided, with the synthetic resin being selected from the group con6i~ting of silicone rubber, epoxy, polyester and polyurethane, and wherein the plastic material iB
filled with finely divided solids to enhance thermal conductivity.
Other and further objects of the present invention will become apparent to those skilled in the art upon a study of the following spec~fication, appended claims and accompanying drawing.
IN THE DRAWING
Figure 1 i8 a perspective view of a common type of encapsulated semiconductor device utilized in the past, and illustratlng a metallic lnterface mean~ in the form of a ground plane secured to a planar surface of the sheath portion: and Figure 2 i~ a perspective view of a fully encapsulated semiconductor apparatus, with the interface means of the present invention interposed between the sheath portion of the semiconductor device and the mounting surface therefor; and Figure 3 is a side elevational vlew of the Pully encap~ulated ~emiconductor device illustrated in Figure 2, and illustrating the device mounted upon the ~urface of a typical chassis, and with a mounting ~crew being utilized to secure the device OlltO the chassis surface.
DESCRIPTION OF THE PREFERRED EMBODIMENT
In accordance with the preferred embodim~nt o~ the present invention, and with particular reference to Figurea 2 and 3 of the drawin~, a fully encapsulated semiconductor apparatus 10 is shown, with the sheath portion being utilized in order to fully enclose or ~fully encapsulate~ a semiconductor device therewithin. Specifically, the fully encapsulated semiconductor apparatus 10 includes a sheath portion 11 from which there are extendlng conductive tab members 12-12. The nut ~nd bolt comblnation 14 couples semiconductor apparatus 10 to ba~e mounting plate or chassis 15. As a still further mounting means, a mounting clip may be employed to mechanically bia~ the sem$conductor device against the surface of the chassis.
Encapsulated semiconductor devices and/or apparatus of the type illustrated in Figures 2 and 3 are, of course, commercially available.
With continued attention being directed to Figures 2 and 3, interface means 16 is provided which i8 di~posed along the base portion of fully encapsulated ~emiconductor apparatus 10.
Interface means 16 i~ in the form of a generally soft pliable plastic layer or pad of a synthetic resin substance selected from the group consisting of silicone rubber, epoxy, polyester and polyurethane, preferably filled or compounded with a thermally conductive particulate solid such as alumina, boron nitride, mixtures of alumina and boron nitride, aluminum nitride, or finely divided metallic particles. Layer 16 LB, in turn, uniformly bonded to a planar surface of the sheath portion 11 of the encapsulated semiconductor device lO. In order to provide for and facilitate sub~equent ~sembly proce~es~ adhe~31ve layer 17 may be utilized over the outer ~urface of interfacn layer 16.
The outer surface of inter~ace layer 16 may he coated with a fllm of adhesive in order to facilitate bonding to the sur~ace of a chassis or other mounting member in lieu of the nut and bolt combination 14 as illustrated in Figure 3. Suitable adhesives such as pressure sensitive adhesives, thermally actuated adh~sives or solvent based adhe~ives may be u~d. A releasQ film for covering the pressure ~ensitive adhesive film when utilized lo may be employed. Such adhesives such as the pressure sensitiYe adhesives are, of course, commercially available.
With attention being directed to Figure 3 of the drawing, semiconductor device 10 is shown mounted upon the surface of chassis 15, with layer 16 forming the interface between the encapsulated semiconductor device 10 and chas~is 15 being shown in place. As indicated, the layer 16 is formed in place on the surface of encapsulatiny sheath 11, and thus neither impedes nor otherwise restricts or retards the assembly processes and/or operations normally encountered with this type of device.
When utilized, adhesive layer 17 provlde~ for ~ufflclent adhesion and cohe~lon so as to provlde a system o~ approprl~te strength and durabllity. The thickne~ is, as lndicated, A~
small as possible, preferably less than about 0.7 mil so as to provide little, if any, impedance or re~istance to thermal conductance. The softness characteristic or property of the layer, which is preferably in the range of between 10 and 30 durometer on the A-Shore scale, is adequate to reduce the presence and~or occurrences of captured, retained, or unexpelled air and it is this f~ature which provides for the advantageous characteri~tics of the system. Durometer hardness on thls scale ranging from between 10 and 60 have been found suitable.
In the preferred embodiment, layer 16 consists of silicone rubber, having a thickness of between about 5 and 10 mils. Such a thickness has been found to provide adequate pliability so as to reduce the presence of retained or captured air, along with adequate mechanical toughness without detracting from the electrical integrity of the overall device.
In an alternate preferrQd embodiment, laver 16 iB form~d in place on the eurface of mounting ~urface or cha6si~ 15, and i5 deslgned to receive the encap~ulated semlconductor device 10 thereon. In such an arrangement, therefore, the interface film is applied directly to the outer surface of cha6sis 15. In a subsequent ae6embly operation, therefore, sheathed semiconductor devices are mounted in place in a configuration consi6tent with the requirements of the assembly. Other feature~, ~uch a~
interface thickne6s and properties remain the eame as previously ~et forth.
As indicated in Figure 1, the conventional transistor and/or other semiconductor utilized in the past employs a metallic ground plane for direct contact with the cha~sis. In certain applications, however, the utilization of such a metallic member renders it difficult to achieve a fully uniform and fully contacting pair of mating surfaces. In such instances, the uneven characteristics or non-planar characterietic~ of the metallic member of the semiconductor device and/or the chassie member reduces the area of contact between the metallic pad member oP the ~emiconductor device and the surface of the mounting chas~is.
1 3~7355 It will be appreclated that thoee skilled ~n the art may depart from the example ~iven hereinabove without departing from the spirit and scope of the present invention.
What is claimed is:
Claims (7)
1. In an interface means for positionable mounting between the sheath portion of an encapsulated semiconductor apparatus and a mounting surface therefor for enhancement of thermal conductivity between the encapsulated semiconductor device and the mounting surface, said interface means comprising:
(a) a generally soft pliable plastic layer of a synthetic resin selected from the group consisting of silicone rubber, epoxy, polyester and polyurethane bonded to a planar surface of said sheath portion of an encapsulated semiconductor device, and wherein;
(b) said soft pliable layer has a thickness of less than about 10 mils and a hardness of between about 10 and 60 durometer, A-Shore scale.
(a) a generally soft pliable plastic layer of a synthetic resin selected from the group consisting of silicone rubber, epoxy, polyester and polyurethane bonded to a planar surface of said sheath portion of an encapsulated semiconductor device, and wherein;
(b) said soft pliable layer has a thickness of less than about 10 mils and a hardness of between about 10 and 60 durometer, A-Shore scale.
2. The interface means as defined in Claim 1 being particularly characterized in that said soft pliable plastic layer is silicone rubber.
3. The interface means as defined in Claim 1 being particularly characterized in that said soft pliable layer is compounded with thermally conductive solids in particulate form.
4. The interface means as defined in Claim 3 being particularly characterized in that said thermally conductive particulate solids are selected from the group consisting of alumina, boron nitride, aluminum nitride, mixtures of alumina and boron nitride, and metallic particles.
5. The interface means as defined in Claim 1 being particularly characterized in that said soft pliable plastic layer has a hardness of about 20 durometer, A-Shore scale.
6. The interface means as defined in Claim 5 wherein said soft pliable plastic layer consists of silicone rubber.
7. The interface means as defined in Claim 1 being particularly characterized in that the outer surface of said soft pliable plastic layer is coated with a film of pressure sensitive adhesive.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US19919588A | 1988-05-26 | 1988-05-26 | |
| US07/199,195 | 1988-05-26 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CA1307355C true CA1307355C (en) | 1992-09-08 |
Family
ID=22736595
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CA000576364A Expired - Fee Related CA1307355C (en) | 1988-05-26 | 1988-09-02 | Soft-faced semiconductor component backing |
Country Status (6)
| Country | Link |
|---|---|
| JP (1) | JPH01305548A (en) |
| KR (1) | KR890017799A (en) |
| CA (1) | CA1307355C (en) |
| DE (1) | DE3836002A1 (en) |
| FR (1) | FR2632119B1 (en) |
| GB (1) | GB2219133B (en) |
Families Citing this family (22)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| FI88452C (en) * | 1990-03-29 | 1993-05-10 | Nokia Mobile Phones Ltd | Design to improve cooling of a power transistor |
| DE4037488A1 (en) * | 1990-11-24 | 1992-05-27 | Bosch Gmbh Robert | POWER COMPONENTS WITH ELECTRICALLY INSULATING THERMAL CONNECTION |
| DE4105152A1 (en) * | 1991-02-20 | 1992-09-03 | Export Contor Aussenhandel | Electronic circuit mounted onto heat sink for efficient cooling - has elements interconnected by bridging strips and uses common base of electrical insulating material |
| DE4108667C2 (en) * | 1991-03-16 | 2000-05-04 | Bosch Gmbh Robert | Composite arrangement of a metallic base plate and a ceramic printed circuit board and method for their production |
| DE4237763C2 (en) * | 1992-11-09 | 1996-01-25 | Siemens Ag | Device for the isolated fastening of heat-generating semiconductor components |
| DE4302917C1 (en) * | 1993-02-03 | 1994-07-07 | Bosch Gmbh Robert | Arrangement for heat dissipation of power components mounted on printed circuit boards |
| US5545473A (en) * | 1994-02-14 | 1996-08-13 | W. L. Gore & Associates, Inc. | Thermally conductive interface |
| US5591034A (en) * | 1994-02-14 | 1997-01-07 | W. L. Gore & Associates, Inc. | Thermally conductive adhesive interface |
| FR2718600B1 (en) * | 1994-04-11 | 1996-06-14 | Sagem | Device for clamping electrical power components on a chassis. |
| DE19506664A1 (en) * | 1995-02-25 | 1996-02-29 | Bosch Gmbh Robert | Electric control apparatus for vehicle IC engine electromechanical mechanism |
| DE19543920C2 (en) * | 1995-11-24 | 2000-11-16 | Eupec Gmbh & Co Kg | Power semiconductor module |
| US5738936A (en) * | 1996-06-27 | 1998-04-14 | W. L. Gore & Associates, Inc. | Thermally conductive polytetrafluoroethylene article |
| DE19734110C1 (en) * | 1997-08-07 | 1998-11-19 | Bosch Gmbh Robert | Electrical device with heat sink mat for electronic component board |
| JPH11186003A (en) * | 1997-12-25 | 1999-07-09 | Yazaki Corp | Heat sink structure of ptc device |
| JP4086946B2 (en) | 1998-01-05 | 2008-05-14 | 日東電工株式会社 | Thermally conductive pressure-sensitive adhesive sheets and methods for fixing electronic components and heat dissipation members using the same |
| DE19835127A1 (en) * | 1998-08-04 | 2000-02-10 | Wuerth Elektronik Gmbh | Circuit board with a heatsink and method for attaching a heatsink |
| JP3740117B2 (en) * | 2002-11-13 | 2006-02-01 | 三菱電機株式会社 | Power semiconductor device |
| JP4154325B2 (en) * | 2003-12-19 | 2008-09-24 | 株式会社日立産機システム | Electrical circuit module |
| JP4976718B2 (en) * | 2005-03-25 | 2012-07-18 | 住友化学株式会社 | Solid-state imaging device and manufacturing method thereof |
| US20070013053A1 (en) * | 2005-07-12 | 2007-01-18 | Peter Chou | Semiconductor device and method for manufacturing a semiconductor device |
| US9057569B2 (en) | 2010-11-22 | 2015-06-16 | Kabushiki Kaisha Toshiba | Ceramic heat sink material for pressure contact structure and semiconductor module using the same |
| JP6315229B2 (en) | 2013-06-27 | 2018-04-25 | 株式会社リコー | Heat dissipation parts, electronic equipment |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB1086003A (en) * | 1964-03-13 | 1967-10-04 | Ass Elect Ind | Mounting arrangements for electronic devices |
| GB1265007A (en) * | 1968-12-09 | 1972-03-01 | ||
| US3846824A (en) * | 1973-06-13 | 1974-11-05 | Gen Electric | Improved thermally conductive and electrically insulative mounting systems for heat sinks |
| US4394530A (en) * | 1977-09-19 | 1983-07-19 | Kaufman Lance R | Power switching device having improved heat dissipation means |
| EP0002883B1 (en) * | 1977-12-23 | 1981-01-07 | International Business Machines Corporation | A thermal interface between surfaces of a heat source and heat sink |
| DE3169519D1 (en) * | 1980-06-21 | 1985-05-02 | Lucas Ind Plc | Semi-conductor power device assembly and method of manufacture thereof |
| US4396936A (en) * | 1980-12-29 | 1983-08-02 | Honeywell Information Systems, Inc. | Integrated circuit chip package with improved cooling means |
| EP0065686A3 (en) * | 1981-05-21 | 1984-10-10 | General Electric Company | Power device module |
| US4654754A (en) * | 1982-11-02 | 1987-03-31 | Fairchild Weston Systems, Inc. | Thermal link |
| JPS6028252A (en) * | 1983-07-26 | 1985-02-13 | Toshiba Corp | Resin-sealed semiconductor device |
| US4602678A (en) * | 1983-09-02 | 1986-07-29 | The Bergquist Company | Interfacing of heat sinks with electrical devices, and the like |
| US4574879A (en) * | 1984-02-29 | 1986-03-11 | The Bergquist Company | Mounting pad for solid-state devices |
| US4666545A (en) * | 1984-06-27 | 1987-05-19 | The Bergquist Company | Method of making a mounting base pad for semiconductor devices |
| GB8610814D0 (en) * | 1986-05-02 | 1986-06-11 | Trw Transport Elect Ltd | Adhesive mountings |
| EP0276345B1 (en) * | 1987-01-28 | 1993-03-17 | Unisys Corporation | Elastic bladder method of fabricating an integrated circuit package having bonding pads in a stepped cavity |
-
1988
- 1988-09-02 CA CA000576364A patent/CA1307355C/en not_active Expired - Fee Related
- 1988-09-21 KR KR1019880012188A patent/KR890017799A/en not_active Application Discontinuation
- 1988-09-22 JP JP63238624A patent/JPH01305548A/en active Pending
- 1988-10-05 FR FR888813027A patent/FR2632119B1/fr not_active Expired - Fee Related
- 1988-10-10 GB GB8823716A patent/GB2219133B/en not_active Expired - Lifetime
- 1988-10-21 DE DE3836002A patent/DE3836002A1/en not_active Ceased
Also Published As
| Publication number | Publication date |
|---|---|
| JPH01305548A (en) | 1989-12-08 |
| GB2219133B (en) | 1991-11-20 |
| KR890017799A (en) | 1989-12-18 |
| FR2632119A1 (en) | 1989-12-01 |
| GB2219133A (en) | 1989-11-29 |
| DE3836002A1 (en) | 1989-11-30 |
| FR2632119B1 (en) | 1994-09-02 |
| GB8823716D0 (en) | 1988-11-16 |
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