DE3784906D1 - Verfahren, das eine elastische folie benutzt zum herstellen einer integrierten schaltungspackung mit kontaktflecken in einer abgestuften grube. - Google Patents
Verfahren, das eine elastische folie benutzt zum herstellen einer integrierten schaltungspackung mit kontaktflecken in einer abgestuften grube.Info
- Publication number
- DE3784906D1 DE3784906D1 DE8787101150T DE3784906T DE3784906D1 DE 3784906 D1 DE3784906 D1 DE 3784906D1 DE 8787101150 T DE8787101150 T DE 8787101150T DE 3784906 T DE3784906 T DE 3784906T DE 3784906 D1 DE3784906 D1 DE 3784906D1
- Authority
- DE
- Germany
- Prior art keywords
- integrated circuit
- stack
- manufacture
- epoxy
- elastic film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 238000004519 manufacturing process Methods 0.000 title 1
- 238000000034 method Methods 0.000 title 1
- 239000010410 layer Substances 0.000 abstract 4
- 239000011521 glass Substances 0.000 abstract 3
- 239000012790 adhesive layer Substances 0.000 abstract 2
- 239000000853 adhesive Substances 0.000 abstract 1
- 230000001070 adhesive effect Effects 0.000 abstract 1
- 239000004020 conductor Substances 0.000 abstract 1
- 239000012530 fluid Substances 0.000 abstract 1
- 238000010030 laminating Methods 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
- H01L21/4857—Multilayer substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/12—Mountings, e.g. non-detachable insulating substrates
- H01L23/13—Mountings, e.g. non-detachable insulating substrates characterised by the shape
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49822—Multilayer substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/4847—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
- H01L2224/48472—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/49105—Connecting at different heights
- H01L2224/49109—Connecting at different heights outside the semiconductor or solid-state body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/095—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00 with a principal constituent of the material being a combination of two or more materials provided in the groups H01L2924/013 - H01L2924/0715
- H01L2924/097—Glass-ceramics, e.g. devitrified glass
- H01L2924/09701—Low temperature co-fired ceramic [LTCC]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/1515—Shape
- H01L2924/15153—Shape the die mounting substrate comprising a recess for hosting the device
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/1515—Shape
- H01L2924/15153—Shape the die mounting substrate comprising a recess for hosting the device
- H01L2924/15155—Shape the die mounting substrate comprising a recess for hosting the device the shape of the recess being other than a cuboid
- H01L2924/15157—Top view
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/1517—Multilayer substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15312—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a pin array, e.g. PGA
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/156—Material
- H01L2924/15786—Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
- H01L2924/15787—Ceramics, e.g. crystalline carbides, nitrides or oxides
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Ceramic Engineering (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Measuring Fluid Pressure (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
- Polyoxymethylene Polymers And Polymers With Carbon-To-Carbon Bonds (AREA)
- Wire Bonding (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP87101150A EP0276345B1 (de) | 1987-01-28 | 1987-01-28 | Verfahren, das eine elastische Folie benutzt zum Herstellen einer integrierten Schaltungspackung mit Kontaktflecken in einer abgestuften Grube |
Publications (2)
Publication Number | Publication Date |
---|---|
DE3784906D1 true DE3784906D1 (de) | 1993-04-22 |
DE3784906T2 DE3784906T2 (de) | 1993-10-07 |
Family
ID=8196707
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE87101150T Expired - Lifetime DE3784906T2 (de) | 1987-01-28 | 1987-01-28 | Verfahren, das eine elastische Folie benutzt zum Herstellen einer integrierten Schaltungspackung mit Kontaktflecken in einer abgestuften Grube. |
Country Status (3)
Country | Link |
---|---|
EP (1) | EP0276345B1 (de) |
AT (1) | ATE87126T1 (de) |
DE (1) | DE3784906T2 (de) |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CA1307355C (en) * | 1988-05-26 | 1992-09-08 | David C. Degree | Soft-faced semiconductor component backing |
GB2222800B (en) * | 1988-09-16 | 1992-02-19 | Stc Plc | Hybrid circuits |
FR2739496B1 (fr) * | 1995-10-03 | 1998-01-30 | Dassault Electronique | Circuit hyperfrequence multicouches a elements actifs integres |
JPH09162320A (ja) * | 1995-12-08 | 1997-06-20 | Shinko Electric Ind Co Ltd | 半導体パッケージおよび半導体装置 |
EP0795907A1 (de) * | 1996-03-14 | 1997-09-17 | Dassault Electronique | Mehrlagige Hochfrequenzschaltung mit integrierten aktiven Elementen |
JP4129102B2 (ja) * | 1999-07-13 | 2008-08-06 | 日東電工株式会社 | 多層プリント配線板積層用離型材 |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5615059U (de) * | 1979-07-11 | 1981-02-09 | ||
US4551746A (en) * | 1982-10-05 | 1985-11-05 | Mayo Foundation | Leadless chip carrier apparatus providing an improved transmission line environment and improved heat dissipation |
US4737208A (en) * | 1986-09-29 | 1988-04-12 | American Telephone And Telegraph Company, At&T Bell Laboratories | Method of fabricating multilayer structures with nonplanar surfaces |
-
1987
- 1987-01-28 EP EP87101150A patent/EP0276345B1/de not_active Expired - Lifetime
- 1987-01-28 AT AT87101150T patent/ATE87126T1/de not_active IP Right Cessation
- 1987-01-28 DE DE87101150T patent/DE3784906T2/de not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
ATE87126T1 (de) | 1993-04-15 |
EP0276345A1 (de) | 1988-08-03 |
DE3784906T2 (de) | 1993-10-07 |
EP0276345B1 (de) | 1993-03-17 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
DE3381328D1 (de) | Ausweiskarte mit integriertem schaltkreis. | |
JPS6422251A (en) | Plastic sheath lined with adhesive and its production | |
ATE86286T1 (de) | Laminat mit druckempfindlicher klebstoffschicht und trennschicht. | |
SE8504295D0 (sv) | Sett att inkapsla pa ett berarband monterade halvledarekomponenter | |
DE3784906D1 (de) | Verfahren, das eine elastische folie benutzt zum herstellen einer integrierten schaltungspackung mit kontaktflecken in einer abgestuften grube. | |
KR900004225A (ko) | 인쇄 배선판, 그러한 판의 제조 방법 및 그러한 판에 사용하기 위한 절연 필름 | |
EP0970987A4 (de) | Fluorharzfolie,verbundmaterial das diese verwendet und verfahren zur herstellung von verbundmaterialien | |
JPS56126132A (en) | Manufacture of disk | |
JPS6419737A (en) | Multilayer interconnection tape carrier | |
JPS5758797B2 (de) | ||
EP0377332A3 (de) | Mehrschichtiger Film mit einer hitzehärtbaren Harzschicht und dessen Anwendung zur Bildung einer Isolierschicht auf einer elektrisch leitfähigen Oberfläche | |
GB2014170A (en) | Hot melt adhesive and method of bonding adherends | |
KR910007119A (ko) | 리드프레임 및 그 제조방법 | |
ATE151272T1 (de) | Selbstklebendes laminat für fuss- und fingernägel | |
ES2184108T3 (es) | Procedimiento de preparacion de un producto laminado y pelicula revestida adecuada para dicho procedimiento. | |
JPS6418698A (en) | Transfer sheet with ionizing radiation curing protective layer | |
JPS6127182Y2 (de) | ||
JPS6472547A (en) | Semiconductor device and manufacture thereof | |
SE8402759D0 (sv) | Forfarande vid framstellning av laminerade trekonstruktioner | |
JPS52136283A (en) | Decorative laminate | |
JPS5410386A (en) | Patterned molded plastic article | |
JPS56106983A (en) | Bonding method of film | |
JPS5541286A (en) | Adhesion method | |
JPS5476678A (en) | Lining of metal structure | |
JPS52123873A (en) | Sealing method of semiconductor elements |