ATE82529T1 - Verfahren zur herstellung mehrschichtiger halbleiterplatten. - Google Patents
Verfahren zur herstellung mehrschichtiger halbleiterplatten.Info
- Publication number
- ATE82529T1 ATE82529T1 AT87906862T AT87906862T ATE82529T1 AT E82529 T1 ATE82529 T1 AT E82529T1 AT 87906862 T AT87906862 T AT 87906862T AT 87906862 T AT87906862 T AT 87906862T AT E82529 T1 ATE82529 T1 AT E82529T1
- Authority
- AT
- Austria
- Prior art keywords
- image
- circuit pattern
- layer
- copper
- fabricated
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/18—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material
- H05K3/181—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material by electroless plating
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
- H05K3/4661—Adding a circuit layer by direct wet plating, e.g. electroless plating; insulating materials adapted therefor
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/01—Dielectrics
- H05K2201/0183—Dielectric layers
- H05K2201/0195—Dielectric or adhesive layers comprising a plurality of layers, e.g. in a multilayer structure
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/02—Fillers; Particles; Fibers; Reinforcement materials
- H05K2201/0203—Fillers and particles
- H05K2201/0206—Materials
- H05K2201/0236—Plating catalyst as filler in insulating material
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/11—Treatments characterised by their effect, e.g. heating, cooling, roughening
- H05K2203/1157—Using means for chemical reduction
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/12—Using specific substances
- H05K2203/125—Inorganic compounds, e.g. silver salt
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/18—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material
- H05K3/181—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material by electroless plating
- H05K3/182—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material by electroless plating characterised by the patterning method
- H05K3/184—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material by electroless plating characterised by the patterning method using masks
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4602—Manufacturing multilayer circuits characterized by a special circuit board as base or central core whereon additional circuit layers are built or additional circuit boards are laminated
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S428/00—Stock material or miscellaneous articles
- Y10S428/901—Printed circuit
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Recrystallisation Techniques (AREA)
- Bipolar Transistors (AREA)
- Liquid Deposition Of Substances Of Which Semiconductor Devices Are Composed (AREA)
- Manufacturing Of Printed Wiring (AREA)
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US06/929,640 US4761303A (en) | 1986-11-10 | 1986-11-10 | Process for preparing multilayer printed circuit boards |
EP87906862A EP0288507B1 (de) | 1986-11-10 | 1987-09-10 | Verfahren zur herstellung mehrschichtiger halbleiterplatten |
PCT/US1987/002289 WO1988003443A1 (en) | 1986-11-10 | 1987-09-10 | Process for preparing multilayer printed circuit boards |
Publications (1)
Publication Number | Publication Date |
---|---|
ATE82529T1 true ATE82529T1 (de) | 1992-12-15 |
Family
ID=25458208
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
AT87906862T ATE82529T1 (de) | 1986-11-10 | 1987-09-10 | Verfahren zur herstellung mehrschichtiger halbleiterplatten. |
Country Status (9)
Country | Link |
---|---|
US (1) | US4761303A (de) |
EP (1) | EP0288507B1 (de) |
JP (1) | JPH01501432A (de) |
AT (1) | ATE82529T1 (de) |
AU (1) | AU8102887A (de) |
CA (1) | CA1262577A (de) |
DE (1) | DE3782732T2 (de) |
WO (1) | WO1988003443A1 (de) |
ZA (1) | ZA877006B (de) |
Families Citing this family (21)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2553872B2 (ja) * | 1987-07-21 | 1996-11-13 | 東京応化工業株式会社 | ホトレジスト用剥離液 |
US5013402A (en) * | 1989-01-20 | 1991-05-07 | Casio Computer Co., Ltd. | Method of manufacturing double-sided wiring substrate |
US5049244A (en) * | 1989-01-20 | 1991-09-17 | Casio Computer Co., Ltd. | Method of manufacturing double-sided wiring substrate |
US4964947A (en) * | 1989-01-20 | 1990-10-23 | Casio Computer Co., Ltd. | Method of manufacturing double-sided wiring substrate |
US5108786A (en) * | 1989-05-01 | 1992-04-28 | Enthone-Omi, Inc. | Method of making printed circuit boards |
IT1232863B (it) * | 1989-06-27 | 1992-03-05 | Alfachimici Spa | Procedimento a ciclo ridotto per la fabbricazione di circuiti stampati, e composizione per la sua attuazione |
JPH0379100A (ja) * | 1989-08-22 | 1991-04-04 | Matsushita Electric Ind Co Ltd | 光透過ペーストおよびそれを用いた金属銅析出方法 |
US5055164A (en) * | 1990-03-26 | 1991-10-08 | Shipley Company Inc. | Electrodepositable photoresists for manufacture of hybrid circuit boards |
US5227269A (en) * | 1990-06-22 | 1993-07-13 | Texas Instruments Incorporated | Method for fabricating high density DRAM reticles |
US5318803A (en) * | 1990-11-13 | 1994-06-07 | International Business Machines Corporation | Conditioning of a substrate for electroless plating thereon |
US5162144A (en) * | 1991-08-01 | 1992-11-10 | Motorola, Inc. | Process for metallizing substrates using starved-reaction metal-oxide reduction |
TW229350B (de) * | 1992-08-28 | 1994-09-01 | Hitachi Seisakusyo Kk | |
JP2885113B2 (ja) * | 1995-01-30 | 1999-04-19 | 日本電気株式会社 | 印刷配線板およびその製造方法 |
US6207351B1 (en) | 1995-06-07 | 2001-03-27 | International Business Machines Corporation | Method for pattern seeding and plating of high density printed circuit boards |
WO1997039610A1 (en) * | 1996-04-18 | 1997-10-23 | International Business Machines Corporation | Organic-metallic composite coating for copper surface protection |
US5928790A (en) * | 1996-04-23 | 1999-07-27 | Mcgean-Rohco, Inc. | Multilayer circuit boards and processes of making the same |
US6440641B1 (en) * | 1998-07-31 | 2002-08-27 | Kulicke & Soffa Holdings, Inc. | Deposited thin film build-up layer dimensions as a method of relieving stress in high density interconnect printed wiring board substrates |
US7444253B2 (en) * | 2006-05-09 | 2008-10-28 | Formfactor, Inc. | Air bridge structures and methods of making and using air bridge structures |
RU2543518C1 (ru) * | 2013-10-03 | 2015-03-10 | Общество с ограниченной ответственностью "Компания РМТ"(ООО"РМТ") | Способ изготовления двусторонней печатной платы |
KR20150089276A (ko) * | 2014-01-27 | 2015-08-05 | 삼성전기주식회사 | 적층 세라믹 전자부품 및 외부전극용 도전성 페이스트 |
CN107124830A (zh) * | 2017-07-07 | 2017-09-01 | 台山市精诚达电路有限公司 | 一种fpc软板线路的制作方法 |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3146125A (en) * | 1960-05-31 | 1964-08-25 | Day Company | Method of making printed circuits |
US3322881A (en) * | 1964-08-19 | 1967-05-30 | Jr Frederick W Schneble | Multilayer printed circuit assemblies |
JPS512206B2 (de) * | 1972-05-18 | 1976-01-23 | ||
US3993801A (en) * | 1975-02-18 | 1976-11-23 | Surface Technology, Inc. | Catalytic developer |
FR2516739A1 (fr) * | 1981-11-17 | 1983-05-20 | Rhone Poulenc Spec Chim | Procede de fabrication de circuits electroniques de type hybride a couches epaisses, des moyens destines a la mise en oeuvre de ce procede et les circuits obtenus selon ce procede |
FR2518126B1 (fr) * | 1981-12-14 | 1986-01-17 | Rhone Poulenc Spec Chim | Procede de metallisation d'articles electriquement isolants en matiere plastique et les articles intermediaires et finis obtenus selon ce procede |
FR2544340A1 (fr) * | 1983-04-15 | 1984-10-19 | Rhone Poulenc Rech | Procede de metallisation de films souples electriquement isolants en matiere plastique thermostable et articles obtenus |
JPS60113993A (ja) * | 1983-11-25 | 1985-06-20 | 三菱電機株式会社 | 多層回路基板の製造方法 |
US4526807A (en) * | 1984-04-27 | 1985-07-02 | General Electric Company | Method for deposition of elemental metals and metalloids on substrates |
FR2566611A1 (fr) * | 1984-06-25 | 1985-12-27 | Rhone Poulenc Rech | Nouveaux circuits imprimes injectes et procede d'obtention |
-
1986
- 1986-11-10 US US06/929,640 patent/US4761303A/en not_active Expired - Lifetime
-
1987
- 1987-09-10 JP JP62506204A patent/JPH01501432A/ja active Granted
- 1987-09-10 WO PCT/US1987/002289 patent/WO1988003443A1/en active IP Right Grant
- 1987-09-10 AU AU81028/87A patent/AU8102887A/en not_active Abandoned
- 1987-09-10 AT AT87906862T patent/ATE82529T1/de not_active IP Right Cessation
- 1987-09-10 DE DE8787906862T patent/DE3782732T2/de not_active Expired - Fee Related
- 1987-09-10 EP EP87906862A patent/EP0288507B1/de not_active Expired - Lifetime
- 1987-09-17 ZA ZA877006A patent/ZA877006B/xx unknown
- 1987-09-18 CA CA000547294A patent/CA1262577A/en not_active Expired
Also Published As
Publication number | Publication date |
---|---|
ZA877006B (en) | 1988-03-23 |
JPH01501432A (ja) | 1989-05-18 |
US4761303A (en) | 1988-08-02 |
CA1262577A (en) | 1989-10-31 |
EP0288507A4 (de) | 1989-06-13 |
WO1988003443A1 (en) | 1988-05-19 |
DE3782732D1 (de) | 1992-12-24 |
AU8102887A (en) | 1988-06-01 |
DE3782732T2 (de) | 1993-04-15 |
EP0288507B1 (de) | 1992-11-19 |
JPH0529319B2 (de) | 1993-04-30 |
EP0288507A1 (de) | 1988-11-02 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
ATE82529T1 (de) | Verfahren zur herstellung mehrschichtiger halbleiterplatten. | |
US11600430B2 (en) | Inductor including high-rigidity insulating layers | |
US4597177A (en) | Fabricating contacts for flexible module carriers | |
US4421608A (en) | Method for stripping peel apart conductive structures | |
US20010042733A1 (en) | Process for manufacturing a multi-layer circuit board | |
KR950003244B1 (ko) | 다층 회로판 제조공정 | |
KR101862243B1 (ko) | 비아 및 미세 회로를 가진 인쇄회로기판을 제조하는 방법 및 그 방법에 의한 인쇄회로기판 | |
JPH10335831A (ja) | 多層プリント配線板及び該製造方法 | |
JPS5929160B2 (ja) | 配線板の製造方法 | |
GB1005943A (en) | Multilayer electrical circuit assemblies and processes for producing such assemblies | |
JPS6182497A (ja) | 印刷配線板の製造法 | |
JP4454663B2 (ja) | 複合メッキ処理抵抗素子およびそれを含むプリント回路基板の製造方法 | |
JP2874330B2 (ja) | 多層印刷配線板の製造方法 | |
JPS5921095A (ja) | 多層印刷配線板の製造方法 | |
CN113766746A (zh) | 一种精密电路的制造方法 | |
JPH10126058A (ja) | 多層プリント配線板の製造方法 | |
JPS6338291A (ja) | プリント配線板の製造方法 | |
JPS588600B2 (ja) | リヨウメンプリントハイセンバンノセイゾウホウホウ | |
JPS61147595A (ja) | 両面プリント配線基板の製造方法 | |
JPS5828890A (ja) | 電気配線回路基板およびその製造方法 | |
JPS6052087A (ja) | プリント板製造方法 | |
JPH11233920A (ja) | プリント配線板とその製造方法 | |
JPH0354873B2 (de) | ||
JPH0137877B2 (de) | ||
JPS59121895A (ja) | プリント配線基板の製造方法 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
RER | Ceased as to paragraph 5 lit. 3 law introducing patent treaties |