ATE505813T1 - Herstellung von luftspalten um eine verbindungsleitung herum - Google Patents

Herstellung von luftspalten um eine verbindungsleitung herum

Info

Publication number
ATE505813T1
ATE505813T1 AT04447219T AT04447219T ATE505813T1 AT E505813 T1 ATE505813 T1 AT E505813T1 AT 04447219 T AT04447219 T AT 04447219T AT 04447219 T AT04447219 T AT 04447219T AT E505813 T1 ATE505813 T1 AT E505813T1
Authority
AT
Austria
Prior art keywords
gapes
around
connection pipe
creating air
airgaps
Prior art date
Application number
AT04447219T
Other languages
German (de)
English (en)
Inventor
Gerald Beyer
De Mussy Jean-Paul Gueneau
Karen Maex
Victor Sutcliffe
Original Assignee
Imec
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Imec filed Critical Imec
Application granted granted Critical
Publication of ATE505813T1 publication Critical patent/ATE505813T1/de

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H10W20/093—Manufacture or treatment of dielectric parts thereof by modifying materials of the dielectric parts
    • H10W20/096—Manufacture or treatment of dielectric parts thereof by modifying materials of the dielectric parts by contacting with gases, liquids or plasmas
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/01—Manufacture or treatment
    • H10W10/021—Manufacture or treatment of air gaps
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/20—Air gaps
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H10W20/072—Manufacture or treatment of dielectric parts thereof of dielectric parts comprising air gaps
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H10W20/081—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/45—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their insulating parts
    • H10W20/46—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their insulating parts comprising air gaps
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/63—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the formation processes
    • H10P14/6326—Deposition processes
    • H10P14/6328—Deposition from the gas or vapour phase
    • H10P14/6334—Deposition from the gas or vapour phase using decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/63—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the formation processes
    • H10P14/6326—Deposition processes
    • H10P14/6328—Deposition from the gas or vapour phase
    • H10P14/6334—Deposition from the gas or vapour phase using decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H10P14/6336—Deposition from the gas or vapour phase using decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition in the presence of a plasma [PECVD]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/63—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the formation processes
    • H10P14/6326—Deposition processes
    • H10P14/6342—Liquid deposition, e.g. spin-coating, sol-gel techniques or spray coating
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/66—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the type of materials
    • H10P14/665—Porous materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/69—Inorganic materials
    • H10P14/6903—Inorganic materials containing silicon
    • H10P14/6905—Inorganic materials containing silicon being a silicon carbide or silicon carbonitride and not containing oxygen, e.g. SiC or SiC:H
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/69—Inorganic materials
    • H10P14/692—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses
    • H10P14/6921—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon
    • H10P14/6922—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon the material containing Si, O and at least one of H, N, C, F or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/20—Dry etching; Plasma etching; Reactive-ion etching
    • H10P50/28—Dry etching; Plasma etching; Reactive-ion etching of insulating materials
    • H10P50/282—Dry etching; Plasma etching; Reactive-ion etching of insulating materials of inorganic materials
    • H10P50/283—Dry etching; Plasma etching; Reactive-ion etching of insulating materials of inorganic materials by chemical means
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H10W20/074—Manufacture or treatment of dielectric parts thereof of dielectric parts comprising thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
    • H10W20/076—Manufacture or treatment of dielectric parts thereof of dielectric parts comprising thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers in via holes or trenches
    • H10W20/0765—Manufacture or treatment of dielectric parts thereof of dielectric parts comprising thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers in via holes or trenches the thin functional dielectric layers being temporary, e.g. sacrificial layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H10W20/093—Manufacture or treatment of dielectric parts thereof by modifying materials of the dielectric parts
    • H10W20/095—Manufacture or treatment of dielectric parts thereof by modifying materials of the dielectric parts by irradiating with electromagnetic or particle radiation

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Drying Of Semiconductors (AREA)
  • Window Of Vehicle (AREA)
  • Manufacturing Of Electrical Connectors (AREA)
AT04447219T 2003-09-30 2004-09-30 Herstellung von luftspalten um eine verbindungsleitung herum ATE505813T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US50761303P 2003-09-30 2003-09-30

Publications (1)

Publication Number Publication Date
ATE505813T1 true ATE505813T1 (de) 2011-04-15

Family

ID=34312477

Family Applications (1)

Application Number Title Priority Date Filing Date
AT04447219T ATE505813T1 (de) 2003-09-30 2004-09-30 Herstellung von luftspalten um eine verbindungsleitung herum

Country Status (5)

Country Link
US (2) US7078352B2 (https=)
EP (1) EP1521302B1 (https=)
JP (1) JP4864307B2 (https=)
AT (1) ATE505813T1 (https=)
DE (1) DE602004032198D1 (https=)

Families Citing this family (79)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102004003337A1 (de) * 2004-01-22 2005-08-18 Infineon Technologies Ag Plasmaangeregtes chemisches Gasphasenabscheide-Verfahren, Silizium-Sauerstoff-Stickstoff-haltiges Material und Schicht-Anordnung
US7088003B2 (en) * 2004-02-19 2006-08-08 International Business Machines Corporation Structures and methods for integration of ultralow-k dielectrics with improved reliability
US7622193B2 (en) * 2004-08-18 2009-11-24 Dow Corning Corporation Coated substrates and methods for their preparation
EP1799883A2 (en) * 2004-08-18 2007-06-27 Dow Corning Corporation Coated substrates and methods for their preparation
DE102004050391B4 (de) * 2004-10-15 2007-02-08 Infineon Technologies Ag Verfahren zum Herstellen einer Schicht-Anordnung und Schicht-Anordnung
JP5214866B2 (ja) * 2005-09-16 2013-06-19 アイメック 誘電性材料に狭いトレンチを形成する方法
EP1764830B1 (en) * 2005-09-16 2012-01-25 Imec A method to create narrow trenches in dielectric materials
WO2007054195A1 (en) * 2005-11-14 2007-05-18 Unilever N.V. Packaged oxidation-stable oil-in-water emulsion
US7994046B2 (en) * 2006-01-27 2011-08-09 Taiwan Semiconductor Manufacturing Co., Ltd. Method for forming a dielectric layer with an air gap, and a structure including the dielectric layer with the air gap
JP4735314B2 (ja) * 2006-02-14 2011-07-27 ソニー株式会社 半導体装置およびその製造方法
US7682977B2 (en) * 2006-05-11 2010-03-23 Micron Technology, Inc. Methods of forming trench isolation and methods of forming arrays of FLASH memory cells
US7803713B2 (en) * 2006-09-21 2010-09-28 Taiwan Semiconductor Manufacturing Co. Ltd. Method for fabricating air gap for semiconductor device
US20100001409A1 (en) * 2006-11-09 2010-01-07 Nxp, B.V. Semiconductor device and method of manufacturing thereof
FR2910706B1 (fr) 2006-12-21 2009-03-20 Commissariat Energie Atomique Element d'interconnexion a base de nanotubes de carbone
KR100843233B1 (ko) * 2007-01-25 2008-07-03 삼성전자주식회사 배선층의 양측벽에 인접하여 에어갭을 갖는 반도체 소자 및그 제조방법
US7871923B2 (en) * 2007-01-26 2011-01-18 Taiwan Semiconductor Maufacturing Company, Ltd. Self-aligned air-gap in interconnect structures
US20080185722A1 (en) * 2007-02-05 2008-08-07 Chung-Shi Liu Formation process of interconnect structures with air-gaps and sidewall spacers
US20080242118A1 (en) 2007-03-29 2008-10-02 International Business Machines Corporation Methods for forming dense dielectric layer over porous dielectrics
US7622390B2 (en) * 2007-06-15 2009-11-24 Tokyo Electron Limited Method for treating a dielectric film to reduce damage
KR100849773B1 (ko) * 2007-06-29 2008-07-31 주식회사 하이닉스반도체 반도체 소자의 제조 방법
US20090081862A1 (en) * 2007-09-24 2009-03-26 Taiwan Semiconductor Manufacturing Co., Ltd. Air gap structure design for advanced integrated circuit technology
US7879683B2 (en) * 2007-10-09 2011-02-01 Applied Materials, Inc. Methods and apparatus of creating airgap in dielectric layers for the reduction of RC delay
US7868455B2 (en) * 2007-11-01 2011-01-11 Taiwan Semiconductor Manufacturing Company, Ltd. Solving via-misalignment issues in interconnect structures having air-gaps
JP2009135139A (ja) * 2007-11-28 2009-06-18 Toshiba Corp 半導体装置及びその製造方法
FR2926397B1 (fr) * 2008-01-16 2010-02-12 Commissariat Energie Atomique Procede de fabrication de films dielectriques permeables
US8071459B2 (en) 2008-04-17 2011-12-06 Freescale Semiconductor, Inc. Method of sealing an air gap in a layer of a semiconductor structure and semiconductor structure
KR101382564B1 (ko) * 2008-05-28 2014-04-10 삼성전자주식회사 에어갭을 갖는 층간 절연막의 형성 방법
US7754601B2 (en) * 2008-06-03 2010-07-13 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor interconnect air gap formation process
US8108820B2 (en) * 2008-09-11 2012-01-31 International Business Machines Corporation Enhanced conductivity in an airgapped integrated circuit
US7979824B2 (en) * 2008-09-11 2011-07-12 International Business Machines Corporation Cost-benefit optimization for an airgapped integrated circuit
JP5423029B2 (ja) * 2009-02-12 2014-02-19 富士通セミコンダクター株式会社 半導体装置の製造方法
DE102009010845B4 (de) * 2009-02-27 2016-10-13 Advanced Micro Devices, Inc. Verfahren zur Herstellung eines Mikrostrukturbauelements mit einer Metallisierungsstruktur mit selbstjustierten Luftspalten und wieder aufgefüllten Luftspaltausschließungszonen
US8298911B2 (en) * 2009-03-26 2012-10-30 Samsung Electronics Co., Ltd. Methods of forming wiring structures
KR101536333B1 (ko) * 2009-03-26 2015-07-14 삼성전자주식회사 배선 구조물 및 이의 형성 방법
JP2011009636A (ja) * 2009-06-29 2011-01-13 Oki Semiconductor Co Ltd ビアホールの形成方法
US8304863B2 (en) * 2010-02-09 2012-11-06 International Business Machines Corporation Electromigration immune through-substrate vias
US8456009B2 (en) * 2010-02-18 2013-06-04 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor structure having an air-gap region and a method of manufacturing the same
US8685778B2 (en) 2010-06-25 2014-04-01 International Business Machines Corporation Planar cavity MEMS and related structures, methods of manufacture and design structures
DE102010030757B4 (de) * 2010-06-30 2019-03-28 Globalfoundries Dresden Module One Limited Liability Company & Co. Kg Verfahren zur Herstellung komplexer Metallisierungssysteme in Halbleitern durch Entfernung geschädigter dielektrischer Oberflächenschichten
CN102330089B (zh) * 2010-07-14 2013-07-17 中国科学院微电子研究所 硅片打孔系统及方法
US8497203B2 (en) 2010-08-13 2013-07-30 International Business Machines Corporation Semiconductor structures and methods of manufacture
US8530347B2 (en) 2010-10-05 2013-09-10 Freescale Semiconductor, Inc. Electronic device including interconnects with a cavity therebetween and a process of forming the same
KR20120061609A (ko) * 2010-12-03 2012-06-13 삼성전자주식회사 집적회로 칩 및 이의 제조방법
WO2012078139A1 (en) 2010-12-07 2012-06-14 Primaxx, Inc. Process for manufacturing electro-mechanical systems
US8975751B2 (en) * 2011-04-22 2015-03-10 Tessera, Inc. Vias in porous substrates
KR101828063B1 (ko) 2011-05-17 2018-02-09 삼성전자주식회사 반도체 장치 및 그 형성방법
US8450212B2 (en) * 2011-06-28 2013-05-28 International Business Machines Corporation Method of reducing critical dimension process bias differences between narrow and wide damascene wires
CA2843415C (en) 2011-07-29 2019-12-31 University Of Saskatchewan Polymer-based resonator antennas
US20130069189A1 (en) * 2011-09-20 2013-03-21 United Microelectronics Corporation Bonding pad structure and fabricating method thereof
CN103094183B (zh) * 2011-10-29 2015-07-29 中芯国际集成电路制造(上海)有限公司 半导体器件的制造方法
CN103178000B (zh) * 2011-12-20 2014-11-05 中芯国际集成电路制造(上海)有限公司 半导体器件及其形成方法
US8603889B2 (en) 2012-03-30 2013-12-10 International Business Machines Corporation Integrated circuit structure having air-gap trench isolation and related design structure
US9105634B2 (en) * 2012-06-29 2015-08-11 Taiwan Semiconductor Manufacturing Company, Ltd. Voids in interconnect structures and methods for forming the same
CN103531524B (zh) * 2012-07-02 2017-02-08 中芯国际集成电路制造(上海)有限公司 含有空气隙的互连结构的制备方法
KR101986126B1 (ko) 2012-07-18 2019-06-05 삼성전자주식회사 비휘발성 메모리 소자 및 그 제조 방법
KR102054264B1 (ko) * 2012-09-21 2019-12-10 삼성전자주식회사 반도체 소자 및 그의 제조 방법
WO2014117259A1 (en) * 2013-01-31 2014-08-07 Tayfeh Aligodarz Mohammadreza Meta-material resonator antennas
US8900989B2 (en) * 2013-03-06 2014-12-02 Taiwan Semiconductor Manufacturing Company, Ltd. Method of fabricating an air gap using a damascene process and structure of same
US9401329B2 (en) 2013-03-12 2016-07-26 Taiwan Semiconductor Manufacturing Company, Ltd. Interconnect structure and method of forming the same
US9058983B2 (en) 2013-06-17 2015-06-16 International Business Machines Corporation In-situ hardmask generation
CN103325730A (zh) * 2013-06-27 2013-09-25 上海华力微电子有限公司 介电常数可调的铜互连层间介质之制造方法
US10784583B2 (en) 2013-12-20 2020-09-22 University Of Saskatchewan Dielectric resonator antenna arrays
US9230911B2 (en) 2013-12-30 2016-01-05 Taiwan Semiconductor Manufacturing Company, Ltd. Interconnect structure and method of forming the same
US9117822B1 (en) * 2014-04-29 2015-08-25 Globalfoundries Inc. Methods and structures for back end of line integration
US9583380B2 (en) 2014-07-17 2017-02-28 Globalfoundries Inc. Anisotropic material damage process for etching low-K dielectric materials
US9443956B2 (en) 2014-12-08 2016-09-13 Globalfoundries Inc. Method for forming air gap structure using carbon-containing spacer
US10170330B2 (en) * 2014-12-09 2019-01-01 Globalfoundries Inc. Method for recessing a carbon-doped layer of a semiconductor structure
US9390967B2 (en) 2014-12-11 2016-07-12 International Business Machines Corporation Method for residue-free block pattern transfer onto metal interconnects for air gap formation
US9768058B2 (en) 2015-08-10 2017-09-19 Globalfoundries Inc. Methods of forming air gaps in metallization layers on integrated circuit products
FR3040532B1 (fr) * 2015-08-31 2017-10-13 St Microelectronics Tours Sas Puce a montage en surface
US20170365504A1 (en) 2016-06-20 2017-12-21 Globalfoundries Inc. Forming air gap
KR102658192B1 (ko) * 2016-07-27 2024-04-18 삼성전자주식회사 반도체 장치 및 반도체 장치의 제조 방법
US9768118B1 (en) * 2016-09-19 2017-09-19 International Business Machines Corporation Contact having self-aligned air gap spacers
WO2018063323A1 (en) * 2016-09-30 2018-04-05 Intel Corporation Via & plug architectures for integrated circuit interconnects & methods of manufacture
DE102018127448B4 (de) 2017-11-30 2023-06-22 Taiwan Semiconductor Manufacturing Co. Ltd. Metallschienenleiter für nicht-planare Halbleiter-Bauelemente
TWI766433B (zh) * 2018-02-28 2022-06-01 美商應用材料股份有限公司 形成氣隙的系統及方法
KR102594413B1 (ko) * 2018-03-30 2023-10-27 삼성전자주식회사 반도체 장치
CN110858578B (zh) * 2018-08-23 2021-07-13 联华电子股份有限公司 管芯封环及其制造方法
US11302641B2 (en) * 2020-06-11 2022-04-12 Taiwan Semiconductor Manufacturing Company, Ltd. Self-aligned cavity strucutre

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6255156B1 (en) 1997-02-07 2001-07-03 Micron Technology, Inc. Method for forming porous silicon dioxide insulators and related structures
US6268261B1 (en) 1998-11-03 2001-07-31 International Business Machines Corporation Microprocessor having air as a dielectric and encapsulated lines and process for manufacture
US6599814B1 (en) 1999-05-03 2003-07-29 Interuniversitair Microelektronica Centrum (Imec) Method for removal of sic
US6342722B1 (en) 1999-08-05 2002-01-29 International Business Machines Corporation Integrated circuit having air gaps between dielectric and conducting lines
JP4368498B2 (ja) * 2000-05-16 2009-11-18 Ｎｅｃエレクトロニクス株式会社 半導体装置、半導体ウェーハおよびこれらの製造方法
US6387818B1 (en) 2000-07-21 2002-05-14 Advanced Micro Devices, Inc. Method of porous dielectric formation with anodic template
US6413852B1 (en) 2000-08-31 2002-07-02 International Business Machines Corporation Method of forming multilevel interconnect structure containing air gaps including utilizing both sacrificial and placeholder material
TW465039B (en) 2000-11-06 2001-11-21 United Microelectronics Corp Void-type metal interconnect and method for making the same
KR100493409B1 (ko) * 2000-12-23 2005-06-07 주식회사 하이닉스반도체 반도체 소자 제조방법
JP2002324837A (ja) * 2001-04-25 2002-11-08 Hitachi Ltd 半導体装置の製造方法
JP4661004B2 (ja) * 2001-08-17 2011-03-30 パナソニック株式会社 半導体装置の製造方法
JP2003077920A (ja) * 2001-09-04 2003-03-14 Nec Corp 金属配線の形成方法
JP3526289B2 (ja) * 2001-10-03 2004-05-10 株式会社半導体先端テクノロジーズ 半導体装置の製造方法
US6492245B1 (en) * 2001-10-16 2002-12-10 Taiwan Semiconductor Manufacturing Company Method of forming air gap isolation between a bit line contact structure and a capacitor under bit line structure
JP2003163266A (ja) * 2001-11-28 2003-06-06 Sony Corp 半導体装置の製造方法および半導体装置

Also Published As

Publication number Publication date
US20050074961A1 (en) 2005-04-07
US7078352B2 (en) 2006-07-18
EP1521302A1 (en) 2005-04-06
US20060177990A1 (en) 2006-08-10
EP1521302B1 (en) 2011-04-13
JP4864307B2 (ja) 2012-02-01
JP2005123607A (ja) 2005-05-12
DE602004032198D1 (de) 2011-05-26
US7319274B2 (en) 2008-01-15

Similar Documents

Publication Publication Date Title
ATE505813T1 (de) Herstellung von luftspalten um eine verbindungsleitung herum
ATE350333T1 (de) Verfahren zur herstellung aufgehängter poröser siliziummikrostrukturen und anwendung in gassensoren
WO2003016203A3 (de) Verfahren zur herstellung eines halbleiterbauelements sowie halbleiterbauelement, insbesondere membransensor
TW200629412A (en) Method for defining a feature on a substrate
TW200623474A (en) Method for manufacturing a small pin on integrated circuits or other devices
DE60223193D1 (de) Herstellung von intergrierten fluidischen Vorrichtungen
ATE369626T1 (de) Verfahren zur herstellung von elektronischen bauelementen
DE60334909D1 (de) Poröse perlen und herstellungsverfahren dafür
JP2010056579A5 (https=)
ATE539451T1 (de) Kombinierte ätz- und dotiermedien
ATE283234T1 (de) Verfahren zur herstellung eines mikrofluidbauelements
ATE557419T1 (de) Verfahren zur herstellung eines halbleiterbauelements
TW200501216A (en) Organic semiconductor device and method of manufacture of same
WO2008054994A3 (en) Deep ultraviolet light emitting device and method for fabricating same
WO2003095358A3 (en) Method of forming manofluidic channels
DE502004008037D1 (de) Verbindung zur bildung einer selbstorganisierenden monolage, schichtstruktur, halbleiterbauelement mit einer schichtstruktur und verfahren zur herstellung einer schichtstruktur
ATE528256T1 (de) Verfahren zur gemeinsamen herstellung von membranen und hohlräumen mit kleinem volumen und grosser masshaltigkeit
DE60211396D1 (de) Verfahren zur Herstellung von einem Gatter-Dielektrikum mit veränderlicher Dielektrizitätskonstante
ATE329255T1 (de) Halbleiterbauelement als kapazitiver feuchtesensor, sowie ein verfahren zur herstellung des halbleiterbauelements
TW200516638A (en) Formation of a double gate structure
WO2003019643A1 (fr) Dispositif semi-conducteur comportant un film isolant presentant une permittivite elevee et son procede de production
WO2007053376A3 (en) Methods and apparatus for designing and using micro-targets in overlay metrology
TW200802626A (en) Semiconductor structure pattern formation
WO2002051742A3 (de) Mikromechanisches bauelement und entsprechendes herstellungsverfahren
NO20040665L (no) Produksjon av hydrokarboner.

Legal Events

Date Code Title Description
RER Ceased as to paragraph 5 lit. 3 law introducing patent treaties