ATE434831T1 - Herstellungsverfahren für halbleiterbauelement - Google Patents

Herstellungsverfahren für halbleiterbauelement

Info

Publication number
ATE434831T1
ATE434831T1 AT01938077T AT01938077T ATE434831T1 AT E434831 T1 ATE434831 T1 AT E434831T1 AT 01938077 T AT01938077 T AT 01938077T AT 01938077 T AT01938077 T AT 01938077T AT E434831 T1 ATE434831 T1 AT E434831T1
Authority
AT
Austria
Prior art keywords
well region
hard mask
region
production process
semiconductor component
Prior art date
Application number
AT01938077T
Other languages
English (en)
Inventor
Peter Stolk
Pierre Woerlee
Mathijs Knitel
Brandenburg Anja Van
Original Assignee
Nxp Bv
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nxp Bv filed Critical Nxp Bv
Application granted granted Critical
Publication of ATE434831T1 publication Critical patent/ATE434831T1/de

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66568—Lateral single gate silicon transistors
    • H01L29/66575—Lateral single gate silicon transistors where the source and drain or source and drain extensions are self-aligned to the sides of the gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
    • H01L21/26586—Bombardment with radiation with high-energy radiation producing ion implantation characterised by the angle between the ion beam and the crystal planes or the main crystal surface
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232—Field-effect technology
    • H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/8238—Complementary field-effect transistors, e.g. CMOS
    • H01L21/823807—Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of the channel structures, e.g. channel implants, halo or pocket implants, or channel materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232—Field-effect technology
    • H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/8238—Complementary field-effect transistors, e.g. CMOS
    • H01L21/823814—Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of the source or drain structures, e.g. specific source or drain implants or silicided source or drain structures or raised source or drain structures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66568—Lateral single gate silicon transistors
    • H01L29/66575—Lateral single gate silicon transistors where the source and drain or source and drain extensions are self-aligned to the sides of the gate
    • H01L29/6659—Lateral single gate silicon transistors where the source and drain or source and drain extensions are self-aligned to the sides of the gate with both lightly doped source and drain extensions and source and drain self-aligned to the sides of the gate, e.g. lightly doped drain [LDD] MOSFET, double diffused drain [DDD] MOSFET
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/107—Substrate region of field-effect devices
    • H01L29/1075—Substrate region of field-effect devices of field-effect transistors
    • H01L29/1079—Substrate region of field-effect devices of field-effect transistors with insulated gate
    • H01L29/1083—Substrate region of field-effect devices of field-effect transistors with insulated gate with an inactive supplementary region, e.g. for preventing punch-through, improving capacity effect or leakage current

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • High Energy & Nuclear Physics (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Health & Medical Sciences (AREA)
  • Toxicology (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
AT01938077T 2000-04-12 2001-04-03 Herstellungsverfahren für halbleiterbauelement ATE434831T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
EP00201317 2000-04-12
PCT/EP2001/003749 WO2001080310A1 (en) 2000-04-12 2001-04-03 Method of manufacturing a semiconductor device

Publications (1)

Publication Number Publication Date
ATE434831T1 true ATE434831T1 (de) 2009-07-15

Family

ID=8171339

Family Applications (1)

Application Number Title Priority Date Filing Date
AT01938077T ATE434831T1 (de) 2000-04-12 2001-04-03 Herstellungsverfahren für halbleiterbauelement

Country Status (8)

Country Link
US (1) US6461908B2 (de)
EP (1) EP1275147B1 (de)
JP (1) JP4846167B2 (de)
KR (1) KR100796825B1 (de)
AT (1) ATE434831T1 (de)
DE (1) DE60139068D1 (de)
TW (1) TW533482B (de)
WO (1) WO2001080310A1 (de)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6784062B2 (en) * 2002-06-03 2004-08-31 Micron Technology, Inc. Transistor formation for semiconductor devices
JP3730947B2 (ja) * 2002-10-08 2006-01-05 松下電器産業株式会社 半導体装置の製造方法
EP1730596B1 (de) * 2004-03-30 2011-02-16 Carl Zeiss SMT AG Projektionsobjektiv und projektionsbelichtungsvorrichtung
US8212988B2 (en) * 2004-08-06 2012-07-03 Carl Zeiss GmbH Projection objective for microlithography
US7511890B2 (en) * 2005-02-04 2009-03-31 Carl Zeiss Smt Ag Refractive optical imaging system, in particular projection objective for microlithography
US7704865B2 (en) * 2005-08-23 2010-04-27 Macronix International Co., Ltd. Methods of forming charge-trapping dielectric layers for semiconductor memory devices
US9679602B2 (en) 2006-06-14 2017-06-13 Seagate Technology Llc Disc drive circuitry swap
KR100779395B1 (ko) * 2006-08-31 2007-11-23 동부일렉트로닉스 주식회사 반도체소자 및 그 제조방법
US9305590B2 (en) 2007-10-16 2016-04-05 Seagate Technology Llc Prevent data storage device circuitry swap
US20100330756A1 (en) * 2009-06-25 2010-12-30 International Business Machines Corporation Integrated circuit structure manufacturing methods using hard mask and photoresist combination
US8877596B2 (en) * 2010-06-24 2014-11-04 International Business Machines Corporation Semiconductor devices with asymmetric halo implantation and method of manufacture
DE102010063782B4 (de) * 2010-12-21 2016-12-15 Globalfoundries Dresden Module One Limited Liability Company & Co. Kg Verfahren zur Herstellung von Transistoren mit Metallgatestapeln mit großem ε und einem eingebetteten Verspannungsmaterial

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5513953A (en) * 1978-07-18 1980-01-31 Fujitsu Ltd Complementary integrated circuit
JPS5651872A (en) * 1979-10-05 1981-05-09 Oki Electric Ind Co Ltd Manufacture of complementary type mos transistor
JPH01145849A (ja) * 1987-12-01 1989-06-07 Fujitsu Ltd 半導体装置の製造方法
JPH029164A (ja) * 1988-06-28 1990-01-12 Matsushita Electric Ind Co Ltd パターン形成方法および半導体装置の製造方法
JPH02162739A (ja) * 1988-12-15 1990-06-22 Fujitsu Ltd 半導体装置の製造方法
US5227321A (en) * 1990-07-05 1993-07-13 Micron Technology, Inc. Method for forming MOS transistors
JP2917696B2 (ja) * 1992-08-22 1999-07-12 日本電気株式会社 Ｃｍｏｓ半導体装置の製造方法
JP3062398B2 (ja) * 1993-06-25 2000-07-10 松下電器産業株式会社 Ｃｍｏｓ半導体装置の製造方法
US5292681A (en) * 1993-09-16 1994-03-08 Micron Semiconductor, Inc. Method of processing a semiconductor wafer to form an array of nonvolatile memory devices employing floating gate transistors and peripheral area having CMOS transistors
US5489546A (en) * 1995-05-24 1996-02-06 Micron Technology, Inc. Method of forming CMOS devices using independent thickness spacers in a split-polysilicon DRAM process
US6004854A (en) * 1995-07-17 1999-12-21 Micron Technology, Inc. Method of forming CMOS integrated circuitry
US5736440A (en) * 1995-11-27 1998-04-07 Micron Technology, Inc. Semiconductor processing method of forming complementary NMOS and PMOS field effect transistors on a substrate
JPH09205151A (ja) * 1996-01-26 1997-08-05 Sony Corp 相補型半導体装置の製造方法
JP2980057B2 (ja) * 1997-04-30 1999-11-22 日本電気株式会社 半導体装置の製造方法
US5904520A (en) * 1998-01-05 1999-05-18 Utek Semiconductor Corp. Method of fabricating a CMOS transistor
US6187619B1 (en) * 1998-02-17 2001-02-13 Shye-Lin Wu Method to fabricate short-channel MOSFETs with an improvement in ESD resistance
US5920774A (en) * 1998-02-17 1999-07-06 Texas Instruments - Acer Incorporate Method to fabricate short-channel MOSFETS with an improvement in ESD resistance

Also Published As

Publication number Publication date
US6461908B2 (en) 2002-10-08
WO2001080310A1 (en) 2001-10-25
KR20020025892A (ko) 2002-04-04
KR100796825B1 (ko) 2008-01-22
JP2003531494A (ja) 2003-10-21
DE60139068D1 (de) 2009-08-06
EP1275147B1 (de) 2009-06-24
TW533482B (en) 2003-05-21
JP4846167B2 (ja) 2011-12-28
US20010031522A1 (en) 2001-10-18
EP1275147A1 (de) 2003-01-15

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Legal Events

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