ATE419647T1 - Verfahren zum herstellen einer halbleitervorrichtung - Google Patents
Verfahren zum herstellen einer halbleitervorrichtungInfo
- Publication number
- ATE419647T1 ATE419647T1 AT04704337T AT04704337T ATE419647T1 AT E419647 T1 ATE419647 T1 AT E419647T1 AT 04704337 T AT04704337 T AT 04704337T AT 04704337 T AT04704337 T AT 04704337T AT E419647 T1 ATE419647 T1 AT E419647T1
- Authority
- AT
- Austria
- Prior art keywords
- plasma
- layer
- etching
- dicing step
- sub
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L21/6836—Wafer tapes, e.g. grinding or dicing support tapes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/68327—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used during dicing or grinding
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Dicing (AREA)
- Drying Of Semiconductors (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
- Mechanical Treatment Of Semiconductor (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2003014567A JP3991872B2 (ja) | 2003-01-23 | 2003-01-23 | 半導体装置の製造方法 |
Publications (1)
Publication Number | Publication Date |
---|---|
ATE419647T1 true ATE419647T1 (de) | 2009-01-15 |
Family
ID=32767407
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
AT04704337T ATE419647T1 (de) | 2003-01-23 | 2004-01-22 | Verfahren zum herstellen einer halbleitervorrichtung |
Country Status (8)
Country | Link |
---|---|
US (1) | US6969669B2 (de) |
EP (1) | EP1586116B1 (de) |
JP (1) | JP3991872B2 (de) |
KR (1) | KR101085982B1 (de) |
CN (1) | CN1306564C (de) |
AT (1) | ATE419647T1 (de) |
DE (1) | DE602004018745D1 (de) |
WO (1) | WO2004066382A1 (de) |
Families Citing this family (46)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP4338650B2 (ja) | 2005-01-12 | 2009-10-07 | パナソニック株式会社 | 半導体チップの製造方法 |
EP1844495B1 (de) * | 2005-01-24 | 2011-07-27 | Panasonic Corporation | Herstellungsverfahren für halbleiterchips |
JP4275096B2 (ja) | 2005-04-14 | 2009-06-10 | パナソニック株式会社 | 半導体チップの製造方法 |
JP4275095B2 (ja) | 2005-04-14 | 2009-06-10 | パナソニック株式会社 | 半導体チップの製造方法 |
JP4288252B2 (ja) * | 2005-04-19 | 2009-07-01 | パナソニック株式会社 | 半導体チップの製造方法 |
JP4778288B2 (ja) * | 2005-09-30 | 2011-09-21 | 株式会社山武 | 圧力波発生装置の製造方法 |
JP4544231B2 (ja) * | 2006-10-06 | 2010-09-15 | パナソニック株式会社 | 半導体チップの製造方法 |
JP2008166588A (ja) * | 2006-12-28 | 2008-07-17 | Tokyo Electron Ltd | チップ切り出し方法及び治具 |
US8012857B2 (en) * | 2007-08-07 | 2011-09-06 | Semiconductor Components Industries, Llc | Semiconductor die singulation method |
US7989319B2 (en) * | 2007-08-07 | 2011-08-02 | Semiconductor Components Industries, Llc | Semiconductor die singulation method |
US7781310B2 (en) | 2007-08-07 | 2010-08-24 | Semiconductor Components Industries, Llc | Semiconductor die singulation method |
US8859396B2 (en) | 2007-08-07 | 2014-10-14 | Semiconductor Components Industries, Llc | Semiconductor die singulation method |
US9299664B2 (en) | 2010-01-18 | 2016-03-29 | Semiconductor Components Industries, Llc | Method of forming an EM protected semiconductor die |
US8384231B2 (en) | 2010-01-18 | 2013-02-26 | Semiconductor Components Industries, Llc | Method of forming a semiconductor die |
US9165833B2 (en) | 2010-01-18 | 2015-10-20 | Semiconductor Components Industries, Llc | Method of forming a semiconductor die |
US20110175209A1 (en) * | 2010-01-18 | 2011-07-21 | Seddon Michael J | Method of forming an em protected semiconductor die |
US8802545B2 (en) | 2011-03-14 | 2014-08-12 | Plasma-Therm Llc | Method and apparatus for plasma dicing a semi-conductor wafer |
US9343365B2 (en) * | 2011-03-14 | 2016-05-17 | Plasma-Therm Llc | Method and apparatus for plasma dicing a semi-conductor wafer |
US8748297B2 (en) | 2012-04-20 | 2014-06-10 | Infineon Technologies Ag | Methods of forming semiconductor devices by singulating a substrate by removing a dummy fill material |
US8946057B2 (en) * | 2012-04-24 | 2015-02-03 | Applied Materials, Inc. | Laser and plasma etch wafer dicing using UV-curable adhesive film |
JP2013251509A (ja) * | 2012-06-04 | 2013-12-12 | Tokyo Electron Ltd | 基板検査装置 |
US8969177B2 (en) | 2012-06-29 | 2015-03-03 | Applied Materials, Inc. | Laser and plasma etch wafer dicing with a double sided UV-curable adhesive film |
US9484260B2 (en) | 2012-11-07 | 2016-11-01 | Semiconductor Components Industries, Llc | Heated carrier substrate semiconductor die singulation method |
US9136173B2 (en) | 2012-11-07 | 2015-09-15 | Semiconductor Components Industries, Llc | Singulation method for semiconductor die having a layer of material along one major surface |
CN103060920A (zh) * | 2013-01-05 | 2013-04-24 | 武汉电信器件有限公司 | 一种高精度无污染的半导体晶片解理方法 |
US9299614B2 (en) * | 2013-12-10 | 2016-03-29 | Applied Materials, Inc. | Method and carrier for dicing a wafer |
JP6188587B2 (ja) * | 2014-01-15 | 2017-08-30 | 株式会社ディスコ | ウェーハの分割方法 |
JP6101227B2 (ja) * | 2014-03-17 | 2017-03-22 | 株式会社東芝 | プラズマダイシング方法およびプラズマダイシング装置 |
US9418894B2 (en) | 2014-03-21 | 2016-08-16 | Semiconductor Components Industries, Llc | Electronic die singulation method |
US9112050B1 (en) * | 2014-05-13 | 2015-08-18 | Applied Materials, Inc. | Dicing tape thermal management by wafer frame support ring cooling during plasma dicing |
US9385041B2 (en) | 2014-08-26 | 2016-07-05 | Semiconductor Components Industries, Llc | Method for insulating singulated electronic die |
JP6339514B2 (ja) * | 2015-03-25 | 2018-06-06 | Towa株式会社 | 切断装置及び切断方法 |
JP2016207737A (ja) * | 2015-04-17 | 2016-12-08 | 株式会社ディスコ | 分割方法 |
US9559007B1 (en) * | 2015-09-30 | 2017-01-31 | Semicondudtor Components Industries, Llc | Plasma etch singulated semiconductor packages and related methods |
JP6492288B2 (ja) * | 2015-10-01 | 2019-04-03 | パナソニックIpマネジメント株式会社 | 素子チップの製造方法 |
JP6524419B2 (ja) * | 2016-02-04 | 2019-06-05 | パナソニックIpマネジメント株式会社 | 素子チップの製造方法 |
JP6524535B2 (ja) * | 2016-03-11 | 2019-06-05 | パナソニックIpマネジメント株式会社 | 素子チップおよびその製造方法 |
US10366923B2 (en) | 2016-06-02 | 2019-07-30 | Semiconductor Components Industries, Llc | Method of separating electronic devices having a back layer and apparatus |
US10373869B2 (en) | 2017-05-24 | 2019-08-06 | Semiconductor Components Industries, Llc | Method of separating a back layer on a substrate using exposure to reduced temperature and related apparatus |
TWI741262B (zh) * | 2018-06-04 | 2021-10-01 | 美商帕斯馬舍門有限責任公司 | 切割晶粒附接膜的方法 |
KR102133279B1 (ko) * | 2018-06-20 | 2020-07-13 | 주식회사 엘지화학 | 회절 격자 도광판용 몰드의 제조방법 및 회절 격자 도광판의 제조방법 |
CN111112808A (zh) * | 2018-10-30 | 2020-05-08 | 三星钻石工业股份有限公司 | 基板分断装置及基板分断方法 |
JP7210100B2 (ja) * | 2018-12-03 | 2023-01-23 | 株式会社ディスコ | ウェーハの加工方法 |
JP7296718B2 (ja) * | 2018-12-11 | 2023-06-23 | 株式会社ディスコ | ウェーハの加工方法 |
US10818551B2 (en) | 2019-01-09 | 2020-10-27 | Semiconductor Components Industries, Llc | Plasma die singulation systems and related methods |
DE102020115687B4 (de) * | 2020-06-15 | 2024-05-16 | Infineon Technologies Ag | Herstellung von halbleitervorrichtungen durch dünnen und zerteilen |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2538616B1 (fr) | 1982-12-28 | 1986-01-24 | Thomson Csf | Procede de fabrication collective de diodes hyperfrequence avec encapsulation incorporee et diodes ainsi obtenues |
DE19538634C2 (de) | 1995-10-17 | 1997-09-04 | Itt Ind Gmbh Deutsche | Verfahren zum Vereinzeln von elektronischen Elementen aus einem Halbleiterwafer |
DE19505906A1 (de) | 1995-02-21 | 1996-08-22 | Siemens Ag | Verfahren zum Damage-Ätzen der Rückseite einer Halbleiterscheibe bei geschützter Scheibenvorderseite |
US6013534A (en) | 1997-07-25 | 2000-01-11 | The United States Of America As Represented By The National Security Agency | Method of thinning integrated circuits received in die form |
JP3695184B2 (ja) | 1998-12-03 | 2005-09-14 | 松下電器産業株式会社 | プラズマエッチング装置およびプラズマエッチング方法 |
JP2002093752A (ja) | 2000-09-14 | 2002-03-29 | Tokyo Electron Ltd | 半導体素子分離方法及び半導体素子分離装置 |
US6642127B2 (en) * | 2001-10-19 | 2003-11-04 | Applied Materials, Inc. | Method for dicing a semiconductor wafer |
-
2003
- 2003-01-23 JP JP2003014567A patent/JP3991872B2/ja not_active Expired - Fee Related
-
2004
- 2004-01-21 US US10/762,015 patent/US6969669B2/en not_active Expired - Lifetime
- 2004-01-22 KR KR1020057007372A patent/KR101085982B1/ko not_active IP Right Cessation
- 2004-01-22 EP EP04704337A patent/EP1586116B1/de not_active Expired - Lifetime
- 2004-01-22 AT AT04704337T patent/ATE419647T1/de not_active IP Right Cessation
- 2004-01-22 DE DE602004018745T patent/DE602004018745D1/de not_active Expired - Lifetime
- 2004-01-22 WO PCT/JP2004/000556 patent/WO2004066382A1/en active Application Filing
- 2004-01-22 CN CNB2004800011621A patent/CN1306564C/zh not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
EP1586116B1 (de) | 2008-12-31 |
CN1306564C (zh) | 2007-03-21 |
WO2004066382A1 (en) | 2004-08-05 |
EP1586116A1 (de) | 2005-10-19 |
KR20050093760A (ko) | 2005-09-23 |
JP3991872B2 (ja) | 2007-10-17 |
DE602004018745D1 (de) | 2009-02-12 |
JP2004265902A (ja) | 2004-09-24 |
US6969669B2 (en) | 2005-11-29 |
US20050072766A1 (en) | 2005-04-07 |
CN1701435A (zh) | 2005-11-23 |
KR101085982B1 (ko) | 2011-11-22 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
RER | Ceased as to paragraph 5 lit. 3 law introducing patent treaties |