ATE235713T1 - System und verfahren zur spekulativen arbitrierung bei datenübertragung - Google Patents

System und verfahren zur spekulativen arbitrierung bei datenübertragung

Info

Publication number
ATE235713T1
ATE235713T1 AT98956552T AT98956552T ATE235713T1 AT E235713 T1 ATE235713 T1 AT E235713T1 AT 98956552 T AT98956552 T AT 98956552T AT 98956552 T AT98956552 T AT 98956552T AT E235713 T1 ATE235713 T1 AT E235713T1
Authority
AT
Austria
Prior art keywords
data
bus
modules
main memory
early warning
Prior art date
Application number
AT98956552T
Other languages
English (en)
Inventor
Mitchell A Bauman
Joseph S Schibinger
Donald R Kalvestrand
Douglas E Morrissey
Original Assignee
Unisys Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Unisys Corp filed Critical Unisys Corp
Application granted granted Critical
Publication of ATE235713T1 publication Critical patent/ATE235713T1/de

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1605—Handling requests for interconnection or transfer for access to memory bus based on arbitration

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Bus Control (AREA)
  • Multi Processors (AREA)
AT98956552T 1997-11-05 1998-11-04 System und verfahren zur spekulativen arbitrierung bei datenübertragung ATE235713T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US08/964,630 US6049845A (en) 1997-11-05 1997-11-05 System and method for providing speculative arbitration for transferring data
PCT/US1998/023459 WO1999023570A1 (en) 1997-11-05 1998-11-04 System and method for providing speculative arbitration for transferring data

Publications (1)

Publication Number Publication Date
ATE235713T1 true ATE235713T1 (de) 2003-04-15

Family

ID=25508789

Family Applications (1)

Application Number Title Priority Date Filing Date
AT98956552T ATE235713T1 (de) 1997-11-05 1998-11-04 System und verfahren zur spekulativen arbitrierung bei datenübertragung

Country Status (9)

Country Link
US (1) US6049845A (de)
EP (1) EP1029283B1 (de)
JP (1) JP3635634B2 (de)
KR (1) KR100381619B1 (de)
AT (1) ATE235713T1 (de)
AU (1) AU1305199A (de)
BR (1) BR9814844A (de)
DE (1) DE69812685T2 (de)
WO (1) WO1999023570A1 (de)

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Also Published As

Publication number Publication date
EP1029283A1 (de) 2000-08-23
WO1999023570A1 (en) 1999-05-14
US6049845A (en) 2000-04-11
EP1029283B1 (de) 2003-03-26
AU1305199A (en) 1999-05-24
JP2001522092A (ja) 2001-11-13
DE69812685D1 (de) 2003-04-30
JP3635634B2 (ja) 2005-04-06
KR20010031690A (ko) 2001-04-16
KR100381619B1 (ko) 2003-04-26
BR9814844A (pt) 2000-10-03
DE69812685T2 (de) 2003-11-06

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