ATE159126T1 - Halbleiteranordnung für hohe spannungen - Google Patents
Halbleiteranordnung für hohe spannungenInfo
- Publication number
- ATE159126T1 ATE159126T1 AT93202158T AT93202158T ATE159126T1 AT E159126 T1 ATE159126 T1 AT E159126T1 AT 93202158 T AT93202158 T AT 93202158T AT 93202158 T AT93202158 T AT 93202158T AT E159126 T1 ATE159126 T1 AT E159126T1
- Authority
- AT
- Austria
- Prior art keywords
- voltage
- breakdown
- raising
- island
- zones
- Prior art date
Links
- 239000004065 semiconductor Substances 0.000 title 1
- 238000009413 insulation Methods 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
- H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
- H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
- H01L29/0619—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE] with a supplementary region doped oppositely to or in rectifying contact with the semiconductor containing or contacting region, e.g. guard rings with PN or Schottky junction
Landscapes
- Microelectronics & Electronic Packaging (AREA)
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Computer Hardware Design (AREA)
- Bipolar Transistors (AREA)
- Element Separation (AREA)
- Junction Field-Effect Transistors (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP92202210 | 1992-07-20 |
Publications (1)
Publication Number | Publication Date |
---|---|
ATE159126T1 true ATE159126T1 (de) | 1997-10-15 |
Family
ID=8210793
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
AT93202158T ATE159126T1 (de) | 1992-07-20 | 1993-07-13 | Halbleiteranordnung für hohe spannungen |
Country Status (4)
Country | Link |
---|---|
US (1) | US5324978A (de) |
JP (1) | JP2554234B2 (de) |
AT (1) | ATE159126T1 (de) |
DE (1) | DE69314401T2 (de) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3267479B2 (ja) * | 1995-10-11 | 2002-03-18 | 東芝マイクロエレクトロニクス株式会社 | 半導体集積回路装置 |
US9299857B2 (en) * | 2014-06-19 | 2016-03-29 | Macronix International Co., Ltd. | Semiconductor device |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5833881A (ja) * | 1981-08-21 | 1983-02-28 | Mitsubishi Electric Corp | 光電変換装置 |
GB2131603B (en) * | 1982-12-03 | 1985-12-18 | Philips Electronic Associated | Semiconductor devices |
GB2134705B (en) * | 1983-01-28 | 1985-12-24 | Philips Electronic Associated | Semiconductor devices |
NL8401983A (nl) * | 1984-06-22 | 1986-01-16 | Philips Nv | Halfgeleiderinrichting met verhoogde doorslagspanning. |
JPS63138766A (ja) * | 1986-11-29 | 1988-06-10 | Nec Kansai Ltd | 半導体素子 |
US5223919A (en) * | 1987-02-25 | 1993-06-29 | U. S. Philips Corp. | Photosensitive device suitable for high voltage operation |
JPH01136372A (ja) * | 1987-11-24 | 1989-05-29 | Seiko Epson Corp | 半導体装置 |
JPH01295460A (ja) * | 1988-05-24 | 1989-11-29 | Matsushita Electric Works Ltd | 半導体装置 |
GB2239986A (en) * | 1990-01-10 | 1991-07-17 | Philips Electronic Associated | A semiconductor device with increased breakdown voltage |
-
1993
- 1993-07-13 DE DE69314401T patent/DE69314401T2/de not_active Expired - Fee Related
- 1993-07-13 AT AT93202158T patent/ATE159126T1/de not_active IP Right Cessation
- 1993-07-20 JP JP5179210A patent/JP2554234B2/ja not_active Expired - Lifetime
- 1993-07-20 US US08/094,803 patent/US5324978A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
JPH06163593A (ja) | 1994-06-10 |
DE69314401T2 (de) | 1998-04-09 |
JP2554234B2 (ja) | 1996-11-13 |
US5324978A (en) | 1994-06-28 |
DE69314401D1 (de) | 1997-11-13 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
UEP | Publication of translation of european patent specification | ||
REN | Ceased due to non-payment of the annual fee |