ATE135495T1 - Apparat und verfahren zur herstellung einer speicherzelle mit schwebendem gate und doppelter dielektrikumschicht - Google Patents

Apparat und verfahren zur herstellung einer speicherzelle mit schwebendem gate und doppelter dielektrikumschicht

Info

Publication number
ATE135495T1
ATE135495T1 AT90907873T AT90907873T ATE135495T1 AT E135495 T1 ATE135495 T1 AT E135495T1 AT 90907873 T AT90907873 T AT 90907873T AT 90907873 T AT90907873 T AT 90907873T AT E135495 T1 ATE135495 T1 AT E135495T1
Authority
AT
Austria
Prior art keywords
layer
forming
conducting
insulating layer
dielectric layer
Prior art date
Application number
AT90907873T
Other languages
German (de)
English (en)
Inventor
Daniel Charles Guterman
Original Assignee
Xicor Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Xicor Inc filed Critical Xicor Inc
Application granted granted Critical
Publication of ATE135495T1 publication Critical patent/ATE135495T1/de

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66825—Unipolar field-effect transistors with an insulated gate, i.e. MISFET with a floating gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/401—Multistep manufacturing processes
    • H01L29/4011—Multistep manufacturing processes for data storage electrodes
    • H01L29/40114—Multistep manufacturing processes for data storage electrodes the electrodes comprising a conductor-insulator-conductor-insulator-semiconductor structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312—Gate electrodes for field effect devices
    • H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H01L29/42324—Gate electrodes for transistors with a floating gate
    • H01L29/42328—Gate electrodes for transistors with a floating gate with at least one additional gate other than the floating gate and the control gate, e.g. program gate, erase gate or select gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/788—Field effect transistors with field effect produced by an insulated gate with floating gate
    • H01L29/7881—Programmable transistors with only two possible levels of programmation
    • H01L29/7883—Programmable transistors with only two possible levels of programmation charging by tunnelling of carriers, e.g. Fowler-Nordheim tunnelling

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Non-Volatile Memory (AREA)
  • Semiconductor Memories (AREA)
AT90907873T 1989-06-21 1990-05-08 Apparat und verfahren zur herstellung einer speicherzelle mit schwebendem gate und doppelter dielektrikumschicht ATE135495T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US36913489A 1989-06-21 1989-06-21

Publications (1)

Publication Number Publication Date
ATE135495T1 true ATE135495T1 (de) 1996-03-15

Family

ID=23454223

Family Applications (1)

Application Number Title Priority Date Filing Date
AT90907873T ATE135495T1 (de) 1989-06-21 1990-05-08 Apparat und verfahren zur herstellung einer speicherzelle mit schwebendem gate und doppelter dielektrikumschicht

Country Status (4)

Country Link
EP (1) EP0478577B1 (fr)
AT (1) ATE135495T1 (fr)
DE (1) DE69025939T2 (fr)
WO (1) WO1990016085A1 (fr)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5331189A (en) * 1992-06-19 1994-07-19 International Business Machines Corporation Asymmetric multilayered dielectric material and a flash EEPROM using the same
DE19941684B4 (de) * 1999-09-01 2004-08-26 Infineon Technologies Ag Halbleiterbauelement als Verzögerungselement
US8320191B2 (en) 2007-08-30 2012-11-27 Infineon Technologies Ag Memory cell arrangement, method for controlling a memory cell, memory array and electronic device

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4203158A (en) * 1978-02-24 1980-05-13 Intel Corporation Electrically programmable and erasable MOS floating gate memory device employing tunneling and method of fabricating same
JPS6046554B2 (ja) * 1978-12-14 1985-10-16 株式会社東芝 半導体記憶素子及び記憶回路
US4486769A (en) * 1979-01-24 1984-12-04 Xicor, Inc. Dense nonvolatile electrically-alterable memory device with substrate coupling electrode
US4300212A (en) * 1979-01-24 1981-11-10 Xicor, Inc. Nonvolatile static random access memory devices
US4328565A (en) * 1980-04-07 1982-05-04 Eliyahou Harari Non-volatile eprom with increased efficiency
JPS5857750A (ja) * 1981-10-01 1983-04-06 Seiko Instr & Electronics Ltd 不揮発性半導体メモリ
JPS5933873A (ja) * 1982-08-20 1984-02-23 Hitachi Ltd 半導体素子の製造方法
JPS611056A (ja) * 1984-06-14 1986-01-07 Toshiba Corp 不揮発性半導体記憶装置
JPS6288368A (ja) * 1985-10-15 1987-04-22 Seiko Instr & Electronics Ltd 半導体不揮発性メモリ
US4706102A (en) * 1985-11-07 1987-11-10 Sprague Electric Company Memory device with interconnected polysilicon layers and method for making
JPS6367783A (ja) * 1986-09-09 1988-03-26 Mitsubishi Electric Corp 半導体記憶装置
JPH0196950A (ja) * 1987-10-08 1989-04-14 Fujitsu Ltd 半導体装置の製造方法

Also Published As

Publication number Publication date
WO1990016085A1 (fr) 1990-12-27
EP0478577A1 (fr) 1992-04-08
DE69025939D1 (de) 1996-04-18
EP0478577B1 (fr) 1996-03-13
DE69025939T2 (de) 1996-08-01
EP0478577A4 (en) 1992-07-08

Similar Documents

Publication Publication Date Title
EP0082256A3 (fr) Procédé pour la fabrication d'un dispositif semi-conducteur comportant des régions d'isolation diélectrique
EP0797245A3 (fr) Méthode de fabrication d'un dispositif semi-conducteur MOS vertical
DE69034023D1 (de) Verfahren zur Herstellung einer Halbleiteranordnung mit einer leitfähigen Schicht
DE3785872D1 (de) Verfahren zur herstellung eines selbstjustiert positionierten metallkontaktes.
KR900005565A (ko) 개선된 패턴 형성방법
DE3879213D1 (de) Verfahren zur selbstjustierten herstellung von kontakten zwischen in uebereinander angeordneten verdrahtungsebenen einer integrierten schaltung enthaltenen leiterbahnen.
ATE135495T1 (de) Apparat und verfahren zur herstellung einer speicherzelle mit schwebendem gate und doppelter dielektrikumschicht
KR970072380A (ko) 반도체 장치 및 그 제조 방법
JPS57145340A (en) Manufacture of semiconductor device
KR910005458A (ko) 반도체장비의 제조방법
KR960026585A (ko) 반도체소자의 소자분리 산화막의 제조방법
JPS57204146A (en) Manufacture of semiconductor device
KR910000277B1 (ko) 반도체 장치의 제조방법
WO1995028000A3 (fr) Procede de fabrication d'un composant semiconducteur dote d'une structure de cablage a couches multiples et de passages d'interconnexion etroits
KR970053546A (ko) 반도체 장치의 금속 배선 형성 방법
KR910008801A (ko) 반도체장치의 제조방법
KR890011058A (ko) 반도체 장치의 제조방법
JPS55130140A (en) Fabricating method of semiconductor device
KR910005436A (ko) 패턴층을 이용한 반도체 제조방법
JPS5648151A (en) Wiring formation of semiconductor device
KR960005791A (ko) 반도체소자의 콘택홀 형성방법
KR970053587A (ko) 다층의 금속층을 포함하는 반도체 소자 제조 방법
KR930022473A (ko) 다층배선 구조를 갖는 반도체 장치의 제조방법
KR970052793A (ko) 반도체소자의 제조방법
JPS57160154A (en) Manufacture of semiconductor device

Legal Events

Date Code Title Description
RER Ceased as to paragraph 5 lit. 3 law introducing patent treaties