WO2021227027A1 - 显示基板及其制作方法、显示装置 - Google Patents

显示基板及其制作方法、显示装置 Download PDF

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Publication number
WO2021227027A1
WO2021227027A1 PCT/CN2020/090550 CN2020090550W WO2021227027A1 WO 2021227027 A1 WO2021227027 A1 WO 2021227027A1 CN 2020090550 W CN2020090550 W CN 2020090550W WO 2021227027 A1 WO2021227027 A1 WO 2021227027A1
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WIPO (PCT)
Prior art keywords
layer
substrate
pattern
isolation
same
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PCT/CN2020/090550
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English (en)
French (fr)
Inventor
和玉鹏
周洋
张鑫
于鹏飞
姜晓峰
屈忆
杨路路
李慧君
张猛
Original Assignee
京东方科技集团股份有限公司
成都京东方光电科技有限公司
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Priority to PCT/CN2020/090550 priority Critical patent/WO2021227027A1/zh
Priority to CN202080000740.9A priority patent/CN114144886B/zh
Priority to US17/280,061 priority patent/US11864413B2/en
Publication of WO2021227027A1 publication Critical patent/WO2021227027A1/zh
Priority to US18/510,068 priority patent/US20240099053A1/en

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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80Constructional details
    • H10K59/87Passivation; Containers; Encapsulations
    • H10K59/873Encapsulations
    • H10K59/8731Encapsulations multilayered coatings having a repetitive structure, e.g. having multiple organic-inorganic bilayers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00Organic light-emitting devices
    • H10K50/80Constructional details
    • H10K50/84Passivation; Containers; Encapsulations
    • H10K50/844Encapsulations
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10OLED displays
    • H10K59/12Active-matrix OLED [AMOLED] displays
    • H10K59/121Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
    • H10K59/1213Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements the pixel elements being TFTs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10OLED displays
    • H10K59/12Active-matrix OLED [AMOLED] displays
    • H10K59/121Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
    • H10K59/1216Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements the pixel elements being capacitors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10OLED displays
    • H10K59/12Active-matrix OLED [AMOLED] displays
    • H10K59/122Pixel-defining structures or layers, e.g. banks
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/60OLEDs integrated with inorganic light-sensitive elements, e.g. with inorganic solar cells or inorganic photodiodes
    • H10K59/65OLEDs integrated with inorganic image sensors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10OLED displays
    • H10K59/12Active-matrix OLED [AMOLED] displays
    • H10K59/1201Manufacture or treatment
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10OLED displays
    • H10K59/12Active-matrix OLED [AMOLED] displays
    • H10K59/124Insulating layers formed between TFT elements and OLED elements

Definitions

  • the present disclosure relates to the field of display technology, and in particular to a display substrate, a manufacturing method thereof, and a display device.
  • the purpose of the present disclosure is to provide a display substrate, a manufacturing method thereof, and a display device.
  • a first aspect of the present disclosure provides a display substrate having a display area including a pixel area, an opening area, and an isolation area between the pixel area and the opening area, the isolation area Arranged around the opening area;
  • the pixel area includes a light-emitting function layer on a base of the display substrate, and a driving circuit layer between the base and the light-emitting function layer, and the driving circuit layer includes a conductive layer;
  • the isolation region is provided with at least one first barrier structure located on the substrate, and the first barrier structure includes: a barrier pattern and a first isolation member sequentially stacked in a direction away from the substrate; the barrier pattern Manufactured in the same layer as the conductive layer, the side surface of the first isolation member has a notch, and the light-emitting function layer extends to the portion of the isolation region, which is disconnected on the side surface of the first isolation member;
  • the isolation region is also provided with an inorganic layer structure on the substrate, the inorganic layer structure includes a multilayer inorganic film layer arranged in a stack, the barrier pattern is located between two adjacent inorganic film layers, the The first isolation member is located on the side of the inorganic layer structure facing away from the substrate.
  • the blocking pattern includes a first blocking pattern and a second blocking pattern
  • the inorganic layer structure includes a first inorganic layer, a second inorganic layer, and a third inorganic layer sequentially stacked in a direction away from the substrate, and the first barrier pattern is located between the first inorganic layer and the second inorganic layer. Between the inorganic layers, the second barrier pattern is located between the second inorganic layer and the third inorganic layer.
  • the driving circuit layer includes a transistor structure and a capacitor structure;
  • the transistor structure includes an active layer, a gate electrode, and a source-drain electrode layer that are sequentially stacked in a direction away from the substrate, and the source-drain electrode layer It includes a source electrode and a drain electrode arranged in the same layer and the same material;
  • the capacitor structure includes a first electrode plate and a second electrode plate arranged opposite to each other in a direction perpendicular to the substrate, the first electrode plate and the gate electrode Arranged in the same layer and the same material, the second electrode plate is located between the first electrode plate and the source and drain electrode layers;
  • the first inorganic layer extends between the active layer and the gate electrode as a first gate insulating layer
  • the second inorganic layer extends between the gate electrode and the second electrode plate as a first gate insulating layer.
  • the conductive layer includes the gate electrode and the second electrode plate, the first barrier pattern and the gate electrode are provided in the same layer and the same material, and the second barrier pattern is in the same layer and the same layer as the second electrode plate. Material settings.
  • the isolation region is further provided with at least one second isolation component located on the substrate, and the orthographic projection of the second isolation component on the substrate is located in the first blocking structure on the substrate.
  • the orthographic projection on the side away from the opening area;
  • the side surface of the second isolation member has a notch, and the light-emitting function layer extends to the portion of the isolation region, which is disconnected on the side surface of the second isolation member.
  • the isolation area is provided with a plurality of the second isolation components arranged at intervals;
  • the inorganic layer structure extends between each of the second isolation members and the substrate, the inorganic layer structure has a groove, and the orthographic projection of the groove on the substrate is located in the adjacent first The two isolation parts are between the orthographic projections on the substrate.
  • the inorganic layer structure includes a first gate insulating layer, a second gate insulating layer, and an interlayer dielectric layer that are sequentially stacked in a direction away from the substrate. In a direction perpendicular to the substrate, the The trench penetrates the first gate insulating layer, the second gate insulating layer and the interlayer dielectric layer.
  • the depth of the groove is
  • the first isolating component includes: a first functional pattern, a second functional pattern, and a third functional pattern stacked in a direction away from the substrate, and the first functional pattern is on the substrate.
  • the orthographic projection encompasses the orthographic projection of the second functional graphic on the substrate, and the orthographic projection of the third functional graphic on the substrate encompasses the orthographic projection of the second functional graphic on the substrate; and/ or,
  • the second isolation member includes: a fourth functional pattern, a fifth functional pattern, and a sixth functional pattern stacked in a direction away from the substrate, and the orthographic projection of the fourth functional pattern on the substrate surrounds the The orthographic projection of the fifth functional graphic on the substrate, and the orthographic projection of the sixth functional graphic on the substrate surrounds the orthographic projection of the fifth functional graphic on the substrate.
  • the pixel area is further provided with: a transistor structure located between the substrate and the light-emitting function layer; the transistor structure includes an active layer and a gate electrode stacked in a direction away from the substrate. And a source and drain electrode layer, the source and drain electrode layer includes a source electrode and a drain electrode arranged in the same layer and the same material; both the source electrode and the drain electrode include a first metal layered in order in a direction away from the substrate A sub-film layer, a second metal sub-film layer and a third metal sub-film layer;
  • the first functional pattern and the first metal sub-film layer are arranged in the same layer and the same material
  • the second functional pattern and the second metal sub-film layer are arranged in the same layer and the same material
  • the third functional pattern is arranged with the same layer and the same material.
  • the third metal sub-film layer is arranged in the same layer and the same material; and/or,
  • the fourth functional pattern and the first metal sub-film layer are set in the same layer and the same material
  • the fifth functional pattern and the second metal sub-film layer are set in the same layer and the same material
  • the sixth functional pattern is set with the same layer and the same material as the first metal sub-film layer.
  • the third metal sub-film layer is provided with the same layer and the same material.
  • the display substrate further includes: a first source-drain metal layer and a second source-drain metal layer that are sequentially stacked on the base along a direction away from the base;
  • the second source-drain metal layer includes A fourth metal sub-film layer, a fifth metal sub-film layer, and a sixth metal sub-film layer sequentially stacked in a direction away from the substrate;
  • the first functional pattern and the fourth metal sub-film layer are arranged in the same layer and the same material
  • the second functional pattern and the fifth metal sub-film layer are arranged in the same layer and the same material
  • the third functional pattern is arranged with the same layer and the same material.
  • the sixth metal sub-film layer is arranged in the same layer and the same material; and/or,
  • the fourth functional pattern and the fourth metal sub-film layer are arranged in the same layer and the same material
  • the fifth functional pattern and the fifth metal sub-film layer are arranged in the same layer and the same material
  • the sixth functional pattern is arranged with the same layer and the same material.
  • the sixth metal sub-film layer is provided with the same layer and the same material.
  • the isolation area is further provided with:
  • a retaining wall structure located on the base, the orthographic projection of the retaining wall structure on the base, the orthographic projection of the first barrier structure on the base and the second isolation member on the base Between the orthographic projections;
  • An encapsulation structure extending from the pixel region to the isolation region, the encapsulation structure including a first inorganic encapsulation layer, an organic encapsulation layer, and a second inorganic encapsulation layer that are sequentially stacked in a direction away from the substrate;
  • the first inorganic encapsulation layer and the second inorganic encapsulation layer completely cover the first barrier structure, the second isolation member, and the barrier structure;
  • the orthographic projection of the organic encapsulation layer on the substrate is located on the side of the orthographic projection of the retaining wall structure on the substrate away from the opening area.
  • the retaining wall structure includes a first retaining wall component and a second retaining wall component arranged in sequence in a direction close to the opening area, and the height of the surface of the first retaining wall component facing away from the substrate , Lower than the height of the surface of the second retaining wall component facing away from the base.
  • the pixel area is further provided with a pixel defining layer and a spacer layer which are sequentially stacked on the substrate in a direction away from the substrate;
  • the first retaining wall component includes a first retaining wall pattern and a second retaining wall pattern that are sequentially stacked in a direction away from the substrate, and the first retaining wall pattern and the pixel defining layer are arranged in the same layer and the same material;
  • the second retaining wall pattern and the spacer layer are arranged in the same layer and the same material.
  • the pixel area is further provided with a flat layer, a pixel defining layer, and a spacer layer that are sequentially stacked on the substrate in a direction away from the substrate;
  • the second retaining wall component includes a third retaining wall pattern, a fourth retaining wall pattern, and a fifth retaining wall pattern that are sequentially stacked in a direction away from the substrate, and the third retaining wall pattern is the same as the flat layer.
  • the layers are arranged in the same material, the fourth retaining wall pattern and the pixel defining layer are arranged in the same layer and the same material, and the fifth retaining wall pattern and the spacer layer are arranged in the same layer and the same material.
  • the pixel area is further provided with a first flat layer, a second flat layer, and a pixel defining layer that are sequentially stacked on the substrate in a direction away from the substrate;
  • the first retaining wall component includes a first retaining wall pattern and a second retaining wall pattern that are sequentially stacked in a direction away from the substrate, and the first retaining wall pattern and the first flat layer are arranged in the same layer and the same material , The second retaining wall pattern and the pixel defining layer are arranged in the same layer and the same material.
  • the pixel area is further provided with a first flat layer, a second flat layer, and a pixel defining layer that are sequentially stacked on the substrate in a direction away from the substrate;
  • the second retaining wall component includes a third retaining wall pattern, a fourth retaining wall pattern, and a fifth retaining wall pattern that are sequentially stacked in a direction away from the substrate.
  • the third retaining wall pattern is similar to the first flat wall pattern.
  • the layers are arranged in the same layer and the same material, the fourth retaining wall pattern and the second flat layer are arranged in the same layer and the same material, and the fifth retaining wall pattern and the pixel defining layer are arranged in the same layer and the same material.
  • a second aspect of the present disclosure provides a display device including the above display substrate.
  • a third aspect of the present disclosure provides a method for manufacturing a display substrate.
  • the display substrate has a display area.
  • the display area includes a pixel area, an opening area, and a The isolation region between the opening regions, the isolation region is arranged around the opening region; the manufacturing method includes:
  • the driving circuit layer including a conductive layer
  • An inorganic layer structure and at least one first barrier structure are fabricated on the substrate located in the isolation region;
  • the first barrier structure includes: a barrier pattern and a first isolation member sequentially stacked in a direction away from the substrate; the barrier pattern Manufactured in the same layer as the conductive layer, the side of the first isolation member has a notch;
  • the inorganic layer structure includes multilayer inorganic film layers stacked, and the barrier pattern is located between two adjacent inorganic film layers. In between, the first isolation member is located on a side of the inorganic layer structure facing away from the substrate;
  • a light-emitting function layer located in the pixel area and the isolation area is formed, and the light-emitting function layer is located in the isolation area.
  • the part of the zone is cut off at the side of the first isolation member.
  • the barrier pattern includes a first barrier pattern and a second barrier pattern;
  • the inorganic layer structure includes a first inorganic layer, a second inorganic layer, and a third inorganic layer sequentially stacked in a direction away from the substrate ,
  • the first barrier pattern is located between the first inorganic layer and the second inorganic layer, and the second barrier pattern is located between the second inorganic layer and the third inorganic layer;
  • the drive The circuit layer includes a transistor structure and a capacitor structure;
  • the transistor structure includes an active layer, a gate electrode, and a source and drain electrode layer stacked in a direction away from the substrate.
  • the source and drain electrode layers include the same layer and the same material.
  • the capacitor structure includes a first electrode plate and a second electrode plate arranged opposite to each other in a direction perpendicular to the substrate, the first electrode plate and the gate electrode are arranged in the same layer and the same material, so The second electrode plate is located between the first electrode plate and the source and drain electrode layers; the first inorganic layer extends between the active layer and the gate electrode as a first gate insulating layer, so The second inorganic layer extends between the gate and the second plate as a second gate insulating layer, and the third inorganic layer extends between the second plate and the source and drain electrode layers As an interlayer dielectric layer;
  • the step of making the blocking figure specifically includes:
  • the second barrier pattern and the second electrode plate are simultaneously formed through one patterning process.
  • the manufacturing method further includes:
  • At least one second isolation member is fabricated on the substrate located in the isolation area, the orthographic projection of the second isolation member on the substrate, and the orthographic projection of the first barrier structure on the substrate away from the opening One side of the region; the side surface of the second isolation member has a notch, and the light-emitting function layer extends to the portion of the isolation region, which is disconnected on the side surface of the second isolation member.
  • the pixel area is further provided with: a transistor structure located between the substrate and the light-emitting function layer; the transistor structure includes an active layer and a gate electrode stacked in a direction away from the substrate. And a source and drain electrode layer, the source and drain electrode layer includes a source electrode and a drain electrode provided in the same layer and the same material;
  • the steps of manufacturing the first isolation component and the second isolation component specifically include:
  • the first isolation member, the second isolation member, the source electrode, and the drain electrode are simultaneously formed.
  • the display substrate further includes: a first source-drain metal layer and a second source-drain metal layer that are sequentially stacked on the base in a direction away from the base;
  • the steps of manufacturing the first isolation component and the second isolation component specifically include:
  • the first isolation feature, the second isolation feature, and the second source-drain metal layer are simultaneously formed.
  • FIG. 1 is a schematic diagram of the structure of a display substrate provided by an embodiment of the disclosure
  • FIG. 2 is a schematic diagram of the vicinity of an opening area provided by an embodiment of the disclosure.
  • Fig. 3 is a first schematic cross-sectional view in the direction of N1N2 in Fig. 1;
  • FIG. 4 is a schematic diagram of a second cross-section in the direction of N1N2 in FIG. 1;
  • Figure 5 is an enlarged view of the location of the first isolation structure in Figure 4.
  • Fig. 6 is a schematic diagram of the light-emitting function layer being broken on the side of the first isolation member
  • Figure 7 is an enlarged view of the location of the second isolation component in Figure 4.
  • Figure 8 is an enlarged view of the location of the retaining wall structure 37 in Figure 4;
  • Fig. 9 is a third schematic cross-sectional view in the direction N1N2 in Fig. 1;
  • FIG. 10 is an enlarged view of the location of the first isolation structure in FIG. 9.
  • the position of the opening is generally located inside the display area, that is, it can be surrounded by the display area, so that the light-emitting function layer in the display screen will extend to the periphery of the cutting line at the boundary of the opening, causing water and oxygen to become
  • the light-emitting functional layer in the display screen penetrates into the display screen and causes corrosion to the display screen, resulting in display failure; moreover, when the opening is formed by cutting, the cutting crack may also extend to The inside of the display has an impact on the yield of the display.
  • embodiments of the present disclosure provide a display substrate, the display substrate has a display area, the display area includes a pixel area 10, an opening area 20, and located in An isolation region 30 between the pixel region 10 and the opening region 20, the isolation region 30 is arranged around the opening region 20;
  • the pixel area 10 includes a light-emitting function layer 61 on a base 60 of the display substrate, and a driving circuit layer between the base 60 and the light-emitting function layer 61, and the driving circuit layer includes a conductive layer;
  • the isolation region 30 is provided with at least one first barrier structure 31 located on the substrate 60, and the first barrier structure 31 includes: a barrier pattern 310 and a first isolation structure stacked in sequence along a direction away from the substrate 60.
  • Component 311; the blocking pattern and the conductive layer are made in the same layer, the side of the first isolation component 311 has a notch, the light-emitting function layer 61 extends to the portion of the isolation region 30, in the first The side of the isolation component 311 is disconnected;
  • the isolation region 30 is also provided with an inorganic layer structure on the substrate 60, and the inorganic layer structure includes multilayered inorganic film layers (such as the first inorganic layer 33 and the second inorganic layer 33 in FIG. 3 and FIG. 4).
  • the inorganic layer 34 and the third inorganic layer 35), the barrier pattern 310 is located between two adjacent inorganic film layers, and the first isolation member 311 is located on the side of the inorganic layer structure facing away from the substrate 60 .
  • the display substrate has a display area and a peripheral area 50 surrounding the display area.
  • the display area includes a pixel area 10, an aperture area 20, and a pixel area 10 and The isolation regions 30 between the opening regions 20 are described.
  • the isolation area 30 is arranged around the opening area 20, and the pixel area 10 is arranged around the isolation area 30.
  • the location of the pixel area 10 close to the isolation area 30 includes a peripheral wiring area 40.
  • a plurality of peripheral wirings 41 are provided in the peripheral wiring area 40.
  • A represents the aperture corresponding to the circular opening area
  • B represents the width of the isolation area
  • C represents the width of the peripheral wiring area.
  • the display substrate includes a rectangular display area, and the opening area 20 is located at the upper left corner or the upper right corner of the rectangular display area.
  • the shape of the opening area 20 includes regular shapes such as a circle or a rectangle.
  • the base 60 of the display substrate includes a flexible base, for example, a flexible polyimide (PI) base 60.
  • PI flexible polyimide
  • the light-emitting functional layer 61 is located on the side of the first barrier structure 31 facing away from the substrate 60, and the light-emitting functional layer 61 at least includes an organic light-emitting material layer.
  • the material layer includes a whole organic light emitting material layer for emitting white light, or an organic light emitting material layer pattern for emitting colored light (such as red light, green light, blue light, etc.).
  • the light-emitting functional layer 61 may also include, for example, an electron transport layer (election transporting layer, ETL), an electron injection layer (election injection layer, EIL), and a hole transport layer. Common layers of the entire structure such as the hole transporting layer (HTL) and the hole injection layer (HIL).
  • the light-emitting function layer 61 can cover the pixel region 10 and the isolation region 30 and can extend to the boundary of the opening region 20.
  • the light-emitting function layer 61 illustrated in FIGS. 3, 4, and 9 includes the common layer.
  • the mark 80 in FIGS. 3, 4, and 9 represents an anode pattern, and 83 represents a cathode layer.
  • the isolation region 30 may be provided with one or more first barrier structures 31 on the substrate 60.
  • the first barrier structure 31 should be as close as possible to the opening region 20
  • the plurality of first barrier structures 31 may be sequentially spaced apart in a direction away from the opening region 20.
  • the first barrier structure 31 may be arranged to surround the opening area 20.
  • the number of the first barrier structures 31, the size of the first barrier structures 31, and the distance between adjacent first barrier structures 31 can all be adjusted according to actual needs. .
  • the number of the first barrier structures 31 is between one and ten, and the minimum distance between adjacent first barrier structures 31 may be more than ten micrometers.
  • H4 is the width of the first barrier structure 31, and H5 is the distance between adjacent first barrier structures 31.
  • the isolation region 30 is provided with an inorganic layer structure located on the substrate 60.
  • the inorganic layer structure includes a multilayer inorganic film layer arranged in a stack, and each inorganic film layer is connected to the pixel area.
  • the corresponding inorganic film layer in 10 is formed as an integral structure, which can function as an insulating layer in the pixel area 10.
  • the flexibility of the inorganic film layer is poor.
  • openings are formed in the opening area 20
  • the inorganic layer at the cutting line is prone to brittle fracture, and the cracks are likely to use the inorganic film layer as a channel to further extend to the display
  • the pixel area 10 of the substrate affects the yield of the display substrate.
  • the first barrier structure 31 includes: a barrier pattern 310 and a first isolation member 311 that are sequentially stacked in a direction away from the substrate 60.
  • the number of the barrier patterns 310 can be set according to actual needs.
  • Each barrier pattern 310 is located between two adjacent inorganic film layers, and separates the adjacent inorganic film layers, thereby avoiding multiple inorganic film layers. The contact stacking together blocks the path of the crack extending to the pixel area 10.
  • the isolation region 30 is provided with a plurality of first barrier structures 31, and the inorganic layer structure can extend between the first isolation member included in each first barrier structure 31 and the substrate.
  • the layer structure has a groove, and the orthographic projection of the groove on the substrate is located between the orthographic projections of the adjacent first isolation members on the substrate.
  • the pixel area 10 further includes a driving circuit layer located between the substrate 60 and the light-emitting function layer 61, the driving circuit layer includes a conductive layer; for example, the blocking pattern 310 and the conductive layer Same-layer production; this production method enables the blocking pattern 310 and the conductive layer to use the same material and be formed in the same patterning process, which is beneficial to simplify the production process of the display substrate and save the production cost.
  • a driving circuit layer located between the substrate 60 and the light-emitting function layer 61, the driving circuit layer includes a conductive layer; for example, the blocking pattern 310 and the conductive layer Same-layer production; this production method enables the blocking pattern 310 and the conductive layer to use the same material and be formed in the same patterning process, which is beneficial to simplify the production process of the display substrate and save the production cost.
  • the first isolation member 311 is located on the side of the inorganic layer structure facing away from the substrate 60, the side of the first isolation member 311 has a notch, and the light-emitting function layer
  • the part 61 extending to the isolation region 30 can be broken at the side recess of the first isolation member 311 (as shown by the dashed circle in FIG. 6).
  • the interface of the first isolation member 311 in the direction perpendicular to the substrate 60 may be in an I-shape, but it is not limited to this.
  • barrier pattern 310 and the first isolation member 311 included in each of the first barrier structures 31 can be arranged around the opening area 20, so as to achieve barriers at any position around the opening area 20. Function.
  • At least one first barrier structure 31 is provided in the isolation region 30, and the first barrier structure 31 includes: along a direction away from the base 60
  • the barrier pattern 310 and the first isolation member 311 are stacked in sequence; the barrier pattern 310 is located between two adjacent inorganic film layers in the isolation region 30, and separates the adjacent inorganic film layers to avoid In this way, since the multiple inorganic film layers are stacked together in contact, the path of the crack extending to the pixel area 10 is blocked.
  • the side surface of the first isolation member 311 has a notch, and the part of the light-emitting function layer 61 that extends to the isolation region 30 can be disconnected at the side notch of the first isolation member 311, thereby avoiding water and Oxygen penetrates into the interior of the display substrate along the luminous function layer 61 at the cutting line of the boundary of the openings, causing corrosion to the interior of the display substrate, resulting in a display failure problem.
  • the first isolation member 311 is located on the side of the barrier pattern 310 and the inorganic layer structure away from the base 60, the first isolation member 311 is The height relative to the base 60 is increased, so as to better ensure that the light-emitting functional layer 61 can be disconnected on the side of the first isolation member 311, and prevent water and oxygen from intruding along the light-emitting functional layer 61 To the inside of the display substrate.
  • the barrier pattern 310 and the first isolation member 311 are stacked in a direction perpendicular to the substrate 60, so as to solve the problem of crack extension and water and oxygen intrusion.
  • the space occupied by the first barrier structure 31 is minimized, which is more conducive to reducing the area of the isolation region 30, so that the display substrate can meet the narrow frame in the isolation region 30.
  • the first barrier structure 31 is provided in the isolation region 30, so that after the thin film packaging process is performed, the display substrate can be effectively protected near the opening region 20 of the display substrate. Encapsulation better ensures the effectiveness and integrity of the thin film packaging, so that the display substrate can achieve a narrow frame of the display substrate in the isolation region 30 while ensuring a good packaging effect.
  • the barrier pattern 310 includes a first barrier pattern 3101 and a second barrier pattern 3102; the inorganic layer structure includes a first layer stacked in a direction away from the substrate 60.
  • both the first blocking pattern 3101 and the second blocking pattern 3102 may be arranged around the opening area 20, but it is not limited thereto.
  • the above arrangement enables the first barrier pattern 3101 to separate the first inorganic layer 33 from the second inorganic layer 34, and the second barrier pattern 3102 can separate the second inorganic layer 34 from the second inorganic layer 34.
  • the third inorganic layer 35 is spaced apart, which prevents the first inorganic layer 33, the second inorganic layer 34 and the third inorganic layer 35 from being stacked in contact with each other, and provides more favorable conditions for cracks to extend to the pixel region 10. The extension path.
  • the driving circuit layer includes a transistor structure 63 and a capacitor structure 64;
  • the transistor structure 63 includes an active layer stacked in a direction away from the substrate 60.
  • the gate and the source and drain electrode layers, the source and drain electrode layers include source and drain electrodes of the same layer and the same material;
  • the capacitor structure 64 includes first electrode plates arranged opposite to each other in a direction perpendicular to the substrate 60 641 and a second electrode plate 642, the first electrode plate 641 and the gate electrode are made of the same layer and the same material, and the second electrode plate 642 is located between the first electrode plate 641 and the source and drain electrode layers ;
  • the first inorganic layer extends between the active layer and the gate as a first gate insulating layer
  • the second inorganic layer 34 extends between the gate and the second plate 642
  • the third inorganic layer 35 extends between the second electrode plate 642 and the source and drain electrode layers as an interlayer dielectric layer
  • the conductive layer includes the gate and the second plate, the first blocking pattern 3101 and the gate are made of the same layer and the same material, and the second blocking pattern 3102 is the same as the second plate 642. Same layer and same material settings.
  • the driving circuit layer may include a plurality of sub-pixel driving circuits, and each of the sub-pixel driving circuits may include a transistor structure 63 and a capacitor structure 64.
  • the sub-pixel driving circuit includes a 7T1C circuit structure.
  • the transistor structure 63 specifically includes an active layer, a gate electrode, and a source-drain electrode layer that are sequentially stacked in a direction away from the substrate 60.
  • the source-drain electrode layer includes a source electrode and a drain electrode of the same layer and the same material. .
  • the capacitor structure 64 can be specifically used as a storage capacitor in the sub-pixel driving circuit, but is not limited to this.
  • the capacitor structure 64 includes a first electrode plate 641 and a second electrode plate 642 arranged opposite to each other in a direction perpendicular to the substrate 60.
  • the first electrode plate 641 and the gate electrode can be made of the same layer and the same material, so
  • the second electrode plate 642 is located on the side of the first electrode plate 641 facing away from the base 60 and can form a direct facing area with the first electrode plate 641.
  • the second electrode plate 642 can be specifically located Between the first electrode plate 641 and the source and drain electrode layers.
  • the pixel region 10 further includes a first gate insulating layer located between the active layer and the gate, and a second gate insulating layer located between the gate and the second electrode plate 642
  • the interlayer dielectric layer between the second electrode plate 642 and the source and drain electrode layers may be set to extend between the active layer and the gate as a first gate insulating layer, and the second inorganic layer 34 may extend to the gate and the second gate.
  • the second electrode plate 642 serves as a second gate insulating layer, and the third inorganic layer 35 extends between the second electrode plate 642 and the source and drain electrode layer as an interlayer dielectric layer.
  • the display substrate may further include a buffer layer 62 between the first inorganic layer 33 and the base 60.
  • the first barrier pattern 3101 and the gate electrode are provided in the same layer and the same material
  • the second barrier pattern 3102 and the second electrode plate 642 are provided in the same layer and the same material, so that The first barrier pattern 3101 and the gate can be formed at the same time in the same patterning process, so that the second barrier pattern 3102 and the second electrode plate 642 can be formed at the same time in the same patterning process. It simplifies the manufacturing process of the display substrate and reduces the manufacturing cost of the display substrate.
  • metal patterns such as the first barrier pattern 3101 and the second barrier pattern 3102
  • inorganic film layers such as the first gate insulating layer, the second gate insulating layer and the second gate insulating layer
  • the stacked structure of the insulating layer and the interlayer dielectric layer can well prevent the cracks from extending to the pixel region 10, which effectively improves the yield of the display substrate.
  • the isolation region 30 is further provided with at least one second isolation member 32 located on the substrate 60, and the second isolation member 32 is located directly on the substrate 60. Projection, located on the side of the orthographic projection of the first barrier structure 31 on the substrate 60 away from the opening area 20; the side surface of the second isolation member 32 has a notch, and the light-emitting function layer 61 extends The part to the isolation region 30 is cut off at the side of the second isolation member 32.
  • the isolation region 30 may also be provided with at least one second isolation member 32, the specific structure of the second isolation member 32 may be the same as the specific structure of the first isolation member 311, and the second isolation member
  • the orthographic projection of 32 on the substrate 60 is located on the side of the orthographic projection of the first barrier structure 31 on the substrate 60 away from the opening area 20.
  • each of the second isolation members 32 may be arranged around the opening area 20 to achieve a barrier function at any position around the opening area 20.
  • the side surface on which the second isolation member 32 is provided has a notch, and the portion of the light-emitting function layer 61 that extends to the isolation region 30 can be recessed on the side surface of the second isolation member 32.
  • the opening is disconnected, further avoiding the problem that water and oxygen penetrate into the display substrate along the light-emitting function layer 61 at the cutting line of the opening boundary and cause corrosion to the display substrate and cause display failure.
  • the isolation region 30 is further provided with barrier patterns located between the substrate 60 and the second isolation member 32, the number of the barrier patterns can be set according to actual needs, and each barrier pattern is Located between two adjacent inorganic film layers, the adjacent inorganic film layers are spaced apart, so as to prevent the multiple inorganic film layers from overlapping in contact and block the path of cracks extending to the pixel region 10.
  • the barrier pattern and the conductive layer are made in the same layer; this manufacturing method enables the barrier pattern and the conductive layer to use the same material and be formed in the same patterning process, which is conducive to simplifying the display
  • the production process of the substrate saves production costs.
  • the isolation region 30 is provided with a plurality of the second isolation members 32 arranged at intervals; the inorganic layer structure extends to each of the second isolation members 32 Between the inorganic layer structure and the substrate 60, the inorganic layer structure has a groove 36.
  • the orthographic projection of the groove 36 on the substrate 60 is located on the adjacent second isolation member 32 on the substrate 60. Between the orthographic projections.
  • the isolation region 30 may also be provided with a plurality of the second isolation members 32, and the plurality of the second isolation members 32 are all located on the side of the inorganic layer structure facing away from the substrate 60.
  • the trench 36 may be formed on the inorganic layer structure located between the adjacent second isolation members 32 through an etching process, thereby increasing the second isolation member 32 facing away from the substrate 60. The difference between the surface of the groove 36 and the bottom of the groove 36 makes it easier for the light-emitting function layer 61 to be disconnected at the edge of the second isolation member 32, thereby effectively improving the passage of the second isolation member 32 isolates the reliability of the light-emitting function layer 61.
  • each of the second isolation members 32 and the trenches 36 may be arranged around the opening region 20 to separate the light-emitting function layer 61 in any direction around the opening region 20.
  • the inorganic layer structure includes a first gate insulating layer, a second gate insulating layer, and an interlayer dielectric layer that are sequentially stacked in a direction away from the substrate 60, in a direction perpendicular to the substrate 60.
  • the trench 36 penetrates the first gate insulating layer, the second gate insulating layer and the interlayer dielectric layer.
  • the pixel region 10 further includes a first gate insulating layer between the active layer and the gate, and a second gate insulating layer between the gate and the second electrode plate 642 Layer, an interlayer dielectric layer located between the second electrode plate 642 and the source and drain electrode layers.
  • the first gate insulating layer, the second gate insulating layer, and the interlayer dielectric layer can all extend to the isolation region 30 to jointly form the inorganic layer located in the isolation region 30 structure.
  • the etching depth of the trench 36 can be adjusted according to actual needs. For example, the trench 36 only penetrates the interlayer dielectric layer; or as shown in FIG. 7, the trench 36 penetrates the interlayer dielectric at the same time. Layer and the second gate insulating layer; or the trench 36 penetrates the first gate insulating layer, the second gate insulating layer and the interlayer dielectric layer at the same time.
  • the back of the second isolation member 32 can be enlarged to the greatest extent.
  • the difference between the surface of the substrate 60 and the bottom of the groove 36 makes it easier for the light-emitting function layer 61 to be disconnected at the edge of the second isolation member 32, thereby maximizing the passage of the The second isolation member 32 isolates the reliability of the light-emitting function layer 61.
  • it can be arranged in a direction perpendicular to the substrate 60, and the depth of the groove 36 is
  • the depth of the groove 36 can be selected as Between (including the endpoint value), exemplarily, the depth of the groove 36 is set to
  • the thickness of the light-emitting functional layer 61 is generally When the second isolation member 32 is made of a source and drain metal layer, the thickness of the second isolation member 32 is generally Therefore, when the depth of the groove 36 is set at When between, it can better ensure that the light-emitting function layer 61 is disconnected at the edge of the second isolation member 32.
  • D in FIG. 7 is the width of the second isolation member 32
  • E is the etch width of the inorganic layer structure between adjacent second isolation members 32
  • F is the second isolation member 32 The etching depth of the inorganic layer structure underneath.
  • the number of the second isolation members 32, the size of the second isolation members 32, the distance between adjacent second isolation members 32, the length of the trench 36 Both the depth and the width of the groove 36 can be adjusted according to actual needs.
  • the number of the second isolation members 32 is between one and ten, and the minimum distance between adjacent second isolation members 32 may be more than ten micrometers.
  • the first isolation member 311 includes: a first functional pattern 3110, a second functional pattern 3111, and a third functional pattern 3112 that are sequentially stacked in a direction away from the substrate 60.
  • the orthographic projection of the first functional graphic 3110 on the substrate 60 surrounds the orthographic projection of the second functional graphic 3111 on the substrate 60, and the orthographic projection of the third functional graphic 3112 on the substrate 60
  • the projection surrounds the orthographic projection of the second functional graphic 3111 on the substrate 60; and/or, as shown in FIG.
  • the orthographic projection of the fourth functional graphic 3200 on the substrate 60 encloses the orthographic projection of the fifth functional graphic 3201 on the substrate 60.
  • the orthographic projection of the sixth functional graphic 3202 on the substrate 60 surrounds the orthographic projection of the fifth functional graphic 3201 on the substrate 60.
  • the above-mentioned setting of the first isolation part 311 includes the first function graphic 3110, the second function graphic 3111, and the third function graphic 3112; and the setting of the second isolation part 32 includes the first function graphic 3110, The four-function pattern 3200, the fifth function pattern 3201, and the sixth function pattern 3202; so that the first isolation member 311 and the second isolation member 32 can be formed into an I-shaped structure in longitudinal section, thereby It is more favorable for the light-emitting function layer 61 to be disconnected at the edges of the first isolation member 311 and the second isolation member 32.
  • the orthographic projection of the first blocking pattern 3101 on the substrate 60 can be set to cover the orthographic projection of the second blocking pattern 3102 on the substrate 60;
  • the orthographic projection of the second blocking pattern 3102 on the substrate 60 covers the orthographic projection of the first isolation member 311 on the substrate 60.
  • the above arrangement allows the first barrier pattern 3101 and the second barrier pattern 3102 to have a larger area, which is more conducive to improving the barrier effect of cracks.
  • the second functional graphic 3111 has a first gradient angle a1
  • the first blocking graphic 3101 has a second gradient angle a2
  • the first gradient angle a1 is greater than the The second slope angle a2.
  • the above setting of the first gradient angle a1 is greater than the second gradient angle a2, so that a deeper notch is formed between the second functional graphic 3111 and the first functional graphic 3110 and the third functional graphic 3112, Therefore, it is more favorable for the light-emitting function layer 61 to be disconnected at the edge of the first isolation member 311.
  • the pixel region 10 is further provided with: a transistor structure 63 located between the substrate 60 and the light-emitting function layer 61; the transistor structure 63 includes an edge An active layer, a gate electrode, and a source-drain electrode layer are stacked in order in a direction away from the substrate 60.
  • the source-drain electrode layer includes a source electrode and a drain electrode of the same layer and the same material; the source electrode and the drain electrode
  • the poles each include a first metal sub-film layer, a second metal sub-film layer, and a third metal sub-film layer sequentially stacked in a direction away from the substrate 60.
  • the first functional pattern 3110 and the first metal sub-film layer are arranged in the same layer and the same material
  • the second functional pattern 3111 and the second metal sub-film layer are arranged in the same layer and the same material
  • the third functional pattern 3112 is set in the same layer and the same material as the third metal sub-film layer
  • the fourth functional pattern 3200 is set in the same layer and the same material as the first metal sub-film layer
  • the fifth functional pattern 3201 is
  • the second metal sub-film layer is provided in the same layer and the same material
  • the sixth functional pattern 3202 and the third metal sub-film layer are provided in the same layer and the same material.
  • both the source electrode and the drain electrode include layers that are sequentially stacked in a direction away from the substrate 60.
  • the first metal sub-film layer, the second metal sub-film layer and the third metal sub-film layer, the first metal sub-film layer and the third metal sub-film layer are all made of metal titanium (Ti), the first The two sub-layers are made of metal aluminum (Al), so that the source electrode and the drain electrode are both formed in a titanium-aluminum-titanium (Ti-Al-Ti) stack structure.
  • the first functional pattern 3110 and the first metal sub-film layer are arranged in the same layer and the same material, and the second functional pattern 3111 and the second metal sub-film layer are in the same layer.
  • the third functional pattern 3112 and the third metal sub-film layer are arranged in the same layer and the same material; and the fourth functional pattern 3200 and the first metal sub-film layer are arranged in the same layer and the same material,
  • the fifth functional pattern 3201 and the second metal sub-film layer are arranged in the same layer and the same material, and the sixth functional pattern 3202 and the third metal sub-film layer are arranged in the same layer and the same material; so that the first isolation Both the component 311 and the second isolation component 32 can be formed in the same patterning process as the source electrode and the drain electrode, thereby effectively simplifying the manufacturing process of the display substrate and saving the manufacturing cost of the display substrate.
  • first isolation member 311 and the second isolation member 32 adopt the above-mentioned structure
  • first isolation member 311, the second isolation member 32, and the source electrode are simultaneously formed through a single patterning process.
  • the steps of and the drain electrode specifically include:
  • the first metal material layer, the second metal material layer, and the third metal material layer that are stacked are deposited and formed in sequence.
  • a photoresist layer is fabricated on the side of the third metal material layer facing away from the substrate 60, and the photoresist layer is exposed using a mask to form a photoresist retention area and a photoresist removal area,
  • the photoresist retention area corresponds to the area where the first isolation member 311, the second isolation member 32, the source electrode and the drain electrode are located, and the photoresist removal area is the same as the area where the first isolation member 311, the second isolation member 32, the source electrode and the drain electrode are located.
  • An isolating part 311, the second isolating part 32, the source electrode and the drain electrode are located in areas other than the area corresponding to the photoresist layer located in the photoresist removal area, and the photoresist layer in the photoresist removal area is exposed, The third metal material layer in the photoresist removal area.
  • the third metal material layer, the second metal material layer, and the first metal material layer in the photoresist removal area are etched to form the source electrode, the The drain electrode, and the first transition structure for forming the first isolation member 311 and the second transition structure for forming the second isolation member 32; then the remaining photoresist layer is peeled off.
  • the anode pattern located in the pixel area 10.
  • the anode pattern is formed by etching with an etching solution (such as nitric acid)
  • the etching solution is used to etch the first transition structure and the second transition structure at the same time , Forming the first isolation member 311 and the second isolation member 32 in an I-shaped structure.
  • the display substrate further includes: a first source-drain metal layer and a second source-drain metal layer that are sequentially stacked on the base 60 in a direction away from the base 60 66;
  • the second source-drain metal layer 66 includes a fourth metal sub-film layer, a fifth metal sub-film layer, and a sixth metal sub-film layer that are sequentially stacked along a direction away from the substrate 60.
  • the first functional pattern 3110 and the fourth metal sub-film layer are arranged in the same layer and the same material, and the second functional pattern 3111 and the fifth metal sub-film layer
  • the third functional pattern 3112 and the sixth metal sub-film layer are arranged in the same layer and the same material; and/or, the fourth functional pattern 3200 is arranged in the same layer as the fourth metal sub-film layer
  • the same material is arranged, the fifth functional pattern 3201 and the fifth metal sub-film layer are arranged in the same layer and the same material, and the sixth functional pattern 3202 and the sixth metal sub-film layer are arranged in the same layer and the same material.
  • the display substrate further includes a first source-drain metal layer and a second source-drain metal layer 66 stacked on the base 60 in a direction away from the base 60.
  • the first source-drain metal layer The source electrode and the drain electrode for forming the transistor structure 63, as well as the power line and the data line included in the display substrate.
  • the second source/drain metal layer 66 is generally used to form some conductive connections in the display substrate.
  • the passivation layer 84 in FIG. 10 is located between the first flat layer 671 and the first source/drain metal layer, and can protect the first source/drain metal layer.
  • the second source-drain metal layer 66 includes a fourth metal sub-film layer, a fifth metal sub-film layer, and a sixth metal sub-film layer that are sequentially stacked in a direction away from the substrate 60;
  • the four metal sub-film layers and the sixth metal sub-film layer are both made of titanium (Ti), and the fifth metal sub-film layer is made of metal aluminum (Al), so that the second source-drain metal layer 66 is formed It is a titanium-aluminum-titanium (Ti-Al-Ti) stack structure.
  • the first functional pattern 3110 and the fourth metal sub-film layer are arranged in the same layer and the same material, and the second functional pattern 3111 and the fifth metal sub-film layer are in the same layer.
  • the same material is arranged, the third functional pattern 3112 and the sixth metal sub-film layer are arranged in the same layer and the same material; and the fourth functional pattern 3200 and the fourth metal sub-film layer are arranged in the same layer and the same material,
  • the fifth functional pattern 3201 and the fifth metal sub-film layer are arranged in the same layer and the same material, and the sixth functional pattern 3202 and the sixth metal sub-film layer are arranged in the same layer and the same material; so that the first isolation Both the component 311 and the second isolation component 32 can be formed in the same patterning process as the second source/drain metal layer 66, thereby effectively simplifying the manufacturing process of the display substrate and saving the manufacturing cost of the display substrate.
  • the isolation area 30 is further provided with: a retaining wall structure 37 located on the base 60, and the retaining wall structure 37 is located directly on the base 60
  • the projection is located between the orthographic projection of the first barrier structure 31 on the substrate 60 and the orthographic projection of the second isolation member 32 on the substrate 60; extending from the pixel area 10 to the isolation
  • the encapsulation structure 65 of the area 30, the encapsulation structure 65 includes a first inorganic encapsulation layer 651, an organic encapsulation layer 652, and a second inorganic encapsulation layer 653 that are sequentially stacked in a direction away from the substrate 60; the first inorganic encapsulation layer The layer 651 and the second inorganic encapsulation layer 653 completely cover the first barrier structure 31, the second isolation member 32 and the barrier structure 37; the organic encapsulation layer 652 is on the substrate 60.
  • the projection is located on the side of the orthographic projection of the retaining wall structure 37 on the base 60 away from the opening area 20
  • the specific structures of the retaining wall structure 37 are various.
  • the orthographic projection of the retaining wall structure 37 on the base 60 is located on the first barrier structure 31 on the base 60 Between the orthographic projection of the second isolation member 32 and the orthographic projection of the second isolation member 32 on the base 60; and the retaining wall structure 37 can be arranged around the opening area 20.
  • the display substrate further includes the encapsulation structure 65, which generally includes a first inorganic encapsulation layer 651, an organic encapsulation layer 652, and a second inorganic encapsulation layer 653 that are sequentially stacked in a direction away from the base 60;
  • the first inorganic encapsulation layer 651 and the second inorganic encapsulation layer 653 can completely cover the first barrier structure 31, the second isolation member 32, and the retaining wall structure 37; the retaining wall structure 37 can During the process of making the organic encapsulation layer 652, the organic encapsulation material used to make the organic encapsulation layer 652 overflows, thereby restricting the organic encapsulation material in the barrier structure 37 facing away from the opening area 20 side.
  • first inorganic encapsulation layer 651 and the second inorganic encapsulation layer 653 can both be made by chemical vapor deposition.
  • the organic encapsulation layer 652 can be produced by an inkjet printing process.
  • the retaining wall structure 37 includes a first retaining wall part 370 and a second retaining wall part 371 arranged in sequence along the direction close to the opening area 20, so The height of the surface of the first wall part 370 facing away from the base 60 is lower than the height of the surface of the second wall part 371 facing away from the base 60.
  • the specific structure of the barrier structure is diverse.
  • the barrier structure 37 includes a plurality of barrier wall members arranged in sequence along the direction close to the opening area 20, and In the direction of the zone 20, the heights of the plurality of retaining wall members in the direction perpendicular to the base 60 are successively increased.
  • the retaining wall structure 37 may be provided to include the first retaining wall component 370 and the second retaining wall component 371 arranged in sequence along a direction close to the opening area 20, and the first retaining wall Both the component 370 and the second retaining wall component 371 can surround the opening area 20.
  • the retaining wall structure 37 of the above-mentioned structure is provided in the display substrate, not only the effective blocking of the organic encapsulation layer 652 is realized, but also the retaining wall structure 37 occupies a smaller layout space.
  • the pixel area 10 is further provided with a pixel defining layer 81 and spacers which are sequentially stacked on the substrate 60 in a direction away from the substrate 60.
  • the object layer 82; the first retaining wall component 370 includes a first retaining wall pattern 3701 and a second retaining wall pattern 3702 that are sequentially stacked along the direction away from the base 60, the first retaining wall pattern 3701 and the
  • the pixel defining layer 81 is arranged in the same layer and the same material, and the second retaining wall pattern 3702 and the spacer layer 82 are arranged in the same layer and the same material.
  • the pixel area 10 is further provided with the pixel defining layer 81 and the spacer layer 82, and the pixel defining layer 81 is used to form a pixel opening in the pixel area 10; the spacer is located at The pixel defining layer 81 is on the side facing away from the base 60 and plays a supporting role in the display substrate.
  • H1 represents the width of the first retaining wall component 370
  • H2 represents the distance between the first retaining wall component 370 and the second retaining wall component 371
  • H3 represents the first retaining wall component 370.
  • the first retaining wall pattern 3701 and the pixel defining layer 81 are arranged in the same layer and the same material, and the second retaining wall pattern 3702 and the spacer layer 82 are arranged in the same layer and the same material, so that the The first retaining wall pattern 3701 and the pixel defining layer 81 can be formed in the same patterning process, so that the second retaining wall pattern 3702 and the spacer layer 82 can be formed in the same patterning process, thereby improving It simplifies the manufacturing process of the display substrate and saves the manufacturing cost.
  • the pixel area 10 is further provided with a flat layer, a pixel defining layer 81, and a spacer layer that are sequentially stacked on the substrate 60 in a direction away from the substrate 60.
  • the second retaining wall component 371 includes a third retaining wall pattern 3710, a fourth retaining wall pattern 3711, and a fifth retaining wall pattern 3712 that are stacked in a direction away from the base 60, the third retaining wall
  • the pattern 3710 is arranged in the same layer and the same material as the flat layer
  • the fourth retaining wall pattern 3711 is arranged in the same layer and the same material as the pixel defining layer 81
  • the fifth retaining wall pattern 3712 is arranged with the spacer layer 82 Same layer and same material settings.
  • the pixel area 10 is provided with a driving circuit layer, a flat layer on the side of the driving circuit layer facing away from the substrate 60, and an anode layer on the side of the flat layer facing away from the substrate 60 ,
  • the driving circuit layer includes a plurality of sub-pixel driving circuits
  • the anode layer includes an anode pattern corresponding to the sub-pixel driving circuit one-to-one
  • the pixel defines a pixel opening corresponding to the anode pattern one-to-one
  • the orthographic projection of each pixel opening on the substrate 60 is surrounded by the orthographic projection of the corresponding anode pattern on the substrate 60, and each pixel opening is provided with a corresponding color organic light-emitting material layer.
  • the third retaining wall pattern 3710 and the flat layer are set in the same layer and the same material
  • the fourth retaining wall pattern 3711 and the pixel defining layer 81 are set in the same layer and the same material
  • the fifth retaining wall pattern 3712 The same layer and the same material as the spacer layer 82; so that the third retaining wall pattern 3710 and the flat layer can be formed in the same patterning process, so that the fourth retaining wall pattern 3711 can be formed with the same patterning process as the flat layer.
  • the pixel defining layer 81 is formed in the same patterning process, so that the fifth retaining wall pattern 3712 and the spacer layer 82 can be formed in the same patterning process, thereby better simplifying the manufacturing of the display substrate The process saves production costs.
  • the pixel region 10 is further provided with a first flat layer 671, a second flat layer 672, and a Pixel defining layer 81;
  • the second retaining wall part 371 includes a third retaining wall pattern 3710, a fourth retaining wall pattern 3711, and a fifth retaining wall pattern 3712 that are sequentially stacked in a direction away from the base 60, the first
  • the third retaining wall pattern 3710 is set in the same layer and the same material as the first flat layer 671
  • the fourth retaining wall pattern 3711 is set in the same layer and the same material as the second flat layer 672
  • the fifth retaining wall pattern 3712 is set in the same layer and the same material as the first flat layer 671.
  • the pixel defining layer 81 is provided with the same layer and the same material.
  • the pixel area 10 is provided with a driving circuit layer, and the first flat layer 671 located on the side of the driving circuit layer facing away from the base 60 , A second source-drain metal layer 66 located on the side of the first flat layer 671 facing away from the substrate 60, and a second flat layer located on the side of the second source-drain metal layer 66 facing away from the substrate 60 672, the anode layer located on the side of the second flat layer 672 facing away from the substrate 60, the pixel defining layer 81 located on the side of the anode layer facing away from the substrate 60, and the pixel defining layer 81 is a spacer layer 82 on the side facing away from the base 60.
  • the driving circuit layer includes a plurality of sub-pixel driving circuits, each of the sub-pixel driving circuits includes a plurality of transistor structures 63, and the driving circuit layer includes a source electrode for forming each of the transistor structures 63 And the first source-drain metal layer of the drain electrode, the first source-drain metal layer and the second source-drain metal layer 66 are the dual source-drain metal layers.
  • the third retaining wall pattern 3710 and the first flat layer 671 are arranged in the same layer and the same material
  • the fourth retaining wall pattern 3711 and the second flat layer 672 are arranged in the same layer and the same material
  • the fifth The retaining wall pattern 3712 and the pixel defining layer 81 are arranged in the same layer and the same material; so that the third retaining wall pattern 3710 and the first flat layer 671 can be formed in the same patterning process, so that the fourth retaining wall The pattern 3711 and the second flat layer 672 can be formed in the same patterning process, so that the fifth retaining wall pattern 3712 and the pixel defining layer 81 can be formed in the same patterning process, thereby better simplifying
  • the manufacturing process of the display substrate saves manufacturing cost.
  • the pixel region 10 is further provided with a first flat layer 671, a second flat layer 672, and a Pixel defining layer 81;
  • the first retaining wall member 370 includes a first retaining wall pattern 3701 and a second retaining wall pattern 3702 that are sequentially stacked in a direction away from the substrate 60, the first retaining wall pattern 3701 and the
  • the first flat layer 671 is provided in the same layer and the same material, and the second barrier pattern 3702 and the pixel defining layer 81 are provided in the same layer and the same material.
  • the first retaining wall pattern 3701 and the first flat layer 671 are arranged in the same layer and the same material, and the second retaining wall pattern 3702 and the pixel defining layer 81 are arranged in the same layer and the same material, so that all The first retaining wall pattern 3701 and the first flat layer 671 can be formed in the same patterning process, so that the second retaining wall pattern 3702 and the pixel defining layer 81 can be formed in the same patterning process, thereby The manufacturing process of the display substrate is better simplified, and the manufacturing cost is saved.
  • the first barrier structure 31, the second isolation member 32, and the barrier structure 37 included in the manufacturing process can all be the same as other functional film layers in the display substrate. It is formed in the sub-patterning process, therefore, there is no need to increase the process flow dedicated to manufacturing the first barrier structure 31, the second isolation member 32, and the retaining wall structure 37, which better guarantees the productivity.
  • the embodiments of the present disclosure also provide a display device, including the display substrate provided in the above-mentioned embodiments.
  • the first barrier structure 31 includes: a barrier pattern 310 and a second barrier pattern 310 and a second barrier structure that are sequentially stacked in a direction away from the base 60.
  • An isolation member 311; the blocking pattern 310 is located between two adjacent inorganic film layers in the isolation region 30, which separates the adjacent inorganic film layers, and avoids the contact due to the multilayer inorganic film layers. The stacking of the cracks together provides a more favorable extension path for the crack to extend to the pixel area 10.
  • the side surface of the first isolation member 311 has a notch, and the part of the light-emitting function layer 61 that extends to the isolation region 30 can be disconnected at the side notch of the first isolation member 311, thereby avoiding water and Oxygen penetrates into the interior of the display substrate along the luminous function layer 61 at the cutting line of the boundary of the openings, causing corrosion to the interior of the display substrate, resulting in a display failure problem.
  • the first isolation member 311 is located on the side of the barrier pattern 310 and the inorganic layer structure away from the base 60, the first isolation member 311 is opposite to each other.
  • the height of the substrate 60 is increased, so as to better ensure that the light-emitting functional layer 61 can be disconnected on the side of the first isolation member 311, and prevent water and oxygen from invading along the light-emitting functional layer 61. Show the inside of the substrate.
  • the barrier pattern 310 and the first isolation member 311 are stacked in a direction perpendicular to the substrate 60, so as to solve the problem of crack extension and water and oxygen intrusion.
  • the space occupied by the first barrier structure 31 is minimized, which is more conducive to reducing the area of the isolation region 30, so that the display substrate can meet the narrow frame in the isolation region 30.
  • the first barrier structure is provided in the isolation region 30, so that after the thin film packaging process is performed, the opening region of the display substrate can be realized.
  • the effective packaging near 20 can better ensure the effectiveness and integrity of the thin film packaging, so that the display substrate can better meet the demand for high resolution while ensuring a good packaging effect.
  • the display device may be any product or component with a display function, such as a TV, a monitor, a digital photo frame, a mobile phone, a tablet computer, and so on.
  • the embodiments of the present disclosure also provide a method for manufacturing a display substrate for manufacturing the display substrate described in the above embodiments, the display substrate has a display area, and the display area includes a pixel area 10, an opening area 20, and An isolation region 30 located between the pixel region 10 and the opening region 20, the isolation region 30 is arranged around the opening region 20; the manufacturing method includes:
  • the driving circuit layer including a conductive layer
  • An inorganic layer structure and at least one first barrier structure 31 are fabricated on the substrate 60 located in the isolation region 30;
  • the first barrier structure 31 includes: a barrier pattern 310 and a first isolation layer that are sequentially stacked in a direction away from the substrate 60
  • the barrier pattern 310 and the conductive layer are made in the same layer, and the side of the first isolation member 311 has a notch;
  • the inorganic layer structure includes multilayer inorganic film layers stacked, the barrier pattern 310 Located between two adjacent inorganic film layers, the first isolation member 311 is located on the side of the inorganic layer structure facing away from the substrate 60;
  • a light-emitting function layer 61 located in the pixel region 10 and the isolation region 30 is formed, and the light-emitting function The layer 61 is located in the part of the isolation region 30 and is disconnected on the side of the first isolation member 311.
  • At least one first barrier structure 31 is provided in the isolation region 30, and the first barrier structure 31 includes: barriers that are sequentially stacked in a direction away from the base 60.
  • the pattern 310 and the first isolation member 311; the blocking pattern 310 is located between two adjacent inorganic film layers in the isolation region 30, and separates the adjacent inorganic film layers, which avoids the multi-layer inorganic film.
  • the overlapping of the film layers in contact provides a more favorable extension path for the cracks to extend to the pixel region 10.
  • the side surface of the first isolation member 311 has a notch, and the part of the light-emitting function layer 61 that extends to the isolation region 30 can be disconnected at the side notch of the first isolation member 311, thereby avoiding water and Oxygen penetrates into the interior of the display substrate along the luminous function layer 61 at the cutting line of the boundary of the openings, causing corrosion to the interior of the display substrate, resulting in a display failure problem.
  • the first isolation member 311 is located on the side of the barrier pattern 310 and the inorganic layer structure facing away from the base 60, the first isolation member 311 is The height of an isolation member 311 relative to the base 60 is increased, so as to better ensure that the light-emitting functional layer 61 can be disconnected on the side of the first isolation member 311, and prevent water and oxygen from emitting light along the side of the first isolation member 311.
  • the functional layer 61 intrudes into the inside of the display substrate.
  • the barrier pattern 310 and the first isolation member 311 are stacked in a direction perpendicular to the substrate 60, so as to solve the problem of crack extension and water and oxygen intrusion.
  • the space occupied by the first barrier structure 31 is minimized, which is more conducive to reducing the area of the isolation region 30 to meet the demand for the development of the display substrate in the direction of high resolution.
  • the first barrier structure is provided in the isolation region 30, so that after the thin film packaging process is performed, the display substrate near the opening region 20 can be achieved.
  • the effective packaging can better ensure the effectiveness and integrity of the thin film packaging, so that the display substrate can better meet the demand for high resolution development while ensuring a good packaging effect.
  • the barrier pattern 310 includes a first barrier pattern 3101 and a second barrier pattern 3102;
  • the inorganic layer structure includes a first inorganic layer 33, a second inorganic layer 33 and a second inorganic layer layered in a direction away from the substrate 60.
  • the inorganic layer 34 and the third inorganic layer 35, the first barrier pattern 3101 is located between the first inorganic layer 33 and the second inorganic layer 34, and the second barrier pattern 3102 is located on the second inorganic layer 34 and the third inorganic layer 35;
  • the driving circuit layer includes a transistor structure 63 and a capacitor structure 64;
  • the transistor structure 63 includes an active layer and a gate electrode stacked in a direction away from the substrate 60.
  • the source and drain electrode layers, the source and drain electrode layers include source and drain electrodes arranged in the same layer and the same material;
  • the capacitor structure 64 includes a first electrode plate 641 and a first electrode plate 641 and a second electrode plate 641 arranged opposite to each other in a direction perpendicular to the substrate 60
  • the second electrode plate 642, the first electrode plate 641 and the gate electrode are arranged in the same layer and the same material, and the second electrode plate 642 is located between the first electrode plate 641 and the source and drain electrode layers;
  • the first inorganic layer extends between the active layer and the gate electrode as a first gate insulating layer, and the second inorganic layer 34 extends between the gate electrode and the second electrode plate 642 as a first gate insulating layer.
  • a second gate insulating layer, the third inorganic layer 35 extends between the second electrode plate 642 and the source and drain electrode layers as an interlayer dielectric layer;
  • the step of making the blocking pattern 310 specifically includes:
  • the second barrier pattern 3102 and the second electrode plate 642 are simultaneously formed through a single patterning process.
  • the first barrier pattern 3101 and the gate are formed at the same time in the same patterning process, and the second barrier pattern 3102 and the second electrode plate 642 are formed at the same time. It is formed at the same time during the patterning process, which simplifies the manufacturing process of the display substrate and reduces the manufacturing cost of the display substrate.
  • the manufacturing method further includes:
  • At least one second isolation member 32 is fabricated on the substrate 60 located in the isolation region 30.
  • the orthographic projection of the second isolation member 32 on the substrate 60 is located on the first barrier structure 31 on the substrate 60.
  • the orthographic projection is away from the side of the opening region 20; the side surface of the second isolation member 32 has a notch, the light-emitting function layer 61 extends to the portion of the isolation region 30, and the second isolation member 32 The side is disconnected.
  • the side surface on which the second isolation member 32 is provided has a notch, and the portion of the light-emitting function layer 61 extending to the isolation region 30 can be located in the second isolation member.
  • the side notches of 32 are disconnected, which further prevents water and oxygen from penetrating into the display substrate along the light-emitting function layer 61 at the cutting line of the opening boundary, causing corrosion to the interior of the display substrate and causing display failure.
  • the pixel area 10 is further provided with: a transistor structure 63 located between the substrate 60 and the light-emitting function layer 61; the transistor structure 63 includes stacked layers in a direction away from the substrate 60. Provided active layer, gate, and source/drain electrode layer, where the source/drain electrode layer includes a source electrode and a drain electrode provided in the same layer and the same material;
  • the steps of manufacturing the first isolation component 311 and the second isolation component 32 specifically include:
  • the first isolation member 311, the second isolation member 32, the source electrode and the drain electrode are simultaneously formed.
  • the first isolation member 311, the second isolation member 32, the source electrode and the drain electrode are simultaneously formed through a patterning process, which simplifies the display better.
  • the manufacturing process flow of the substrate reduces the manufacturing cost of the display substrate.
  • the display substrate further includes: a first source-drain metal layer and a second source-drain metal layer 66 stacked on the base 60 in a direction away from the base 60;
  • the steps of manufacturing the first isolation component 311 and the second isolation component 32 specifically include:
  • the first isolation feature 311, the second isolation feature 32, and the second source-drain metal layer 66 are simultaneously formed.
  • the first isolation member 311, the second isolation member 32, and the second source-drain metal layer 66 are simultaneously formed through a patterning process, which simplifies the display better.
  • the manufacturing process flow of the substrate reduces the manufacturing cost of the display substrate.

Abstract

一种显示基板及其制作方法、显示装置,显示基板中像素区(10)设置有位于显示基板的基底(60)上的发光功能层(61);隔离区(30)设置有位于基底(60)上的至少一个第一阻隔结构(31),第一阻隔结构(31)包括:沿远离基底(60)的方向依次层叠设置的阻挡图形(310)和第一隔离部件(311);第一隔离部件(311)的侧面具有凹口,发光功能层(61)延伸至隔离区(30)的部分,在第一隔离部件(311)的侧面断开;隔离区(30)还设置有位于基底(60)上的无机层结构,无机层结构包括层叠设置的多层无机膜层(33,34,35),阻挡图形(310)位于相邻的两层无机膜层之间,第一隔离部件(311)位于无机层结构背向基底(60)的一侧。

Description

显示基板及其制作方法、显示装置 技术领域
本公开涉及显示技术领域,尤其涉及一种显示基板及其制作方法、显示装置。
背景技术
随着显示技术的不断发展,提升显示屏的屏占比越来越受到人们的关注,目前,为了实现更高的屏占比,一般会在显示屏上为一些附加部件(例如摄像头、传感器等等)预留一些开孔区域(例如开孔)。但在屏内开孔区域附近,水氧会在开孔边界的切割线处,沿显示屏中的发光功能层渗入到显示屏内部对显示屏内部造成侵蚀,导致显示失效;而且,在切割形成开孔时,切割产生的裂纹也可能延伸至显示屏内部,对显示屏的良率产生影响。
发明内容
本公开的目的在于提供一种显示基板及其制作方法、显示装置。
本公开的第一方面提供一种显示基板,具有显示区域,所述显示区域包括像素区、开孔区、以及位于所述像素区和所述开孔区之间的隔离区,所述隔离区环绕所述开孔区设置;
所述像素区包括位于所述显示基板的基底上的发光功能层,以及位于所述基底与所述发光功能层之间的驱动电路层,所述驱动电路层包括导电层;
所述隔离区设置有位于所述基底上的至少一个第一阻隔结构,所述第一阻隔结构包括:沿远离所述基底的方向依次层叠设置的阻挡图形和第一隔离部件;所述阻挡图形与所述导电层同层制作,所述第一隔离部件的侧面具有凹口,所述发光功能层延伸至所述隔离区的部分,在所述第一隔离部件的侧面断开;
所述隔离区还设置有位于所述基底上的无机层结构,所述无机层结构包 括层叠设置的多层无机膜层,所述阻挡图形位于相邻的两层无机膜层之间,所述第一隔离部件位于所述无机层结构背向所述基底的一侧。
可选的,所述阻挡图形包括第一阻挡图形和第二阻挡图形;
所述无机层结构包括沿远离所述基底的方向依次层叠设置的第一无机层、第二无机层和第三无机层,所述第一阻挡图形位于所述第一无机层与所述第二无机层之间,所述第二阻挡图形位于所述第二无机层与所述第三无机层之间。
可选的,所述驱动电路层包括晶体管结构和电容结构;所述晶体管结构包括沿远离所述基底的方向依次层叠设置的有源层、栅极和源漏电极层,所述源漏电极层包括同层同材料设置的源电极和漏电极;所述电容结构包括沿垂直于所述基底的方向相对设置的第一极板和第二极板,所述第一极板与所述栅极同层同材料设置,所述第二极板位于所述第一极板与所述源漏电极层之间;
所述第一无机层延伸至所述有源层与所述栅极之间作为第一栅绝缘层,所述第二无机层延伸至所述栅极与所述第二极板之间作为第二栅绝缘层,所述第三无机层延伸至所述第二极板与所述源漏电极层之间作为层间介质层;
所述导电层包括所述栅极和所述第二极板,所述第一阻挡图形与所述栅极同层同材料设置,所述第二阻挡图形与所述第二极板同层同材料设置。
可选的,所述隔离区还设置有位于所述基底上的至少一个第二隔离部件,所述第二隔离部件在所述基底上的正投影,位于所述第一阻隔结构在所述基底上的正投影远离所述开孔区的一侧;
所述第二隔离部件的侧面具有凹口,所述发光功能层延伸至所述隔离区的部分,在所述第二隔离部件的侧面断开。
可选的,所述隔离区设置有间隔设置的多个所述第二隔离部件;
所述无机层结构延伸至各所述第二隔离部件与所述基底之间,所述无机层结构具有沟槽,所述沟槽在所述基底上的正投影,位于相邻的所述第二隔离部件在所述基底上的正投影之间。
可选的,所述无机层结构包括沿远离所述基底的方向依次层叠设置的第 一栅绝缘层、第二栅绝缘层和层间介质层,在垂直于所述基底的方向上,所述沟槽贯穿所述第一栅绝缘层、所述第二栅绝缘层和所述层间介质层。
可选的,在垂直于所述基底的方向上,所述沟槽的深度在
Figure PCTCN2020090550-appb-000001
可选的,所述第一隔离部件包括:沿远离所述基底的方向依次层叠设置的第一功能图形、第二功能图形和第三功能图形,所述第一功能图形在所述基底上的正投影包围所述第二功能图形在所述基底上的正投影,所述第三功能图形在所述基底上的正投影包围所述第二功能图形在所述基底上的正投影;和/或,
所述第二隔离部件包括:沿远离所述基底的方向依次层叠设置的第四功能图形、第五功能图形和第六功能图形,所述第四功能图形在所述基底上的正投影包围所述第五功能图形在所述基底上的正投影,所述第六功能图形在所述基底上的正投影包围所述第五功能图形在所述基底上的正投影。
可选的,所述像素区还设置有:位于所述基底与所述发光功能层之间的晶体管结构;所述晶体管结构包括沿远离所述基底的方向依次层叠设置的有源层、栅极和源漏电极层,所述源漏电极层包括同层同材料设置的源电极和漏电极;所述源电极和所述漏电极均包括沿远离所述基底的方向依次层叠设置的第一金属子膜层、第二金属子膜层和第三金属子膜层;
所述第一功能图形与所述第一金属子膜层同层同材料设置,所述第二功能图形与所述第二金属子膜层同层同材料设置,所述第三功能图形与所述第三金属子膜层同层同材料设置;和/或,
所述第四功能图形与所述第一金属子膜层同层同材料设置,所述第五功能图形与所述第二金属子膜层同层同材料设置,所述第六功能图形与所述第三金属子膜层同层同材料设置。
可选的,所述显示基板还包括:沿远离所述基底的方向依次层叠设置在所述基底上的第一源漏金属层和第二源漏金属层;所述第二源漏金属层包括沿远离所述基底的方向依次层叠设置的第四金属子膜层、第五金属子膜层和第六金属子膜层;
所述第一功能图形与所述第四金属子膜层同层同材料设置,所述第二功 能图形与所述第五金属子膜层同层同材料设置,所述第三功能图形与所述第六金属子膜层同层同材料设置;和/或,
所述第四功能图形与所述第四金属子膜层同层同材料设置,所述第五功能图形与所述第五金属子膜层同层同材料设置,所述第六功能图形与所述第六金属子膜层同层同材料设置。
可选的,所述隔离区还设置有:
位于所述基底上的挡墙结构,所述挡墙结构在所述基底上的正投影,位于所述第一阻隔结构在所述基底上的正投影与所述第二隔离部件在所述基底上的正投影之间;
从所述像素区延伸至所述隔离区的封装结构,所述封装结构包括沿远离所述基底的方向依次层叠设置的第一无机封装层、有机封装层和第二无机封装层;
所述第一无机封装层和所述第二无机封装层完全覆盖所述第一阻隔结构、所述第二隔离部件和所述挡墙结构;
所述有机封装层在所述基底上的正投影位于所述挡墙结构在所述基底上的正投影远离所述开孔区的一侧。
可选的,所述挡墙结构包括沿靠近所述开孔区的方向依次排列的第一挡墙部件和第二挡墙部件,所述第一挡墙部件背向所述基底的表面的高度,低于所述第二挡墙部件背向所述基底的表面的高度。
可选的,所述像素区还设置有沿远离所述基底的方向依次层叠设置在所述基底上的像素界定层和隔垫物层;
所述第一挡墙部件包括沿远离所述基底的方向依次层叠设置的第一挡墙图形和第二挡墙图形,所述第一挡墙图形与所述像素界定层同层同材料设置,所述第二挡墙图形与所述隔垫物层同层同材料设置。
可选的,所述像素区还设置有沿远离所述基底的方向依次层叠设置在所述基底上的平坦层、像素界定层和隔垫物层;
所述第二挡墙部件包括沿远离所述基底的方向依次层叠设置的第三挡墙图形、第四挡墙图形和第五挡墙图形,所述第三挡墙图形与所述平坦层同层 同材料设置,所述第四挡墙图形与所述像素界定层同层同材料设置,所述第五挡墙图形与所述隔垫物层同层同材料设置。
可选的,所述像素区还设置有沿远离所述基底的方向依次层叠设置在所述基底上的第一平坦层、第二平坦层和像素界定层;
所述第一挡墙部件包括沿远离所述基底的方向依次层叠设置的第一挡墙图形和第二挡墙图形,所述第一挡墙图形与所述第一平坦层同层同材料设置,所述第二挡墙图形与所述像素界定层同层同材料设置。
可选的,所述像素区还设置有沿远离所述基底的方向依次层叠设置在所述基底上的第一平坦层、第二平坦层和像素界定层;
所述第二挡墙部件包括沿远离所述基底的方向依次层叠设置的第三挡墙图形、第四挡墙图形和第五挡墙图形,所述第三挡墙图形与所述第一平坦层同层同材料设置,所述第四挡墙图形与所述第二平坦层同层同材料设置,所述第五挡墙图形与所述像素界定层同层同材料设置。
基于上述显示基板的技术方案,本公开的第二方面提供一种显示装置,包括上述显示基板。
基于上述显示基板的技术方案,本公开的第三方面提供一种显示基板的制作方法,所述显示基板具有显示区域,所述显示区域包括像素区、开孔区、以及位于所述像素区和所述开孔区之间的隔离区,所述隔离区环绕所述开孔区设置;所述制作方法包括:
在像素区的基底上制作驱动电路层,所述驱动电路层包括导电层;
在位于隔离区的基底上制作无机层结构和至少一个第一阻隔结构;所述第一阻隔结构包括:沿远离所述基底的方向依次层叠设置的阻挡图形和第一隔离部件;所述阻挡图形与所述导电层同层制作,所述第一隔离部件的侧面具有凹口;所述无机层结构包括层叠设置的多层无机膜层,所述阻挡图形位于相邻的两层无机膜层之间,所述第一隔离部件位于所述无机层结构背向所述基底的一侧;
在形成有所述驱动电路层、所述无机层结构和至少一个第一阻隔结构的基底上,形成位于所述像素区和所述隔离区的发光功能层,所述发光功能层 位于所述隔离区的部分,在所述第一隔离部件的侧面断开。
可选的,所述阻挡图形包括第一阻挡图形和第二阻挡图形;所述无机层结构包括沿远离所述基底的方向依次层叠设置的第一无机层、第二无机层和第三无机层,所述第一阻挡图形位于所述第一无机层与所述第二无机层之间,所述第二阻挡图形位于所述第二无机层与所述第三无机层之间;所述驱动电路层包括晶体管结构和电容结构;所述晶体管结构包括沿远离所述基底的方向依次层叠设置的有源层、栅极和源漏电极层,所述源漏电极层包括同层同材料设置的源电极和漏电极;所述电容结构包括沿垂直于所述基底的方向相对设置的第一极板和第二极板,所述第一极板与所述栅极同层同材料设置,所述第二极板位于所述第一极板与所述源漏电极层之间;所述第一无机层延伸至所述有源层与所述栅极之间作为第一栅绝缘层,所述第二无机层延伸至所述栅极与所述第二极板之间作为第二栅绝缘层,所述第三无机层延伸至所述第二极板与所述源漏电极层之间作为层间介质层;
制作所述阻挡图形的步骤具体包括:
通过一次构图工艺同时形成所述第一阻挡图形和所述栅极;
通过一次构图工艺同时形成所述第二阻挡图形和所述第二极板。
可选的,所述制作方法还包括:
在位于隔离区的基底上制作至少一个第二隔离部件,所述第二隔离部件在所述基底上的正投影,位于所述第一阻隔结构在所述基底上的正投影远离所述开孔区的一侧;所述第二隔离部件的侧面具有凹口,所述发光功能层延伸至所述隔离区的部分,在所述第二隔离部件的侧面断开。
可选的,所述像素区还设置有:位于所述基底与所述发光功能层之间的晶体管结构;所述晶体管结构包括沿远离所述基底的方向依次层叠设置的有源层、栅极和源漏电极层,所述源漏电极层包括同层同材料设置的源电极和漏电极;
制作所述第一隔离部件和所述第二隔离部件的步骤具体包括:
通过一次构图工艺,同时形成所述第一隔离部件、所述第二隔离部件、所述源电极和所述漏电极。
可选的,所述显示基板还包括:沿远离所述基底的方向依次层叠设置在所述基底上的第一源漏金属层和第二源漏金属层;
制作所述第一隔离部件和所述第二隔离部件的步骤具体包括:
通过一次构图工艺,同时形成所述第一隔离部件、所述第二隔离部件和所述第二源漏金属层。
附图说明
此处所说明的附图用来提供对本公开的进一步理解,构成本公开的一部分,本公开的示意性实施例及其说明用于解释本公开,并不构成对本公开的不当限定。在附图中:
图1为本公开实施例提供的显示基板的结构示意图;
图2为本公开实施例提供的开孔区附近示意图;
图3为图1中N1N2方向的第一截面示意图;
图4为图1中N1N2方向的第二截面示意图;
图5为图4中第一隔离结构所在位置放大图;
图6为发光功能层在第一隔离部件侧面断裂示意图;
图7为图4中第二隔离部件所在位置放大图;
图8为图4中挡墙结构37所在位置放大图;
图9为图1中N1N2方向的第三截面示意图;
图10为图9中第一隔离结构所在位置放大图。
具体实施方式
为了进一步说明本公开实施例提供的显示基板及其制作方法、显示装置,下面结合说明书附图进行详细描述。
在显示屏上形成开孔时,开孔的位置一般位于显示区域内部,即能够被显示区域包围,这样显示屏中的发光功能层会延伸至开孔边界的切割线周边,导致水和氧气会在开孔边界的切割线处,沿显示屏中的发光功能层渗入到显示屏内部对显示屏内部造成侵蚀,导致显示失效;而且,在切割形成开孔时,切割产生的裂纹也可能延伸至显示屏内部,对显示屏的良率产生影响。
基于上述问题的存在,请参阅图1~图4所示,本公开实施例提供了一种显示基板,该显示基板具有显示区域,所述显示区域包括像素区10、开孔区20、以及位于所述像素区10和所述开孔区20之间的隔离区30,所述隔离区30环绕所述开孔区20设置;
所述像素区10包括位于所述显示基板的基底60上的发光功能层61,以及位于所述基底60与所述发光功能层61之间的驱动电路层,所述驱动电路层包括导电层;
所述隔离区30设置有位于所述基底60上的至少一个第一阻隔结构31,所述第一阻隔结构31包括:沿远离所述基底60的方向依次层叠设置的阻挡图形310和第一隔离部件311;所述阻挡图形与所述导电层同层制作,所述第一隔离部件311的侧面具有凹口,所述发光功能层61延伸至所述隔离区30的部分,在所述第一隔离部件311的侧面断开;
所述隔离区30还设置有位于所述基底60上的无机层结构,所述无机层结构包括层叠设置的多层无机膜层(如图3和图4中的第一无机层33、第二无机层34和第三无机层35),所述阻挡图形310位于相邻的两层无机膜层之间,所述第一隔离部件311位于所述无机层结构背向所述基底60的一侧。
具体地,如图1所示,所述显示基板具有显示区域和围绕所述显示区域的周边区域50,所述显示区域包括像素区10、开孔区20、以及位于所述像素区10和所述开孔区20之间的隔离区30。所述隔离区30环绕所述开孔区20设置,所述像素区10环绕所述隔离区30设置。所述像素区10靠近所述隔离区30的位置设置包括周边走线区40,如图2所示,所述周边走线区40中设置有多条周边走线41。图2中,A代表圆形开孔区20对应的孔径,B代表隔离区30宽度,C代表周边走线区宽度。
所述开孔区20的具体位置可根据实际需要设置,示例性的,所述显示基板包括矩形显示区域,所述开孔区20位于所述矩形显示区域的左上角或右上角。示例性的,所述开孔区20的形状包括:圆形或矩形等规则形状。
所述显示基板的基底60包括柔性基底,示例性的,包括柔性聚酰亚胺(PI)基底60,在形成所述开孔区20时,可将所述开孔区20的基底60和位于所述基底60上的膜层一并去除。
如图3和图4所示,所述发光功能层61位于所述第一阻隔结构31背向所述基底60的一侧,所述发光功能层61至少包括有机发光材料层,所述有机发光材料层包括用于发出白光的一整层有机发光材料层,或者用于发出彩色光(如红光、绿光、蓝光等)的有机发光材料层图形。进一步地,所述发光功能层61除包括有机发光材料层外,还可以包括如:电子传输层(election transporting layer,简称ETL)、电子注入层(election injection layer,简称EIL)、空穴传输层(hole transporting layer,简称HTL)以及空穴注入层(hole injection layer,简称HIL)等整层结构的公共层。所述发光功能层61能够覆盖所述像素区10和所述隔离区30,并能够延伸至所述开孔区20的边界处。
需要说明,图3、图4和图9中示意的发光功能层61包括所述公共层,图3、图4和图9中的标记80代表阳极图形,83代表阴极层。
所述隔离区30可设置有位于基底60上的一个或多个第一阻隔结构31,当设置一个所述第一阻隔结构31时,该第一阻隔结构31应尽量靠近所述开孔区20的边界,当设置多个所述第一阻隔结构31时,多个所述第一阻隔结构31可沿远离所述开孔区20的方向依次间隔设置。示例性的,可设置所述第一阻隔结构31环绕所述开孔区20。
需要说明,根据工艺条件与效果,所述第一阻隔结构31的设置数量,所述第一阻隔结构31的尺寸,以及相邻所述第一阻隔结构31之间的距离均可以根据实际需要调整。示例性的,所述第一阻隔结构31的设置数量在一个至十个之间,相邻第一阻隔结构31之间的最小距离可选为十几微米。示例性的,如图5所示,H4为第一阻隔结构31的宽度,H5为相邻第一阻隔结构31的距离。
如图3和图4所示,所述隔离区30设置有位于所述基底60上的无机层结构,该无机层结构包括层叠设置的多层无机膜层,各层无机膜层均与像素区10中对应的无机膜层形成为一体结构,在像素区10中能够起到绝缘层的作用。所述无机膜层的柔韧性较差,当在开孔区20切割形成开孔时,切割线处的无机层容易发生脆性断裂,且裂纹容易以所述无机膜层为通道,进一步延伸至显示基板的像素区10,对显示基板的良率产生影响。
如图3、图4和图5所示,所述第一阻隔结构31包括:沿远离所述基底60的方向依次层叠设置的阻挡图形310和第一隔离部件311。所述阻挡图形310的数量可根据实际需要设置,每个阻挡图形310均位于相邻的两层无机膜层之间,将相邻的无机膜层间隔开,从而能够避免多层无机膜层接触性的叠在一起,阻断了裂纹向像素区10延伸的路径。
示例性的,所述隔离区30设置有多个第一阻隔结构31,所述无机层结构能够延伸至各第一阻隔结构31中包括的第一隔离部件与所述基底之间,所述无机层结构具有沟槽,该沟槽在所述基底上的正投影,位于相邻的所述第一隔离部件在所述基底上的正投影之间。
所述像素区10还包括位于所述基底60与所述发光功能层61之间的驱动电路层,所述驱动电路层包括导电层;示例性的,将所述阻挡图形310与所述导电层同层制作;这种制作方式使得所述阻挡图形310与所述导电层能够采用相同的材料,在同一次构图工艺中形成,有利于简化显示基板的制作流程,节约制作成本。
如图5和图6所示,所述第一隔离部件311位于所述无机层结构背向所述基底60的一侧,所述第一隔离部件311的侧面具有凹口,所述发光功能层61延伸至所述隔离区30的部分能够在所述第一隔离部件311的侧面凹口处断开(如图6中的虚线圈位置)。示例性的,可设置所述第一隔离部件311在垂直于所述基底60的方向上的界面呈工字形,但不仅限于此。
值得注意,每个所述第一阻隔结构31中包括的所述阻挡图形310和第一隔离部件311均可以围绕所述开孔区20设置,以实现在开孔区20周边的任意位置实现阻隔功能。
根据上述显示基板的具体结构可知,本公开实施例提供的显示基板中,在隔离区30设置了至少一个第一阻隔结构31,所述第一阻隔结构31包括:沿远离所述基底60的方向依次层叠设置的阻挡图形310和第一隔离部件311;所述阻挡图形310位于隔离区30中相邻的两层无机膜层之间,将相邻的无机膜层间隔开,很好的避免了由于多层无机膜层接触性的叠在一起,阻断了裂纹向像素区10延伸的路径。所述第一隔离部件311的侧面具有凹口,所述发光功能层61延伸至所述隔离区30的部分能够在所述第一隔离部件311的侧面凹口处断开,从而避免了水和氧气在开孔边界的切割线处,沿所述发光功能层61渗入到显示基板内部对显示基板内部造成侵蚀,导致显示失效的问题。
而且,本公开实施例提供的显示基板中,由于所述第一隔离部件311位于所述阻挡图形310和所述无机层结构背向所述基底60的一侧,使得所述第一隔离部件311相对于所述基底60的高度增大,从而更好的保证了所述发光功能层61能够在所述第一隔离部件311的侧面断开,避免了水和氧气沿所述发光功能层61入侵至显示基板的内部。
另外,在每一个所述第一阻隔结构31中,所述阻挡图形310与所述第一隔离部件311沿垂直于所述基底60的方向层叠设置,实现了在解决裂纹延伸和水、氧气入侵的同时,将所述第一阻隔结构31所占空间最小化,从而更有利于缩小所述隔离区30的面积,使得所述显示基板能够满足在所述隔离区30的窄边框化。
因此,本公开实施例提供的显示基板中,通过在所述隔离区30设置所述第一阻隔结构31,使得在进行薄膜封装工艺后,能够实现对所述显示基板开孔区20附近的有效封装,更好的保证了所述薄膜封装的有效性和完整性,使得所述显示基板在保证良好封装效果的同时,实现所述显示基板在所述隔离区30的窄边框化。
如图5所示,在一些实施例中,所述阻挡图形310包括第一阻挡图形3101和第二阻挡图形3102;所述无机层结构包括沿远离所述基底60的方向依次层叠设置的第一无机层33、第二无机层34和第三无机层35,所述第一阻挡 图形3101位于所述第一无机层33与所述第二无机层34之间,所述第二阻挡图形3102位于所述第二无机层34与所述第三无机层35之间。
具体地,所述第一阻挡图形3101和所述第二阻挡图形3102均可以围绕所述开孔区20设置,但不仅限于此。
上述设置方式使得所述第一阻挡图形3101能够将所述第一无机层33与所述第二无机层34间隔开,所述第二阻挡图形3102能够将所述第二无机层34与所述第三无机层35间隔开,避免了所述第一无机层33、所述第二无机层34和所述第三无机层35接触性的叠在一起,为裂纹向像素区10延伸提供更有利的延伸路径。
如图3和图4所示,在一些实施例中,所述驱动电路层包括晶体管结构63和电容结构64;所述晶体管结构63包括沿远离所述基底60的方向依次层叠设置的有源层、栅极和源漏电极层,所述源漏电极层包括同层同材料设置的源电极和漏电极;所述电容结构64包括沿垂直于所述基底60的方向相对设置的第一极板641和第二极板642,所述第一极板641与所述栅极同层同材料设置,所述第二极板642位于所述第一极板641与所述源漏电极层之间;
所述第一无机层延伸至所述有源层与所述栅极之间作为第一栅绝缘层,所述第二无机层34延伸至所述栅极与所述第二极板642之间作为第二栅绝缘层,所述第三无机层35延伸至所述第二极板642与所述源漏电极层之间作为层间介质层;
所述导电层包括所述栅极和所述第二极板,所述第一阻挡图形3101与所述栅极同层同材料设置,所述第二阻挡图形3102与所述第二极板642同层同材料设置。
具体地,所述驱动电路层可包括多个子像素驱动电路,每个所述子像素驱动电路均可包括晶体管结构63和电容结构64,示例性的,所述子像素驱动电路包括7T1C电路结构。
所述晶体管结构63具体包括:沿远离所述基底60的方向依次层叠设置的有源层、栅极和源漏电极层,所述源漏电极层包括同层同材料设置的源电极和漏电极。
所述电容结构64可具体作为所述子像素驱动电路中的存储电容,但不仅限于此。所述电容结构64包括沿垂直于所述基底60的方向相对设置的第一极板641和第二极板642,所述第一极板641可与所述栅极同层同材料设置,所述第二极板642位于所述第一极板641背向所述基底60的一侧,能够与所述第一极板641之间形成正对面积,所述第二极板642可具体位于所述第一极板641与所述源漏电极层之间。
所述像素区10还包括位于所述有源层与所述栅极之间的第一栅绝缘层,位于所述栅极与所述第二极板642之间的第二栅绝缘层,位于所述第二极板642与所述源漏电极层之间的层间介质层。示例性的,可设置所述第一无机层延伸至所述有源层与所述栅极之间作为第一栅绝缘层,所述第二无机层34延伸至所述栅极与所述第二极板642之间作为第二栅绝缘层,所述第三无机层35延伸至所述第二极板642与所述源漏电极层之间作为层间介质层。
值得注意,所述显示基板还可以包括位于所述第一无机层33与所述基底60之间的缓冲层62。
上述实施例提供的显示基板中,将所述第一阻挡图形3101与所述栅极同层同材料设置,所述第二阻挡图形3102与所述第二极板642同层同材料设置,使得所述第一阻挡图形3101和所述栅极能够在同一次构图工艺中同时形成,使得所述第二阻挡图形3102和所述第二极板642能够在同一次构图工艺中同时形成,从而更好的简化了所述显示基板的制作工艺流程,降低了显示基板的制作成本。
上述实施例提供的显示基板中,通过在所述隔离区30设置金属图形(如:第一阻挡图形3101和第二阻挡图形3102)与无机膜层(如:第一栅绝缘层、第二栅绝缘层和层间介质层)的堆叠结构,很好的阻挡了裂纹向像素区10延伸,有效提升了显示基板的良率。
如图3所示,在一些实施例中,所述隔离区30还设置有位于所述基底60上的至少一个第二隔离部件32,所述第二隔离部件32在所述基底60上的正投影,位于所述第一阻隔结构31在所述基底60上的正投影远离所述开孔区20的一侧;所述第二隔离部件32的侧面具有凹口,所述发光功能层61延 伸至所述隔离区30的部分,在所述第二隔离部件32的侧面断开。
具体地,所述隔离区30还可以设置有至少一个第二隔离部件32,所述第二隔离部件32的具体结构可与所述第一隔离部件311的具体结构相同,所述第二隔离部件32在所述基底60上的正投影,位于所述第一阻隔结构31在所述基底60上的正投影远离所述开孔区20的一侧。
值得注意,每个所述第二隔离部件32均可以围绕所述开孔区20设置,以实现在开孔区20周边的任意位置实现阻隔功能。
上述实施例提供的显示基板中,设置所述第二隔离部件32的侧面具有凹口,所述发光功能层61延伸至所述隔离区30的部分能够在所述第二隔离部件32的侧面凹口处断开,进一步避免了水和氧气在开孔边界的切割线处,沿所述发光功能层61渗入到显示基板内部对显示基板内部造成侵蚀,导致显示失效的问题。
在一些实施例中,所述隔离区30还设置有位于所述基底60与所述第二隔离部件32之间的阻挡图形,所述阻挡图形的数量可根据实际需要设置,每个阻挡图形均位于相邻的两层无机膜层之间,将相邻的无机膜层间隔开,从而能够避免多层无机膜层接触性的叠在一起,阻断了裂纹向像素区10延伸的路径。
示例性的,将所述阻挡图形与所述导电层同层制作;这种制作方式使得所述阻挡图形与所述导电层能够采用相同的材料,在同一次构图工艺中形成,有利于简化显示基板的制作流程,节约制作成本。
如图4和图7所示,在一些实施例中,所述隔离区30设置有间隔设置的多个所述第二隔离部件32;所述无机层结构延伸至各所述第二隔离部件32与所述基底60之间,所述无机层结构具有沟槽36,所述沟槽36在所述基底60上的正投影,位于相邻的所述第二隔离部件32在所述基底60上的正投影之间。
具体地,所述隔离区30还可以设置多个所述第二隔离部件32,多个所述第二隔离部件32均位于所述无机层结构背向所述基底60的一侧。进一步地,可通过刻蚀工艺在位于相邻的所述第二隔离部件32之间的无机层结构上 形成所述沟槽36,从而增大所述第二隔离部件32背向所述基底60的表面,与所述沟槽36的槽底之间的段差,使得所述发光功能层61在所述第二隔离部件32的边缘更容易断开,进而有效提升了通过所述第二隔离部件32隔断所述发光功能层61的可靠性。
值得注意,每个所述第二隔离部件32和所述沟槽36均可以围绕所述开孔区20设置,以实现在开孔区20周边任意方向隔断所述发光功能层61。
在一些实施例中,所述无机层结构包括沿远离所述基底60的方向依次层叠设置的第一栅绝缘层、第二栅绝缘层和层间介质层,在垂直于所述基底60的方向上,所述沟槽36贯穿所述第一栅绝缘层、所述第二栅绝缘层和所述层间介质层。
具体地,所述像素区10还包括位于所述有源层与所述栅极之间的第一栅绝缘层,位于所述栅极与所述第二极板642之间的第二栅绝缘层,位于所述第二极板642与所述源漏电极层之间的层间介质层。示例性的,所述第一栅绝缘层、所述第二栅极绝缘层和所述层间介质层均能够延伸至所述隔离区30,共同形成位于所述隔离区30的所述无机层结构。
所述沟槽36的刻蚀深度可根据实际需要调整,示例性的,沟槽36仅贯穿所述层间介质层;或者如图7所示,所述沟槽36同时贯穿所述层间介质层和所述第二栅极绝缘层;或者所述沟槽36同时贯穿所述第一栅绝缘层、所述第二栅绝缘层和所述层间介质层。
当设置所述沟槽36同时贯穿所述第一栅绝缘层、所述第二栅绝缘层和所述层间介质层时,能够最大限度的增大所述第二隔离部件32背向所述基底60的表面,与所述沟槽36的槽底之间的段差,使得所述发光功能层61在所述第二隔离部件32的边缘更容易断开,从而最大限度的提升了通过所述第二隔离部件32隔断所述发光功能层61的可靠性。
在一些实施例中,可设置在垂直于所述基底60的方向上,所述沟槽36的深度在
Figure PCTCN2020090550-appb-000002
具体地,所述沟槽36的深度可选在
Figure PCTCN2020090550-appb-000003
之间(包括端点值),示例性的,设置所述沟槽36的深度为
Figure PCTCN2020090550-appb-000004
由于所述发光功能层61的厚度一般为
Figure PCTCN2020090550-appb-000005
当所述第二隔离部件32采用源漏金属层制作时,所述第二隔离部件32的厚度一般为
Figure PCTCN2020090550-appb-000006
因此,当设置所述沟槽36的深度在
Figure PCTCN2020090550-appb-000007
之间时,能够更好的保证所述发光功能层61在所述第二隔离部件32的边缘断开。
如图7所示,图7中D为所述第二隔离部件32的宽度,E为相邻所述第二隔离部件32之间的无机层结构刻蚀宽度,F为所述第二隔离部件32下方无机层结构的刻蚀深度。
需要说明,根据工艺条件与效果,所述第二隔离部件32的设置数量,所述第二隔离部件32的尺寸,相邻所述第二隔离部件32之间的距离,所述沟槽36的深度和所述沟槽36的宽度均可以根据实际需要调整。示例性的,所述第二隔离部件32的设置数量在一个至十个之间,相邻第二隔离部件32之间的最小距离可选为十几微米。
如图6所示,在一些实施例中,所述第一隔离部件311包括:沿远离所述基底60的方向依次层叠设置的第一功能图形3110、第二功能图形3111和第三功能图形3112,所述第一功能图形3110在所述基底60上的正投影包围所述第二功能图形3111在所述基底60上的正投影,所述第三功能图形3112在所述基底60上的正投影包围所述第二功能图形3111在所述基底60上的正投影;和/或,如图7所示,所述第二隔离部件32包括:沿远离所述基底60的方向依次层叠设置的第四功能图形3200、第五功能图形3201和第六功能图形3202,所述第四功能图形3200在所述基底60上的正投影包围所述第五功能图形3201在所述基底60上的正投影,所述第六功能图形3202在所述基底60上的正投影包围所述第五功能图形3201在所述基底60上的正投影。
具体地,上述设置所述第一隔离部件311包括所述第一功能图形3110、所述第二功能图形3111和所述第三功能图形3112;以及设置所述第二隔离部件32包括所述第四功能图形3200、所述第五功能图形3201和所述第六功能图形3202;使得所述第一隔离部件311和所述第二隔离部件32均能够形成为纵截面为工字形的结构,从而更有利于所述发光功能层61在所述第一隔离部件311和所述第二隔离部件32边缘断开。
如图5所示,在一些实施例中,可设置所述第一阻挡图形3101在所述基底60上的正投影,覆盖所述第二阻挡图形3102在所述基底60上的正投影;所述第二阻挡图形3102在所述基底60上的正投影,覆盖所述第一隔离部件311在所述基底60上的正投影。
上述设置方式使得所述第一阻挡图形3101和所述第二阻挡图形3102均具有较大的面积,从而更有利于提升其对裂纹的阻挡效果。
如图5所示,在一些实施例中,所述第二功能图形3111具有第一坡度角a1,所述第一阻挡图形3101具有第二坡度角a2,所述第一坡度角a1大于所述第二坡度角a2。
上述设置所述第一坡度角a1大于所述第二坡度角a2,使得所述第二功能图形3111与所述第一功能图形3110和所述第三功能图形3112之间形成更深的凹口,从而更有利于所述发光功能层61在所述第一隔离部件311边缘断开。
如图3和图4所示,在一些实施例中,所述像素区10还设置有:位于所述基底60与所述发光功能层61之间的晶体管结构63;所述晶体管结构63包括沿远离所述基底60的方向依次层叠设置的有源层、栅极和源漏电极层,所述源漏电极层包括同层同材料设置的源电极和漏电极;所述源电极和所述漏电极均包括沿远离所述基底60的方向依次层叠设置的第一金属子膜层、第二金属子膜层和第三金属子膜层。
所述第一功能图形3110与所述第一金属子膜层同层同材料设置,所述第二功能图形3111与所述第二金属子膜层同层同材料设置,所述第三功能图形3112与所述第三金属子膜层同层同材料设置;和/或,所述第四功能图形3200与所述第一金属子膜层同层同材料设置,所述第五功能图形3201与所述第二金属子膜层同层同材料设置,所述第六功能图形3202与所述第三金属子膜层同层同材料设置。
具体地,所述源电极和所述漏电极的具体结构和制作材料均多种多样,示例性的,所述源电极和所述漏电极均包括沿远离所述基底60的方向依次层叠设置的第一金属子膜层、第二金属子膜层和第三金属子膜层,所述第一金属子膜层和所述第三金属子膜层均采用金属钛(Ti)制作,所述第二子膜层 采用金属铝(Al)制作,使得所述源电极和所述漏电极均形成为钛-铝-钛(Ti-Al-Ti)堆叠结构。
上述实施例提供的显示基板中,将所述第一功能图形3110与所述第一金属子膜层同层同材料设置,所述第二功能图形3111与所述第二金属子膜层同层同材料设置,所述第三功能图形3112与所述第三金属子膜层同层同材料设置;以及将所述第四功能图形3200与所述第一金属子膜层同层同材料设置,所述第五功能图形3201与所述第二金属子膜层同层同材料设置,所述第六功能图形3202与所述第三金属子膜层同层同材料设置;使得所述第一隔离部件311和所述第二隔离部件32均能够与所述源电极和漏电极在同一次构图工艺中形成,从而有效简化了所述显示基板的制作流程,节约了显示基板的制作成本。
需要说明,当所述第一隔离部件311和所述第二隔离部件32采用上述结构时,通过一次构图工艺同时形成所述第一隔离部件311、所述第二隔离部件32、所述源电极和所述漏电极的步骤具体包括:
依次沉积形成层叠设置的第一金属材料层、第二金属材料层和第三金属材料层。
在所述第三金属材料层背向所述基底60的一侧制作光刻胶层,利用掩膜板对所述光刻胶层进行曝光,形成光刻胶保留区域和光刻胶去除区域,所述光刻胶保留区域与所述第一隔离部件311、所述第二隔离部件32、所述源电极和所述漏电极所在区域相对应,所述光刻胶去除区域与除所述第一隔离部件311、所述第二隔离部件32、所述源电极和所述漏电极所在区域之外的其它区域相对应,去除位于所述光刻胶去除区域的光刻胶层,暴露位于所述光刻胶去除区域的第三金属材料层。
通过干法刻蚀工艺,刻蚀位于所述光刻胶去除区域的所述第三金属材料层、所述第二金属材料层和所述第一金属材料层,形成所述源电极、所述漏电极,以及用于形成所述第一隔离部件311的第一过渡结构和用于形成所述第二隔离部件32的第二过渡结构;然后将剩余的光刻胶层剥离。
继续制作位于像素区10的阳极图形,在利用刻蚀液(如硝酸)刻蚀形成 所述阳极图形时,同时利用刻蚀液对所述第一过渡结构和所述第二过渡结构进行刻蚀,形成工字形结构的所述第一隔离部件311和第二隔离部件32。
如图9所示,在一些实施例中,所述显示基板还包括:沿远离所述基底60的方向依次层叠设置在所述基底60上的第一源漏金属层和第二源漏金属层66;所述第二源漏金属层66包括沿远离所述基底60的方向依次层叠设置的第四金属子膜层、第五金属子膜层和第六金属子膜层。
如图7、图9和图10所示,所述第一功能图形3110与所述第四金属子膜层同层同材料设置,所述第二功能图形3111与所述第五金属子膜层同层同材料设置,所述第三功能图形3112与所述第六金属子膜层同层同材料设置;和/或,所述第四功能图形3200与所述第四金属子膜层同层同材料设置,所述第五功能图形3201与所述第五金属子膜层同层同材料设置,所述第六功能图形3202与所述第六金属子膜层同层同材料设置。
具体地,所述显示基板还包括沿远离所述基底60的方向依次层叠设置在所述基底60上的第一源漏金属层和第二源漏金属层66,所述第一源漏金属层用于形成所述晶体管结构63的源电极、漏电极,以及显示基板中包括的电源线和数据线。所述第二源漏金属层66一般用于形成显示基板中的一些导电连接部。需要说明,图10中的钝化层84位于第一平坦层671与第一源漏金属层之间,能够对所述第一源漏金属层起到保护作用。
示例性的,所述第二源漏金属层66包括沿远离所述基底60的方向依次层叠设置的第四金属子膜层、第五金属子膜层和第六金属子膜层;所述第四金属子膜层和所述第六金属子膜层均采用金属钛(Ti)制作,所述第五金属子膜层采用金属铝(Al)制作,使得所述第二源漏金属层66形成为钛-铝-钛(Ti-Al-Ti)堆叠结构。
上述实施例提供的显示基板中,将所述第一功能图形3110与所述第四金属子膜层同层同材料设置,所述第二功能图形3111与所述第五金属子膜层同层同材料设置,所述第三功能图形3112与所述第六金属子膜层同层同材料设置;以及将所述第四功能图形3200与所述第四金属子膜层同层同材料设置,所述第五功能图形3201与所述第五金属子膜层同层同材料设置,所述第六功 能图形3202与所述第六金属子膜层同层同材料设置;使得所述第一隔离部件311和所述第二隔离部件32均能够与所述第二源漏金属层66在同一次构图工艺中形成,从而有效简化了所述显示基板的制作流程,节约了显示基板的制作成本。
如图4和图9所示,在一些实施例中,所述隔离区30还设置有:位于所述基底60上的挡墙结构37,所述挡墙结构37在所述基底60上的正投影,位于所述第一阻隔结构31在所述基底60上的正投影与所述第二隔离部件32在所述基底60上的正投影之间;从所述像素区10延伸至所述隔离区30的封装结构65,所述封装结构65包括沿远离所述基底60的方向依次层叠设置的第一无机封装层651、有机封装层652和第二无机封装层653;所述第一无机封装层651和所述第二无机封装层653完全覆盖所述第一阻隔结构31、所述第二隔离部件32和所述挡墙结构37;所述有机封装层652在所述基底60上的正投影位于所述挡墙结构37在所述基底60上的正投影远离所述开孔区20的一侧。
具体地,所述挡墙结构37的具体结构多种多样,示例性的,所述挡墙结构37在所述基底60上的正投影,位于所述第一阻隔结构31在所述基底60上的正投影与所述第二隔离部件32在所述基底60上的正投影之间;且所述挡墙结构37能够围绕所述开孔区20设置。
所述显示基板还包括所述封装结构65,所述封装结构65一般包括沿远离所述基底60的方向依次层叠设置的第一无机封装层651、有机封装层652和第二无机封装层653;所述第一无机封装层651和所述第二无机封装层653能够完全覆盖所述第一阻隔结构31、所述第二隔离部件32和所述挡墙结构37;所述挡墙结构37能够阻挡制作所述有机封装层652的过程中,用于制作所述有机封装层652的有机封装材料溢流,从而将所述有机封装材料限制在所述挡墙结构37背向所述开孔区20的一侧。
需要说明,所述第一无机封装层651和所述第二无机封装层653可以均采用化学气相沉积法制作。所述有机封装层652可以采用喷墨打印工艺制作。
如图4和图9所示,在一些实施例中,所述挡墙结构37包括沿靠近所述 开孔区20的方向依次排列的第一挡墙部件370和第二挡墙部件371,所述第一挡墙部件370背向所述基底60的表面的高度,低于所述第二挡墙部件371背向所述基底60的表面的高度。
具体地,所述阻挡结构的具体结构多种多样,示例性的,所述挡墙结构37包括沿靠近所述开孔区20的方向依次排列的多个挡墙部件,沿靠近所述开孔区20的方向,所述多个挡墙部件在垂直于所述基底60的方向上的高度依次递增。
示例性的,可设置所述挡墙结构37包括沿靠近所述开孔区20的方向依次排列的所述第一挡墙部件370和所述第二挡墙部件371,所述第一挡墙部件370和所述第二挡墙部件371均能够围绕所述开孔区20。所述显示基板中设置上述结构的挡墙结构37时,不仅实现了对所述有机封装层652有效的阻挡,还使得所述挡墙结构37占用较小的布局空间。
如图3、图4和8所示,在一些实施例中,所述像素区10还设置有沿远离所述基底60的方向依次层叠设置在所述基底60上的像素界定层81和隔垫物层82;所述第一挡墙部件370包括沿远离所述基底60的方向依次层叠设置的第一挡墙图形3701和第二挡墙图形3702,所述第一挡墙图形3701与所述像素界定层81同层同材料设置,所述第二挡墙图形3702与所述隔垫物层82同层同材料设置。
具体地,所述像素区10还设置有所述像素界定层81和所述隔垫物层82,所述像素界定层81用于在所述像素区10形成像素开口;所述隔垫物位于所述像素界定层81背向所述基底60的一侧,在所述显示基板中起到支撑作用。
需要说明,图8中H1代表所述第一挡墙部件370的宽度,H2代表所述第一挡墙部件370和所述第二挡墙部件371之间的距离,H3代表所述所述第二挡墙部件371的宽度。
上述将所述第一挡墙图形3701与所述像素界定层81同层同材料设置,以及将所述第二挡墙图形3702与所述隔垫物层82同层同材料设置,使得所述第一挡墙图形3701能够与所述像素界定层81在同一次构图工艺中形成,使得所述第二挡墙图形3702能够与所述隔垫物层82在同一次构图工艺中形 成,从而更好的简化了所述显示基板的制作流程,节约了制作成本。
如图8所示,在一些实施例中,所述像素区10还设置有沿远离所述基底60的方向依次层叠设置在所述基底60上的平坦层、像素界定层81和隔垫物层82;所述第二挡墙部件371包括沿远离所述基底60的方向依次层叠设置的第三挡墙图形3710、第四挡墙图形3711和第五挡墙图形3712,所述第三挡墙图形3710与所述平坦层同层同材料设置,所述第四挡墙图形3711与所述像素界定层81同层同材料设置,所述第五挡墙图形3712与所述隔垫物层82同层同材料设置。
具体地,所述像素区10设置有驱动电路层,位于所述驱动电路层背向所述基底60的一侧的平坦层,位于所述平坦层背向所述基底60的一侧的阳极层,位于所述阳极层背向所述基底60的一侧的像素界定层81,以及位于所述像素界定层81背向所述基底60的一侧的隔垫物层82。
所述驱动电路层包括的多个子像素驱动电路,所述阳极层包括与所述子像素驱动电路一一对应的阳极图形,所述像素界定限定出与所述阳极图形一一对应的像素开口,每一个像素开口在所述基底60上的正投影被对应的阳极图形在所述基底60上的正投影包围,每个所述像素开口中设置有对应颜色的有机发光材料层。
上述将所述第三挡墙图形3710与所述平坦层同层同材料设置,所述第四挡墙图形3711与所述像素界定层81同层同材料设置,所述第五挡墙图形3712与所述隔垫物层82同层同材料设置;使得所述第三挡墙图形3710能够与所述平坦层在同一次构图工艺中形成,使得所述第四挡墙图形3711能够与所述像素界定层81在同一次构图工艺中形成,使得所述第五挡墙图形3712能够与所述隔垫物层82在同一次构图工艺中形成,从而更好的简化了所述显示基板的制作流程,节约了制作成本。
如图9所示,在一些实施例中,所述像素区10还设置有沿远离所述基底60的方向依次层叠设置在所述基底60上的第一平坦层671、第二平坦层672和像素界定层81;所述第二挡墙部件371包括沿远离所述基底60的方向依次层叠设置的第三挡墙图形3710、第四挡墙图形3711和第五挡墙图形3712, 所述第三挡墙图形3710与所述第一平坦层671同层同材料设置,所述第四挡墙图形3711与所述第二平坦层672同层同材料设置,所述第五挡墙图形3712与所述像素界定层81同层同材料设置。
具体地,当所述显示基板采用双源漏金属层的工艺时,所述像素区10设置有驱动电路层,位于所述驱动电路层背向所述基底60的一侧的第一平坦层671,位于所述第一平坦层671背向所述基底60的一侧第二源漏金属层66,位于所述第二源漏金属层66背向所述基底60的一侧的第二平坦层672,位于所述第二平坦层672背向所述基底60的一侧的阳极层,位于所述阳极层背向所述基底60的一侧的像素界定层81,以及位于所述像素界定层81背向所述基底60的一侧的隔垫物层82。
所述驱动电路层包括的多个子像素驱动电路,每个所述子像素驱动电路中均包括多个晶体管结构63,所述驱动电路层中包括用于形成各所述晶体管结构63中的源电极和漏电极的第一源漏金属层,所述第一源漏金属层和所述第二源漏金属层66即所述双源漏金属层。
上述将所述第三挡墙图形3710与所述第一平坦层671同层同材料设置,所述第四挡墙图形3711与所述第二平坦层672同层同材料设置,所述第五挡墙图形3712与所述像素界定层81同层同材料设置;使得所述第三挡墙图形3710能够与所述第一平坦层671在同一次构图工艺中形成,使得所述第四挡墙图形3711能够与所述第二平坦层672在同一次构图工艺中形成,使得所述第五挡墙图形3712能够与所述像素界定层81在同一次构图工艺中形成,从而更好的简化了所述显示基板的制作流程,节约了制作成本。
如图9所示,在一些实施例中,所述像素区10还设置有沿远离所述基底60的方向依次层叠设置在所述基底60上的第一平坦层671、第二平坦层672和像素界定层81;所述第一挡墙部件370包括沿远离所述基底60的方向依次层叠设置的第一挡墙图形3701和第二挡墙图形3702,所述第一挡墙图形3701与所述第一平坦层671同层同材料设置,所述第二挡墙图形3702与所述像素界定层81同层同材料设置。
具体地,上述将所述第一挡墙图形3701与所述第一平坦层671同层同材 料设置,所述第二挡墙图形3702与所述像素界定层81同层同材料设置,使得所述第一挡墙图形3701能够与所述第一平坦层671在同一次构图工艺中形成,使得所述第二挡墙图形3702能够与所述像素界定层81在同一次构图工艺中形成,从而更好的简化了所述显示基板的制作流程,节约了制作成本。
上述实施例提供的显示基板中,包括的所述第一阻隔结构31、所述第二隔离部件32以及所述挡墙结构37在制作时,均能够与显示基板中的其它功能膜层在同一次构图工艺中形成,因此,无需增加专门用于制作所述第一阻隔结构31、所述第二隔离部件32以及所述挡墙结构37的工艺流程,更好的保证了产能。
本公开实施例还提供了一种显示装置,包括上述实施例提供的显示基板。
由于上述实施例提供的显示基板中,在隔离区30设置了至少一个第一阻隔结构31,所述第一阻隔结构31包括:沿远离所述基底60的方向依次层叠设置的阻挡图形310和第一隔离部件311;所述阻挡图形310位于隔离区30中相邻的两层无机膜层之间,将相邻的无机膜层间隔开,很好的避免了由于多层无机膜层接触性的叠在一起,为裂纹向像素区10延伸提供更有利的延伸路径的问题。所述第一隔离部件311的侧面具有凹口,所述发光功能层61延伸至所述隔离区30的部分能够在所述第一隔离部件311的侧面凹口处断开,从而避免了水和氧气在开孔边界的切割线处,沿所述发光功能层61渗入到显示基板内部对显示基板内部造成侵蚀,导致显示失效的问题。
而且,上述实施例提供的显示基板中,由于所述第一隔离部件311位于所述阻挡图形310和所述无机层结构背向所述基底60的一侧,使得所述第一隔离部件311相对于所述基底60的高度增大,从而更好的保证了所述发光功能层61能够在所述第一隔离部件311的侧面断开,避免了水和氧气沿所述发光功能层61入侵至显示基板的内部。
另外,在每一个所述第一阻隔结构31中,所述阻挡图形310与所述第一隔离部件311沿垂直于所述基底60的方向层叠设置,实现了在解决裂纹延伸和水、氧气入侵的同时,将所述第一阻隔结构31所占空间最小化,从而更有利于缩小所述隔离区30的面积,使得所述显示基板能够满足在所述隔离区 30的窄边框化。
因此,本公开实施例提供的显示装置在包括上述显示基板时,通过在所述隔离区30设置所述第一阻隔结构,使得在进行薄膜封装工艺后,能够实现对所述显示基板开孔区20附近的有效封装,更好的保证了所述薄膜封装的有效性和完整性,使得所述显示基板在保证良好封装效果的同时,更好的满足向高分辨率方向发展的需求。
需要说明的是,所述显示装置可以为:电视、显示器、数码相框、手机、平板电脑等任何具有显示功能的产品或部件。
本公开实施例还提供了一种显示基板的制作方法,用于制作上述实施例所述的显示基板,所述显示基板具有显示区域,所述显示区域包括像素区10、开孔区20、以及位于所述像素区10和所述开孔区20之间的隔离区30,所述隔离区30环绕所述开孔区20设置;所述制作方法包括:
在像素区10的基底上制作驱动电路层,所述驱动电路层包括导电层;
在位于隔离区30的基底60上制作无机层结构和至少一个第一阻隔结构31;所述第一阻隔结构31包括:沿远离所述基底60的方向依次层叠设置的阻挡图形310和第一隔离部件311;所述阻挡图形310与所述导电层同层制作,所述第一隔离部件311的侧面具有凹口;所述无机层结构包括层叠设置的多层无机膜层,所述阻挡图形310位于相邻的两层无机膜层之间,所述第一隔离部件311位于所述无机层结构背向所述基底60的一侧;
在形成有所述驱动电路层、所述无机层结构和至少一个第一阻隔结构31的基底60上,形成位于所述像素区10和所述隔离区30的发光功能层61,所述发光功能层61位于所述隔离区30的部分,在所述第一隔离部件311的侧面断开。
采用上述实施例提供的制作方法制作的显示基板中,在隔离区30设置了至少一个第一阻隔结构31,所述第一阻隔结构31包括:沿远离所述基底60的方向依次层叠设置的阻挡图形310和第一隔离部件311;所述阻挡图形310位于隔离区30中相邻的两层无机膜层之间,将相邻的无机膜层间隔开,很好的避免了由于多层无机膜层接触性的叠在一起,为裂纹向像素区10延伸提供 更有利的延伸路径的问题。所述第一隔离部件311的侧面具有凹口,所述发光功能层61延伸至所述隔离区30的部分能够在所述第一隔离部件311的侧面凹口处断开,从而避免了水和氧气在开孔边界的切割线处,沿所述发光功能层61渗入到显示基板内部对显示基板内部造成侵蚀,导致显示失效的问题。
而且,采用上述实施例提供的制作方法制作的显示基板中,由于所述第一隔离部件311位于所述阻挡图形310和所述无机层结构背向所述基底60的一侧,使得所述第一隔离部件311相对于所述基底60的高度增大,从而更好的保证了所述发光功能层61能够在所述第一隔离部件311的侧面断开,避免了水和氧气沿所述发光功能层61入侵至显示基板的内部。
另外,在每一个所述第一阻隔结构31中,所述阻挡图形310与所述第一隔离部件311沿垂直于所述基底60的方向层叠设置,实现了在解决裂纹延伸和水、氧气入侵的同时,将所述第一阻隔结构31所占空间最小化,从而更有利于缩小所述隔离区30的面积,以满足所述显示基板向高分辨率方向发展的需求。
因此,采用上述实施例提供的制作方法制作显示基板时,通过在所述隔离区30设置所述第一阻隔结构,使得在进行薄膜封装工艺后,能够实现对所述显示基板开孔区20附近的有效封装,更好的保证了所述薄膜封装的有效性和完整性,使得所述显示基板在保证良好封装效果的同时,更好的满足向高分辨率方向发展的需求。
在一些实施例中,所述阻挡图形310包括第一阻挡图形3101和第二阻挡图形3102;所述无机层结构包括沿远离所述基底60的方向依次层叠设置的第一无机层33、第二无机层34和第三无机层35,所述第一阻挡图形3101位于所述第一无机层33与所述第二无机层34之间,所述第二阻挡图形3102位于所述第二无机层34与所述第三无机层35之间;所述驱动电路层包括晶体管结构63和电容结构64;所述晶体管结构63包括沿远离所述基底60的方向依次层叠设置的有源层、栅极和源漏电极层,所述源漏电极层包括同层同材料设置的源电极和漏电极;所述电容结构64包括沿垂直于所述基底60的 方向相对设置的第一极板641和第二极板642,所述第一极板641与所述栅极同层同材料设置,所述第二极板642位于所述第一极板641与所述源漏电极层之间;所述第一无机层延伸至所述有源层与所述栅极之间作为第一栅绝缘层,所述第二无机层34延伸至所述栅极与所述第二极板642之间作为第二栅绝缘层,所述第三无机层35延伸至所述第二极板642与所述源漏电极层之间作为层间介质层;
制作所述阻挡图形310的步骤具体包括:
通过一次构图工艺同时形成所述第一阻挡图形3101和所述栅极;
通过一次构图工艺同时形成所述第二阻挡图形3102和所述第二极板642。
上述实施例提供的制作方法中,将所述第一阻挡图形3101和所述栅极在同一次构图工艺中同时形成,将所述第二阻挡图形3102和所述第二极板642在同一次构图工艺中同时形成,更好的简化了所述显示基板的制作工艺流程,降低了显示基板的制作成本。
在一些实施例中,所述制作方法还包括:
在位于隔离区30的基底60上制作至少一个第二隔离部件32,所述第二隔离部件32在所述基底60上的正投影,位于所述第一阻隔结构31在所述基底60上的正投影远离所述开孔区20的一侧;所述第二隔离部件32的侧面具有凹口,所述发光功能层61延伸至所述隔离区30的部分,在所述第二隔离部件32的侧面断开。
上述实施例提供的制作方法制作的显示基板中,设置所述第二隔离部件32的侧面具有凹口,所述发光功能层61延伸至所述隔离区30的部分能够在所述第二隔离部件32的侧面凹口处断开,进一步避免了水和氧气在开孔边界的切割线处,沿所述发光功能层61渗入到显示基板内部对显示基板内部造成侵蚀,导致显示失效的问题。
在一些实施例中,所述像素区10还设置有:位于所述基底60与所述发光功能层61之间的晶体管结构63;所述晶体管结构63包括沿远离所述基底60的方向依次层叠设置的有源层、栅极和源漏电极层,所述源漏电极层包括 同层同材料设置的源电极和漏电极;
制作所述第一隔离部件311和所述第二隔离部件32的步骤具体包括:
通过一次构图工艺,同时形成所述第一隔离部件311、所述第二隔离部件32、所述源电极和所述漏电极。
上述实施例提供的制作方法中,通过一次构图工艺,同时形成所述第一隔离部件311、所述第二隔离部件32、所述源电极和所述漏电极,更好的简化了所述显示基板的制作工艺流程,降低了显示基板的制作成本。
在一些实施例中,所述显示基板还包括:沿远离所述基底60的方向依次层叠设置在所述基底60上的第一源漏金属层和第二源漏金属层66;
制作所述第一隔离部件311和所述第二隔离部件32的步骤具体包括:
通过一次构图工艺,同时形成所述第一隔离部件311、所述第二隔离部件32和所述第二源漏金属层66。
上述实施例提供的制作方法中,通过一次构图工艺,同时形成所述第一隔离部件311、所述第二隔离部件32和所述第二源漏金属层66,更好的简化了所述显示基板的制作工艺流程,降低了显示基板的制作成本。
需要说明,本说明书中的各个实施例均采用递进的方式描述,各个实施例之间相同相似的部分互相参见即可,每个实施例重点说明的都是与其他实施例的不同之处。尤其,对于方法实施例而言,由于其基本相似于产品实施例,所以描述得比较简单,相关之处参见产品实施例的部分说明即可。
除非另外定义,本公开使用的技术术语或者科学术语应当为本公开所属领域内具有一般技能的人士所理解的通常意义。本公开中使用的“第一”、“第二”以及类似的词语并不表示任何顺序、数量或者重要性,而只是用来区分不同的组成部分。“包括”或者“包含”等类似的词语意指出现该词前面的元件或者物件涵盖出现在该词后面列举的元件或者物件及其等同,而不排除其他元件或者物件。“连接”、“耦接”或者“相连”等类似的词语并非限定于物理的或者机械的连接,而是可以包括电性的连接,不管是直接的还是间接的。“上”、“下”、“左”、“右”等仅用于表示相对位置关系,当被描述对象的绝对位置改变后,则该相对位置关系也可能相应地改变。
可以理解,当诸如层、膜、区域或基板之类的元件被称作位于另一元件“上”或“下”时,该元件可以“直接”位于另一元件“上”或“下”,或者可以存在中间元件。
在上述实施方式的描述中,具体特征、结构、材料或者特点可以在任何的一个或多个实施例或示例中以合适的方式结合。
以上所述,仅为本公开的具体实施方式,但本公开的保护范围并不局限于此,任何熟悉本技术领域的技术人员在本公开揭露的技术范围内,可轻易想到变化或替换,都应涵盖在本公开的保护范围之内。因此,本公开的保护范围应以所述权利要求的保护范围为准。

Claims (22)

  1. 一种显示基板,具有显示区域,所述显示区域包括像素区、开孔区、以及位于所述像素区和所述开孔区之间的隔离区,所述隔离区环绕所述开孔区设置;
    所述像素区包括位于所述显示基板的基底上的发光功能层,以及位于所述基底与所述发光功能层之间的驱动电路层,所述驱动电路层包括导电层;
    所述隔离区设置有位于所述基底上的至少一个第一阻隔结构,所述第一阻隔结构包括:沿远离所述基底的方向依次层叠设置的阻挡图形和第一隔离部件;所述阻挡图形与所述导电层同层制作,所述第一隔离部件的侧面具有凹口,所述发光功能层延伸至所述隔离区的部分,在所述第一隔离部件的侧面断开;
    所述隔离区还设置有位于所述基底上的无机层结构,所述无机层结构包括层叠设置的多层无机膜层,所述阻挡图形位于相邻的两层无机膜层之间,所述第一隔离部件位于所述无机层结构背向所述基底的一侧。
  2. 根据权利要求1所述的显示基板,其中,所述阻挡图形包括第一阻挡图形和第二阻挡图形;
    所述无机层结构包括沿远离所述基底的方向依次层叠设置的第一无机层、第二无机层和第三无机层,所述第一阻挡图形位于所述第一无机层与所述第二无机层之间,所述第二阻挡图形位于所述第二无机层与所述第三无机层之间。
  3. 根据权利要求2所述的显示基板,其中,
    所述驱动电路层包括晶体管结构和电容结构;所述晶体管结构包括沿远离所述基底的方向依次层叠设置的有源层、栅极和源漏电极层,所述源漏电极层包括同层同材料设置的源电极和漏电极;所述电容结构包括沿垂直于所述基底的方向相对设置的第一极板和第二极板,所述第一极板与所述栅极同层同材料设置,所述第二极板位于所述第一极板与所述源漏电极层之间;
    所述第一无机层延伸至所述有源层与所述栅极之间作为第一栅绝缘层, 所述第二无机层延伸至所述栅极与所述第二极板之间作为第二栅绝缘层,所述第三无机层延伸至所述第二极板与所述源漏电极层之间作为层间介质层;
    所述导电层包括所述栅极和所述第二极板,所述第一阻挡图形与所述栅极同层同材料设置,所述第二阻挡图形与所述第二极板同层同材料设置。
  4. 根据权利要求1所述的显示基板,其中,
    所述隔离区还设置有位于所述基底上的至少一个第二隔离部件,所述第二隔离部件在所述基底上的正投影,位于所述第一阻隔结构在所述基底上的正投影远离所述开孔区的一侧;
    所述第二隔离部件的侧面具有凹口,所述发光功能层延伸至所述隔离区的部分,在所述第二隔离部件的侧面断开。
  5. 根据权利要求4所述的显示基板,其中,所述隔离区设置有间隔设置的多个所述第二隔离部件;
    所述无机层结构延伸至各所述第二隔离部件与所述基底之间,所述无机层结构具有沟槽,所述沟槽在所述基底上的正投影,位于相邻的所述第二隔离部件在所述基底上的正投影之间。
  6. 根据权利要求5所述的显示基板,其中,所述无机层结构包括沿远离所述基底的方向依次层叠设置的第一栅绝缘层、第二栅绝缘层和层间介质层,在垂直于所述基底的方向上,所述沟槽贯穿所述第一栅绝缘层、所述第二栅绝缘层和所述层间介质层。
  7. 根据权利要求5所述的显示基板,其中,在垂直于所述基底的方向上,所述沟槽的深度在
    Figure PCTCN2020090550-appb-100001
  8. 根据权利要求4所述的显示基板,其中,
    所述第一隔离部件包括:沿远离所述基底的方向依次层叠设置的第一功能图形、第二功能图形和第三功能图形,所述第一功能图形在所述基底上的正投影包围所述第二功能图形在所述基底上的正投影,所述第三功能图形在所述基底上的正投影包围所述第二功能图形在所述基底上的正投影;和/或,
    所述第二隔离部件包括:沿远离所述基底的方向依次层叠设置的第四功能图形、第五功能图形和第六功能图形,所述第四功能图形在所述基底上的 正投影包围所述第五功能图形在所述基底上的正投影,所述第六功能图形在所述基底上的正投影包围所述第五功能图形在所述基底上的正投影。
  9. 根据权利要求8所述的显示基板,其中,所述像素区还设置有:位于所述基底与所述发光功能层之间的晶体管结构;所述晶体管结构包括沿远离所述基底的方向依次层叠设置的有源层、栅极和源漏电极层,所述源漏电极层包括同层同材料设置的源电极和漏电极;所述源电极和所述漏电极均包括沿远离所述基底的方向依次层叠设置的第一金属子膜层、第二金属子膜层和第三金属子膜层;
    所述第一功能图形与所述第一金属子膜层同层同材料设置,所述第二功能图形与所述第二金属子膜层同层同材料设置,所述第三功能图形与所述第三金属子膜层同层同材料设置;和/或,
    所述第四功能图形与所述第一金属子膜层同层同材料设置,所述第五功能图形与所述第二金属子膜层同层同材料设置,所述第六功能图形与所述第三金属子膜层同层同材料设置。
  10. 根据权利要求8所述的显示基板,其中,所述显示基板还包括:沿远离所述基底的方向依次层叠设置在所述基底上的第一源漏金属层和第二源漏金属层;所述第二源漏金属层包括沿远离所述基底的方向依次层叠设置的第四金属子膜层、第五金属子膜层和第六金属子膜层;
    所述第一功能图形与所述第四金属子膜层同层同材料设置,所述第二功能图形与所述第五金属子膜层同层同材料设置,所述第三功能图形与所述第六金属子膜层同层同材料设置;和/或,
    所述第四功能图形与所述第四金属子膜层同层同材料设置,所述第五功能图形与所述第五金属子膜层同层同材料设置,所述第六功能图形与所述第六金属子膜层同层同材料设置。
  11. 根据权利要求4所述的显示基板,其中,所述隔离区还设置有:
    位于所述基底上的挡墙结构,所述挡墙结构在所述基底上的正投影,位于所述第一阻隔结构在所述基底上的正投影与所述第二隔离部件在所述基底上的正投影之间;
    从所述像素区延伸至所述隔离区的封装结构,所述封装结构包括沿远离所述基底的方向依次层叠设置的第一无机封装层、有机封装层和第二无机封装层;
    所述第一无机封装层和所述第二无极封装层完全覆盖所述第一阻隔结构、所述第二隔离部件和所述挡墙结构;
    所述有机封装层在所述基底上的正投影位于所述挡墙结构在所述基底上的正投影远离所述开孔区的一侧。
  12. 根据权利要求11所述的显示基板,其中,
    所述挡墙结构包括沿靠近所述开孔区的方向依次排列的第一挡墙部件和第二挡墙部件,所述第一挡墙部件背向所述基底的表面的高度,低于所述第二挡墙部件背向所述基底的表面的高度。
  13. 根据权利要求12所述的显示基板,其中,所述像素区还设置有沿远离所述基底的方向依次层叠设置在所述基底上的像素界定层和隔垫物层;
    所述第一挡墙部件包括沿远离所述基底的方向依次层叠设置的第一挡墙图形和第二挡墙图形,所述第一挡墙图形与所述像素界定层同层同材料设置,所述第二挡墙图形与所述隔垫物层同层同材料设置。
  14. 根据权利要求12所述的显示基板,其中,所述像素区还设置有沿远离所述基底的方向依次层叠设置在所述基底上的平坦层、像素界定层和隔垫物层;
    所述第二挡墙部件包括沿远离所述基底的方向依次层叠设置的第三挡墙图形、第四挡墙图形和第五挡墙图形,所述第三挡墙图形与所述平坦层同层同材料设置,所述第四挡墙图形与所述像素界定层同层同材料设置,所述第五挡墙图形与所述隔垫物层同层同材料设置。
  15. 根据权利要求12所述的显示基板,其中,所述像素区还设置有沿远离所述基底的方向依次层叠设置在所述基底上的第一平坦层、第二平坦层和像素界定层;
    所述第一挡墙部件包括沿远离所述基底的方向依次层叠设置的第一挡墙图形和第二挡墙图形,所述第一挡墙图形与所述第一平坦层同层同材料设置, 所述第二挡墙图形与所述像素界定层同层同材料设置。
  16. 根据权利要求12所述的显示基板,其中,所述像素区还设置有沿远离所述基底的方向依次层叠设置在所述基底上的第一平坦层、第二平坦层和像素界定层;
    所述第二挡墙部件包括沿远离所述基底的方向依次层叠设置的第三挡墙图形、第四挡墙图形和第五挡墙图形,所述第三挡墙图形与所述第一平坦层同层同材料设置,所述第四挡墙图形与所述第二平坦层同层同材料设置,所述第五挡墙图形与所述像素界定层同层同材料设置。
  17. 一种显示装置,包括如权利要求1~16中任一项所述的显示基板。
  18. 一种显示基板的制作方法,所述显示基板具有显示区域,所述显示区域包括像素区、开孔区、以及位于所述像素区和所述开孔区之间的隔离区,所述隔离区环绕所述开孔区设置;所述制作方法包括:
    在像素区的基底上制作驱动电路层,所述驱动电路层包括导电层;
    在位于隔离区的基底上制作无机层结构和至少一个第一阻隔结构;所述第一阻隔结构包括:沿远离所述基底的方向依次层叠设置的阻挡图形和第一隔离部件;所述阻挡图形与所述导电层同层制作,所述第一隔离部件的侧面具有凹口;所述无机层结构包括层叠设置的多层无机膜层,所述阻挡图形位于相邻的两层无机膜层之间,所述第一隔离部件位于所述无机层结构背向所述基底的一侧;
    在形成有所述驱动电路层、所述无机层结构和至少一个第一阻隔结构的基底上,形成位于所述像素区和所述隔离区的发光功能层,所述发光功能层位于所述隔离区的部分,在所述第一隔离部件的侧面断开。
  19. 根据权利要求18所述的显示基板的制作方法,其中,所述阻挡图形包括第一阻挡图形和第二阻挡图形;所述无机层结构包括沿远离所述基底的方向依次层叠设置的第一无机层、第二无机层和第三无机层,所述第一阻挡图形位于所述第一无机层与所述第二无机层之间,所述第二阻挡图形位于所述第二无机层与所述第三无机层之间;所述驱动电路层包括晶体管结构和电容结构;所述晶体管结构包括沿远离所述基底的方向依次层叠设置的有源层、 栅极和源漏电极层,所述源漏电极层包括同层同材料设置的源电极和漏电极;所述电容结构包括沿垂直于所述基底的方向相对设置的第一极板和第二极板,所述第一极板与所述栅极同层同材料设置,所述第二极板位于所述第一极板与所述源漏电极层之间;所述第一无机层延伸至所述有源层与所述栅极之间作为第一栅绝缘层,所述第二无机层延伸至所述栅极与所述第二极板之间作为第二栅绝缘层,所述第三无机层延伸至所述第二极板与所述源漏电极层之间作为层间介质层;
    制作所述阻挡图形的步骤具体包括:
    通过一次构图工艺同时形成所述第一阻挡图形和所述栅极;
    通过一次构图工艺同时形成所述第二阻挡图形和所述第二极板。
  20. 根据权利要求18所述的显示基板的制作方法,其中,所述制作方法还包括:
    在位于隔离区的基底上制作至少一个第二隔离部件,所述第二隔离部件在所述基底上的正投影,位于所述第一阻隔结构在所述基底上的正投影远离所述开孔区的一侧;所述第二隔离部件的侧面具有凹口,所述发光功能层延伸至所述隔离区的部分,在所述第二隔离部件的侧面断开。
  21. 根据权利要求20所述的显示基板的制作方法,其中,所述像素区还设置有:位于所述基底与所述发光功能层之间的晶体管结构;所述晶体管结构包括沿远离所述基底的方向依次层叠设置的有源层、栅极和源漏电极层,所述源漏电极层包括同层同材料设置的源电极和漏电极;
    制作所述第一隔离部件和所述第二隔离部件的步骤具体包括:
    通过一次构图工艺,同时形成所述第一隔离部件、所述第二隔离部件、所述源电极和所述漏电极。
  22. 根据权利要求20所述的显示基板的制作方法,其中,所述显示基板还包括:沿远离所述基底的方向依次层叠设置在所述基底上的第一源漏金属层和第二源漏金属层;
    制作所述第一隔离部件和所述第二隔离部件的步骤具体包括:
    通过一次构图工艺,同时形成所述第一隔离部件、所述第二隔离部件和 所述第二源漏金属层。
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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114824128A (zh) * 2022-04-07 2022-07-29 武汉华星光电半导体显示技术有限公司 显示面板及显示装置
EP3993080A4 (en) * 2020-05-29 2022-12-14 BOE Technology Group Co., Ltd. DISPLAY PANEL AND METHOD OF MANUFACTURE THEREOF, AND DISPLAY DEVICE

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110265583B (zh) * 2019-07-26 2022-08-12 京东方科技集团股份有限公司 一种显示面板及其制备方法、显示装置
CN111244117B (zh) * 2020-04-24 2020-07-28 京东方科技集团股份有限公司 一种阵列基板及其制作方法、显示装置
KR20220020478A (ko) * 2020-08-11 2022-02-21 삼성디스플레이 주식회사 표시장치
CN114335374A (zh) * 2020-09-30 2022-04-12 京东方科技集团股份有限公司 一种显示基板及其制作方法、显示装置
KR20220072068A (ko) * 2020-11-24 2022-06-02 삼성디스플레이 주식회사 표시 장치 및 표시 장치의 제조 방법
KR20220092009A (ko) * 2020-12-24 2022-07-01 엘지디스플레이 주식회사 기판 홀을 포함하는 표시장치
CN115224220A (zh) * 2022-08-02 2022-10-21 维信诺科技股份有限公司 显示面板、显示装置及显示面板的制备方法

Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2016085796A (ja) * 2014-10-23 2016-05-19 株式会社ジャパンディスプレイ 有機el表示装置
CN109920818A (zh) * 2018-11-14 2019-06-21 京东方科技集团股份有限公司 显示面板及其制造方法、显示装置
CN110212113A (zh) * 2019-05-31 2019-09-06 京东方科技集团股份有限公司 电致发光显示基板及其制备方法、电致发光显示装置
CN110265583A (zh) * 2019-07-26 2019-09-20 京东方科技集团股份有限公司 一种显示面板及其制备方法、显示装置
CN110265471A (zh) * 2019-07-04 2019-09-20 京东方科技集团股份有限公司 显示装置、显示面板及其制造方法
CN110518141A (zh) * 2019-08-15 2019-11-29 云谷(固安)科技有限公司 一种显示面板及其制备方法
CN110828519A (zh) * 2019-07-31 2020-02-21 云谷(固安)科技有限公司 一种显示面板及其制备方法和显示装置
CN110875440A (zh) * 2018-08-30 2020-03-10 三星显示有限公司 显示装置和显示面板

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101955621B1 (ko) * 2012-09-21 2019-05-31 삼성디스플레이 주식회사 유기발광 표시패널 및 그 제조방법
KR101732939B1 (ko) * 2012-10-26 2017-05-08 삼성디스플레이 주식회사 표시 장치 및 이의 제조 방법
CN103887261B (zh) * 2014-03-03 2016-08-31 京东方科技集团股份有限公司 一种柔性显示器及其制备方法
KR102250048B1 (ko) * 2014-09-16 2021-05-11 삼성디스플레이 주식회사 유기 발광 표시 장치
JP6560530B2 (ja) * 2015-04-30 2019-08-14 株式会社ジャパンディスプレイ 表示装置
CN109216413B (zh) * 2017-06-30 2023-06-23 天马微电子股份有限公司 Oled显示设备及其制造方法
CN107393946B (zh) * 2017-07-31 2020-08-11 京东方科技集团股份有限公司 一种有机发光二极管显示面板及其制作方法
US20200235180A1 (en) * 2019-01-18 2020-07-23 Samsung Display Co., Ltd. Display panel
KR102646719B1 (ko) * 2019-02-22 2024-03-14 삼성디스플레이 주식회사 투명 표시 장치 및 이의 제조 방법
CN110112101B (zh) * 2019-05-08 2021-10-08 武汉天马微电子有限公司 显示面板的制作方法、显示面板以及显示装置

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2016085796A (ja) * 2014-10-23 2016-05-19 株式会社ジャパンディスプレイ 有機el表示装置
CN110875440A (zh) * 2018-08-30 2020-03-10 三星显示有限公司 显示装置和显示面板
CN109920818A (zh) * 2018-11-14 2019-06-21 京东方科技集团股份有限公司 显示面板及其制造方法、显示装置
CN110212113A (zh) * 2019-05-31 2019-09-06 京东方科技集团股份有限公司 电致发光显示基板及其制备方法、电致发光显示装置
CN110265471A (zh) * 2019-07-04 2019-09-20 京东方科技集团股份有限公司 显示装置、显示面板及其制造方法
CN110265583A (zh) * 2019-07-26 2019-09-20 京东方科技集团股份有限公司 一种显示面板及其制备方法、显示装置
CN110828519A (zh) * 2019-07-31 2020-02-21 云谷(固安)科技有限公司 一种显示面板及其制备方法和显示装置
CN110518141A (zh) * 2019-08-15 2019-11-29 云谷(固安)科技有限公司 一种显示面板及其制备方法

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP3993080A4 (en) * 2020-05-29 2022-12-14 BOE Technology Group Co., Ltd. DISPLAY PANEL AND METHOD OF MANUFACTURE THEREOF, AND DISPLAY DEVICE
US11871605B2 (en) 2020-05-29 2024-01-09 Chengdu Boe Optoelectronics Technology Co., Ltd. Display panel and manufacturing method thereof, display device
CN114824128A (zh) * 2022-04-07 2022-07-29 武汉华星光电半导体显示技术有限公司 显示面板及显示装置

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