WO2023098283A1 - 显示基板及其制作方法、以及显示装置 - Google Patents

显示基板及其制作方法、以及显示装置 Download PDF

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Publication number
WO2023098283A1
WO2023098283A1 PCT/CN2022/124055 CN2022124055W WO2023098283A1 WO 2023098283 A1 WO2023098283 A1 WO 2023098283A1 CN 2022124055 W CN2022124055 W CN 2022124055W WO 2023098283 A1 WO2023098283 A1 WO 2023098283A1
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WIPO (PCT)
Prior art keywords
sub
layer
base substrate
groove
pixel
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PCT/CN2022/124055
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English (en)
French (fr)
Inventor
郭晓亮
石佺
张微
周瑞
赵吾阳
董中飞
张毅
杨远江
宋亮
秦成杰
王本莲
龙跃
黄炜赟
Original Assignee
京东方科技集团股份有限公司
成都京东方光电科技有限公司
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Publication of WO2023098283A1 publication Critical patent/WO2023098283A1/zh

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1248—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition or shape of the interlayer dielectric specially adapted to the circuit arrangement
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass

Definitions

  • At least one embodiment of the present disclosure relates to a display substrate, a manufacturing method thereof, and a display device.
  • the performance requirements of high brightness and low power consumption of the display device can be met as far as possible by isolating the material layers for light emission between adjacent sub-pixels to reduce signal crosstalk.
  • At least one embodiment of the present disclosure provides a display substrate, a manufacturing method thereof, and a display device.
  • At least one embodiment of the present disclosure provides a display substrate, including: a base substrate including at least a first display area; a plurality of sub-pixels located in the first display area on the base substrate, and each sub-pixel in at least part of the sub-pixels
  • the pixel includes a light-emitting element, and the light-emitting element includes a light-emitting functional layer and a first electrode and a second electrode located on both sides of the light-emitting functional layer in a direction perpendicular to the base substrate, and the first electrode is located on the light-emitting functional layer.
  • the light-emitting functional layer includes a plurality of film layers; an insulating layer is located on the base substrate.
  • the display substrate further includes a shielding portion located on a side of the insulating layer away from the base substrate, and the orthographic projection of the shielding portion on the base substrate is the same as that of the insulating layer on the base substrate.
  • the insulating layer includes a plurality of grooves, the grooves and the shielding portion are at least partially located between adjacent sub-pixels, and the shielding portion and the insulating layer are away from the liner
  • the projections of the part constituting the edge of the groove on the side surface of the base substrate overlap on the base substrate, and protrude into the opening of the groove to form a protruding part, or at least part of the shielding part
  • the slope angle between the side surface and the plane parallel to the insulating layer and away from the substrate side surface is a first slope angle, and at least part of the side surface of the groove is parallel to the insulating layer and away from the substrate.
  • the slope angle of the plane on one side of the substrate is a second slope angle, at least one of the first slope angle and the second slope angle is greater than 60 degrees; the material of the insulating layer is different from the material of the shielding part , and along a direction perpendicular to the base substrate, the thickness of at least a part of the projection overlapping of the insulating layer and the shielding portion on the base substrate is greater than the thickness of the shielding portion; the number of light-emitting functional layers At least one of the film layers is broken at the groove.
  • the light-emitting functional layer includes a first light-emitting layer, a charge generation layer, and a second light-emitting layer stacked, and the charge generation layer is located between the first light-emitting layer and the second light-emitting layer. Between the second light emitting layers, the charge generation layer is disconnected at least part of the edges of the shielding portion.
  • the second electrode is disconnected at least part of an edge of the shielding portion.
  • the insulating layer is located between the first electrode and the base substrate.
  • the insulating layer includes an organic layer.
  • the groove is located in the organic layer, and the ratio of the depth of the groove to the thickness of the flat part of the organic layer is 0.1 ⁇ 1.
  • the first electrode includes at least one film layer, and the shielding portion is disposed on the same layer as the at least one film layer of the first electrode.
  • the display substrate further includes: a pixel defining pattern located on a side of the insulating layer away from the base substrate, at least the pixel defining pattern located in the first display region includes a plurality of first An opening, one sub-pixel corresponds to at least one first opening, the light-emitting element of the sub-pixel is at least partially located in the first opening corresponding to the sub-pixel, and the first opening is configured to expose the first electrode.
  • the pixel defining pattern further includes a plurality of second openings exposing at least a portion of the groove.
  • the insulating layer includes a pixel defining pattern, at least the pixel defining pattern located in the first display region includes a plurality of first openings, and one sub-pixel corresponds to at least one first opening, The light emitting element of the sub-pixel is at least partially located in the first opening corresponding to the sub-pixel, and the first opening is configured to expose the first electrode.
  • the groove includes a second opening that penetrates the pixel defining portion of the pixel defining pattern in a direction perpendicular to the base substrate; or, the depth of the groove is the same as that of the pixel
  • the thickness ratio of the flat portion of the pixel defining portion defining the pattern is equal to or greater than 0.2 and less than 1.
  • the shielding portion is located on a side of the pixel defining portion of the pixel defining pattern away from the base substrate.
  • the plurality of sub-pixels includes a plurality of sub-pixels of a first color, a plurality of sub-pixels of a second color, and a plurality of sub-pixels of a third color, and the plurality of sub-pixels of a first color and the plurality of sub-pixels of a third color
  • a plurality of third color sub-pixels are alternately arranged along a first direction and a second direction parallel to the base substrate to form a plurality of first pixel rows and a plurality of first pixel columns
  • the plurality of second color sub-pixels The pixels are arranged in an array along the first direction and the second direction to form a plurality of second pixel rows and a plurality of second pixel columns, and the plurality of first pixel rows and the plurality of second pixel rows Alternately arranged along the second direction and staggered from each other in the first direction, the plurality of first pixel columns and the plurality of second pixel columns are alternate
  • At least part of the annular groove includes at least one notch, and the orthographic projection of the shielding portion on the base substrate is located at the vertical direction of the groove on the base substrate. Both sides of the extension direction of the orthographic projection.
  • the orthographic projection of the protruding portion protruding into the groove on the base substrate of the shielding portion of the shielding portion
  • the ratio of the size to the size of the orthographic projection of the shielding portion on the base substrate is 0.005 ⁇ 0.5.
  • a plurality of shielding parts arranged between adjacent sub-pixels along the arrangement direction of the two adjacent sub-pixels is arranged, and two adjacent shielding parts in the plurality of shielding parts arranged between adjacent sub-pixels
  • a groove is arranged between the two shielding parts, and the two shielding parts located on both sides of the edge of the groove protrude into the groove.
  • At least one groove is disposed between adjacent sub-pixels.
  • the display substrate further includes: a data line located between the insulating layer and the base substrate; and a power line located between the insulating layer and the base substrate, the At least part of the power line is arranged on the same layer as the data line.
  • the groove overlaps at least one of the data line and the power line.
  • the material of the insulating layer includes an organic material
  • the material of the shielding portion includes an inorganic non-metallic material or a metallic material.
  • At least part of the film layers in the light-emitting functional layer and the second electrode are included in the groove.
  • the display substrate further includes: an encapsulation layer located on a side of the light emitting element away from the base substrate.
  • the encapsulation layer includes a first encapsulation layer, a second encapsulation layer and a third encapsulation layer stacked, the first encapsulation layer is located between the second encapsulation layer and the base substrate, and the first encapsulation layer A layer and at least part of the second encapsulation layer are located within the groove.
  • the thickness of the second encapsulation layer at the position of the groove is greater than that of the second encapsulation layer at the position of the light emitting region of the light emitting element. at the thickness.
  • At least part of the boundary of the groove is substantially the same as the boundary outline of the light emitting region of the sub-pixel immediately adjacent to the groove.
  • the two shielding portions located on both sides of the edge of the groove.
  • the dimensions are the same, and the dimensions that the two shielding parts protrude into the groove are the same.
  • the extending direction of the orthographic projection of the groove on the base substrate is different from the extending direction of at least one of the data line and the power line.
  • the base substrate further includes a second display area, and the first display area surrounds at least part of the second display area.
  • An embodiment of the present disclosure provides a display device, including the above-mentioned display substrate.
  • An embodiment of the present disclosure provides a method for manufacturing a display substrate, including: forming a plurality of sub-pixels on a base substrate, wherein forming the sub-pixels includes sequentially forming a stacked first pixel in a direction perpendicular to the base substrate.
  • the material of the insulating layer is different from the material of the shielding part, and along a direction perpendicular to the base substrate, at least a part of the overlapping projection of the insulating layer and the shielding part on the base substrate has a thickness greater than The thickness of the shielding part; the luminescent functional layer is formed after forming the groove, the luminescent functional layer includes a plurality of film layers, at least one of the multiple film layers is broken at the groove open.
  • forming the first electrode includes: after forming the insulating layer and before forming the groove, forming an electrode layer on the insulating layer, and patterning the electrode layer to form the first electrode.
  • the insulating layer includes a pixel-defining pattern
  • forming the first electrode includes: before forming the pixel-defining pattern, forming an electrode layer on the base substrate, and forming an electrode layer on the electrode layer patterning to form the first electrode
  • forming the pixel-defining pattern includes: forming a pixel-defining film on the first electrode; and forming a first pixel-defining film to expose the first electrode.
  • the opening and the groove, the first opening is configured to define the light emitting area of the sub-pixel.
  • FIG. 1A is a schematic diagram of a partial cross-sectional structure of a display substrate provided according to an example of an embodiment of the present disclosure
  • FIG. 1B is a schematic diagram of a partial cross-sectional structure of a display substrate provided according to another example of an embodiment of the present disclosure
  • FIG. 1C is a plan view of a display substrate provided according to an embodiment of the present disclosure.
  • FIG. 2 is a schematic diagram of a partial cross-sectional structure of a display substrate provided according to another example of an embodiment of the present disclosure
  • FIG. 3 is a schematic diagram of a partial cross-sectional structure of a display substrate provided according to another example of an embodiment of the present disclosure
  • FIG. 4A is a schematic diagram of the display substrate before forming FIG. 2;
  • FIG. 4B is a schematic diagram of the display substrate after forming FIG. 2;
  • 5A to 5D are schematic flow charts of the manufacturing method of the display substrate before forming FIG. 3;
  • FIG. 6 is a schematic diagram of a partial cross-sectional structure of a display substrate provided according to another example of an embodiment of the present disclosure.
  • FIG. 7 is a schematic diagram of the display substrate shown in FIG. 6 including a light-emitting functional layer and a multi-layer film layer on the side away from the base substrate;
  • FIG. 8 is a schematic diagram of a partial cross-sectional structure of a display substrate provided according to another example of an embodiment of the present disclosure.
  • 9A to 9B are schematic flow charts of the manufacturing method of the display substrate before forming FIG. 8;
  • FIG. 10A to FIG. 10E are schematic planar structure diagrams of a display substrate provided according to an embodiment of the present disclosure.
  • FIG. 11A is a schematic diagram of a partial cross-sectional structure of a display substrate provided according to an example of another embodiment of the present disclosure.
  • FIG. 11B is a schematic diagram of a partial cross-sectional structure of a display substrate provided according to another example of another embodiment of the present disclosure.
  • FIG. 12 is a schematic diagram of a partial cross-sectional structure of a display substrate provided according to an example of another embodiment of the present disclosure.
  • FIG. 13A to 13F are schematic flow charts of the manufacturing method of the display substrate before forming the display substrate shown in FIG. 11A;
  • FIG. 14 is a schematic diagram of a partial cross-sectional structure of a display substrate provided according to an example of another embodiment of the present disclosure.
  • 15A to 15B are schematic flow charts of the manufacturing method of the display substrate before forming FIG. 14;
  • FIG. 16 is a schematic diagram of a partial cross-sectional structure of a display substrate provided according to an example of another embodiment of the present disclosure.
  • 17A to 17B are schematic flow charts of the manufacturing method of the display substrate before forming FIG. 16;
  • FIG. 18 is a schematic diagram of a partial cross-sectional structure of a display substrate provided according to an example of another embodiment of the present disclosure.
  • 19A to 19B are schematic flow charts of the manufacturing method of the display substrate before forming FIG. 18;
  • FIG. 20 is a schematic diagram of a partial cross-sectional structure of a display substrate provided according to an example of another embodiment of the present disclosure.
  • 21A to 21B are schematic flowcharts of a manufacturing method for forming the display substrate before FIG. 20;
  • 22A to 22C are schematic flowcharts of another manufacturing method for forming the display substrate before FIG. 20;
  • FIG. 23 is a schematic diagram of a partial cross-sectional structure of a display substrate provided according to an example of another embodiment of the present disclosure.
  • FIG. 24 is a schematic flowchart of a manufacturing method for forming the display substrate before FIG. 23;
  • Fig. 25 is a schematic diagram of a partial cross-sectional structure of a display substrate provided according to an example of another embodiment of the present disclosure.
  • 26A to 26B are schematic flowcharts of a manufacturing method for forming the display substrate before FIG. 25;
  • Fig. 27 is a schematic diagram of a partial cross-sectional structure of a display substrate provided according to an example of another embodiment of the present disclosure.
  • FIG. 28A is a schematic diagram of a partial cross-sectional structure of a display substrate provided according to an example of another embodiment of the present disclosure.
  • FIG. 28B is a schematic diagram of a partial cross-sectional structure of a display substrate provided according to another example of another embodiment of the present disclosure.
  • 29A to 29D are schematic flowcharts of a manufacturing method for forming the display substrate before FIG. 27;
  • FIG. 28A are schematic flow charts of a manufacturing method before forming the display substrate shown in FIG. 28A;
  • FIG. 31 is a schematic diagram of a partial cross-sectional structure of a display substrate provided according to an example of another embodiment of the present disclosure.
  • Fig. 32 is a schematic diagram of a partial cross-sectional structure of a display substrate provided according to an example of another embodiment of the present disclosure.
  • 33A to 33B are schematic flowcharts of a manufacturing method for forming the display substrate before FIG. 31;
  • 34A to 34B are schematic flowcharts of a manufacturing method for forming the display substrate before FIG. 32;
  • FIG. 35 is a schematic structural diagram of another display substrate provided by an embodiment of the present disclosure.
  • FIG. 36 is a schematic structural diagram of another display substrate provided by an embodiment of the present disclosure.
  • FIG. 37 is a schematic structural diagram of another display substrate provided by an embodiment of the present disclosure.
  • FIG. 38 is a schematic structural diagram of another display substrate provided by an embodiment of the present disclosure.
  • 39A-39C are schematic steps of another method for manufacturing a display substrate provided by an embodiment of the present disclosure.
  • FIG. 40 is a schematic structural diagram of another display substrate provided by an embodiment of the present disclosure.
  • 41A-41C are schematic diagrams of steps of another manufacturing method of a display substrate provided by an embodiment of the present disclosure.
  • the component may be one or more, or may be understood as at least one.
  • At least one means one or more, and “plurality” means at least two.
  • the “same layer” in the embodiments of the present disclosure refers to the relationship between multiple film layers formed of the same material after going through the same step (eg, one-step patterning process).
  • the “same layer” here does not always mean that multiple film layers have the same thickness or that multiple film layers have the same height in cross-sectional view.
  • the luminescent functional layer may include multilayer luminescent layers stacked, at least two of the multilayer luminescent layers are provided with a charge generation layer (CGL), and the conductive layer of the charge generation layer
  • the charge generation layer is a whole film layer
  • the charge generation layers of two adjacent organic light-emitting elements are continuous film layers, which easily causes crosstalk between adjacent sub-pixels.
  • At least one embodiment of the present disclosure provides a display substrate, a manufacturing method thereof, and a display device.
  • the display substrate includes a base substrate, a plurality of sub-pixels and an insulating layer on the base substrate.
  • the sub-pixels are located in the first display area on the base substrate, and each sub-pixel includes an organic light-emitting element.
  • the organic light-emitting element includes a light-emitting functional layer and a first electrode and a second electrode located on both sides of the light-emitting functional layer along a direction perpendicular to the base substrate.
  • the electrode, the first electrode is located between the luminescent functional layer and the base substrate, and the luminescent functional layer includes a plurality of film layers.
  • the display substrate also includes a shielding portion located on the side of the insulating layer away from the base substrate, and the orthographic projection of the shielding portion on the base substrate overlaps with the orthographic projection of the insulating layer on the base substrate;
  • the insulating layer includes multiple a groove, the groove and the shielding portion are at least partly located between adjacent sub-pixels, the shielding portion and the portion of the surface of the insulating layer away from the substrate that constitutes the edge of the groove are in the substrate
  • the projections on the base substrate overlap and protrude into the opening of the groove to form a protrusion, or at least part of the side surface of the shielding part is parallel to the surface of the insulating layer on the side away from the base substrate
  • the slope angle of the plane of the groove is the first slope angle
  • the slope angle between at least part of the side surface of the groove and the plane parallel to the surface of the insulating layer away from the base substrate is the second slope angle
  • the first slope angle is At least one of a slope angle and the
  • the present disclosure by providing a groove between adjacent sub-pixels in the display substrate and a shielding portion protruding into the groove, at least one layer of the multiple film layers of the light-emitting functional layer can be disconnected at the edge of the shielding portion, It is beneficial to reduce the probability of crosstalk between adjacent sub-pixels.
  • FIG. 1A is a schematic diagram of a partial cross-sectional structure of a display substrate provided according to an example of an embodiment of the present disclosure
  • FIG. 1B is a schematic diagram of a partial cross-sectional structure of a display substrate provided according to another example of an embodiment of the present disclosure
  • the display substrate includes a first display area A1 and a first display area A2 located on the base substrate 01 .
  • the first display area A1 surrounds at least part of the second display area A2.
  • the second display area A2 is located in the middle of the top of the base substrate 01, for example, the four sides of the rectangular first display area A1 can all surround the second display area A2, that is, the second display area A2 may be surrounded by the first display area A1.
  • the second display area A2 may not be located at the middle position on the top of the base substrate 01 shown in FIG. 1B , but at other positions.
  • the second display area A2 may be located at the upper left corner or the upper right corner of the base substrate 01 .
  • the first display area A1 can be a non-light-transmitting display area
  • the second display area A2 can be a light-transmitting display area, so that the display substrate can be directly provided with required hardware structures such as photosensitive sensors on the second display area without digging holes.
  • the second display area A2 provides a basis for realizing a full screen.
  • the display substrate includes a base substrate 01 , a plurality of sub-pixels 10 in a first display area A1 on the base substrate 01 , and an insulating layer 200 on the base substrate 01 .
  • the material of the insulating layer 200 may include an organic material, and the insulating layer 200 may be an organic layer.
  • the sub-pixel 10 includes an organic light emitting element 100
  • the organic light emitting element 100 includes a light emitting functional layer 130
  • first electrodes 110 and The second electrode 120 and the first electrode 110 are located between the luminescent functional layer 130 and the base substrate 01
  • the luminescent functional layer 130 includes a plurality of film layers, for example, the luminescent functional layer 130 includes a charge generation layer 133 .
  • the display substrate further includes a shielding portion 300 located on the side of the insulating layer 200 away from the base substrate 01 , and the orthographic projection of the shielding portion 300 on the base substrate 01 is the same as that of the insulating layer 200 on the substrate.
  • the orthographic projection on substrate 01 has overlap.
  • the material of the shielding portion 300 is different from that of the insulating layer 200 .
  • the material of the shielding part 300 includes an inorganic non-metal material or a metal material.
  • the insulating layer 200 includes a plurality of grooves 210 , and along a direction perpendicular to the base substrate 01 , the thickness of the insulating layer 200 except for the grooves 210 is greater than the thickness of the shielding portion 300 .
  • the thickness of at least a portion where the insulating layer 200 overlaps with the shielding portion 300 on the base substrate 01 is greater than the thickness of the shielding portion 300 .
  • the groove 210 and the shielding portion 300 are at least partly located between the adjacent sub-pixels 10 , and there are at least two holes arranged along the arrangement direction of the adjacent sub-pixels 10 and spaced apart from each other between the adjacent sub-pixels 10 .
  • Two shielding parts 300 are located at the edge of the groove 210 and protrude into the groove 210 along the alignment direction to form a protruding part 310 covering a part of the opening of the groove.
  • the above-mentioned arrangement direction can be roughly the extension direction of the center line or the shortest distance line of the light-emitting areas of adjacent sub-pixels, or the light-emitting areas of adjacent sub-pixels are distributed along the X direction, and the above-mentioned direction is the X direction.
  • the slope angle between at least part of the side surface of the shielding portion 300 and a plane parallel to the surface of the insulating layer 200 away from the base substrate 01 is a first slope angle
  • at least The slope angle between a part of the side surface and a plane parallel to the surface of the insulating layer 200 away from the side surface of the base substrate 01 is a second slope angle
  • at least one of the first slope angle and the second slope angle is greater than 60 degrees.
  • the slope angle between at least part of the side surface of the shielding part 300 and the plane parallel to the contact surface of the shielding part 300 and the insulating layer 200 is the first slope angle
  • at least part of the side surface of the groove 210 is parallel to the shielding part.
  • the slope angle of the plane of the contact surface of the portion 300 and the insulating layer 200 is a second slope angle
  • at least one of the first slope angle and the second slope angle is greater than 60 degrees.
  • at least one of the first slope angle and the second slope angle is 60-120 degrees.
  • at least one of the first slope angle and the second slope angle is 70-110 degrees.
  • at least one of the first slope angle and the second slope angle is 80-100 degrees.
  • At least one of the first slope angle and the second slope angle is greater than 70 degrees.
  • at least one of the first slope angle and the second slope angle is greater than 80 degrees.
  • at least one of the first slope angle and the second slope angle is greater than 70 degrees.
  • at least one of the first slope angle and the second slope angle is greater than 80 degrees.
  • at least one of the first slope angle and the second slope angle is greater than 90 degrees.
  • the above-mentioned first slope angle may be the angle between the surface of the shielding part away from the base substrate and the side surface of the shielding part, or the angle between the surface of the shielding part facing the base substrate and the side surface of the shielding part
  • the included angle; the above-mentioned second slope angle may be the included angle between the surface of the insulating layer on the side away from the base substrate and the side surface of the groove.
  • the side surface of the above-mentioned shielding part may refer to the surface of the shielding part having a certain angle with the base substrate
  • the side surface of the above-mentioned groove may refer to the side wall of the groove, which has a certain angle between the side wall and the base substrate. horn.
  • the difference between the examples shown in FIG. 1B and FIG. 1C lies in the positional relationship and angular relationship between the shielding portion 300 and the sidewall of the groove 210 .
  • At least one film layer of the light-emitting functional layer 130 is disconnected at least part of the edge of the shielding portion 300 .
  • a groove and a shielding portion are provided between adjacent sub-pixels in the display substrate.
  • the At least one film layer of the luminescent functional layer is disconnected at the protruding portion where the shielding portion protrudes relative to the edge of the groove, or is disconnected at the edge of the shielding portion and the sidewall of the groove, which is conducive to reducing the distance between adjacent sub-pixels. chance of crosstalk.
  • the refractive index of the insulating layer 200 is smaller than that of the shielding portion.
  • the shielding portion 300 may overlap with a certain transistor in the pixel circuit described later, so as to play a role of shielding light.
  • Adjacent sub-pixels in any embodiment of the present disclosure means that no other sub-pixels are arranged between two sub-pixels.
  • the plurality of sub-pixels 10 may include two adjacent sub-pixels 10 arranged along the X direction.
  • the plurality of shielding portions 300 disposed in the two adjacent sub-pixels 10 are arranged along the X direction.
  • the shielding portion 300 provided between two adjacent sub-pixels 10 protrudes into the groove 210 relative to the edge of the groove 210 along the X direction to form a protrusion 310, and the protrusion 310 in the shielding portion 300 is suspended,
  • the protruding portion 310 blocks the edge portion of the opening of the groove 210 , and the portion of the shielding portion 300 except the protruding portion 310 is attached to the surface of the insulating layer 200 away from the base substrate 01 .
  • the protrusion 310 extends in a direction parallel to the base substrate 01 .
  • the orthographic projection of the protrusion 310 on the insulating layer 200 is located in the groove 210 .
  • the distance between a shielding portion 300 located in two adjacent sub-pixels 10 and one of the two adjacent sub-pixels 10 is smaller than the distance from the other of the two adjacent sub-pixels 10;
  • the sub-pixel 10 that is closer to the shielding portion 300 is the sub-pixel P1
  • the protruding portion 310 in the shielding portion 300 is farther away from the sub-pixel P1 than other parts of the shielding portion 300
  • the groove 210 The center is located on the side of the shielding portion 300 away from the sub-pixel P1.
  • the light-emitting functional layer 130 may include a first light-emitting layer (EML) 131, a charge generation layer (CGL) 133, and a second light-emitting layer 132 that are stacked, and the charge generation layer 133 is located on the first light-emitting layer 131. and the second light-emitting layer 132 .
  • the charge generation layer has strong conductivity, which can make the luminescent functional layer have the advantages of long life, low power consumption and high brightness. For example, compared with the luminescent functional layer without the charge Setting the charge generation layer in the layer can nearly double the luminous brightness.
  • the above-mentioned sub-pixel including the charge generation layer adopts Tandem technology, uses N/P-CGL as a heterojunction, and connects two light-emitting layers in series.
  • This technology realizes the series connection of two light-emitting devices.
  • the light-emitting current of the light-emitting device is reduced, the lifespan of the organic light-emitting element is improved, and it is beneficial to be applied to new technologies with high lifespan such as vehicles.
  • the light emitting functional layer 130 may further include a hole injection layer (HIL), a hole transport layer (HTL), an electron transport layer (ETL) and an electron injection layer (EIL).
  • HIL hole injection layer
  • HTL hole transport layer
  • ETL electron transport layer
  • EIL electron injection layer
  • the hole injection layer, the hole transport layer, the electron transport layer, the electron injection layer, and the charge generation layer 133 are all common layers of multiple sub-pixels 10 , which can be referred to as common layers.
  • the at least one film layer disconnected at the edge of the groove in the light-emitting functional layer 130 may be at least one film layer in the above-mentioned common layer. By disconnecting at least one film layer in the common layer at the edge of the groove between adjacent sub-pixels, it is beneficial to reduce the probability of crosstalk between adjacent sub-pixels.
  • the second light emitting layer 132 may be located between the first light emitting layer 131 and the second electrode 120
  • the hole injection layer may be located between the first electrode 110 and the first light emitting layer 131
  • an electron transport layer may also be provided between the charge generation layer 133 and the first light emitting layer 131
  • a hole transport layer may be provided between the second light emitting layer 132 and the charge generation layer 133 .
  • an electron transport layer and an electron injection layer may be disposed between the second light emitting layer 132 and the second electrode 120 .
  • the first light emitting layer 131 and the second light emitting layer 132 may be light emitting layers emitting light of the same color.
  • the first light emitting layer 131 (or the second light emitting layer 132 ) in the sub-pixels 10 that emit light of different colors emits light of different colors.
  • the embodiments of the present disclosure are not limited thereto.
  • the first light-emitting layer 131 and the second light-emitting layer 132 can be light-emitting layers that emit light of different colors.
  • the light-emitting layer can make the light emitted by the multi-layer light-emitting layers included in the sub-pixel 10 mix into white light, and the color of the light emitted by each sub-pixel can be adjusted by setting a color filter layer.
  • the light-emitting layers located on the same side of the charge generation layer 133 may be spaced apart from each other, or may overlap or connect at the interval between two sub-pixels 10, which is not limited by the embodiments of the present disclosure. .
  • the first light emitting layers 131 (second light emitting layers 132 ) of adjacent sub-pixels may overlap within the groove 210 .
  • the first light emitting layer 131 (second light emitting layer 132) of adjacent sub-pixels can be arranged at intervals in the groove 210; or, only one of the adjacent sub-pixels can be arranged in the groove 210
  • the material of the electron transport layer can include aromatic heterocyclic compounds, such as imidazole derivatives such as benzimidazole derivatives, imidazopyridine derivatives, benzimidazopyridine derivatives; pyrimidine derivatives, triazine derivatives, etc. oxazine derivatives; quinoline derivatives, isoquinoline derivatives, phenanthroline derivatives, and other compounds containing a nitrogen-containing six-membered ring structure (including compounds having a phosphine oxide-based substituent on a heterocyclic ring), and the like.
  • aromatic heterocyclic compounds such as imidazole derivatives such as benzimidazole derivatives, imidazopyridine derivatives, benzimidazopyridine derivatives; pyrimidine derivatives, triazine derivatives, etc. oxazine derivatives; quinoline derivatives, isoquinoline derivatives, phenanthroline derivatives, and other compounds containing a nitrogen-containing six-membered ring structure (
  • the material of the charge generation layer 133 may be a material containing phosphine groups, or a material containing triazine.
  • At least one of the light-emitting functional layers 130 of the two adjacent sub-pixels 10 Layers may be concatenated or be entire layers.
  • at least one film layer such as a charge generation layer
  • at least one film layer in the light-emitting functional layers of two adjacent sub-pixels is spaced apart, which can increase the number of light-emitting functional layers between adjacent sub-pixels. resistance, so that while reducing the probability of crosstalk between the two adjacent sub-pixels, it does not affect the normal display of the sub-pixels.
  • a groove is provided in the organic layer between two adjacent sub-pixels, and a shielding portion protruding inward relative to the edge of the groove is provided on the edge of the groove, so that The charge generation layer formed at the protruding part of the shielding part protruding into the groove is disconnected.
  • at least one film layer (such as the charge generation layer) in the light-emitting functional layers of the two adjacent sub-pixels is arranged at intervals, which can increase the phase difference.
  • the resistance of the light-emitting functional layer between adjacent sub-pixels can reduce the probability of crosstalk between two adjacent sub-pixels without affecting the normal display of the sub-pixels.
  • the film layers between the second light emitting layer 132 and the first electrode 110 are disconnected at the protruding portion 310 of the shielding portion 300 .
  • the depth of the groove 210 is greater than the thickness of the light-emitting functional layer 130 , and all the film layers included in the light-emitting functional layer 130 are disconnected at the protrusion 310 .
  • part of the film layers of the light-emitting functional layer 130 and the second electrode 120 may be disposed in the groove 210 .
  • all the film layers of the light-emitting functional layer 130 and the second electrode 120 may be disposed in the groove 210 .
  • the first orthographic projection of at least one layer of the luminescent functional layer 130 on the base substrate 01 is continuous, and the second orthographic projection on the plane perpendicular to the base substrate 01 is discontinuous; or, the luminescent functional layer 130
  • the first orthographic projection of at least one layer on the base substrate 01 and the second orthographic projection on a plane perpendicular to the base substrate 01 are discontinuous, and the width of the interval at the discontinuous position in the first orthographic projection is less than The width of the interval at the location of the discontinuity in the second orthographic projection.
  • At least one of the light-emitting functional layers 130 can be a charge generation layer 133, the first orthographic projection of the charge generation layer 133 on the base substrate 01 is continuous, and the second orthographic projection of the charge generation layer 133 on a plane perpendicular to the base substrate 01 is continuous.
  • Orthographic projections are discontinuous.
  • the charge generation layer 133 may include a portion located in the groove 210 and a portion not located in the groove 210 , the two portions being disconnected at the edge of the groove 210 .
  • the first orthographic projections of the two parts on the substrate 01 may be contiguous or overlapped, and the first orthographic projections are continuous.
  • the second orthographic projections of the two parts on the XY plane are discontinuous.
  • At least one of the light-emitting functional layers 130 can be a charge generation layer 133, and the first orthographic projection of the charge generation layer 133 on the base substrate 01 is different from the second orthographic projection on a plane perpendicular to the base substrate 01. continuous, and the width of the interval at the discontinuous position in the first orthographic projection is smaller than the width of the interval at the discontinuous position in the second orthographic projection.
  • the charge generation layer 133 may include a portion located in the groove 210 and a portion not located in the groove 210 , the two portions being disconnected at the edge of the defining structure 300 .
  • the two parts are provided with a space between the first orthographic projections on the base substrate 01 , the first orthographic projections being disconnected.
  • the second orthographic projections of the two parts on the XY plane are discontinuous, and there is an interval between the second orthographic projections of the two parts on the XY plane .
  • the insulating layer 200 is located between the first electrode 110 and the base substrate 01 .
  • the material of the base substrate 01 can be made of one or more materials in glass, polyimide, polycarbonate, polyacrylate, polyetherimide, and polyethersulfone. This embodiment includes but Not limited to this.
  • the insulating layer 200 includes an organic layer.
  • the organic layer includes a planarization (PLN, Planarization) layer.
  • PPN Planarization
  • the first electrode 110 is in contact with the surface of the organic layer away from the base substrate 01 .
  • the groove 210 is located in the organic layer, and the ratio of the depth of the groove 210 to the thickness of the flat portion of the organic layer is greater than or equal to 0.2 and less than 1.
  • the groove 210 is located in the flat layer, and the ratio of the depth of the groove 210 to the thickness of the flat layer is 0.2 ⁇ 0.9.
  • the ratio of the depth of the groove 210 to the thickness of the flat layer is 0.3 ⁇ 0.8.
  • the ratio of the depth of the groove 210 to the thickness of the flat layer is 0.4 ⁇ 0.7.
  • the ratio of the depth of the groove 210 to the thickness of the flat layer is 0.5 ⁇ 0.6.
  • the thickness of the above-mentioned flat layer may refer to the thickness at the maximum thickness position of the flat layer, or may refer to the thickness at the minimum thickness position in the flat layer except grooves and via holes, or may refer to the average thickness of the flat layer.
  • the thickness of the planar layer may be 1.5 microns, and the depth of the groove 210 may be 0.5 microns.
  • the material of the flat layer includes one or a combination of resin, acrylic or polyethylene terephthalate, polyimide, polyamide, polycarbonate, epoxy resin, and the like.
  • the second electrode 120 in the multiple sub-pixels 10 may be a common electrode shared by the multiple sub-pixels 10, and the insulating layer 200 between two adjacent sub-pixels 10 is not provided with a groove 210, and When the shielding portion 300 is not provided on the insulating layer 200, the second electrode 120 is a whole film layer; a groove 210 is provided on the insulating layer 200 between two adjacent sub-pixels 10, and opposite When the shielding portion 300 protrudes inward from the edge of the groove 210 , both the light-emitting functional layer 130 and the second electrode 120 are disconnected at the protruding portion 310 of the shielding portion 300 .
  • the orthographic projection of the second electrode 210 on the base substrate 01 is continuous.
  • the orthographic projection of the second electrode 120 perpendicular to the base substrate 01 may be discontinuous.
  • the depth of the groove 210 may be greater than the thickness of the light emitting functional layer 130 so that both the light emitting functional layer 130 and the second electrode 120 are disconnected at the protrusion 310 of the blocking part 300 .
  • the depth of the groove 210 can also be set smaller, so that the light emitting functional layer 130 is disconnected at the protruding portion 310 of the shielding portion 300 , but the second electrode 120 is not disconnected at the protruding portion 310 .
  • the material of the shielding portion 300 may include any one or more of silicon nitride, silicon oxide, or silicon oxynitride.
  • the material of the shielding portion 300 may also be an inorganic material such as metal or alloy, metal oxide, metal sulfide, or metal nitride, which is not limited in this embodiment.
  • metal oxides may include calcium oxide, zinc oxide, copper oxide, titanium dioxide, tin dioxide, etc.
  • metal sulfides may include iron sulfide, copper sulfide, zinc sulfide, tin disulfide, etc.
  • metal nitrides may include silicon nitride , aluminum nitride, etc., this embodiment includes but not limited thereto.
  • the ratio of the dimension of the protruding portion 310 of the shielding portion 300 protruding into the groove 210 to the dimension of the shielding portion 300 may be 0.005 ⁇ 0.5.
  • the ratio of the dimension of the protruding portion 310 of the shielding portion 300 protruding into the groove 210 to the dimension of the shielding portion 300 may be 0.01 ⁇ 0.45.
  • the ratio of the dimension of the protruding portion 310 of the shielding portion 300 protruding into the groove 210 to the dimension of the shielding portion 300 may be 0.05 ⁇ 0.4.
  • the ratio of the dimension of the protruding portion 310 of the shielding portion 300 protruding into the groove 210 to the dimension of the shielding portion 300 may be 0.1 ⁇ 0.35.
  • the ratio of the size of the protruding portion 310 of the shielding portion 300 protruding into the groove 210 to the size of the shielding portion 300 may be 0.2 ⁇ 0.3.
  • the size of the protruding portion 310 of the shielding portion 300 protruding into the groove 210 may be in the range of 0.1-5 microns.
  • the size of the protruding part 310 of the shielding part 300 protruding into the groove 210 may be in the range of 0.2-2 microns.
  • the display substrate further includes a pixel-defining pattern 400 located on the side of the first electrode 110 away from the base substrate 01 , and at least the pixel-defining pattern 400 located in the first display area A1 includes a plurality of first openings 410
  • One sub-pixel corresponds to at least one first opening 410
  • the light-emitting element of the sub-pixel is at least partially located in the first opening 410 corresponding to the sub-pixel
  • the first opening 410 is configured to expose the first electrode 110 .
  • at least a portion of the first electrode 110 is located between the pixel defining pattern 400 and the base substrate 01 .
  • the first electrodes 110 and the second electrodes 120 located on both sides of the light-emitting functional layer 130 can drive the first opening 410 of the pixel-defining pattern 400.
  • the luminescent functional layer 130 emits light.
  • the above-mentioned light-emitting area may refer to the area where the sub-pixel effectively emits light, and the shape of the light-emitting area refers to a two-dimensional shape.
  • the shape of the light-emitting area may be the same as the shape of the first opening 410 of the pixel defining pattern 400 .
  • the part of the pixel defining pattern 400 other than the first opening 410 includes a pixel defining portion
  • the material of the pixel defining portion may include polyimide, acrylic or polyethylene terephthalate.
  • the pixel defining portion covers at least a part of the shielding portion 300 .
  • the pixel defining portion does not cover the protruding portion 310 of the shielding portion 300 .
  • a pixel defining portion is provided between the shielding portion 300 and the first electrode 110, that is, the pixel defining portion can separate the shielding portion 300 from the first electrode 110. open.
  • the first electrode 110 includes at least one film layer, and the shielding portion 300 is disposed on the same layer as one film layer of the first electrode 110 .
  • the material of a film layer in the first electrode 110 is the same as that of the shielding portion 300 .
  • the first electrode includes at least one film layer, and the shielding portion is disposed on the same layer as the at least one film layer of the first electrode.
  • the shielding portion and at least one film layer of the first electrode are disposed on the same surface of the same film layer.
  • the first electrode 110 may be an anode
  • the second electrode 120 may be a cathode
  • the cathode can be formed of a material with high conductivity and low work function, for example, the cathode can be made of a metal material.
  • the anode may be formed of a transparent conductive material having a high work function.
  • the shielding portion 300 may be integrated with a layer of the first electrode 110 closest to the first electrode 110 on the side closest to the base substrate 01 .
  • the shielding portion 300 may be integrated with a layer of the first electrode 110 closest to the first electrode 110 on the side closest to the base substrate 01 .
  • the patterning process for patterning the masking portion can be saved.
  • the size of the first electrode 110 may be larger than the size of the pixel defining portion.
  • the first electrode 110 may include a portion exposed by the first opening 410 , a portion covered by the pixel defining portion, and the protrusion 310 extending into the edge of the groove 210 .
  • the pixel defining portion between the centers of the light-emitting regions of the adjacent sub-pixels 10 is called the first pixel defining portion.
  • the pixel defining portions located on both sides of the center of the light-emitting area of the adjacent sub-pixel 10 are referred to as second pixel defining portions, and the size of the first pixel defining portion along the X direction may be smaller than the size of the second pixel defining portion along the X direction, so that The distance between the two first pixel defining portions can be increased to provide the groove 210 and the shielding portion 300 between the two first pixel defining portions.
  • the pixel defining pattern 400 further includes a second opening 420 configured to expose at least part of the groove 210 .
  • the second opening 420 may expose a portion of the blocking part 300 .
  • the second opening 420 may completely expose the groove 210 .
  • the distance between the edges of the two shielding parts 300 close to each other is smaller than the opening of the groove 210 .
  • the cross-section of the groove 210 parallel to the XY plane can include a figure with an opening surrounded by three straight sides, wherein the intersecting two straight sides can form a right angle, an acute angle or an obtuse angle;
  • the groove 210, the section cut parallel to the XY plane can include a figure with an opening surrounded by arc-shaped sides, along the direction opposite to the direction indicated by the arrow in the Y direction shown in Figure 1A, the size of the figure along the X direction can be Gradually increase, or first increase and then decrease.
  • other film layers 011 are disposed between the insulating layer 200 and the base substrate 01, and the other film layers 011 may include gate insulating layers, interlayer insulating layers, pixel circuits (such as thin film transistors, Each film layer, data line, gate line, power signal line, reset power signal line, reset control signal line, light emission control signal line and other film layers or structures in structures such as storage capacitors).
  • other film layers 011 include only one layer of power signal lines.
  • one side surface of the insulating layer 200 facing the base substrate 01 may be in contact with the interlayer insulating layer.
  • FIG. 2 is a schematic diagram of a partial cross-sectional structure of a display substrate provided according to another example of an embodiment of the present disclosure.
  • the base substrate 01, the insulating layer 200, the shielding part 300, other film layers 011, and the film layers included in the organic light-emitting element shown in FIG. 2 may be the same as the corresponding structures in the display substrate shown in FIG. 1A, and will not be repeated here.
  • the first electrode 110 of the organic light emitting element may be connected to one of the source and drain of the thin film transistor in the pixel circuit through a via hole penetrating the insulating layer 200 .
  • the pixel circuit further includes a storage capacitor 014 .
  • a spacer 012 is further provided on the pixel defining portion of the pixel defining pattern 400 for supporting the evaporation mask for forming the light emitting layer.
  • the orthographic projection of the shielding portion 300 on the base substrate 01 is entirely within the orthographic projection of the pixel defining portion on the base substrate 01 .
  • the pixel defining portion covers the protruding portion 310 of the shielding portion 300 .
  • the pixel defining portion of the pixel defining pattern 400 covers part of the opening of the groove 210 , and the second opening 420 of the pixel defining pattern 400 only exposes part of the opening of the groove 210 .
  • the distance between two shielding portions 300 between adjacent sub-pixels may be 2-15 microns.
  • the distance between two shielding parts 300 between adjacent sub-pixels may be 5-10 microns.
  • the distance between two shielding parts 300 between adjacent sub-pixels may be 3-7 microns.
  • the distance between two shielding parts 300 between adjacent sub-pixels may be 4-12 microns.
  • film layers 011 shown in FIGS. 1A to 2 may include a source-drain metal layer SD layer (that is, the film layer where data lines and power signal lines are located), or may include two source-drain metal layers SD1 and SD2. layers (for example, other film layers may include two layers of power signal lines, and the two layers of power signal lines may be electrically connected).
  • SD layer that is, the film layer where data lines and power signal lines are located
  • two source-drain metal layers SD1 and SD2. layers for example, other film layers may include two layers of power signal lines, and the two layers of power signal lines may be electrically connected.
  • FIG. 3 is a schematic diagram of a partial cross-sectional structure of a display substrate provided according to another example of an embodiment of the present disclosure.
  • the base substrate 01 , the shielding portion 300 , the film layers included in the organic light-emitting element, and the spacer 012 shown in FIG. 3 may be the same as the corresponding structures in the display substrate shown in FIG. 2 , and will not be repeated here.
  • the orthographic projection of the pixel defining portion of the pixel defining pattern 400 on the base substrate 01 may not overlap the orthographic projection of the shielding portion 300 on the base substrate 01 .
  • the second opening 420 of the pixel defining pattern 400 may fully expose the blocking part 300 .
  • two grooves 210 may be provided between adjacent sub-pixels, and shielding portions 300 are provided on both sides of the opening of each groove 210 in the X direction.
  • the embodiments of the present disclosure are not limited to one or two grooves between adjacent sub-pixels, but may also be three or more, and can be adjusted according to the distance between adjacent sub-pixels and the size of grooves The number of grooves is set.
  • two shielding portions 300 between two adjacent grooves 210 may be arranged at intervals.
  • the embodiment of the present disclosure is not limited thereto.
  • a shielding part 300 may also be provided between the two adjacent grooves 210, and the two ends of the shielding part 300 are Openings of the two grooves 210 extend to form two protrusions 310 .
  • At least one of the two shielding parts 300 located on both sides of the two grooves 210 can also be the two adjacent sub-pixels.
  • a part of at least one of the two first electrodes 110 of the pixel for example, a part of the first electrode 110 is exposed by the first opening 410 of the pixel defining pattern 400 for driving the light-emitting functional layer to emit light, and the other part of the first electrode 110
  • the second opening 420 exposed by the pixel defining pattern 400 and extending to the opening edge of the groove 210 is used to disconnect the charge generating layer 133 , thereby saving process steps.
  • the display substrate includes a first conductive layer pattern 015 and a second conductive layer pattern 016 between the first electrode 110 and the base substrate 01, and the first conductive layer pattern 015 is located between the base substrate 01 and the base substrate 01. between the second conductive layer patterns 016 .
  • the first conductive layer pattern 015 may include a data line and a first power signal line
  • the second conductive layer pattern 016 may include a second power signal line
  • the first power signal line is electrically connected to the second power signal line.
  • the data line is configured to be electrically connected to the pixel circuit to provide the pixel circuit with a data signal data
  • the first power signal line is electrically connected to the pixel circuit to provide the pixel circuit with a power signal vdd.
  • the groove 210 overlaps the first conductive layer pattern 015 along a direction perpendicular to the base substrate 01 .
  • the groove 210 overlaps at least one of the data line and the power line in a direction perpendicular to the base substrate 01 .
  • the extending direction of the orthographic projection of the groove 210 on the base substrate 01 is different from the extending direction of at least one of the data line and the power line.
  • the extending direction of the data line may be the V direction or the U direction shown in FIG. 10A .
  • the extending direction of the power line may be the V direction or the U direction shown in FIG. 10A .
  • the cross section of the groove 210 parallel to the XY plane may include a figure with an opening surrounded by arc-shaped edges, along the direction opposite to the direction indicated by the arrow in the Y direction shown in FIG. 3 , the size of the graph along the X direction can first increase and then decrease.
  • the dimensions of the first light-emitting layer 131 and the second light-emitting layer 132 in the sub-pixel along the direction parallel to the base substrate 01 can be set smaller, and the first light-emitting layer 131 and the second light-emitting layer Layer 132 may not extend to the opening edge of groove 210 .
  • FIG. 4A is a schematic diagram of the display substrate before forming FIG. 2
  • FIG. 4B is a schematic diagram of the display substrate after forming FIG. 2
  • FIGS. For example, as shown in FIG. 2-3, FIG. 4A and FIG. 5A to FIG.
  • the manufacturing method of the display substrate includes forming a plurality of sub-pixels on the base substrate 01, wherein forming the sub-pixels includes Form the first electrode 110, the light-emitting function layer 130 and the second electrode 120 stacked in sequence in the direction; form the insulating layer 200 on the base substrate 01; A plurality of shielding parts 300 are formed by patterning, wherein the shielding parts 300 are located between adjacent sub-pixels, and at least two shielding parts 300 arranged along the arrangement direction of the adjacent sub-pixels are arranged between adjacent sub-pixels; The insulating layer 200 is etched to form the groove 210 .
  • the opening edge of the groove 210 expands outward relative to the edges of two adjacent shielding parts 300 that are close to each other so that the shielding part 300 includes a protruding part 310 protruding into the groove 210 in the arrangement direction; or, at least the shielding part 300
  • the slope angle between part of the side surface and the plane parallel to the contact surface of the shielding portion 300 and the insulating layer 200 is the first slope angle, and at least part of the side surface of the groove 210 is parallel to the plane parallel to the contact surface of the shielding portion 300 and the insulating layer 200
  • the slope angle is the second slope angle, and at least one of the first slope angle and the second slope angle is greater than 60 degrees.
  • the material of the insulating layer 200 is different from that of the shielding portion 300 , and along a direction perpendicular to the base substrate 01 , the thickness of the insulating layer 200 except for the groove 210 is greater than that of the shielding portion 300 .
  • the material of the insulating layer 200 may include an organic material, and the material layer of the shielding portion may be an inorganic non-metal material layer or a metal material layer.
  • the luminescent functional layer 130 is formed after the groove 210 is formed.
  • the luminescent functional layer 130 includes a plurality of film layers, at least one of which is disconnected at an edge of the shielding portion 300 close to the groove 210 .
  • the manufacturing method further includes: forming an electrode layer on the insulating layer 200 , and patterning the electrode layer to form the first electrode 110 .
  • the manufacturing method of a display substrate may include preparing a base substrate 01 on a glass carrier.
  • the substrate substrate 01 may be a flexible substrate substrate.
  • forming the base substrate 01 may include sequentially forming a stacked first flexible material layer, a first inorganic material layer, a semiconductor layer, a second flexible material layer and a second inorganic material layer on a glass carrier.
  • Materials such as the first flexible material layer and the second flexible material layer are polyimide (PI), polyethylene terephthalate (PET) or surface-treated polymer soft film.
  • the materials of the first inorganic material layer and the second inorganic material layer are silicon nitride (SiNx) or silicon oxide (SiOx), etc., which are used to improve the water and oxygen resistance of the base substrate.
  • the first inorganic material layer, the second inorganic material layer The layer is also called the barrier (Barrier) layer.
  • the material of the semiconductor layer is amorphous silicon (a-si).
  • its preparation process includes: first coating a layer of polyimide on a glass carrier, and forming the first flexible (PI1 ) layer; then deposit a layer of barrier film on the first flexible layer to form a first barrier (Barrier1) layer covering the first flexible layer; then deposit a layer of amorphous silicon film on the first barrier layer to form a layer covering the first The amorphous silicon (a-si) layer of the barrier layer; then coat a layer of polyimide on the amorphous silicon layer, and form the second flexible (PI2) layer after curing into a film; then on the second flexible layer A barrier film is deposited to form a second barrier (Barrier2) layer covering the second flexible layer, and finally the preparation of the base substrate 01 is completed.
  • forming other film layers 011 on the base substrate 01 includes forming a driving structure layer on the base substrate 01 .
  • the driving structure layer includes a plurality of driving circuits, and each driving circuit includes a plurality of transistors 013 and at least one storage capacitor 014 , for example, the driving circuit may adopt a 2T1C, 3T1C or 7T1C design.
  • forming the driving structure layer may include sequentially depositing a first insulating film and an active layer film on the base substrate 01, and patterning the active layer film through a patterning process to form a first insulating layer 0111 covering the entire base substrate 01. , and an active layer pattern 0112 disposed on the first insulating layer 0111, the active layer pattern 0112 includes at least a first active layer.
  • the second insulating film and the first metal film are deposited in sequence, the first metal film is patterned by a patterning process, and the second insulating layer 0113 covering the active layer pattern is formed, and the second insulating layer 0113 is arranged on the
  • the first gate metal layer pattern 0114 on the second insulating layer 0113, the first gate metal layer pattern 0114 at least includes a first gate electrode 0131 and a first capacitor electrode.
  • a third insulating film and a second metal film are sequentially deposited, and the second metal film is patterned by a patterning process to form a third insulating layer 0115 covering the first gate metal layer, and set The second gate metal layer pattern 0116 on the third insulating layer 0115, the second gate metal layer pattern 0116 at least includes a second capacitor electrode, and the position of the second capacitor electrode corresponds to the position of the first capacitor electrode.
  • a fourth insulating film is deposited, and the fourth insulating film is patterned by a patterning process to form a fourth insulating layer 0117 covering the second gate metal layer. At least two first via holes are opened on the fourth insulating layer 0117.
  • the fourth insulating layer 0117, the third insulating layer 0115 and the second insulating layer 0113 in the first via hole are etched away, exposing the surface of the first active layer of the active layer pattern 0112.
  • a third metal film is deposited, and the third metal film is patterned by a patterning process to form a source-drain metal layer pattern on the fourth insulating layer 0117.
  • the source-drain metal layer pattern includes at least the first source electrode 0132 and the first source electrode 0132 located in the display area.
  • the first source electrode 0132 and the first drain electrode 0133 may be connected to the first active layer in the active layer pattern 0112 through first via holes, respectively.
  • the first active layer, the first gate electrode 0131, the first source electrode 0132 and the first drain electrode 0133 in the active layer pattern 0112 can form a transistor 013, the first capacitor electrode and the second capacitor electrode may form a storage capacitor 014.
  • the driving circuit for the green sub-pixel and the driving circuit for the blue sub-pixel can be formed simultaneously.
  • the first insulating layer, the second insulating layer, the third insulating layer and the fourth insulating layer use silicon oxide (SiOx), silicon nitride (SiNx) and silicon oxynitride (SiON ) in any one or more, which can be single-layer, multi-layer or composite layer.
  • the first insulating layer 0111 is called a buffer (Buffer) layer, which is used to improve the water and oxygen resistance of the substrate 01;
  • the second insulating layer 0113 and the third insulating layer 0115 are called gate insulating (GI, Gate Insulator) layers ;
  • the fourth insulating layer 0117 is called an interlayer insulating (ILD, Interlayer Dielectric) layer.
  • the first metal film, the second metal film and the third metal film adopt metal materials, such as any one of silver (Ag), copper (Cu), aluminum (Al), titanium (Ti) and molybdenum (Mo) or more Multiple or alloy materials of the above metals, such as aluminum-neodymium alloy (AlNd) or molybdenum-niobium alloy (MoNb), can have a single-layer structure, or a multi-layer composite structure, such as Ti/Al/Ti and the like.
  • metal materials such as any one of silver (Ag), copper (Cu), aluminum (Al), titanium (Ti) and molybdenum (Mo) or more Multiple or alloy materials of the above metals, such as aluminum-neodymium alloy (AlNd) or molybdenum-niobium alloy (MoNb)
  • AlNd aluminum-neodymium alloy
  • MoNb molybdenum-niobium alloy
  • the active layer film is made of amorphous indium gallium zinc oxide (a-IGZO), zinc oxynitride (ZnON), indium zinc tin oxide (IZTO), amorphous silicon (a-Si), polysilicon (p-Si), One or more materials such as hexathiophene and polythiophene, that is, the present disclosure is applicable to transistors manufactured based on oxide technology, silicon technology and organic technology.
  • a-IGZO amorphous indium gallium zinc oxide
  • ZnON zinc oxynitride
  • IZTO indium zinc tin oxide
  • a-Si amorphous silicon
  • p-Si polysilicon
  • One or more materials such as hexathiophene and polythiophene, that is, the present disclosure is applicable to transistors manufactured based on oxide technology, silicon technology and organic technology.
  • an insulating layer 200 such as a flat layer, is formed on the base substrate 01 formed with the aforementioned pattern.
  • a flat thin film of organic material is coated on the base substrate 01 formed with the aforementioned pattern to form a flat (PLN, Planarization) layer 200 covering the entire base substrate 01, and through masking, exposure, and development processes, the display area
  • a plurality of second via holes are formed on the planar layer 200 .
  • the planar layer 200 in the plurality of second via holes is developed, exposing the surfaces of the first drain electrodes 0133 of the transistors 013 of the driving circuits of the plurality of sub-pixels respectively.
  • an inorganic material layer is formed on the flat layer 200 , and the inorganic material layer is patterned to form a shielding portion 300 .
  • the material of the shielding portion 300 may include any one or more of silicon nitride, silicon oxide, or silicon oxynitride.
  • the first electrode 110 of the sub-pixel is patterned on the planar layer 200 .
  • the first electrode 110 is connected to the first drain electrode 0133 of the transistor 013 through the second via hole in the planar layer 200 .
  • the first electrode 110 can be made of metal materials such as magnesium (Mg), silver (Ag), copper (Cu), aluminum (Al), titanium (Ti) and molybdenum (Mo). Any one or more of them, or alloy materials of the above metals, such as aluminum-neodymium alloy (AlNd) or molybdenum-niobium alloy (MoNb), can be a single-layer structure, or a multi-layer composite structure, such as Ti/Al/Ti etc., or a stacked structure formed of metal and transparent conductive materials, such as ITO/Ag/ITO, Mo/AlNd/ITO and other reflective materials.
  • metal materials such as magnesium (Mg), silver (Ag), copper (Cu), aluminum (Al), titanium (Ti) and molybdenum (Mo). Any one or more of them, or alloy materials of the above metals, such as aluminum-neodymium alloy (AlNd) or molybdenum-niobium alloy (MoN
  • the embodiment of the present disclosure is not limited to forming the first electrode 110 after the shielding portion 300 is formed; the first electrode 110 may also be formed before the shielding portion 300 is formed.
  • the shielding portion 300 and the first electrode 110 may be formed by the same patterning process.
  • a material layer is formed on the insulating layer 200 , and the shielding portion 300 and the first electrode 110 can be formed simultaneously by patterning the material layer.
  • both the first electrode 110 and the shielding part 300 may have a single-layer structure.
  • the first electrode 110 can be a multi-layer composite structure, such as ITO/Ag/ITO
  • the shielding part 300 can be a single-layer structure
  • the material of the shielding part 300 can be the same as that of a film layer of the first electrode 110, such as ITO.
  • both the first electrode 110 and the shielding portion 300 may have a single-layer structure, and the material of the shielding portion 300 is the same as that of the first electrode 110 .
  • the material of the shielding part 300 can be ITO, and the thickness of the shielding part 300 can be The organic light-emitting functional layer 130 can be blocked while the second electrode 120 remains continuous without being interrupted, thereby preventing crosstalk between adjacent sub-pixels, and at the same time, the uninterrupted second electrode ensures display uniformity.
  • the pixel defining pattern 400 may be formed.
  • a pixel-defining film is coated on the base substrate 01 formed with the aforementioned pattern, and the pixel-defining pattern 400 is formed through masking, exposure, and development processes.
  • the pixel definition pattern 400 of the display area includes a plurality of pixel definition parts, a plurality of first openings 410 and second openings 420 are formed between adjacent pixel definition parts, and the pixels in the first openings 410 and the second openings 420 define The film is developed away, exposing at least part of the surface of the first electrode 110 and the insulating layer 200 of the plurality of sub-pixels, respectively.
  • the pixel defining portion of the pixel defining pattern 400 may completely cover the shielding portion 300 . But not limited thereto, the pixel defining portion of the pixel defining pattern 400 may also partially cover the shielding portion 300 , or the pixel defining portion of the pixel defining pattern 400 may not cover the shielding portion 300 .
  • spacers 012 may be formed on the pixel defining portion.
  • an organic material thin film is coated on the base substrate 01 formed with the aforementioned pattern, and the spacers 012 are formed through masking, exposure, and development processes.
  • the spacer 012 can be used as a support layer configured to support the FMM (high precision mask) during the evaporation process.
  • a mask can be used to block the part except the second opening 420 to dry-etch the insulating layer 200 in the second opening 420 to form a recess.
  • the groove 210 , the edge of the shielding portion 300 and the edge of the groove 210 form an undercut structure.
  • the shielding portion 300 includes a protruding portion 310 protruding into the groove 210 .
  • the second electrode 120 may be a transparent cathode.
  • the light-emitting functional layer 130 can emit light from the side away from the base substrate 010 through the transparent cathode to achieve top emission.
  • the second electrode 120 can use any one or more of magnesium (Mg), silver (Ag), aluminum (Al), or an alloy made of any one or more of the above metals, or use A transparent conductive material, such as indium tin oxide (ITO), or a multi-layer composite structure of metal and transparent conductive material.
  • ITO indium tin oxide
  • forming the display substrate includes: using an open mask (Open Mask) to sequentially vapor-deposit to form a hole injection layer and a hole-transport layer;
  • a light-emitting layer 131 such as a blue light-emitting layer, a green light-emitting layer, and a red light-emitting layer;
  • the electron transport layer, the charge generation layer 133, and the hole transport layer are sequentially evaporated using an open mask;
  • the second light-emitting layer 132 of color light such as a blue light-emitting layer, a green light-emitting layer and a red light-emitting layer;
  • the electron transport layer, the second electrode and the light coupling layer are sequentially evaporated using an open mask.
  • the hole injection layer, the hole transport layer, the electron transport layer, the charge generation layer, the second electrode, and the light coupling layer are all common layers of multiple sub-pixels.
  • the formed luminescent functional layer 130 will be broken at the protruding portion 310 of the shielding portion 300, so that a part of the luminescent functional layer 130 is located at the edge of the shielding portion 300, and another part of the luminescent functional layer 130 is deposited in the groove 210.
  • the formed second electrode 120 will be disconnected at the protruding portion 310 of the shielding portion 300, so that a part of the second electrode 120 is located at the edge of the shielding portion 300, and another part of the second electrode 120 is deposited in the groove 210.
  • the manufacturing method of the display substrate further includes forming an encapsulation layer, which may include a stacked first encapsulation layer 017, a second encapsulation layer 018 and a third encapsulation layer.
  • the first encapsulation layer 017 is made of inorganic materials and covers the second electrode 120 in the display area.
  • the second encapsulation layer 018 is made of organic material.
  • the third encapsulation layer 019 is made of inorganic material and covers the first encapsulation layer 017 and the second encapsulation layer 018 .
  • this embodiment does not limit it.
  • the encapsulation layer may also adopt a five-layer structure of inorganic/organic/inorganic/organic/inorganic.
  • both the first encapsulation layer 017 and the second encapsulation layer 018 fill the groove 210 .
  • the thickness of the second encapsulation layer 018 at the position of the groove 210 is greater than the thickness of the second encapsulation layer 018 at the position of the light emitting region of the light emitting element.
  • the display substrate formed in this example is different from the display substrate shown in Figure 2, Figure 4A- Figure 4B in that the display substrate in this example includes two layers of source and drain metal Layer patterns 015 and 016 (first conductive layer pattern 015 and second conductive layer pattern 016 ).
  • the manufacturing method of the display substrate includes patterning and forming a plurality of shielding portions 300 on the surface of the insulating layer 200 away from the base substrate 01; After the shielding part 300 is formed, the first electrode 110 is formed by patterning.
  • This example schematically shows that the materials of the shielding portion 300 and the first electrode 110 are different, and are formed through a two-step patterning process, but it is not limited thereto.
  • the manufacturing method of the display substrate may include A one-step patterning process is used to form a plurality of shielding portions 300 and a plurality of first electrodes 110 on the surface of the insulating layer 200 away from the base substrate 01 .
  • a pixel defining pattern 400 may be formed.
  • a pixel-defining film is coated on the base substrate 01 formed with the aforementioned pattern, and the pixel-defining pattern 400 is formed through masking, exposure, and development processes.
  • the pixel definition pattern 400 of the display area includes a plurality of pixel definition parts, a plurality of first openings 410 and second openings 420 are formed between adjacent pixel definition parts, and the pixels in the first openings 410 and the second openings 420 define
  • the film is developed to expose at least part of the surface of the first electrode 110 of the plurality of sub-pixels, the shielding part 300 and part of the insulating layer 200 respectively.
  • the pixel defining portion of the pixel defining pattern 400 may not overlap with the shielding portion 300 . But not limited thereto, the pixel defining portion of the pixel defining pattern 400 may also partially cover the shielding portion 300 , or the pixel defining portion of the pixel defining pattern 400 completely covers the shielding portion 300 .
  • a spacer 012 can be formed on the pixel defining portion, and the method for forming the spacer 012 can be the same as that shown in FIG. 4B. This will not be repeated here.
  • the part outside the second opening 420 can be shielded by a mask to perform dry etching on the insulating layer 200 in the second opening 420 to form a recess.
  • the groove 210 , the edge of the shielding portion 300 and the edge of the groove 210 form an undercut structure.
  • the shielding portion 300 includes a protruding portion 310 protruding into the groove 210 .
  • the light emitting functional layer 130 and the second electrode 120 are sequentially formed.
  • the formed luminescent functional layer 130 is broken at the protruding portion 310 of the shielding portion 300 , so that a part of the luminescent functional layer 130 is located at the edge of the shielding portion 300 , and another part of the luminescent functional layer 130 is deposited into the groove 210 .
  • the formed second electrode 120 is also broken at the protruding portion 310 of the shielding portion 300 , so that a part of the second electrode 120 is located at the edge of the shielding portion 300 , and another part of the second electrode 120 is deposited into the groove 210 .
  • FIG. 6 is a schematic diagram of a partial cross-sectional structure of a display substrate according to another example of an embodiment of the present disclosure
  • FIG. 7 is a display substrate shown in FIG. Schematic diagram of the layers of the film.
  • the base substrate 01, other film layers 011, luminescent functional layer 130, second electrode 120, spacers 012, and packaging layers in the display substrate in the example shown in FIG. 6 and FIG. 7 can be compared with those in FIGS.
  • the base substrate 01 , other film layers 011 , light-emitting functional layer 130 , second electrode 120 , spacers 012 , and encapsulation layers shown in FIG. 4A to FIG. 4B have the same features, and will not be repeated here.
  • the difference between the display substrate in the example shown in FIG. 6 and the display substrate shown in FIGS. 1A to 5D is that the insulating layer 200 shown in FIG.
  • the flat layer 500 does not include the groove 210 .
  • the size of the groove 210 may be smaller than the size of the first opening 410 .
  • the shielding portion 300 is located on a side of the pixel defining pattern 400 away from the base substrate 01 .
  • the groove 210 includes a second opening 420 penetrating through the pixel defining portion of the pixel defining pattern 400 .
  • the ratio of the depth of the groove 210 to the thickness of the flat portion of the pixel defining portion in the pixel defining pattern 400 is greater than or equal to 0.2 and less than 1.
  • the ratio of the depth of the groove 210 to the thickness of the flat portion of the pixel defining part in the pixel defining pattern 400 may be 0.1 ⁇ 1.
  • the ratio of the depth of the groove 210 to the thickness of the pixel defining part in the pixel defining pattern 400 may be 0.2 ⁇ 0.9.
  • the ratio of the depth of the groove 210 to the thickness of the pixel defining part in the pixel defining pattern 400 may be 0.3 ⁇ 0.8.
  • the ratio of the depth of the groove 210 to the thickness of the pixel defining part in the pixel defining pattern 400 may be 0.4 ⁇ 0.7.
  • the ratio of the depth of the groove 210 to the thickness of the pixel defining part in the pixel defining pattern 400 may be 0.5 ⁇ 0.6.
  • the thickness of the pixel defining part in the embodiments of the present disclosure may refer to the average thickness of the pixel defining part, but is not limited thereto, and may also refer to the thickness at the position of the maximum thickness of the pixel defining part, or the thickness at the position of the minimum thickness.
  • the depth of the groove 210 in the pixel defining pattern 400 may be greater than the thickness of the light emitting function layer 130 so that both the light emitting function layer 130 and the second electrode 120 are disconnected at the protrusion 310 of the blocking part 300 .
  • the depth of the groove 210 can also be set smaller, so that the light emitting functional layer 130 is disconnected at the protruding portion 310 of the shielding portion 300 , but the second electrode 120 is not disconnected at the protruding portion 310 .
  • the spacer 012 may cover a part of the shielding portion 300 . But not limited thereto, for example, the spacer 012 may cover the entire shielding portion 300 , or the spacer 012 may not overlap with the shielding portion 300 .
  • a conductive layer 140 is disposed between the first electrode 110 and the light-emitting functional layer 130 , and the material of the conductive layer 140 is the same as that of the shielding portion 300 .
  • the material of the conductive layer 140 may be the same as that of the first electrode 110 .
  • the conductive layer 140 located between the first electrode 110 and the light-emitting functional layer 130 can be electrically connected to the first electrode 110 so as to work together with the first electrode 110 to excite the light-emitting functional layer to emit light.
  • the embodiment of the present disclosure is not limited thereto, and no film layer may be provided between the first electrode 110 and the light emitting functional layer 130, and the first electrode 110 is in contact with the light emitting functional layer 130.
  • the materials of the conductive layer 140 and the shielding portion 300 may include metal materials (such as titanium, aluminum, silver, etc.) or metal oxides (such as indium tin oxide).
  • FIG. 8 is a schematic diagram of a partial cross-sectional structure of a display substrate provided according to another example of an embodiment of the present disclosure.
  • the base substrate 01 and other film layers 011 in the display substrate in the example shown in FIG. 8 may have the same features as the base substrate 01 and other film layers 011 shown in FIG. 3 , which will not be repeated here.
  • the difference between the display substrate in the example shown in FIG. 8 and the display substrate shown in FIGS. 1A to 5D is that the insulating layer 200 shown in FIG.
  • the flat layer 500 does not include the groove 210 .
  • the grooves 210 in the pixel defining pattern 400 shown in FIG. 8 may have the same shape and size as the grooves 210 in the flat layer shown in FIG. 3 , which will not be repeated here.
  • the size of the groove 210 may be smaller than the size of the first opening 410 .
  • the shielding portion 300 is located on a side of the pixel defining pattern 400 away from the base substrate 01 .
  • the ratio of the depth of the groove 210 to the thickness of the pixel defining part in the pixel defining pattern 400 may be 0.2 ⁇ 0.9.
  • the ratio of the depth of the groove 210 to the thickness of the pixel defining part in the pixel defining pattern 400 may be 0.4 ⁇ 0.7.
  • the ratio of the depth of the groove 210 to the thickness of the pixel defining part in the pixel defining pattern 400 may be 0.5 ⁇ 0.6.
  • the thickness of the pixel defining part in the embodiments of the present disclosure may refer to the average thickness of the pixel defining part, but is not limited thereto, and may also refer to the thickness at the position of the maximum thickness of the pixel defining part, or the thickness at the position of the minimum thickness.
  • the groove 210 may not be an opening penetrating through the pixel defining portion, so as to prevent the etching of the planar layer from affecting the second conductive layer pattern 016 .
  • FIG. 9A to FIG. 9B are schematic flowcharts of the manufacturing method of the display substrate before forming FIG. 8 .
  • the manufacturing method of the display substrate includes forming a plurality of sub-pixels on the base substrate 01, wherein the forming of the sub-pixels includes sequentially forming the first stacked pixels in the direction perpendicular to the base substrate 01.
  • the groove 210 is formed by etching.
  • the opening edge of the groove 210 expands outward relative to the adjacent edges of two adjacent shielding parts 300 so that the shielding part 300 includes a protruding part 310 protruding into the groove 210 in the arrangement direction.
  • the light emitting functional layer 130 is formed on the insulating layer 200 , the light emitting functional layer 130 includes the charge generating layer 133 disconnected at the protruding portion 310 of the blocking portion 300 .
  • the manufacturing method further includes: forming an electrode layer on the base substrate 01, and patterning the electrode layer to form the first electrode 110; forming the insulating layer 200 includes : forming a pixel-defining film (ie, the insulating layer 200 ) on the first electrode 110 ; and patterning the pixel-defining film to form a first opening 410 exposing the first electrode 110 and a groove 210 , the first opening 410 is configured to define The light-emitting area of the sub-pixel.
  • forming the insulating layer 200 includes : forming a pixel-defining film (ie, the insulating layer 200 ) on the first electrode 110 ; and patterning the pixel-defining film to form a first opening 410 exposing the first electrode 110 and a groove 210 , the first opening 410 is configured to define The light-emitting area of the sub-pixel.
  • spacers 012 are formed on the insulating layer 200 .
  • a shielding portion material layer is formed on the insulating layer 200 , and the shielding portion material layer is patterned to form the shielding portion 300 .
  • the material of the shielding portion 300 may include any one or more of silicon nitride, silicon oxide, or silicon oxynitride.
  • the shielding portion 300 After the shielding portion 300 is formed, a mask is used to cover the area other than the shielding portion 300 to perform dry etching on the insulating layer 200 between adjacent shielding portions 300 to form grooves 210 , shielding The edge of the portion 300 and the edge of the groove 210 form an undercut structure.
  • the shielding portion 300 includes a protruding portion 310 protruding into the groove 210 .
  • FIG. 10A to FIG. 10E are schematic plan view diagrams of a display substrate provided according to an embodiment of the present disclosure.
  • the groove 210 and the shielding portion 300 in the above embodiment shown in FIGS. 1A to 9B constitute an isolation structure for isolating the charge generation layer 133 in the light emitting functional layer 130 .
  • the plurality of sub-pixels 10 includes a plurality of first-color sub-pixels 101 , a plurality of second-color sub-pixels 102 and a plurality of third-color sub-pixels 103 .
  • one of the first color sub-pixel 101 and the third color sub-pixel 103 emits red light, and the other one emits blue light; the second color sub-pixel 102 emits green light.
  • 10A to 10E schematically show that the first color sub-pixel 101 emits red light, which is a red sub-pixel; the third color sub-pixel 103 emits blue light, which is a blue sub-pixel; the second color sub-pixel 102 emits green light, for the green subpixel.
  • a plurality of first color sub-pixels 101 and a plurality of third color sub-pixels 103 are aligned along a first direction and a second direction parallel to the base substrate 01 (for example, the first direction and the second direction)
  • One of the second directions may be the U direction shown in the figure, and the other is the V direction shown in the figure) are alternately arranged to form a plurality of first pixel rows 02 and a plurality of first pixel columns 03, and a plurality of second
  • the color sub-pixels 101 are arranged in an array along the first direction and the second direction to form a plurality of second pixel rows 04 and a plurality of second pixel columns 05, and a plurality of first pixel rows 02 and a plurality of second pixel rows 04 are arranged along the
  • the second directions are alternately arranged and staggered from each other in the first direction, and the plurality of first pixel rows 03 and the plurality of second pixel rows 05 are alternately
  • the groove 210 includes an annular groove surrounding a first color sub-pixel 101 , a second color sub-pixel 102 or a third color sub-pixel 103 .
  • at least part of the annular groove includes at least one gap G1 , and the orthographic projection of the shielding portion 300 on the base substrate is located on both sides of the extending direction of the groove 210 perpendicular to its orthographic projection on the base substrate 01 .
  • the extending direction of the orthographic projection refers to the extending direction of the strip
  • the shape of the orthographic projection of the groove 210 on the base substrate 01 is
  • the extending direction of the orthographic projection refers to the extending direction of the arc-shaped side
  • the extending direction of the orthographic projection refers to the extending direction of the annular edge
  • the boundary profile of the light-emitting area of the sub-pixel 10 may include a plurality of straight sides, and/or arc-shaped sides connecting adjacent straight lines, and the boundary profile of the groove 210 surrounding the light-emitting area may include straight edges with the light-emitting area.
  • the size of the orthographic projection of the projection of the shielding portion 300 protruding into the groove 210 on the base substrate 01 is the same as that of the shielding portion 300 on the substrate 01.
  • the dimension ratio of the orthographic projection on the base substrate 01 is 0.005 to 0.5.
  • the ratio of the above dimensions may be 0.01 to 0.4.
  • the ratio of the above dimensions may be 0.05-3.
  • the ratio of the above dimensions may be 0.1-2.
  • the ratio of the above dimensions may be 0.5-1.
  • the two shielding portions 300 located on both sides of the edge of the groove 210 have the same size, and the two shielding portions 300 The dimensions protruding into the groove 210 are the same.
  • the groove 210 is located between the adjacent first color sub-pixel 101 and the third color sub-pixel 103, and/or the groove 210 is located between the adjacent second color sub-pixel 102 and the third color sub-pixel 103 , and/or, the groove 210 is located between the adjacent first color sub-pixel 101 and the second color sub-pixel 102 .
  • the pixel defining portion 401 of the pixel defining pattern includes a ring structure surrounding each first opening 410 , and is located between the spacer 012 and the base substrate 01 .
  • the part of the pixel defining part between adjacent first openings 410 is removed to facilitate the formation of the groove 210 in the planar layer.
  • the pixel defining portion can also be provided at other positions than the position corresponding to the groove 210 and the first opening 410. For example, when the groove is located in the pixel defining pattern, the pixel defining part between adjacent first openings 410 cannot be removed.
  • two adjacent sub-pixels 10 shown in FIG. 1A may be arranged along the X direction shown in FIG. 10A .
  • the two adjacent sub-pixels 10 shown in FIG. 1A may be the second-color sub-pixel 102 and the first-color sub-pixel 101 , or may also be the third-color sub-pixel 103 and the second-color sub-pixel 102 .
  • the charge generation layers 133 of the two sub-pixels will be conducted along the path PA1, which is short in size and will easily cause crosstalk between the two sub-pixels; between the first color sub-pixel 101 and the second
  • the groove 210 and the shielding part 300 are provided between the color sub-pixels 102 so that the charge generation layer 133 is disconnected in the X direction, the charge generation layer 133 of these two sub-pixels will be conducted along the path PA2.
  • path P2 can be increased by 0.5 times of path P1 relative to path PA1, so that the resistance of charge generation layer 133 at the interval between two sub-pixels increases, which is conducive to reducing crosstalk between two adjacent sub-pixels risks of.
  • the shape of the light emitting area of at least part of the sub-pixels includes a rectangle, and the shape of at least part of the groove 210 is a long strip, and the long strip
  • the extending direction of the shape (X direction or Z direction) is parallel to the extending direction of the rectangular side of the light-emitting area of the sub-pixel adjacent to it, and the shielding part 300 is located on both sides of the groove 210 perpendicular to the extending direction.
  • the grooves 210 located in two adjacent sub-pixels 10 arranged along the X direction may extend along the Z direction
  • the grooves 210 located in two adjacent sub-pixels 10 arranged along the Z direction may extend along the X direction.
  • the groove 210 may be disposed around the sub-pixel 10 and has a break at the corner of the light-emitting area of the sub-pixel 10 .
  • the distance between the light-emitting regions of two adjacent sub-pixels arranged along the X direction or the Z direction is smaller than the distance between the light-emitting regions of two adjacent sub-pixels arranged along the U direction or the V direction.
  • a groove 210 is provided between the light emitting regions of two adjacent sub-pixels arranged in the Z direction, and no groove 210 is provided between two adjacent sub-pixels arranged in the U direction or V direction to ensure that the second electrode of each sub-pixel The connection of the second electrode reduces the resistance of the second electrode to reduce the loss.
  • the number of grooves 210 surrounding the light emitting area of a sub-pixel may include four, and the four grooves 210 are respectively parallel to the light emitting region. four sides of the area.
  • the vertex of the light-emitting area of the third-color sub-pixel 103 includes a first corner C1 and a second corner C2 that are oppositely arranged to form two sides of the first corner C1.
  • the distance between the extension line or the intersection point of the tangent lines of the two sides and the center of the sub-pixel is greater than the distance between the two sides constituting the second corner C2 or the extension line or the intersection point of the tangent lines of the two sides and the center of the sub-pixel;
  • the third sub-pixel 103 includes a first-type sub-pixel and a second-type sub-pixel.
  • the direction from the apex of the first corner C1 to the apex of the second corner C2 is different, and the first type of sub-pixel and In the second type of sub-pixel, the directions from the apex of the first corner C1 to the apex of the second corner C2 are the first and second direction respectively, and the first and second directions are opposite.
  • the first pointing direction may be the direction indicated by the arrow in the U direction
  • the second pointing direction may be the direction opposite to the direction indicated by the arrow in the U direction
  • the first pointing direction and the second pointing direction may be interchangeable
  • the first pointing direction may also be the direction indicated by the arrow in the V direction
  • the second pointing direction may also be a direction opposite to the direction indicated by the arrow in the V direction
  • the first pointing direction and the second pointing direction may be interchanged.
  • the first corner C1 of the light-emitting area of the third-color sub-pixel 103 can be rounded, and the first corner C1 of the light-emitting area of the third-color sub-pixel 103 and the first corner C1 of the light-emitting area of the third-color sub-pixel 103 can be rounded.
  • the distance between the top corners of the light emitting regions of the first color sub-pixel 101 opposite to the corner C1 is the first corner distance CD1, the second corner C2 of the light emitting region of the third color sub-pixel 103 and the second corner
  • the distance between the top corners of the light emitting regions of the first color sub-pixels 101 opposite to the portion C2 is the second corner distance CD2, and the first corner distance CD1 is greater than the second corner distance CD2, thus, the spacer 012 can It is arranged at the position of the interval corresponding to the first corner.
  • the shape of the groove 210 near the spacer 012 may be different from the shape of the groove 210 at other positions, for example, the second color sub-pixel 102 on both sides of the spacer 012
  • the planar shape of the groove 210 disposed between the spacer 012 may be an arc, and surrounds the top corner of the light emitting area of the corresponding second color sub-pixel 102 .
  • the groove 210 between a second-color sub-pixel 102 and its adjacent first-color sub-pixel 101 is a first sub-groove, and this second-color sub-pixel 102 and its adjacent third-color sub-pixel
  • the groove 210 between 103 is the second sub-groove, the first sub-groove and the second sub-groove can be integrated into a curved groove 210, and the curved groove 210 is located between the spacer 012 and the second between the color sub-pixels 102 and bend toward the second color sub-pixel 102 .
  • the above rounded chamfer may refer to the vertex angle formed by a section of curve, and the curve may be a circular arc or an irregular curve, such as a curve intercepted from an ellipse, a wavy line, and the like.
  • the embodiment of the present disclosure schematically shows that the curve has a shape convex outward relative to the center of the sub-pixel, but it is not limited thereto, and the curve may also have a shape concave inward relative to the center of the sub-pixel.
  • the central angle of the arc may range from 10° to 150°.
  • the central angle of the arc may range from 60° to 120°.
  • the range of the central angle of the arc may be 90°.
  • the length of the curve of the fillet included in the first corner portion 111 may be 10-60 microns.
  • a plurality of shielding parts 300 arranged at intervals along the arrangement direction of the two adjacent sub-pixels are arranged between adjacent sub-pixels, and a plurality of shielding parts 300 arranged between adjacent sub-pixels
  • a groove 210 is disposed between two adjacent shielding portions 300 of the shielding portions 300 , and the two shielding portions 300 located on both sides of the edge of the groove 210 protrude into the groove 210 .
  • the distance between the light-emitting regions of adjacent first-color sub-pixels 101 and second-color sub-pixels 102 arranged along the Z direction is small, and the concave between the two light-emitting regions
  • the groove 210 extends along the X direction, and the shielding portion 300 can be located on both sides of the groove 210 along the Z direction, and protrudes toward the inside of the groove 210 to form a protrusion (the edge of the shielding portion 300 and the edge of the groove 210 jointly form an undercut structure), whereby the charge generation layers of the first color sub-pixel 101 and the second color sub-pixel 102 are disconnected at the position of the protruding part, preventing crosstalk between the two sub-pixels.
  • the groove 210 between adjacent first-color sub-pixels 101 and second-color sub-pixels 102 arranged along the Z direction extends along the X direction, and the shielding portion 300 can be located in the groove.
  • the two sides of the groove 210 along the Z direction and the two sides of the groove 210 along the X direction may not be provided with shielding parts so that the light-emitting functional layer and the second electrode that only pass through the groove 210 in the X direction will not be broken, so that The connectivity of the second electrode in the X direction is ensured, and the resistance of the second electrode is reduced.
  • FIGS. 10C to 10E at least one sub-pixel is surrounded by a ring of discontinuous grooves 210 .
  • each sub-pixel is surrounded by a ring of discontinuous grooves 210 .
  • FIG. 10A , FIG. 10C to FIG. 10E only illustrate the groove 210 , and the shielding portion in each figure can be set in the positional relationship between the shielding portion 300 and the groove 210 as shown in FIG. 10B .
  • the top corner of the light-emitting area of one sub-pixel is surrounded by the groove 210, and the edge of the light-emitting area of the other sub-pixel is surrounded by the groove 210.
  • the groove 210 surrounds.
  • the apex of the light-emitting area of the second color sub-pixel 102 is surrounded by a groove 210, and the first color sub-pixel 101
  • the edge of the light emitting area is surrounded by grooves 210 .
  • the top corner of the light-emitting area of the second-color sub-pixel 102 is surrounded by a groove 210, and the third-color sub-pixel 103 The edge of the light emitting area is surrounded by grooves 210 .
  • grooves are provided corresponding to the edge of one light-emitting region, and the top corners of one light-emitting region correspond to Setting the groove can not only disconnect the charge generation layer in the shortest interval (with the path PA1 shown in FIG. The charge generation layer in the path PA2) indicated by 10A is disconnected.
  • the grooves 210 at the edge of the light-emitting area of the second-color sub-pixel 102 located on both sides of the spacer 012 can be three corners and two corners surrounding the light-emitting area of the second-color sub-pixel 102 .
  • the continuous curved groove 210 of each edge can be three corners and two corners surrounding the light-emitting area of the second-color sub-pixel 102 .
  • the difference between the display substrate shown in FIG. 10D and the display substrate shown in FIG. 10C is that the edge of the light-emitting area of the second color sub-pixel 102 is surrounded by the groove 210, and the light emission of the first-color sub-pixel 101 and the third-color sub-pixel 103 The top corners of the regions are surrounded by grooves 210 .
  • the difference between the display substrate shown in FIG. 10E and the display substrate shown in FIG. 10C lies in the distance between adjacent first-color sub-pixels 101 and third-color sub-pixels 103 along at least one of the U direction and the V direction.
  • a groove 210 is added at the position, so that the charge generation layers of two adjacent sub-pixels arranged in different directions are disconnected under the joint action of the groove 210 and the shielding part.
  • grooves 210 are added at intervals between adjacent sub-pixels 101 of the first color and sub-pixels 103 of the third color.
  • Another embodiment of the present disclosure provides a display device, including the display substrate shown in FIG. 1A to FIG.
  • the charge generation layer of the luminescent functional layer is disconnected at the protruding portion where the shielding portion protrudes relative to the edge of the groove, which is beneficial to reduce the probability of crosstalk between adjacent sub-pixels.
  • the display device further includes a cover plate located on the light-emitting side of the display panel.
  • the display device can be a display device such as an organic light-emitting diode display device, and any product or component with a display function such as a TV, a digital camera, a mobile phone, a watch, a tablet computer, a notebook computer, a navigator, etc. that include the display device. Examples are not limited to this.
  • FIG. 11A is a schematic diagram of a partial cross-sectional structure of a display substrate according to an example of another embodiment of the present disclosure
  • FIG. 11B is a schematic diagram of a partial cross-sectional structure of a display substrate provided according to another example of another embodiment of the present disclosure.
  • the display substrate shown in FIG. 11A may have the same first display area A1 and second display area A2 as the display substrate shown in FIG. 1C .
  • the display substrate includes a base substrate 01 and a plurality of sub-pixels 10 disposed on the base substrate 01 in a first display area A1 .
  • the sub-pixel 10 includes an organic light-emitting element 100.
  • the organic light-emitting element 100 includes a light-emitting functional layer 130 and a first electrode 110 and a second electrode 120 located on both sides of the light-emitting functional layer 130 along a direction perpendicular to the base substrate 01.
  • the first electrode 110 Located between the light-emitting functional layer 130 and the base substrate 01 , the light-emitting functional layer 130 includes multiple film layers, for example, the multiple film layers include the charge generation layer 133 .
  • the display substrate further includes a plurality of isolation structures 600, at least one isolation structure 600 is arranged between adjacent sub-pixels 10, and the isolation structure 600 includes a first sub-isolation structure 610 and a second sub-isolation structure stacked. 620 , the first sub-isolation structure 610 is located on a side of the second sub-isolation structure 620 facing the base substrate 01 .
  • the size of the first sub-isolation structure 610 in the isolation structure 600 between the adjacent sub-pixels 10 is smaller than the size of the second sub-isolation structure 620 so that the second sub-isolation structure 620 includes The protruding portion relative to the edge of the first sub-isolation structure 610 .
  • the material of the first sub-isolation structure 610 and the second sub-isolation structure 620 both include the same element, or the material of the first sub-isolation structure 610 and the second sub-isolation structure 620 both include metal .
  • the material of the first sub-isolation structure 610 includes inorganic non-metallic material or metal material or metal oxide
  • the material of the second sub-isolation structure 620 includes organic material.
  • the slope angle of at least part of the side surface of the first sub-isolation structure 610 to a plane parallel to the contact surface of the first sub-isolation structure 610 and the second sub-isolation structure 620 is greater than 60 degrees and less than 120 degrees, and Or, the slope angle of at least part of the side surface of the second sub-isolation structure 620 to a plane parallel to the contact surface of the first sub-isolation structure 610 and the second sub-isolation structure 620 is greater than 60 degrees and less than 120 degrees.
  • the slope angle of at least part of the side surface of the first sub-isolation structure 610 to a plane parallel to the contact surface of the first sub-isolation structure 610 and the second sub-isolation structure 620 is greater than 70 degrees and less than 110 degrees, and/or, A slope angle between at least part of the side surface of the second sub-isolation structure 620 and a plane parallel to the contact surface of the first sub-isolation structure 610 and the second sub-isolation structure 620 is greater than 70 degrees and less than 110 degrees.
  • the slope angle of at least part of the side surface of the first sub-isolation structure 610 to a plane parallel to the contact surface of the first sub-isolation structure 610 and the second sub-isolation structure 620 is greater than 80 degrees and less than 100 degrees
  • the second A slope angle between at least part of the side surface of the second sub-isolation structure 620 and a plane parallel to the contact surface of the first sub-isolation structure 610 and the second sub-isolation structure 620 is greater than 80 degrees and less than 100 degrees.
  • the slope angle between at least part of the side surface of the first sub-isolation structure and a plane parallel to the contact surface of the first sub-isolation structure and the second sub-isolation structure may be the surface of the first sub-isolation structure away from the substrate and the first sub-isolation structure.
  • the angle between the side surfaces of the sub-isolation structures may also be the angle between the surface of the first sub-isolation structure facing the substrate and the side surface of the first sub-isolation structure;
  • the slope angle between at least part of the side surface and a plane parallel to the contact surface of the first sub-isolation structure and the second sub-isolation structure may be the surface of the second sub-isolation structure on the side away from the substrate and the side surface of the second sub-isolation structure The angle between them may also be the angle between the surface of the second sub-isolation structure facing the substrate and the side surface of the second sub-isolation structure.
  • the side surface of the above-mentioned first sub-isolation structure may refer to the surface having a certain angle between the first sub-isolation structure and the substrate substrate
  • the side surface of the above-mentioned second sub-isolation structure may refer to the surface of the second sub-isolation structure and the substrate.
  • the angle between the substrates has an angled surface.
  • the difference between the examples shown in FIG. 11A and FIG. 11B lies in the positional relationship and angular relationship between the first sub-isolation structure 610 and the second sub-isolation structure 620 .
  • the light emitting functional layer 130 includes the charge generation layer 133 which is disconnected at the edge of the isolation structure 600 .
  • an isolation structure is provided between adjacent sub-pixels in a display substrate, by adjusting the relative positional relationship between the first sub-isolation structure and the second sub-isolation structure, or the angle of the side surface of the first sub-isolation structure and the The angle of the side surface of the sub-isolation structure can be such that at least one film layer of the light-emitting functional layer is broken at the protruding part where the second sub-isolation structure protrudes relative to the edge of the first sub-isolation structure, or at the edge of the isolation structure Disconnection is beneficial to reduce the probability of crosstalk between adjacent sub-pixels.
  • the charge generation layer can be disconnected at the edge of the isolation structure, which is beneficial to reduce the probability of crosstalk between adjacent sub-pixels.
  • the base substrate 01 and the organic light emitting device 100 in this embodiment may have the same features as the base substrate 01 and the organic light emitting device 100 in the embodiment shown in FIGS. 1A to 9B , which will not be repeated here.
  • the other film layers 011 in this example may have the same characteristics as the other film layers 011 in the embodiment shown in FIGS. 1A to 9B , which will not be repeated here.
  • the material of the first sub-isolation structure 610 is different from the material of the second sub-isolation structure 620 .
  • the material of the first sub-isolation structure 610 includes inorganic non-metallic material or metal material
  • the material of the second sub-isolation structure 620 includes organic material
  • the plurality of sub-pixels 10 may include two adjacent sub-pixels 10 arranged along the X direction.
  • the plurality of shielding portions 300 disposed in the two adjacent sub-pixels 10 are arranged along the X direction.
  • at least one edge of the second sub-isolation structure 620 disposed between two adjacent sub-pixels 10 protrudes relative to the edge of the first sub-isolation structure 610 along the X direction to form the isolation protrusion 601, the second sub-isolation structure
  • the isolation protrusion 601 in 620 is suspended, so that the charge generation layer 133 of the sub-pixel 10 is disconnected near the at least one edge position.
  • the isolation protrusion 601 extends in a direction parallel to the base substrate 01.
  • the orthographic projection of the isolation protrusion 601 on the base substrate 01 does not overlap with the orthographic projection of the first sub-isolation structure 610 on the base substrate 01 .
  • the first light emitting layers 131 (second light emitting layers 132 ) of adjacent sub-pixels may overlap on the isolation structure 600 .
  • the first light-emitting layer 131 (second light-emitting layer 132) of adjacent sub-pixels can be arranged at intervals on the isolation structure 600; or, only one of the adjacent sub-pixels can be arranged on the isolation structure 600
  • part of the film layers of the light emitting functional layer 130 and the second electrode 120 may be disposed on the isolation structure 600 .
  • all the film layers of the light emitting functional layer 130 and the second electrode 120 may be disposed on the isolation structure 600 .
  • the first orthographic projection of at least one layer of the luminescent functional layer 130 on the base substrate 01 is continuous, and the second orthographic projection on the plane perpendicular to the base substrate 01 is discontinuous; or, the luminescent functional layer 130
  • the first orthographic projection of at least one layer on the base substrate 01 and the second orthographic projection on a plane perpendicular to the base substrate 01 are discontinuous, and the width of the interval at the discontinuous position in the first orthographic projection is less than The width of the interval at the location of the discontinuity in the second orthographic projection.
  • At least one of the light-emitting functional layers 130 can be a charge generation layer 133, the first orthographic projection of the charge generation layer 133 on the base substrate 01 is continuous, and the second orthographic projection of the charge generation layer 133 on a plane perpendicular to the base substrate 01 is continuous.
  • Orthographic projections are discontinuous.
  • the charge generation layer 133 may include a portion located in the groove 210 and a portion not located in the groove 210 , the two portions being disconnected at the edge of the groove 210 .
  • the first orthographic projections of the two parts on the substrate 01 may be contiguous or overlapped, and the first orthographic projections are continuous.
  • the second orthographic projections of the two parts on the XY plane are discontinuous.
  • At least one of the light-emitting functional layers 130 can be a charge generation layer 133, and the first orthographic projection of the charge generation layer 133 on the base substrate 01 is different from the second orthographic projection on a plane perpendicular to the base substrate 01. continuous, and the width of the interval at the discontinuous position in the first orthographic projection is smaller than the width of the interval at the discontinuous position in the second orthographic projection.
  • the charge generation layer 133 may include a portion on the isolation structure 600 and a portion not on the isolation structure 600 , the two portions being disconnected at an edge on the isolation structure 600 .
  • the two parts are provided with a space between the first orthographic projections on the base substrate 01 , the first orthographic projections being disconnected.
  • the second orthographic projections of the two parts on the XY plane are discontinuous, and there is an interval between the second orthographic projections of the two parts on the XY plane .
  • the isolation structure 600 For example, at least part of the film layers of the charge generation layer 133 in the light emitting functional layer 130 facing the base substrate 01 are disconnected at the isolation structure 600. For example, all the layers of the charge generation layer 133 in the light-emitting functional layer 130 facing the base substrate 01 are disconnected at the isolation structure 600 .
  • the color of light emitted from the first light emitting layer 131 is the same as that of light emitted from the second light emitting layer 132 .
  • the light-emitting functional layer 130 includes a light-emitting layer (the first light-emitting layer or the second light-emitting layer), and the area of the orthographic projection of at least one disconnected layer in the light-emitting function layer 130 on the base substrate 01 is larger than the light-emitting layer (the second light-emitting layer).
  • the disconnected film layer can be a common layer
  • the light emitting layer can be a patterned film layer formed by a fine metal mask.
  • the luminescent functional layer 130 includes at least one luminescent layer (first luminescent layer or second luminescent layer), and the film layers disconnected at the isolation structure 600 in the luminescent functional layer 130 include at least one luminescent layer and at least one layer. other layers.
  • the area of the orthographic projection of the disconnected at least one other film layer on the base substrate 01 is greater than the area of the orthographic projection of the disconnected at least one light-emitting layer on the base substrate 01 .
  • the area of the part where the disconnected at least one other film layer covers the isolation structure 600 is greater than the area of the disconnected at least one light-emitting layer that covers the part of the isolation structure.
  • the disconnected at least one other film layer completely covers the isolation structure 600 , and at least one light-emitting layer only covers part of the isolation structure 600 .
  • At least one layer of the plurality of film layers included in the light emitting functional layer 130 at least partially covers a part of the side surface of the isolation structure 600 .
  • the above film layer may cover the side surface of the first sub-isolation structure 610 , and/or, cover the side surface of the second sub-isolation structure 620 .
  • two isolation structures 600 may be arranged between adjacent sub-pixels 10, and in each isolation structure 600, at least one edge of the second sub-isolation structure 620 is opposite to the first sub-isolation structure 620 along the X direction. Edges of the isolation structure 610 protrude.
  • two isolation structures 600 may be arranged between adjacent sub-pixels 10, and the two edges of the second sub-isolation structure 620 in the two isolation structures 600 are opposite to the edge of the first sub-isolation structure 610 along the X direction.
  • both edges of the second sub-isolation structure 620 in one isolation structure 600 protrude relative to the edge of the first sub-isolation structure 610 in the X direction, and the second sub-isolation structure in the other isolation structure 600
  • One edge of 620 protrudes relative to the edge of the first sub-isolation structure 610 along the X direction; or, only one edge of the second sub-isolation structure 620 in the two isolation structures 600 protrudes relative to the first sub-isolation structure
  • the edge of the isolation structure 610 protrudes, which is not limited in the embodiments of the present disclosure, and can be set according to actual product requirements.
  • the embodiments of the present disclosure are not limited to two isolation structures disposed between adjacent sub-pixels, and one isolation structure or more than three isolation structures may also be disposed.
  • the charge generation layer 133 in the light-emitting functional layer 130 of the two adjacent sub-pixels 10 may be connected or be a whole film layer. Since the charge generation layer 133 has relatively high conductivity, for a display device with high resolution, the high conductivity of the charge generation layer 133 may easily cause crosstalk between adjacent sub-pixels 10 .
  • the display substrate provided by the embodiments of the present disclosure, by providing an isolation structure between the two adjacent sub-pixels, at least one layer of the light-emitting functional layer (such as the charge generation layer) formed at the edge of the isolation structure of the isolation structure can be disconnected, at this time, at least one layer of the light-emitting functional layer of the two adjacent sub-pixels is arranged at intervals, which can increase the resistance of the light-emitting functional layer between adjacent sub-pixels, thereby reducing crosstalk between the two adjacent sub-pixels At the same time, it does not affect the normal display of sub-pixels.
  • the light-emitting functional layer such as the charge generation layer
  • the distance between the surface of the isolation structure 600 facing the base substrate 01 and the base substrate 01 is smaller than the distance between the surface of the first electrode 110 facing the base substrate 01 and the base substrate 01. distance.
  • an organic layer 500 is disposed between the first electrode 110 and the base substrate 01 , and the first electrode 110 is in contact with the surface of the organic layer 500 .
  • the material of the first sub-isolation structure 610 includes an inorganic metal material or a metal material
  • the material of the second sub-isolation structure 620 includes an organic material
  • the material of the first sub-isolation structure 610 may be one or a combination of silicon oxide and silicon nitride. But without limitation, the material of the first sub-isolation structure 610 may also be metal or metal oxide.
  • the thickness of the first sub-isolation structure 610 may be greater than the thickness of the light-emitting functional layer 130, so that the light-emitting functional layer 130 and the second electrode 120 are both positioned opposite to the second sub-isolation structure 620.
  • the protruding portion of the edge of the first sub-isolation structure 610 that is, the isolation protrusion 601 is disconnected.
  • the second sub-isolation structure 620 can be made of photosensitive polyimide.
  • the second sub-isolation structure 620 is made of the same material as the organic layer 500 .
  • the organic layer 500 may use the same material as the organic layer 500 shown in FIGS. 1A to 9B , which will not be repeated here.
  • the second sub-isolation structure 620 and the organic layer 500 may be formed in the same patterning process.
  • the second sub-isolation structure 620 includes a central area distributed along the arrangement direction of two adjacent sub-pixels 10 and edge areas located on both sides of the central area. In the direction of the base substrate 01 , the thickness of the central region of the second sub-isolation structure 620 is greater than the thickness of the edge region.
  • the second sub-isolation structure 620 includes a central region CR and an edge region ER surrounding the central region CR.
  • the central region CR of the second sub-isolation structure 620 The thickness of is greater than the thickness of the edge region ER.
  • the thickness of the above central area may refer to the average thickness of the second sub-isolation structure located in the central area, or may refer to the maximum thickness of the second sub-isolation structure located in the central area; the thickness of the above-mentioned second sub-isolation structure located in the edge area may refer to the second sub-isolation structure.
  • the average thickness of the isolation structure in the edge region may also refer to the maximum thickness of the second sub-isolation structure in the edge region.
  • the average thickness of the second sub-isolation structure in the central region is greater than the average thickness of the second sub-isolation structure in the edge region, or the maximum thickness of the second sub-isolation structure in the central region is greater than the maximum thickness of the second sub-isolation structure in the edge region. thickness.
  • the thickness of the second sub-isolation structure 620 may gradually decrease from the center toward the edge of the second sub-isolation structure 620 .
  • the surface of the second sub-isolation structure 620 away from the base substrate 01 has a smooth transition.
  • the second sub-isolation structure 620 includes an upper surface and a side surface, both of which are continuous smooth surfaces.
  • the portion of the second sub-isolation structure 620 that protrudes relative to the edge of the first sub-isolation structure 610 has a slope angle away from the surface of the first sub-isolation structure 610 that is smaller than that of the second sub-isolation structure 620.
  • the slope angle of at least part of the side surface of the first sub-isolation structure 610 and the plane parallel to the contact surface of the second sub-isolation structure 620 has a slope angle away from the surface of the first sub-isolation structure 610 that is smaller than that of the second sub-isolation structure 620.
  • the side of the first sub-isolation structure 610 may be curved or straight.
  • the side of the first sub-isolation structure 610 may be curved toward the center of the first sub-isolation structure 610 .
  • the included angle between the side of the first sub-isolation structure 610 and the surface on the side away from the base substrate 01 may be 60 degrees to 90 degrees.
  • the included angle between the side of the first sub-isolation structure 610 and the surface close to the base substrate 01 may be 60 degrees to 90 degrees.
  • the angle between the above-mentioned curved edge and a surface may refer to the angle between the tangent at the intersection of the curved edge and the surface and the surface.
  • the angle between the tangent line at the midpoint of the curved edge and the surface may be 15-70 degrees.
  • the organic layer 500 includes a plurality of organic layer openings 510 , and the isolation structure 600 is located in the organic layer openings 510 .
  • an organic layer opening is provided in the organic layer, and an isolation structure is provided in the organic layer opening, so that the charge generation layer of the adjacent sub-pixel is disconnected at the isolation protrusion of the isolation structure, which is beneficial to reduce the cost of the adjacent sub-pixel. The probability of crosstalk between them.
  • the isolation structure 600 is spaced apart from the sidewall of the organic layer opening 510 .
  • the gap can be more than 2 microns
  • the width of the isolation structure 600 can be more than 3 um
  • the widths of the pixel defining parts on both sides are respectively more than 4 um
  • the thickness of the isolation structure 600 is smaller than that of the pixel. Defines the thickness of the section.
  • the minimum dimension of the space between the isolation structure 600 and the organic layer 500 is not less than 2 microns.
  • the isolation structure 600 when an isolation structure 600 is disposed in an organic layer opening 510 , the isolation structure 600 may be located in the middle of the organic layer opening 510 .
  • the plurality of isolation structures 600 when a plurality of isolation structures 600 are disposed in one organic layer opening 510 , the plurality of isolation structures 600 may be evenly distributed.
  • an isolation structure 600 may be provided between adjacent sub-pixels, the isolation structure 600 is close to one of the adjacent sub-pixels, and at least part of the light-emitting layer in the sub-pixel closer to the isolation structure 600 is located On the isolation structure 600 , the light emitting layer in the sub-pixel farther away from the isolation structure 600 may not be located on the isolation structure 600 .
  • the maximum dimension of the isolation structure 600 may not be smaller than 3 micrometers.
  • the thickness of the first sub-isolation structure 610 may be smaller than the thickness of the organic layer 500 .
  • the ratio of the thickness of the first sub-isolation structure 610 to the thickness of the organic layer 500 may be 0.1 ⁇ 0.9.
  • the ratio of the thickness of the first sub-isolation structure 610 to the thickness of the organic layer 500 may be 0.2 ⁇ 0.8.
  • the ratio of the thickness of the first sub-isolation structure 610 to the thickness of the organic layer 500 may be 0.3 ⁇ 0.7.
  • the ratio of the thickness of the first sub-isolation structure 610 to the thickness of the organic layer 500 may be 0.4 ⁇ 0.6.
  • the ratio of the thickness of the first sub-isolation structure 610 to the thickness of the organic layer 500 may be 0.5.
  • the ratio of the thickness of the isolation structure 600 to the thickness of the organic layer 500 may be 0.8 ⁇ 1.2.
  • the ratio of the thickness of the isolation structure 600 to the thickness of the organic layer 500 may be 0.9 ⁇ 1.1.
  • the thickness of the isolation structure 600 and the thickness of the organic layer 500 may be equal.
  • Embodiments of the present disclosure are not limited thereto, for example, the thickness of the isolation structure 600 may be greater than that of the organic layer 500 .
  • the pixel defining pattern 400 is located on the side of the organic layer 500 away from the base substrate 01 .
  • the first opening 410 in the pixel defining pattern 400 may have the same characteristics as the first opening 410 shown in FIGS. 1A to 9B , which will not be repeated here.
  • the pixel defining pattern 400 further includes a plurality of second openings 420 configured to expose the isolation structure 600 , and the isolation structure 600 is disposed between the pixel defining portion 401 of the pixel defining pattern 400 There are intervals.
  • the second opening 420 is configured to expose at least a portion of the organic layer opening 510 and the isolation structure 600 .
  • the orthographic projection of the second opening 420 of the pixel defining pattern 400 on the base substrate 01 may coincide with the orthographic projection of the organic layer opening 510 of the organic layer 500 on the base substrate 01 .
  • the second opening 420 may completely expose the organic layer opening 510 .
  • the first conductive layer pattern 015 in the display substrate includes a first power signal line and a data line
  • the second conductive layer pattern 016 includes a second power signal line
  • the conductive layer patterns 016 are arranged in the same layer.
  • the first conductive layer pattern 015 and the second conductive layer pattern 016 in other film layers 011 in the embodiment of the present disclosure can be compared with the first conductive layer pattern 015 and the second conductive layer pattern shown in FIG. 3 , FIG. 5A to FIG. 5D 016 has the same features, which will not be repeated here.
  • the shape of the orthographic projection of the isolation structure 600 on the base substrate 01 may be the same as the shape of the orthographic projection of the groove 210 on the base substrate 01 shown in FIGS. 10A to 10E .
  • the extending direction of the orthographic projection of the isolation structure 600 on the base substrate 01 may be different from the extending direction of at least one of the first power signal line, the data line and the second power signal line.
  • the surface of the second sub-isolation structure 620 away from the base substrate 01 is a curved surface, and the curved surface is curved toward the first sub-isolation structure 610.
  • the first sub-isolation structure 610 and the second sub-isolation structure 610 are curved.
  • the sub-isolation structure 620 forms a "mushroom-type" isolation structure.
  • the surface of the second sub-isolation structure 620 away from the base substrate 01 is a curved surface.
  • the first sub-isolation structure 610 includes at least one film layer
  • the first electrode 110 includes at least one electrode layer
  • one film layer of the first sub-isolation structure 610 and one electrode layer of the first electrode 110 are arranged on the same layer.
  • FIG. 12 is a schematic diagram of a partial cross-sectional structure of a display substrate provided according to an example of another embodiment of the present disclosure.
  • the difference between the display substrate in the example shown in FIG. 12 and the display substrate shown in FIG. 11A is that the thickness of the first sub-isolation structure 610 in the display substrate shown in FIG.
  • the thickness ratio of the thickness of the luminescent functional layer 130 is 0.7 ⁇ 1.5.
  • the base substrate 01 and the organic light-emitting element 100 in the display substrate shown in FIG. 12 may have the same features as the base substrate 01 and the organic light-emitting element 100 in the embodiment shown in FIGS. 1A to 9B , which will not be repeated here.
  • the other film layers 011 in this example may have the same characteristics as the other film layers 011 in the embodiment shown in FIGS. 1A to 9B , which will not be repeated here.
  • the material of the first sub-isolation structure 610 and the second sub-isolation structure 620 in the isolation structure 600 shown in FIG. 12 can be compared with the first sub-isolation structure 610 and the second sub-isolation structure of the isolation structure 600 shown in FIG.
  • the materials of 620 are the same, and will not be repeated here.
  • the flat layer 500 and the pixel defining pattern 400 shown in FIG. 12 may have the same features as the flat layer 500 and the pixel defining pattern 400 shown in FIG. 11A , which will not be repeated here.
  • the ratio of the thickness of the first sub-isolation structure 610 to the thickness of the light emitting functional layer 130 is 0.8 ⁇ 1.3.
  • the ratio of the thickness of the first sub-isolation structure 610 to the thickness of the light emitting functional layer 130 is 0.9 ⁇ 1.1.
  • the ratio of the thickness of the first sub-isolation structure 610 to the thickness of the light emitting functional layer 130 is 1.
  • by setting the thickness of the first sub-isolation structure to be equal to that of the light-emitting functional layer it is possible to keep the second electrode from being disconnected at the edge of the isolation structure while the charge generation layer is disconnected at the edge of the isolation structure. , so that the second electrode has better electrical characteristics and improves the brightness uniformity of the display substrate.
  • the thickness of the first sub-isolation structure 610 may be 100-10000 angstroms.
  • the thickness of the first sub-isolation structure 610 may be 200 ⁇ 5000 angstroms.
  • the thickness of the first sub-isolation structure 610 may be 300-1500 angstroms.
  • the dimension of the isolation protrusion 601 along the X direction may not be smaller than 0.1 micrometer.
  • the size of the isolation protrusion 601 along the X direction may not be smaller than 0.2 microns.
  • the thickness of the second sub-isolation structure 620 may be 0.5 ⁇ 3 ⁇ m.
  • the thickness of the second sub-isolation structure 620 may be 0.8 ⁇ 1.6 ⁇ m.
  • the thickness of the second sub-isolation structure 620 may be 1-1.2 microns.
  • the slope angle of the portion of the second sub-isolation structure 620 protruding relative to the edge of the first sub-isolation structure 610 away from the surface of the first sub-isolation structure 610 may be 15-70 degrees.
  • the slope angle of the edge of the curved surface of the isolation protrusion 601 of the second sub-isolation structure 620 may be 15 ⁇ 70 degrees.
  • the slope angle of the edge of the curved surface of the isolation protrusion 601 of the second sub-isolation structure 620 is 20 ⁇ 60 degrees.
  • the slope angle of the edge of the curved surface of the isolation protrusion 601 of the second sub-isolation structure 620 is 30-45 degrees.
  • the figure cut by the above-mentioned curved surface by the XY plane is a curve
  • the slope angle of the curved surface of the above-mentioned isolation protrusion 601 can refer to the angle between the tangent at the end point of the curve and a straight line parallel to the X direction, or the angle between the isolation protrusion 601 The angle between the tangent at the midpoint of the curve and the line parallel to the X direction.
  • the slope angle of the curved surface of the isolation protrusion of the second sub-isolation structure is set to be small, which is beneficial to reduce the probability of the second electrode being disconnected at the isolation protrusion.
  • the embodiment of the present disclosure can set the thickness of the first sub-isolation structure and the second sub-isolation structure, and the direction of the isolation protrusion protruding from the edge of the second sub-isolation structure relative to the first sub-isolation structure is parallel to the substrate substrate.
  • the setting of the size and the setting of the slope angle of the curved surface of the second isolation structure can make part of the material of the light-emitting functional layer be filled in the undercut structure, and on the basis of disconnecting the charge generation layer, the isolation structure can be as continuous as possible. Opening the second electrode ensures that the second electrode has better electrical characteristics.
  • FIG. 13A to FIG. 13F are schematic flowcharts of a manufacturing method for forming the display substrate before FIG. 11A .
  • the manufacturing method of a display substrate may include preparing a base substrate 01 on a glass carrier.
  • the base substrate 01 formed in this example may have the same characteristics as the base substrate 01 formed in the display substrate shown in FIG. 4A and FIG. 5A , which will not be repeated here.
  • the process flow for forming other film layers 011 on the base substrate 01 may be the same as the process flow for forming other film layers 011 in the display substrate shown in FIG. 5A , or may be the same as that shown in FIG. 4A .
  • the process flow for forming other film layers 011 in the display substrate is the same as shown, and will not be repeated here.
  • a first sub-isolation structure layer is formed on the other film layer 011 , and the first sub-isolation structure layer is patterned to form a first sub-isolation structure pattern 6100 .
  • the first sub-isolation structure layer may be dry-etched or wet-etched to form the first sub-isolation structure pattern 6100 .
  • the second conductive layer pattern 016 may be patterned.
  • the material of the first sub-isolation structure pattern 6100 is different from that of the second conductive layer pattern 016 .
  • the material of the first sub-isolation structure pattern 6100 may include any one or more of silicon nitride, silicon oxide or silicon oxynitride, and the material of the second conductive layer pattern 016 may include a metal material.
  • the embodiments of the present disclosure are not limited thereto.
  • the first sub-isolation pattern and the second conductive layer pattern may also be formed in the same patterning process. In this case, the material of the first sub-isolation pattern may include a metal material.
  • an organic material layer is formed on the first sub-isolation structure pattern 6100 and the second conductive layer pattern 016, and the organic material layer is patterned to form an organic layer opening 510 and an opening 510 located in the first sub-isolation structure pattern.
  • the second sub-isolation structure 620 on the structure pattern 6100 is isolated.
  • a photosensitive layer is formed on the first sub-isolation structure pattern 6100 and the second conductive layer pattern 016, and other positions in the organic layer opening 510 except the position of the first sub-isolation structure pattern 6100 are organically formed after applying glue, exposing and developing. The material layer is etched away.
  • the first electrode 110 is patterned and formed on the organic layer 500 .
  • the process for forming the first electrode 110 may be the same as the process for forming the first electrode 110 shown in FIG. 5B , and will not be repeated here.
  • wet etching is performed on the first sub-isolation structure pattern 6100 (the etchant has less influence on the second sub-isolation structure 620) so that the edges of the first sub-isolation structure pattern 6100 are opposite to each other.
  • the edge of the second sub-isolation structure 620 is retracted to form an undercut structure.
  • wet etching is performed on the first sub-isolation structure pattern 6100 to form the first sub-isolation structure 610 and the isolation structure 600 .
  • a pixel-defining film is formed on the organic layer 500 and the isolation structure 600, and the pixel-defining film is patterned to form a pixel-defining pattern 400.
  • the pixel-defining pattern 400 includes The first opening 410 exposing the first electrode 110 and the second opening 420 exposing the isolation structure 600 .
  • the material of the second sub-isolation structure 620 is different from that of the pixel defining portion 401 in the pixel defining pattern 400 , so as to prevent the second sub-isolation structure 620 from being affected during the patterning process of forming the second opening 420 .
  • FIG. 14 is a schematic diagram of a partial cross-sectional structure of a display substrate provided according to an example of another embodiment of the present disclosure.
  • the display substrate in the example shown in FIG. 14 is different from the display substrate shown in FIG. 12 in that the first sub-isolation structure 610 and the second sub-isolation structure 620 in the display substrate shown in FIG. 14 are integrally formed.
  • the base substrate 01 and the organic light-emitting element 100 in the display substrate shown in FIG. 14 may have the same characteristics as the base substrate 01 and the organic light-emitting element 100 in the embodiment shown in FIGS. 1A to 9B , which will not be repeated here.
  • the other film layers 011 in this example may have the same characteristics as the other film layers 011 in the embodiment shown in FIGS.
  • the flat layer 500 and the pixel defining pattern 400 shown in FIG. 14 may have the same features as the flat layer 500 and the pixel defining pattern 400 shown in FIG. 11A , which will not be repeated here.
  • the material of the isolation structure 600 may be the same as that of the flat layer 500 .
  • the isolation structure 600 shown in FIG. 14 may have the same size and quantitative relationship as the isolation structure 600 in any example of FIG. 11A-FIG. 12 , which will not be repeated here.
  • FIG. 14 schematically shows that there is a space between the isolation structure 600 and the flat layer 500, but it is not limited thereto.
  • the isolation structure 600 can also be an integrated structure with the flat layer 500, that is, the isolation structure 600 can be the A part of the organic layer opening 510 included in the flat layer 500 is two isolation structures 600 on both sides in the X direction, which are used to disconnect the charge generation layer.
  • the material of the first sub-isolation structure and the second sub-isolation structure in the display substrate provided in this example is the same, and the charge generation layer can be isolated without increasing the number of masks and reducing the production capacity in the process of manufacturing the isolation structure. .
  • FIG. 15A to FIG. 15B are schematic flowcharts of a manufacturing method of the display substrate before forming FIG. 14 .
  • the process flow and process method for forming the base substrate 01 and other film layers 011 in the display substrate shown in Figure 14 and Figure 15A can be compared with the process for forming the base substrate 01 and other film layers 011 in the display substrate shown in Figure 4A
  • the flow and process are the same, and may also be the same as the process flow and process of forming the base substrate 01 and other film layers 011 in the display substrate shown in FIG. 5A , and will not be repeated here.
  • the manufacturing method for forming a display substrate includes patterning and forming a plurality of inorganic material patterns 601 on other film layers 011 .
  • an organic material layer is formed, and the organic material layer is patterned to form the organic layer opening 510 and the isolation structure pattern 6000 inside the organic layer opening 510 .
  • at least one edge of each isolation structure pattern 6000 covers the inorganic material pattern 601 .
  • both side edges of each isolation structure pattern 6000 cover the inorganic material pattern 601 .
  • the edge of the inorganic material pattern 601 covered by the isolation structure pattern 6000 protrudes relative to the edge of the isolation structure pattern 6000 covering it, or the inorganic material pattern 601 covered by the isolation structure pattern 6000 The edge of is flush with the edge of the isolation structure pattern 6000 covering it.
  • FIG. 15A schematically shows that the inorganic material patterns 601 covered by two adjacent isolation structure patterns 6000 are separated from each other, but it is not limited thereto.
  • the inorganic material pattern 601 between two isolation structure patterns 6000 can be It is an integrated structure, that is, the two isolation structure patterns 6000 share the inorganic material pattern 601 between them.
  • wet etching is performed on the inorganic material pattern 601 (the etchant has little influence on the isolation structure pattern 6000) to etch the inorganic material pattern 601, so that the isolation structure pattern 6000 is formed with The isolation structure 600 of the undercut structure.
  • the embodiments of the present disclosure are not limited thereto, and the inorganic material pattern may not be completely etched away, as long as the isolation structure pattern forms an undercut structure, and the undercut structure can isolate the charge generation layer.
  • a plurality of isolation structures 600 can be arranged between adjacent sub-pixels, and the maximum size of each isolation structure 600 can be the minimum distance between adjacent isolation structures 600. Same size.
  • the maximum dimension of each isolation structure 600 and the minimum dimension of the space between adjacent isolation structures 600 may both be 10 microns.
  • the embodiments of the present disclosure are not limited thereto.
  • the maximum size of each isolation structure 600 may not be equal to the minimum size of the space between adjacent isolation structures 600.
  • the size of the isolation structure may be larger, Alternatively the size of the interval may be larger.
  • the size of the isolation protrusion 601 of the second sub-isolation structure 620 may be 1 ⁇ 3 ⁇ m.
  • Fig. 16 is a schematic diagram of a partial cross-sectional structure of a display substrate provided according to an example of another embodiment of the present disclosure.
  • the base substrate 01 and the organic light emitting element 100 in the display substrate shown in FIG. 16 may have the same features as the base substrate 01 and the organic light emitting element 100 in the embodiment shown in FIGS. 1A to 9B , which will not be repeated here.
  • the other film layers 011 in this example may have the same characteristics as the other film layers 011 in the embodiment shown in FIGS. 1A to 9B , which will not be repeated here.
  • the shape and thickness of the isolation structure 610 and the second sub-isolation structure 620 as well as their dimensional relationship parallel to the direction of the substrate are the same, and will not be repeated here.
  • the second opening 420 of the pixel defining pattern 400 exposes the isolation structure 600 and part of the flat layer 500 .
  • a space is provided between the isolation structure 600 and the edge of the second opening 420 .
  • the first sub-isolation structure 610 and the first electrode 110 are disposed in the same layer.
  • the first sub-isolation structure 610 and the first electrode 110 may have the same thickness.
  • the first sub-isolation structure 610 is made of the same material as the first electrode 110 to save process steps.
  • the first electrode 110 may include multiple film layers, and the first sub-isolation structure 610 may also include the same multi-layer film layers as the first electrode 110 .
  • the first electrode 110 may include multiple film layers, and the first sub-isolation structure 610 may include the same film layer as one film layer in the first electrode 110 .
  • the second sub-isolation structure 620 and the pixel defining portion 401 of the pixel defining pattern 400 are arranged in the same layer and made of the same material.
  • the surface of the second sub-isolation structure 610 away from the base substrate 01 may be a curved surface.
  • one isolation structure 600 may be provided between adjacent sub-pixels, but not limited thereto, and two or more may be provided, which may be provided according to product size and requirements.
  • the maximum distance between the surface of the second sub-isolation structure 620 away from the base substrate 01 and the base substrate 01 may be the same as the distance between the surface of the pixel defining portion 401 away from the base substrate 01 and the base substrate.
  • the maximum distance between 01 is equal.
  • the size of the second sub-isolation structure 620 along the X direction is smaller than the size of the first electrode 110 along the X direction.
  • first sub-isolation structure 610 and the second sub-isolation structure 620 may also be an integrated structure, and the material of the first sub-isolation structure 610 and the second sub-isolation structure 620 adopts the material of the pixel defining portion 401 .
  • the first sub-isolation structure 610 and the second sub-isolation structure 620 are an integral structure, and the isolation structure 600 may be a part of the pixel defining portion 401 of the pixel defining pattern 400 .
  • one pixel defining portion 401 is used to form the first opening 401 on one side in the X direction, and the isolation structure 600 including a protrusion is formed on the other side of the pixel defining portion 401 in the X direction to form the second opening 420 .
  • An example of an embodiment of the present disclosure can save process steps by using a part of the pixel defining portion of the pixel defining pattern as an isolation structure.
  • the setting of the thickness of the first sub-isolation structure 610, the setting of the dimension of the protruding part of the second sub-isolation structure 620 relative to the edge of the first sub-isolation structure 610, and the setting of the edge of the curved surface of the second sub-isolation structure 620 The angle is set so that the charge generation layer is disconnected at the edge of the isolation structure 600 , and the second electrode is not disconnected at the edge of the isolation structure 600 .
  • FIG. 17A to FIG. 17B are schematic flowcharts of a manufacturing method for forming the display substrate before FIG. 16 .
  • the manufacturing method of a display substrate may include preparing a base substrate 01 on a glass carrier.
  • the base substrate 01 formed in this example may have the same characteristics as the base substrate 01 formed in the display substrate shown in FIG. 4A and FIG. 5A , which will not be repeated here.
  • the process flow for forming other film layers 011 and flat layer 500 on the base substrate 01 can be the same as the process flow for forming other film layers 011 and flat layer 500 in the display substrate shown in FIG. 5A.
  • the process flow for forming other film layers 011 and the flat layer 500 in the display substrate as shown in FIG. 4A may also be the same, and will not be repeated here.
  • an electrode layer is formed on the flat layer 500 , and the electrode layer is patterned to form a first electrode 110 and a first sub-isolation structure pattern 6100 .
  • the shape and size of the first electrode 110 may be the same as those of the first sub-isolation structure pattern 6100 .
  • a pixel defining film is formed on the first electrode 110 and the first sub-isolation structure pattern 6100, and the pixel defining film is patterned to form the pixel defining pattern 400 and the second sub-isolation structure 620
  • the pixel defining pattern 400 includes a first opening 410 exposing the first electrode 110 and a second opening 420 exposing the first sub-isolation structure pattern 6100, and the second sub-isolation structure 620 is located on the first sub-isolation structure pattern 6100 exposed by the second opening 420.
  • the spacer 012 is patterned.
  • the size of the first sub-isolation structure pattern 6100 is larger than the size of the second sub-isolation structure 620 .
  • the first sub-isolation structure pattern 6100 has a protruding portion relative to at least one edge of the second sub-isolation structure 620 .
  • the first sub-isolation structure pattern 6100 has protruding portions relative to both edges of the second sub-isolation structure 620 .
  • this example is not limited thereto, and the edge of the first sub-isolation structure pattern 6100 may also be flush with the edge of the second sub-isolation structure 620 .
  • wet etching is performed on the first sub-isolation structure pattern 6100 (the etchant has less influence on the second sub-isolation structure 620) so that the edges of the first sub-isolation structure pattern 6100 are opposite to each other.
  • the edge of the second sub-isolation structure 620 is retracted to form an undercut structure.
  • wet etching is performed on the first sub-isolation structure pattern 6100 to form the first sub-isolation structure 610 and the isolation structure 600 .
  • FIG. 18 is a schematic diagram of a partial cross-sectional structure of a display substrate provided according to an example of another embodiment of the present disclosure.
  • the display substrate in the example shown in FIG. 18 is different from the display substrate shown in FIGS. 16 to 17B in that the materials of the first sub-isolation structures 610 and the first electrodes 110 are different.
  • the base substrate 01 and the organic light-emitting element 100 in the display substrate shown in FIG. 18 may have the same characteristics as the base substrate 01 and the organic light-emitting element 100 in the embodiment shown in FIGS. 1A to 9B , which will not be repeated here.
  • the other film layers 011 in this example may have the same characteristics as the other film layers 011 in the embodiment shown in FIGS.
  • the shape and thickness of the isolation structure 610 and the second sub-isolation structure 620 as well as their dimensional relationship parallel to the direction of the substrate are the same, and will not be repeated here.
  • the material of the first sub-isolation structure 610 may include any one or more of silicon nitride, silicon oxide, or silicon oxynitride, and the material of the second sub-isolation structure 620 may be the same as that of the pixel defining portion
  • the material of 401 is the same.
  • FIG. 19A to FIG. 19B are schematic flowcharts of a manufacturing method for forming the display substrate before FIG. 18 .
  • the manufacturing method of a display substrate may include preparing a base substrate 01 on a glass carrier.
  • the base substrate 01 formed in this example may have the same characteristics as the base substrate 01 formed in the display substrate shown in FIG. 4A and FIG. 5A , which will not be repeated here.
  • the process flow for forming other film layers 011 and flat layer 500 on the base substrate 01 can be the same as the process flow for forming other film layers 011 and flat layer 500 in the display substrate shown in FIG. 5A.
  • the process flow for forming other film layers 011 and the flat layer 500 in the display substrate as shown in FIG. 4A may also be the same, and will not be repeated here.
  • a first sub-isolation structure layer is formed on the planarization layer 500 , for example, the first sub-isolation structure layer is deposited on the planarization layer 500 .
  • the thickness of the first sub-isolation structure layer may be 300-10000 angstroms.
  • the first sub-isolation structure layer is patterned to form a first sub-isolation structure pattern. For example, dry etching is performed on the first sub-isolation structure layer to form the first sub-isolation structure pattern.
  • a second sub-isolation structure layer is formed on the first sub-isolation structure pattern.
  • the thickness of the second sub-isolation structure layer may be 0.5-3 microns.
  • the second sub-isolation structure 620 is formed on the first sub-isolation structure pattern.
  • the second sub-isolation structure 620 is formed, wet etching is performed on the first sub-isolation structure pattern (the etchant has little influence on the second sub-isolation structure) so that the first sub-isolation structure
  • the edges of the pattern are retracted relative to the edges of the second sub-isolation structure to form an undercut structure (ie, the isolation structure 600 ), which includes the edges of the first sub-isolation structure 610 and the second sub-isolation structure 620 .
  • the size of the isolation protrusion 601 protruding from the edge of the second sub-isolation structure 620 relative to the first sub-isolation structure 610 along the X direction may be no less than 0.2 microns.
  • the first electrode 110 is patterned and formed on the flat layer 500 .
  • the process for forming the first electrode and the subsequently formed pixel defining pattern and other film layers may be the same as the process for forming the first electrode and the subsequently formed pixel defining pattern and other film layers in the display substrate shown in FIGS. 1A to 5D , which will not be repeated here.
  • a space is provided between the isolation structure 600 and the pixel defining portion 401 of the pixel defining pattern 400 .
  • the thickness of the isolation structure 600 may be smaller than the thickness of the pixel defining part 401 .
  • FIG. 20 is a schematic diagram of a partial cross-sectional structure of a display substrate provided according to an example of another embodiment of the present disclosure.
  • the display substrate in the example shown in FIG. 20 is different from the display substrate shown in FIG. 16 in that the number of stacked layers of the isolation structure is different.
  • the base substrate 01 and the organic light-emitting element 100 in the display substrate shown in FIG. 20 may have the same features as the base substrate 01 and the organic light-emitting element 100 in the embodiment shown in FIGS. 1A to 9B , which will not be repeated here.
  • the other film layers 011 in this example may have the same characteristics as the other film layers 011 in the embodiment shown in FIGS. 1A to 9B , which will not be repeated here.
  • the flat layer 500 in the display substrate shown in FIG. 20 may have the same features as the flat layer 500 in the display substrate shown in FIG. 16 , which will not be repeated here.
  • each isolation structure 600 further includes a third sub-isolation structure 630 stacked with the second sub-isolation structure 620 and the first sub-isolation structure 610, and the third sub-isolation structure 630 is located in the first sub-isolation structure.
  • the third sub-isolation structure 630 is larger than the maximum size of the first sub-isolation structure 610 .
  • the ratio of the size of the second sub-isolation structure 620 to the size of the third sub-isolation structure 630 may be 0.8 ⁇ 1.2.
  • the ratio of the size of the second sub-isolation structure 620 to the size of the third sub-isolation structure 630 may be 0.9 ⁇ 1.1.
  • the size of the second sub-isolation structure 620 and the size of the third sub-isolation structure 630 may be equal.
  • the pixel defining pattern 400 includes a second opening 420 configured to expose the isolation structure 600 .
  • the isolation structure 600 there is a certain distance between the isolation structure 600 and the edge of the second opening 420 .
  • the thicknesses of the second sub-isolation structure 620 and the third sub-isolation structure 630 are both smaller than the thickness of the first sub-isolation structure 610 .
  • the thickness of the isolation structure 600 may be smaller than the thickness of the pixel defining portion 401 of the pixel defining pattern 400 . But not limited thereto, the thickness of the isolation structure 600 may also be greater than or equal to the thickness of the pixel defining portion 401 .
  • the third sub-isolation structure 630 is disposed on the same layer as the first electrode 110 .
  • both the third sub-isolation structure 630 and the first electrode 110 are disposed on the surface of the planar layer 500 .
  • the material of the second sub-isolation structure 620 is the same as that of the third sub-isolation structure 630 , and the material of the second sub-isolation structure 620 is different from that of the first sub-isolation structure 630 .
  • the materials of the first sub-isolation structure 610 and the second sub-isolation structure 620 are both inorganic materials.
  • the material of the first sub-isolation structure 610 may be silicon nitride
  • the materials of the second sub-isolation structure 620 and the third sub-isolation structure 630 may be silicon oxide.
  • the material of the first sub-isolation structure 610 may be aluminum, and the materials of the second sub-isolation structure 620 and the third sub-isolation structure 630 may be titanium.
  • the difference between the above two materials may mean that the density of the two materials is different, or the refractive index of the two materials is different, or the lyophilicity of the two materials is different, or the chemical activity of the two materials and a certain solvent Not equal.
  • the cross section of the first sub-isolation structure 610 cut by a plane parallel to the XY plane may be trapezoidal, the upper base of the trapezoid is in contact with the surface of the second sub-isolation structure 620, and the lower base of the trapezoid is in contact with the surface of the second sub-isolation structure 620.
  • the surfaces of the three sub-isolation structures 630 are in contact.
  • the embodiments of the present disclosure are not limited thereto, and the cross section of the first sub-isolation structure 610 cut by a plane parallel to the XY plane may also be a rectangle.
  • the cross-sections of the second sub-isolation structure 620 and the third sub-isolation structure 630 taken by a plane parallel to the XY plane may both be rectangular.
  • the sum of the thicknesses of the first sub-isolation structure 610 and the third sub-isolation structure 630 and the thickness of the light emitting functional layer may be 0.8 ⁇ 1.2.
  • the sum of the thicknesses of the first sub-isolation structure 610 and the third sub-isolation structure 630 and the thickness of the light-emitting functional layer may be 0.9-1.1.
  • the smaller setting can make the charge generation layer disconnected at the position of the isolation protrusion 601 of the second sub-isolation structure 620 , while the second electrode is not disconnected at the position of the isolation protrusion 601 and remains continuous.
  • the embodiments of the present disclosure are not limited thereto, and the sum of the thicknesses of the first sub-isolation structure 610 and the third sub-isolation structure 630 may be greater than the thickness of the light-emitting functional layer so that both the charge generation layer and the second electrode are in the second sub-isolation structure. 620 is disconnected at the location of the isolation protrusion 601.
  • At least one of the first sub-isolation structure 610 , the second sub-isolation structure 620 and the third sub-isolation structure 630 includes at least one film layer.
  • FIG. 21A to FIG. 21B are schematic flowcharts of a manufacturing method for forming the display substrate before FIG. 20 .
  • the manufacturing method of a display substrate may include preparing a base substrate 01 on a glass carrier.
  • the base substrate 01 formed in this example may have the same characteristics as the base substrate 01 formed in the display substrate shown in FIG. 4A and FIG. 5A , which will not be repeated here.
  • the process flow for forming other film layers 011 and flat layer 500 on the base substrate 01 can be the same as the process flow for forming other film layers 011 and flat layer 500 in the display substrate shown in FIG. 5A.
  • the process flow for forming other film layers 011 and the flat layer 500 in the display substrate as shown in FIG. 4A may also be the same, and will not be repeated here.
  • a third sub-isolation structure layer, a first sub-isolation structure layer, and a second sub-isolation structure layer are sequentially formed on the flat layer 500, and then a three-layer isolation structure pattern is formed by dry etching, After that, the first sub-isolation structure pattern located in the middle layer is wet-etched (the etching selectivity ratio of the etching solution to the material of the first sub-isolation structure pattern is greater than that of the second sub-isolation structure pattern and the third sub-isolation structure pattern.
  • Etching selectivity ratio so that the edge of the first sub-isolation structure pattern retracts relative to the edge of the second sub-isolation structure pattern to form an undercut at the edge of the second isolation structure pattern and the edge of the first sub-isolation structure pattern structure, thereby forming the isolation structure 600.
  • the first electrode 110 is patterned and formed on the flat layer 500 .
  • the process for forming the first electrode and the subsequently formed pixel defining pattern and other film layers may be the same as the process for forming the first electrode and the subsequently formed pixel defining pattern and other film layers in the display substrate shown in FIGS. 1A to 5D , which will not be repeated here.
  • FIG. 22A to FIG. 22C are schematic flowcharts of another manufacturing method for forming the display substrate before FIG. 20 .
  • the manufacturing method of a display substrate may include preparing a base substrate 01 on a glass carrier.
  • the base substrate 01 formed in this example may have the same characteristics as the base substrate 01 formed in the display substrate shown in FIG. 4A and FIG. 5A , which will not be repeated here.
  • the process flow for forming other film layers 011 and flat layer 500 on the base substrate 01 can be the same as the process flow for forming other film layers 011 and flat layer 500 in the display substrate shown in FIG. 5A.
  • the process flow for forming other film layers 011 and the flat layer 500 in the display substrate as shown in FIG. 4A may also be the same, and will not be repeated here.
  • the third sub-isolation structure layer, the first sub-isolation structure layer and the second sub-isolation structure layer are sequentially formed on the flat layer 500, and then the third sub-isolation structure pattern is formed by dry etching. 6300 , the first sub-isolation structure pattern 6100 and the second sub-isolation structure pattern 6200 .
  • the orthographic projections of the third sub-isolation structure pattern 6300 , the first sub-isolation structure pattern 6100 and the second sub-isolation structure pattern 6200 on the base substrate 01 are completely overlapped.
  • the first electrode 110 is patterned on the flat layer 500.
  • the process for forming the first electrode in this example may be the same as the process for forming the first electrode in the display substrate shown in FIG. 1A to FIG. 5D , and will not be repeated here.
  • the pixel defining pattern 400 includes exposing the first electrode 110.
  • the layered structure mask for exposing each sub-isolation structure pattern is used to perform the Wet etching is performed on the first sub-isolation structure pattern 6100 so that the edge of the first sub-isolation structure pattern 6100 is retracted relative to the edge of the second sub-isolation structure pattern 6100 to form an undercut structure, thereby forming the isolation structure 600 .
  • Subsequent process steps for forming film layers such as light-emitting functional layers may be the same as the process steps for forming film layers such as light-emitting functional layers in the examples shown in FIG. 4B and FIG. 7 , and will not be repeated here.
  • FIG. 23 is a schematic diagram of a partial cross-sectional structure of a display substrate provided according to an example of another embodiment of the present disclosure.
  • the display substrate in the example shown in FIG. 23 is different from the display substrate shown in FIG. 20 in that the positions of the isolation structures are different.
  • the base substrate 01 and the organic light emitting element 100 in the display substrate shown in FIG. 23 may have the same characteristics as the base substrate 01 and the organic light emitting element 100 in the embodiment shown in FIGS. 1A to 9B , which will not be repeated here.
  • the other film layers 011 in this example may have the same characteristics as the other film layers 011 in the embodiment shown in FIGS. 1A to 9B , which will not be repeated here.
  • the flat layer 500 in the display substrate shown in FIG. 23 may have the same features as the flat layer 500 in the display substrate shown in FIG. 20 , which will not be repeated here.
  • the pixel-defining pattern 400 includes a plurality of first openings 410, and the plurality of first openings 410 are arranged in one-to-one correspondence with the plurality of sub-pixels 100 to define the light-emitting areas of the plurality of sub-pixels 100.
  • the first openings 410 are defined by configured to expose the first electrode 110 .
  • the part of the pixel defining pattern 400 except the first opening 410 is the pixel defining portion 401
  • the isolation structure 600 is located on the side of the pixel defining portion 401 of the pixel defining pattern 400 away from the substrate 01 .
  • each isolation structure 600 includes a first sub-isolation structure 610, a second sub-isolation structure 620, and a third sub-isolation structure 630 stacked in sequence, and the third sub-isolation structure 630 is located in the first sub-isolation structure.
  • the size of the third sub-isolation structure 630 larger than the maximum size of the first sub-isolation structure 610 .
  • the isolation structure 600 in the display substrate shown in FIG. 23 may have the same features as the isolation structure 600 in the display substrate shown in FIG. 20 , which will not be repeated here.
  • FIG. 24 is a schematic flowchart of a manufacturing method for forming the display substrate before FIG. 23 .
  • the method for manufacturing a display substrate may include preparing a base substrate 01 on a glass carrier.
  • the base substrate 01 formed in this example may have the same characteristics as the base substrate 01 formed in the display substrate shown in FIG. 4A and FIG. 5A , which will not be repeated here.
  • the process flow of forming other film layers 011 , flat layer 500 and first electrode 110 on the base substrate 01 can be the same as that of forming other film layers 011 , flat layer 500 and first electrode 110 in the display substrate shown in FIG. 5A .
  • the process flow of the layer 500 and the first electrode 110 is the same, and may also be the same as the process flow of forming the other film layer 011 , the flat layer 500 and the first electrode 110 in the display substrate shown in FIG. 4A , and will not be repeated here.
  • a pixel-defining film is formed on the planar layer 500 and the first electrode 110, and the pixel-defining film is patterned to form a plurality of exposed first electrodes.
  • the pixels of the plurality of first openings 110 define a pattern 400 .
  • the third sub-isolation structure layer, the first sub-isolation structure layer, and the second sub-isolation structure layer are sequentially formed on the pixel defining portion 401.
  • the etching selectivity ratio of the etchant for the first sub-isolation structure pattern is greater than that for the second sub-isolation structure pattern
  • the etching selectivity ratio of the material of the isolation structure pattern and the third sub-isolation structure pattern makes the edge of the first sub-isolation structure pattern retract relative to the edge of the second sub-isolation structure pattern so as to be between the edge of the second isolation structure pattern and the second sub-isolation structure pattern.
  • An undercut structure is formed at the edge of the first sub-isolation structure pattern, thereby forming the isolation structure 600 .
  • FIG. 25 is a schematic diagram of a partial cross-sectional structure of a display substrate provided according to an example of another embodiment of the present disclosure.
  • the display substrate in the example shown in FIG. 25 is different from the display substrate shown in FIG. 20 in that the isolation structure includes a different stacked structure.
  • the pixel defining pattern 400 includes a first opening 410 configured to include the first electrode 110 and a second opening 410 configured to expose the isolation structure 600.
  • the isolation structure 600 also includes The barrier portion 640 between the structure 630 and the base substrate 01 is disposed on the same layer as the first electrode 110 .
  • the barrier part can function to isolate the isolation structure and the planar layer, preventing damage to the planar layer during the process of forming the isolation structure.
  • the first electrode 110 may include multiple film layers, and the blocking part 640 may use inorganic materials.
  • the material of the blocking part 640 may be the same as that of at least one of the first sub-isolation structure, the second sub-isolation structure and the third sub-isolation structure.
  • the base substrate 01 and the organic light emitting element 100 in the display substrate shown in FIG. 25 may have the same features as the base substrate 01 and the organic light emitting element 100 in the embodiment shown in FIGS. 1A to 9B , which will not be repeated here.
  • the other film layers 011 in this example may have the same characteristics as the other film layers 011 in the embodiment shown in FIGS. 1A to 9B , which will not be repeated here.
  • the flat layer 500 in the display substrate shown in FIG. 25 may have the same features as the flat layer 500 in the display substrate shown in FIG. 20 , which will not be repeated here.
  • the ratio of the thickness of the blocking portion 640 to the thickness of the first electrode 110 may be 0.8 ⁇ 1.2.
  • the ratio of the thickness of the barrier part 640 to the thickness of the first electrode 110 may be 0.9 ⁇ 1.1.
  • the thickness of the barrier part 640 may be equal to the thickness of the first electrode 110 .
  • the shape and size of the blocking portion 640 can be the same as that of the first electrode 110 , but not limited thereto.
  • the shape and size of the blocking portion can be set according to the actual requirements of the product.
  • the blocking portion 640 is not covered by the pixel defining portion 401 of the pixel defining pattern 400, and the orthographic projection of the blocking portion 640 on the base substrate 01 is the same as the orthographic projection of the pixel defining portion 401 on the base substrate 01. There is no overlap. For example, there is a certain distance between the isolation structure 600 and the pixel defining portion 401 of the pixel defining pattern 400 . Of course, this example is not limited thereto, and the blocking portion 640 may also be covered by the pixel defining portion 401 .
  • the isolation structure 600 is located between adjacent sub-pixels 100 , and along the arrangement direction of the adjacent sub-pixels 100 , the size of the blocking portion 640 may be larger than the size of the third sub-isolation structure 620 .
  • the sum of the thicknesses of the first sub-isolation structure 610, the third sub-isolation structure 630, and the barrier portion 640 may be greater than the thickness of the light-emitting functional layer, so that the charges can be generated. Both the layer and the second electrode are disconnected at the isolation protrusion 601 of the second sub-isolation structure 620 .
  • FIG. 26A to FIG. 26B are schematic flowcharts of a manufacturing method for forming the display substrate before FIG. 25 .
  • the manufacturing method of a display substrate may include preparing a base substrate 01 on a glass carrier.
  • the base substrate 01 formed in this example may have the same characteristics as the base substrate 01 formed in the display substrate shown in FIG. 4A and FIG. 5A , which will not be repeated here.
  • the process flow for forming other film layers 011 and flat layer 500 on the base substrate 01 can be the same as the process flow for forming other film layers 011 and flat layer 500 in the display substrate shown in FIG. 5A.
  • the process flow for forming other film layers 011 and the flat layer 500 in the display substrate as shown in FIG. 4A may also be the same, and will not be repeated here.
  • an electrode layer is formed on the flat layer 500 , and the electrode layer is patterned to form the first electrode 110 .
  • the blocking portion 640 may be formed before the first electrode 110 is formed, or the blocking portion 640 may be formed after the first electrode 110 is formed.
  • a third sub-isolation structure layer, a first sub-isolation structure layer, and a second sub-isolation structure layer are sequentially formed on the barrier portion 640, and then a three-layer isolation structure pattern is formed by dry etching, After that, the first sub-isolation structure pattern located in the middle layer is wet-etched (the etching selectivity ratio of the etching solution to the material of the first sub-isolation structure pattern is greater than that of the second sub-isolation structure pattern and the third sub-isolation structure pattern.
  • Etching selectivity ratio so that the edge of the first sub-isolation structure pattern retracts relative to the edge of the second sub-isolation structure pattern to form an undercut at the edge of the second isolation structure pattern and the edge of the first sub-isolation structure pattern structure, thereby forming the isolation structure 600.
  • the material of the blocking portion 640 is different from that of the first sub-isolation structure 610, the second sub-isolation structure 620, and the third sub-isolation structure 630, so as to prevent the formation of the first sub-isolation structure 610 , the second sub-isolation structure 620 and the third sub-isolation structure 630 affect the blocking portion 640 in the process.
  • a pixel-defining film is formed on the isolation structure 600 and the first electrode 110, and the pixel-defining film is patterned to form a first electrode 110 exposed.
  • the processing methods of other film layers after forming the pixel defining film may be the same as the processing methods of other film layers after forming the pixel defining film in the display substrate shown in FIG. 1A to FIG. 5D , and will not be repeated here.
  • the arrangement of multiple sub-pixels in each display substrate shown in FIGS. 11A to 26B can be the same as the arrangement of multiple sub-pixels in the display substrate shown in FIGS.
  • the isolation structure 600 shown can be located at the position of the groove 210 shown in FIG. 10A to FIG. 10E .
  • the isolation structure 600 shown in FIG. 11A to FIG. The isolation structure 600 shown in FIGS. 11A to 26B replaces the groove 210 shown in FIGS. 10A to 10E .
  • the isolation structure when the isolation structure is located in the flat layer, the pixel defining portion between adjacent sub-pixels can be retained or removed; when the isolation structure is located in the second opening of the pixel defining pattern, the pixels between adjacent sub-pixels Limited parts can be reserved.
  • Another embodiment of the present disclosure provides a display device, including the display substrate shown in FIG. 11A to FIG. 26B , by providing an isolation structure between adjacent sub-pixels in the display device, the charge generation layer can be broken at the edge of the isolation structure. On, it is beneficial to reduce the probability of crosstalk between adjacent sub-pixels.
  • the display device further includes a cover plate located on the light-emitting side of the display panel.
  • the display device can be a display device such as an organic light-emitting diode display device, and any product or component with a display function such as a TV, a digital camera, a mobile phone, a watch, a tablet computer, a notebook computer, a navigator, etc. that include the display device. Examples are not limited to this.
  • Fig. 27 is a schematic diagram of a partial cross-sectional structure of a display substrate provided according to an example of another embodiment of the present disclosure
  • Fig. 28A is a schematic diagram of a partial cross-sectional structure of a display substrate provided according to another example of another embodiment of the present disclosure
  • Fig. 28B is A schematic diagram of a partial cross-sectional structure of a display substrate provided according to another example of another embodiment of the present disclosure.
  • the display substrate shown in FIG. 27 may have the same first display area A1 and second display area A2 as the display substrate shown in FIG. 1C . As shown in FIGS.
  • the display substrate includes a base substrate 01 and a plurality of sub-pixels 10 disposed on the base substrate 01 in the first display area A1 .
  • the sub-pixel 10 includes an organic light-emitting element 100.
  • the organic light-emitting element 100 includes a light-emitting functional layer 130 and a first electrode 110 and a second electrode 120 located on both sides of the light-emitting functional layer 130 along a direction perpendicular to the base substrate 01.
  • the display substrate further includes an isolation portion 700 , the isolation portion 700 includes a first sub-isolation portion 710 and a second sub-isolation portion 720 stacked, and the first sub-isolation portion 710 is located between the second sub-isolation portion 720 and the base substrate 01 .
  • the material of the first sub-isolation part 710 includes an inorganic non-metal material or a metal material
  • the material of the second sub-isolation part 720 includes an organic material.
  • the second sub-isolation 720 includes a protruding portion 701 protruding relative to the edge of the first sub-isolation 710 , and the protruding portion 701 is located between adjacent sub-pixels 100 .
  • the slope angle of at least part of the side surface of the second sub-isolation part 720 to a plane parallel to the contact surface of the first sub-isolation part 710 and the second sub-isolation part 720 is greater than 60 degrees and less than 120 degrees, and Or, the slope angle of at least part of the side surface of the second sub-isolation part 720 to a plane parallel to the contact surface of the first sub-isolation part 710 and the second sub-isolation part 720 is greater than 60 degrees and less than 120 degrees.
  • the slope angle of at least part of the side surface of the first sub-isolation structure 610 to a plane parallel to the contact surface of the first sub-isolation part 710 and the second sub-isolation part 720 is greater than 70 degrees and less than 110 degrees
  • the second A slope angle between at least part of the side surface of the second sub-isolation part 720 and a plane parallel to the contact surface of the first sub-isolation part 710 and the second sub-isolation part 720 is greater than 70 degrees and less than 110 degrees.
  • the slope angle of at least part of the side surface of the first sub-isolation part 710 to a plane parallel to the contact surface of the first sub-isolation part 710 and the second sub-isolation part 720 is greater than 80 degrees and less than 100 degrees
  • the second A slope angle between at least part of the side surface of the second sub-isolation part 720 and a plane parallel to the contact surface of the first sub-isolation part 710 and the second sub-isolation part 720 is greater than 80 degrees and less than 100 degrees.
  • the slope angle between at least part of the side surface of the first sub-isolation part and a plane parallel to the contact surface of the first sub-isolation part and the second sub-isolation part may be the surface of the first sub-isolation part away from the base substrate and the first sub-isolation part.
  • the angle between the side surfaces of the sub-isolations may also be the angle between the surface of the first sub-isolation facing the base substrate and the side surface of the first sub-isolation;
  • the slope angle between at least part of the side surface and the plane parallel to the contact surface of the first sub-isolation part and the second sub-isolation part may be the surface of the second sub-isolation part away from the base substrate and the side surface of the second sub-isolation part
  • the angle between them may also be the angle between the surface of the second sub-isolation part facing the base substrate and the side surface of the second sub-isolation part.
  • the side surface of the first sub-isolation part may refer to the surface of the first sub-isolation part having a certain angle with the substrate substrate, and the side surface of the second sub-isolation part may refer to the surface of the second sub-isolation part with the substrate.
  • the angle between the substrates has an angled surface.
  • the difference between the examples shown in FIG. 28A and FIG. 28B lies in the positional relationship and angular relationship between the first sub-isolation part 710 and the second sub-isolation part 720 .
  • the light emitting functional layer 130 includes the charge generation layer 133 which is disconnected at the edge of the isolation part 700 .
  • an isolation part is provided between adjacent sub-pixels in a display substrate, by adjusting the relative positional relationship between the first sub-isolation part and the second sub-isolation part, or the angle of the side surface of the first
  • the angle of the side surface of the sub-isolation part can be such that at least one film layer of the light-emitting functional layer is broken at the protruding part where the second sub-isolation part protrudes relative to the edge of the first sub-isolation part, or at the edge of the isolation part Disconnection is beneficial to reduce the probability of crosstalk between adjacent sub-pixels.
  • the charge generation layer can be disconnected at the edge of the isolation portion, which is beneficial to reduce the probability of crosstalk between adjacent sub-pixels.
  • the base substrate 01 and the organic light emitting device 100 in this embodiment may have the same features as the base substrate 01 and the organic light emitting device 100 in the embodiment shown in FIGS. 1A to 9B , which will not be repeated here.
  • the other film layers 011 in this example may have the same characteristics as the other film layers 011 in the embodiment shown in FIGS. 1A to 9B , which will not be repeated here.
  • the flat layer 500 in this example may have the same characteristics as the flat layer 500 shown in FIG. 16 to FIG. 26B , which will not be repeated here.
  • the plurality of sub-pixels 10 may include two adjacent sub-pixels 10 arranged along the X direction.
  • the plurality of isolation portions 700 disposed in the two adjacent sub-pixels 10 are arranged along the X direction.
  • FIG. 27 schematically shows that at least one group of isolation parts is provided between adjacent sub-pixels 100, each group of isolation parts includes two isolation parts 700 arranged at intervals, and the two isolation parts 700 are arranged along the adjacent sub-pixel 100
  • the arrangement direction (such as the X direction) is arranged at intervals, and the protrusions 701 of the two isolation parts 700 are close to each other, but not limited to this, three isolation parts spaced from each other or each other more isolated sections of the spacer.
  • the edge of the first sub-isolation part 710 is retracted relative to the edge of the second sub-isolation part 720 covering it to form an undercut structure, and the protruding part 701 of the second sub-isolation part 720 is suspended.
  • the common film layer (for example, including the charge generation layer) in the light-emitting functional layer 130 of the two adjacent sub-pixels 10 is the entire film layer. Due to the high conductivity of the charge generation layer, for a display device with high resolution, the high conductivity of the charge generation layer is likely to cause crosstalk between adjacent sub-pixels 10 .
  • the charge generation layer formed at the protruding portion of the isolation portion can be disconnected.
  • the two adjacent sub-pixels The interval between the charge generation layers can increase the resistance of the light-emitting functional layer between adjacent sub-pixels, thereby reducing the probability of crosstalk between the two adjacent sub-pixels without affecting the normal display of the sub-pixels.
  • the distance between the two first sub-isolations 710 of the two isolations 700 is greater than that between the two second sub-isolations 720 . interval between.
  • the maximum thickness of the second sub-isolation portion 720 is greater than the maximum thickness of the first sub-isolation portion 710 .
  • the average thickness of the second sub-isolation part 720 is greater than the average thickness of the first sub-isolation part 710 .
  • the thickness of the protruding portion 701 is smaller than the thickness of a portion of the second sub-isolating portion 720 other than the protruding portion 701 .
  • the difference between the thickness of the protruding portion 701 and the portion of the second sub-isolating portion 720 other than the protruding portion 701 may be the thickness of the first sub-isolating portion 710 .
  • the surface of the protruding portion 701 away from the base substrate 01 includes a curved surface, and the curved surface is curved toward the first sub-isolation portion 710, and the slope angle of the curved surface of the protruding portion 701 is 15-70 degrees.
  • the slope angle of the curved surface of the protruding part 701 is 30-60 degrees.
  • the slope angle of the curved surface of the protrusion 701 is 40 ⁇ 50 degrees.
  • the slope angle of the curved surface of the protruding part 701 is smaller than the angle between the side surface of the first sub-isolation part 710 and the base substrate 01 .
  • the side of the first sub-isolation part 710 may be curved or straight.
  • the side of the first sub-isolation part 710 may be curved toward the center of the first sub-isolation part 710 .
  • the included angle between the side of the first sub-isolation portion 710 and the surface on the side away from the base substrate 01 may be 60 degrees to 90 degrees.
  • the included angle between the side of the first sub-isolation portion 710 and the surface on the side close to the base substrate 01 may be 60 degrees to 90 degrees.
  • the angle between the above-mentioned curved edge and a surface may refer to the angle between the tangent at the intersection of the curved edge and the surface and the surface. But not limited thereto, it may also be the angle between the tangent line at the midpoint of the curved edge and the surface.
  • the layer of the charge generation layer 133 in the light-emitting functional layer 130 facing the base substrate 01 is disconnected at the isolation portion 710 .
  • the color of light emitted from the first light emitting layer is the same as that of light emitted from the second light emitting layer.
  • the color of light emitted by the first light-emitting layer in the same sub-pixel is the same as that of light emitted by the second light-emitting layer, and in at least two adjacent sub-pixels, the colors of light emitted by the light-emitting layer are different.
  • the light-emitting functional layer 130 includes a light-emitting layer (first light-emitting layer or second light-emitting layer), and the orthographic projection of at least one disconnected film layer in the light-emitting functional layer 130 on the base substrate
  • the area is greater than the area of the orthographic projection of the light emitting layer (the first light emitting layer or the second light emitting layer) on the base substrate 01.
  • the disconnected film layer can be a common layer, and the light emitting layer can be a patterned film layer formed by a fine metal mask.
  • the luminescent functional layer 130 includes at least one luminescent layer (first luminescent layer or second luminescent layer), and the film layers disconnected at the isolation part 700 in the luminescent functional layer 130 include at least one luminescent layer and at least one layer. other layers.
  • the area of the orthographic projection of the disconnected at least one other film layer on the base substrate 01 is greater than the area of the orthographic projection of the disconnected at least one light-emitting layer on the base substrate 01 .
  • the area of the disconnected at least one other film layer covering the isolation portion 700 is greater than the area of the disconnected at least one light-emitting layer covering the isolation portion.
  • the disconnected at least one other film layer completely covers the isolation part 700 , and at least one light-emitting layer only covers part of the isolation part 700 .
  • At least one layer of the plurality of film layers included in the light-emitting functional layer 130 at least partially covers a part of the side surface of the isolation portion 700 .
  • the above-mentioned film layer may cover the side surface of the first sub-isolation part 710 , and/or, cover the side surface of the second sub-isolation part 720 .
  • the thickness of the first sub-isolation part 710 is smaller than the thickness of the second sub-isolation part 720 in a direction perpendicular to the base substrate 01 .
  • the size of the protrusion 701 may be larger than that of the first sub-isolation portion 710. size of. But not limited thereto, the size of the protruding parts in the above arrangement direction may also be smaller than or equal to the size of the first sub-isolation part.
  • At least one layer of the plurality of film layers in the light-emitting functional layer 130 is disconnected at the edge of the side of the isolation part 700 facing one of the adjacent sub-pixels, and at the edge of the side facing the other adjacent sub-pixel. Everywhere is disconnected.
  • At least part of the second sub-isolation portion 720 facing one of the adjacent sub-pixels is different from at least part of the second sub-isolation portion 720 facing the other adjacent sub-pixel with a slope angle; and/or, the At least a portion of the second sub-isolation portion 720 facing one of the adjacent sub-pixels has the protrusion, and a portion of the second sub-isolation portion 720 facing the other adjacent sub-pixel does not have the protrusion.
  • the projection of the first sub-isolation part on the base substrate all falls within the projection of the second sub-isolation part.
  • the display substrate further includes a pixel-defining pattern 400
  • the pixel-defining pattern 400 includes a plurality of first openings 410
  • the plurality of first openings 410 are set in one-to-one correspondence with the plurality of sub-pixels 100 to define the plurality of sub-pixels 100.
  • the first opening 410 is configured to expose the first electrode 110 .
  • the pixel defining pattern 400 includes a pixel defining portion 401 surrounding the first opening 410 .
  • the pixel defining pattern 400 further includes a second opening 420 , and the pixel defining part 401 surrounds the second opening 420 .
  • the pixel defining pattern 400 includes a pixel defining portion 401 located between adjacently disposed first openings 410 and second openings 420, and one end of the pixel defining portion 401 is configured to form a first Opening 410, the other end of the pixel defining portion 401 includes a second sub-isolation portion 720, the pixel defining portion 401 is configured such that the angle between the sidewall of the first opening 410 and a plane parallel to the base substrate 01 is different from An angle between a sidewall of the second sub-isolation part 720 and a plane parallel to the base substrate 01 .
  • the sidewalls of the first opening 410 and the sidewalls of the second opening 420 may have different inclination angles, or have different shapes.
  • the pixel defining pattern 400 includes a second sub-isolation part 720 .
  • the pixel defining portion 401 surrounding the second opening 420 includes a second sub-isolation portion 720 which is a part of the pixel defining pattern 400 , that is, part of the pixel defining portion 401 is multiplexed into the second sub-isolation portion 720 .
  • the first electrode 110 includes at least one layer of electrodes, and the first sub-isolation part 710 is disposed on the same layer as the layer of electrodes of the first electrode 110 .
  • the first electrode 110 and the first sub-isolation part 710 may both be disposed on the flat layer 500 .
  • the first electrode 110 may include three layers of electrode layers stacked, the three electrode layers sequentially include indium tin oxide (ITO), silver (Ag) and indium tin oxide (ITO), but not limited thereto, may also be sequentially Including titanium (Ti), aluminum (Al) and titanium (Ti), or molybdenum (Mo), aluminum neodymium alloy (AlNd) and indium tin oxide (ITO).
  • the first electrode includes at least one electrode layer
  • the first sub-isolation part includes at least one film layer
  • one film layer of the first sub-isolation part and one electrode layer of the first electrode are arranged on the same layer
  • the pixel defining part configured to separate the first sub-isolation part from the first electrode
  • the material of the first electrode and the electrode layer disposed on the same layer as the first sub-isolation part is the same as the material of the film layer.
  • the first sub-isolation part 710 may be disposed on the same layer as the electrode layer of the first electrode 110 closest to the base substrate 01 .
  • the material of the electrode layer disposed on the same layer as the first sub-isolation part 710 in the first electrode 110 is the same as that of the first sub-isolation part 710 .
  • the material of the first sub-isolation portion 710 may be the same as that of the electrode layer of the first electrode 110 closest to the base substrate 01 , for example, may be indium tin oxide.
  • the size of the protruding portion of the second sub-isolation part 720 relative to the first sub-isolation part 710 may be 0.1 ⁇ 5 ⁇ m.
  • the size of the protruding portion of the second sub-isolation part 720 relative to the first sub-isolation part 710 may be 0.2-1 micron.
  • the thickness ratio of the first sub-isolation part 710 to the light emitting functional layer is 0.7 ⁇ 1.3.
  • the thickness ratio of the first sub-isolation part 710 to the light emitting functional layer is 0.8 ⁇ 1.2.
  • the thickness ratio of the first sub-isolation part 710 to the light emitting functional layer is 0.9 ⁇ 1.2.
  • the thickness of the first sub-isolation 710 can be set relatively small, such as 1000 ⁇ 5000 angstroms, for example, 2000 ⁇ 4000 angstroms, so that the charge formed at the position of the protruding portion 701 of the second sub-isolation 720 generates a layer break. open, but the second electrode 120 at the position of the protruding part 701 is not disconnected, ensuring that the second electrode 120 has better electrical characteristics.
  • the light-emitting functional layer 130 fills in the undercut structure formed by the first sub-isolation 710 and the second sub-isolation 720 after the edge of the isolation part 700 is disconnected, so that the isolation part is disconnected.
  • the charge generation layer try not to disconnect the second electrode to ensure that the second electrode has better electrical characteristics and uniformity of brightness.
  • the embodiments of the present disclosure are not limited thereto, and the thickness of the first sub-isolation part can also be set larger so that the second electrode is disconnected at the position of the undercut structure of the isolation part (similar to the second electrode 120 shown in FIG. 4B ). similar to breaking at undercut structures).
  • the first sub-isolation part 710 is spaced apart from the first electrode 110 .
  • the pixel defining part 401 of the pixel defining pattern 400 is configured to separate the first sub-isolation part 710 from the first electrode 110 .
  • FIG. 28A is a schematic diagram of a partial cross-sectional structure of a display substrate provided according to an example of another embodiment of the present disclosure.
  • the display substrate in the example shown in FIG. 28A is different from the display substrate shown in FIG. 27 in that the material of the first sub-isolation part 710 and the material of the first electrode 110 in the display substrate shown in FIG. 28A are different.
  • the material of the first sub-isolation portion 710 may include any one or more of silicon nitride, silicon oxide, or silicon oxynitride.
  • the base substrate 01 and the organic light emitting element 100 in the display substrate shown in FIG. 28A may have the same features as the base substrate 01 and the organic light emitting element 100 in the embodiment shown in FIGS. 1A to 9B , which will not be repeated here.
  • the other film layers 011 and the planar layer 500 in this example may have the same features as the other film layers 011 in the embodiment shown in FIGS. 1A to 9B , which will not be repeated here.
  • the flat layer 500 in this example may have the same characteristics as the flat layer 500 shown in FIG. 16 to FIG. 26B , which will not be repeated here.
  • the pixel defining pattern 400 in this example may have the same features as the pixel defining pattern 400 shown in FIG. 27 , which will not be repeated here.
  • FIG. 29A to FIG. 29D are schematic flowcharts of a manufacturing method for forming the display substrate before FIG. 27 .
  • the manufacturing method of the display substrate includes: forming a plurality of sub-pixels 100 on the base substrate 01, wherein forming the sub-pixels 100 includes Form the second electrode 120, the light-emitting functional layer 130, and the first electrode 110 stacked in sequence; pattern the inorganic layer pattern on the base substrate 01; form an organic layer on the inorganic layer pattern, and pattern the organic layer to form an opening Pattern 420; the inorganic layer pattern is etched to form the first sub-isolation portion 710, wherein the edge of the opening pattern 420 includes a second sub-isolation portion 720 stacked with the first sub-isolation portion 710, and the first sub-isolation portion 710 The edge of the second sub-isolation portion 720 expands outward relative to the edge of the second sub-isolation portion
  • the light-emitting functional layer 130 is formed on the second sub-isolation 720 , the light-emitting functional layer includes a charge generation layer disconnected at the protrusion 701 of the second sub-isolation 720 .
  • the manufacturing method of a display substrate may include preparing a base substrate 01 on a glass carrier.
  • the base substrate 01 formed in this example may have the same characteristics as the base substrate 01 formed in the display substrate shown in FIG. 4A and FIG. 5A , which will not be repeated here.
  • the process flow for forming other film layers 011 and flat layer 500 on the base substrate 01 can be the same as the process flow for forming other film layers 011 and flat layer 500 in the display substrate shown in FIG. 5A.
  • the process flow for forming other film layers 011 and the flat layer 500 in the display substrate as shown in FIG. 4A may also be the same, and will not be repeated here.
  • an electrode layer is formed on the planarization layer 500 and patterned to form the first electrode 110 and the first sub-isolation pattern 7100 .
  • two first sub-isolation patterns 7100 may be disposed between adjacent first electrodes 110, and the distance between the two first sub-isolation patterns 7100 may be 2-15 micrometers.
  • both the first electrode 110 and the first sub-isolation pattern 7100 include a multi-layered film layer.
  • FIG. 29A both the first electrode 110 and the first sub-isolation pattern 7100 include a multi-layered film layer.
  • the first electrode 110 and the first sub-isolation pattern 7100 each include indium tin oxide (ITO), silver (Ag) and indium tin oxide (ITO) stacked, but not limited thereto. Titanium (Ti), aluminum (Al), and titanium (Ti), or molybdenum (Mo), aluminum neodymium (AlNd), and indium tin oxide (ITO) may be included in order.
  • a mask is used to shield the first electrode 110, and the first sub-isolation pattern 7100 exposed by the mask is etched to retain the first sub-isolation pattern 7100 closest to the substrate.
  • an ITO layer remains after the first sub-isolation pattern 7100 is etched.
  • the etching degree can be controlled to control the thickness of the remaining film layer on one side.
  • the thickness of the layer of indium tin oxide remaining after the etching of the first sub-isolation part pattern 7100 can be 1000-5000 angstroms. While the protruding part of the isolation part is disconnected, the second electrode is not disconnected at the protruding part, so that the second electrode has better electrical characteristics.
  • the inorganic layer pattern 7100 is located between adjacent sub-pixels 100, and the formed opening pattern 420 exposes the inorganic layer pattern 7100 or the edge of the formed opening pattern 420 is in contact with the inorganic layer pattern 7100.
  • the edge of the inorganic layer pattern 7100 is etched so that the edge of the remaining part of the inorganic layer pattern 7100 and the edge of the opening pattern 420 form an undercut structure.
  • the remaining portion of the inorganic layer pattern 7100 is the first sub-isolation part 710 .
  • the pixel defining film is patterned to form a pixel defining pattern 400
  • the spacer layer is patterned to form a spacer 012 .
  • the pixel defining pattern 400 includes a first opening 410 exposing the first electrode 110 and a second opening 420 (also referred to as an opening pattern 420 ).
  • the edge of the second opening 420 may be flush with the edge of the remaining one side film layer of the first sub-isolation pattern 7100 .
  • a first sub-isolation pattern 7100 may also be formed between two adjacent first electrodes 110, and a film layer is etched and left on the first sub-isolation pattern 7100.
  • a pixel-defining pattern 400 having a second opening 420 is formed on the film layer by patterning, the second opening 420 exposes the film layer, and the exposed film layer is wet-etched to form the first sub-isolation portion 710 .
  • the inorganic layer pattern 7100 is wet-etched (the etchant has less influence on the material of the pixel defining portion 401 and the flat layer 500) so that the edge of the opening pattern 420 is relatively opposite to the inorganic layer.
  • the edge of the portion where the pattern 7100 remains forms a protrusion 701 .
  • dry etching may also be performed on the inorganic layer pattern 7100 .
  • the subsequent process flow for forming encapsulation layers 017 - 019 and other film layers may be the same as the process flow for forming encapsulation layers and other film layers in the display substrate shown in FIG. 7 , and will not be repeated here.
  • FIGS. 30A to 30C are schematic flowcharts of a manufacturing method before forming the display substrate shown in FIG. 28A .
  • the manufacturing method of a display substrate may include preparing a base substrate 01 on a glass carrier.
  • the base substrate 01 formed in this example may have the same characteristics as the base substrate 01 formed in the display substrate shown in FIG. 4A and FIG. 5A , which will not be repeated here.
  • the process flow for forming other film layers 011 and flat layer 500 on the base substrate 01 can be the same as the process flow for forming other film layers 011 and flat layer 500 in the display substrate shown in FIG. 5A.
  • the process flow for forming other film layers 011 and the flat layer 500 in the display substrate as shown in FIG. 4A may also be the same, and will not be repeated here.
  • the slope angle of at least part of the side surface of the formed first sub-isolation part to a plane parallel to the contact surface of the first sub-isolation part and the second sub-isolation part is greater than 60 degrees and less than 120 degrees
  • the formed A slope angle of at least part of the side surface of the second sub-isolation part to a plane parallel to the contact surface of the first sub-isolation part and the second sub-isolation part is greater than 60 degrees and less than 120 degrees.
  • an inorganic material layer is formed on the planarization layer 500 and patterned to form a first sub-isolation material 702 .
  • an electrode layer is formed on the first sub-isolation material 702 , and the electrode layer is patterned to form the first electrode 110 .
  • one first sub-isolation material 702 may be disposed between two adjacent first electrodes 110 .
  • the first electrode 110 in this example may have the same features as the first electrode 110 shown in FIG. 29A , which will not be repeated here.
  • the material of the first sub-isolation part 702 is different from the material of the first electrode 110 .
  • the thickness of the first sub-isolation material 702 may be 1000-5000 angstroms.
  • the thickness of the first sub-isolation material 702 can also be set larger so that both the light-emitting functional layer and the second electrode are disconnected at the protruding portion of the subsequently formed isolation portion.
  • the material of the first sub-isolation part 702 may be the same as that of the first electrode 110 , and then the first sub-isolation part material 702 and the first electrode 110 may be formed in the same patterning process.
  • a pixel defining film and a spacer layer are formed on the first sub-isolation material 702 and the first electrode 110, and the pixel defining film is patterned to form a pixel defining pattern. 400 , pattern the spacer layer to form a spacer 012 .
  • the pixel defining pattern 400 includes a first opening 410 exposing the first electrode 110 and a second opening 420 (also referred to as an opening pattern 420 ), and the second opening 420 exposes the first sub-isolation portion.
  • a portion of the material 702 is dry etched on the exposed first sub-isolation material 702 to form a first sub-isolation pattern 7100 .
  • edges of the second opening 420 may be flush with edges of the first sub-isolation pattern 7100 .
  • wet etching is performed on the edge of the first sub-isolation pattern 7100 exposed by the second opening 420 so that the edge of the first sub-isolation pattern 7100 is relatively opposite to the surrounding second opening 420.
  • Edges of the pixel defining portion 401 are retracted to form an undercut structure.
  • an edge of the opening pattern 420 forms a protrusion 701 with respect to an edge of a portion where the inorganic layer pattern 7100 remains.
  • the first sub-isolation part 710 is formed after wet-etching the first sub-isolation part pattern 7100 .
  • the subsequent process flow for forming the encapsulation layer and other film layers may be the same as the process flow for forming the encapsulation layer and other film layers in the display substrate shown in FIG. 7 , and will not be repeated here.
  • FIG. 31 is a schematic diagram of a partial cross-sectional structure of a display substrate provided according to an example of another embodiment of the present disclosure.
  • the display substrate in the example shown in FIG. 31 is different from the display substrate shown in FIG. 27 in that the portion of the first electrode 110 covered by the second sub-isolation 720 includes the first sub-isolation 710 .
  • the base substrate 01 and the organic light emitting element 100 in the display substrate shown in FIG. 31 may have the same features as the base substrate 01 and the organic light emitting element 100 in the embodiment shown in FIGS. 1A to 9B , which will not be repeated here.
  • the other film layers 011 in this example may have the same characteristics as the other film layers 011 in the embodiment shown in FIGS. 1A to 9B , which will not be repeated here.
  • the flat layer 500 in this example may have the same characteristics as the flat layer 500 shown in FIG. 16 to FIG. 26B , which will not be repeated here.
  • the first electrode 110 and the first sub-isolation portion 710 are an integrated structure
  • the pixel defining portion 401 and the second sub-isolation structure 720 are an integrated structure.
  • the first electrode 110 is multiplexed into the first sub-isolation part 710
  • the pixel defining part 401 is multiplexed into the second sub-isolation structure 720 .
  • process can be saved by forming a part of the first electrode and a part of the pixel defining part as the isolation part.
  • the pixel defining pattern 400 includes a first opening 410 configured to expose the first electrode 110 and a second opening 420 exposing a portion of the planarization layer 500 .
  • the pixel defining pattern 400 includes a pixel defining part 401 surrounding the first opening 410 and the second opening 420 .
  • the pixel defining portion 401 located on the first electrode 110 of a sub-pixel extends to the sub-pixel adjacent to the sub-pixel, and the edge of the pixel defining portion 401 is wider than the first electrode 110 of the sub-pixel.
  • the edge of the electrode 110 is closer to the sub-pixel adjacent to the sub-pixel.
  • the distance between the edges of the two first electrodes 110 that are close to each other is greater than the distance between the two pixel defining portions 401 on the two first electrodes 110 that are close to each other. the distance between the edges.
  • Fig. 32 is a schematic diagram of a partial cross-sectional structure of a display substrate provided according to an example of another embodiment of the present disclosure.
  • the difference between the display substrate in the example shown in FIG. 32 and the display substrate shown in FIG. 31 is that a spacer structure 800 is provided between two adjacent protrusions 701 located between two adjacent sub-pixels.
  • the base substrate 01 and the organic light-emitting element 100 in the display substrate shown in FIG. 32 may have the same features as the base substrate 01 and the organic light-emitting element 100 in the embodiment shown in FIGS. 1A to 9B , which will not be repeated here.
  • the other film layers 011 in this example may have the same characteristics as the other film layers 011 in the embodiment shown in FIGS. 1A to 9B , which will not be repeated here.
  • the flat layer 500 in this example may have the same characteristics as the flat layer 500 shown in FIG. 16 to FIG. 26B , which will not be repeated here.
  • a spacer structure 800 is provided between two adjacent protrusions 701 .
  • the spacer structure 800 is spaced apart from the protrusions 701 .
  • the material of the spacer structure 800 and the second sub-isolation 720 is the same.
  • the spacer structure is provided to help reduce the etching amount of the first electrode.
  • the ratio of the thickness of the spacer structure 800 to the thickness of the isolation portion 700 may be 0.8 ⁇ 1.2.
  • the ratio of the thickness of the spacer structure 800 to the thickness of the isolation part 700 may be 0.9 ⁇ 1.1.
  • the thickness of the spacer structure 800 may be the same as that of the isolation part 700 .
  • FIG. 33A to FIG. 33B are schematic flowcharts of a manufacturing method for forming the display substrate before FIG. 31 .
  • the manufacturing method of a display substrate may include preparing a base substrate 01 on a glass carrier.
  • the base substrate 01 formed in this example may have the same characteristics as the base substrate 01 formed in the display substrate shown in FIG. 4A and FIG. 5A , which will not be repeated here.
  • the process flow for forming other film layers 011 and flat layer 500 on the base substrate 01 can be the same as the process flow for forming other film layers 011 and flat layer 500 in the display substrate shown in FIG. 5A.
  • the process flow for forming other film layers 011 and the flat layer 500 in the display substrate as shown in FIG. 4A may also be the same, and will not be repeated here.
  • an electrode layer is formed on the flat layer 500 , and the electrode layer is patterned to form an inorganic layer pattern, the inorganic layer pattern including the first electrode 110 .
  • a pixel defining film and a spacer layer are formed on the first electrode 110, the pixel defining film is patterned to form a pixel defining pattern 400, and the spacer layer is patterned to form spacers. Bedding 012.
  • the pixel defining pattern 400 includes a first opening 410 exposing the first electrode 110 and a second opening 420 (also referred to as an opening pattern 420), the second opening 420 exposes the planar layer 500, and the second opening 420 exposes the planar layer 500.
  • Two openings 420 are located between adjacent sub-pixels. For example, the edge of the second opening 420 may be flush with the edge of the first electrode 110. Referring to FIG.
  • etching the exposed inorganic layer pattern of the second opening 420 includes: etching the part of the first electrode 110 near the edge of the second opening 420 so that the edge of the first electrode 110 An undercut structure is formed with the edge of the second opening 420 .
  • FIG. 34A to FIG. 34B are schematic flowcharts of a manufacturing method for forming the display substrate before FIG. 32 .
  • the manufacturing method of a display substrate may include preparing a base substrate 01 on a glass carrier.
  • the base substrate 01 formed in this example may have the same characteristics as the base substrate 01 formed in the display substrate shown in FIG. 4A and FIG. 5A , which will not be repeated here.
  • the process flow for forming other film layers 011 and flat layer 500 on the base substrate 01 can be the same as the process flow for forming other film layers 011 and flat layer 500 in the display substrate shown in FIG. 5A.
  • the process flow for forming other film layers 011 and the flat layer 500 in the display substrate as shown in FIG. 4A may also be the same, and will not be repeated here.
  • an electrode layer is formed on the flat layer 500 , and the electrode layer is patterned to form an inorganic layer pattern, the inorganic layer pattern including the first electrode 110 .
  • a pixel defining film and a spacer layer are formed on the first electrode 110, the pixel defining film is patterned to form a pixel defining pattern 400, and the spacer layer is patterned to form spacers. Bedding 012.
  • the pixel defining pattern 400 includes a first opening 410 exposing the first electrode 110, a second opening 420 (also referred to as an opening pattern 420) and a spacer structure 800, and the second opening 420 exposes a flat In the layer 500 , the second opening 420 is located between adjacent sub-pixels, and the spacer structure 800 is located in the second opening 420 .
  • the edge of the second opening 420 may be flush with the edge of the first electrode 110 .
  • etching the exposed inorganic layer pattern of the second opening 420 includes: etching the portion of the first electrode 110 near the edge of the second opening 420 so that the edge of the first electrode 110 An undercut structure is formed with the edge of the second opening 420 .
  • the arrangement of multiple sub-pixels in each display substrate shown in Figure 27 to Figure 34B can be the same as the arrangement of multiple sub-pixels in the display substrate shown in Figure 10A to Figure 10E, and can be shown in Figure 27 to Figure 34B
  • the isolation part 700 shown can be located at the position of the groove 210 shown in FIGS. 10A to 10E.
  • the isolation portion 700 shown in FIGS. 27 to 34B replaces the groove 210 shown in FIGS. 10A to 10E .
  • the isolation portion is located in the second opening of the pixel defining pattern, and the pixel defining portion between adjacent sub-pixels may remain.
  • Another embodiment of the present disclosure provides a display device, including the display substrate shown in FIG. 27 to FIG. 34B , by providing an isolation portion between adjacent sub-pixels in the display device, the charge generation layer can be interrupted at the edge of the isolation portion. On, it is beneficial to reduce the probability of crosstalk between adjacent sub-pixels.
  • the display device further includes a cover plate located on the light-emitting side of the display panel.
  • the display device can be a display device such as an organic light-emitting diode display device, and any product or component with a display function such as a TV, a digital camera, a mobile phone, a watch, a tablet computer, a notebook computer, a navigator, etc. that include the display device. Examples are not limited to this.
  • FIG. 35 is a schematic structural diagram of another display substrate provided by an embodiment of the present disclosure.
  • the display substrate includes a base substrate 01 and a plurality of sub-pixels (not shown); a plurality of sub-pixels are located on the base substrate 01, and each sub-pixel includes a light-emitting element; each light-emitting element includes a light-emitting functional layer and
  • the specific structures of the sub-pixels, light-emitting elements, and light-emitting functional layers can be referred to the above-mentioned embodiments, and the present disclosure will not repeat them here.
  • the difference between the embodiment of the present disclosure and the embodiment shown in FIGS. 27 to 34B is that the first sub-isolation portion 710 in this embodiment includes at least two film layers.
  • the display substrate further includes an isolation portion 700, and the isolation portion 700 includes a first sub-isolation portion 710 and a second sub-isolation portion 720 stacked, and the first sub-isolation portion 710 is located on the second sub-isolation portion 720. and the base substrate 01.
  • the first sub-isolation part 710 includes at least two film layers
  • the protruding part 701 protrudes relative to the edge of the film layer closest to the second sub-isolation part 720 among the above-mentioned at least two film layers
  • the at least two film layers include patterns Two different film layers, and/or, at least two film layers include two film layers with different thicknesses.
  • the display substrate 100 further includes a pixel defining pattern 400 ; part of the pixel defining pattern 400 is located on the side of the first electrode away from the base substrate 01 ; the pixel defining pattern 400 includes a plurality of second openings 420 .
  • the second sub-isolation portion 720 includes a concave structure, the concave structure is located at the edge of the first sub-isolation portion 710, and is concave toward the pixel definition pattern 400, and the second sub-isolation portion 720 is the pixel definition pattern 400 a part of.
  • the display substrate can avoid crosstalk between adjacent sub-pixels caused by sub-functional layers with higher conductivity in the light-emitting functional layer.
  • the thickness of the first sub-isolation part 710 in this example is small, and the concave structure formed by the second sub-isolation part 720 is not fully filled.
  • the display substrate can avoid crosstalk between adjacent sub-pixels through the pixel isolation part, the display substrate can increase pixel density while adopting a double-layer light emitting (Tandem EL) design. Therefore, the display substrate can have the advantages of long life, low power consumption, high brightness, and high resolution.
  • Tandem EL double-layer light emitting
  • the orthographic projection of the concave structure on the base substrate 01 overlaps with the orthographic projection of the second sub-isolation portion 720 on the base substrate 01 .
  • FIG. 36 is a schematic structural diagram of another display substrate provided by an embodiment of the present disclosure.
  • the recessed structure includes a residual structure, which may be a film layer 712 in the first sub-isolating portion 710 .
  • the first sub-isolation part 710 includes a film layer 711 and a film layer 712
  • the protruding part 701 protrudes relative to the edge of the film layer 712
  • the patterns of the film layer 711 and the film layer 712 are different.
  • the material of the film layer 712 includes metal materials, metal oxides or inorganic non-metallic materials, such as silver or aluminum, or ITO, IZO, etc.; the film layer 711 can be The structure in which the first electrodes of the light-emitting element have the same layer and the same material may include, for example, a multi-layer structure, such as ITO/Ag/ITO.
  • the thickness of the film layer 711 in this example is relatively small, and the concave structure formed by the second sub-isolation part 720 is not filled, and the film layer 712 fills a part of the concave structure that the film layer 711 does not fill, but the first The sub-isolation part 710 also does not completely fill the concave structure of the second sub-isolation part 720 .
  • FIG. 37 is a schematic structural diagram of another display substrate provided by an embodiment of the present disclosure.
  • the display substrate shown in FIG. 37 provides another pixel isolation structure.
  • the display substrate 100 also includes a pixel defining pattern 400 on the base substrate 01; the pixel defining pattern 400 is partially located on the side of the first electrode 110 away from the base substrate 01; the pixel defining pattern 400 includes a plurality of The first opening 410 and the second opening 420; the plurality of first openings 410 correspond to the plurality of sub-pixels to define the effective light-emitting areas of the plurality of sub-pixels; the first opening 410 is configured to expose the first electrode 110, so that the first electrode 110 is in contact with the subsequently formed light-emitting functional layer 130 .
  • the second opening 420 is located between adjacent first electrodes 110 .
  • the pixel defining portion of the pixel defining pattern 400 may be multiplexed as an isolation portion.
  • the isolation section in this example may only include the second sub-isolation section 720 without including the first sub-isolation section in the above example.
  • at least one film layer of the light emitting functional layer is disconnected at the position where the second sub-isolation part is located. Therefore, by disposing the above-mentioned second sub-isolation portion between adjacent sub-pixels, the display substrate can avoid crosstalk between adjacent sub-pixels caused by sub-functional layers with higher conductivity in the light-emitting functional layer.
  • FIG. 38 is a schematic structural diagram of another display substrate provided by an embodiment of the present disclosure. As shown in FIG. 38 , the first sub-isolation portion 710 is disposed in the concave structure formed by the second sub-isolation portion 720 , and the edge of the second sub-isolation portion 720 extends outward relative to the edge of the first sub-isolation portion 710 .
  • the material of the first sub-isolation 710 includes at least one of metal, metal oxide, and organic matter; the above-mentioned metal can be silver, and the above-mentioned metal oxide can be indium oxide Zinc, the organic substance mentioned above can be a fluorine-based polymer.
  • the material of the first sub-isolation part 710 is a fluorine-based polymer
  • the material of the flat layer includes photoresist, polyimide (PI) resin, acrylic resin, silicon compound or polyacrylic acid Resin material. Therefore, the solvent of the flat layer is mainly composed of non-fluorinated organic solvents.
  • these photoresists may contain a small amount of fluorination, they have not reached the level of being basically soluble in fluorinated liquids or perfluorinated solvents, so they can be used Orthogonal characteristics (the solution and the solvent do not react with each other), the above-mentioned pixel isolation structure can be formed by an etching process.
  • the above-mentioned fluorine-based polymer may be a photosensitive fluorine-based polymer, which is a polymer similar to a negative photoresist, and compared with conventional photoresists, this
  • the fluorine content of the polymer is 40-70%, and it must be dissolved in a perfluorinated solvent such as HFE7100, HFE7500, etc. While perfluorinated solvents cannot dissolve PLN (insufficient fluorine content), and fluorine-based polymers are also insoluble in PLN solvents, these two photoresists and their solvents are orthogonal.
  • R1 is an alkyl group, H, etc.
  • R2 is a fluorine-containing group.
  • 39A-39C are schematic steps of another method for manufacturing a display substrate provided by an embodiment of the present disclosure.
  • the method for manufacturing a display substrate includes:
  • the first electrode 110 and the sacrificial structure 702 are formed on the side of the flat layer 500 away from the base substrate 01 . It should be noted that the above-mentioned residual structure (first sub-isolation portion) may be a part of the sacrificial structure.
  • a pixel defining pattern 400 is formed on the side of the first electrode 110 and the sacrificial structure 430 away from the base substrate 01 .
  • the pixel defining pattern 400 includes a plurality of first openings 410 and second openings 420; the plurality of first openings 410 are provided in one-to-one correspondence with the plurality of first electrodes 110; the first openings 410 are configured to expose the first electrodes 110, so that the second An electrode 110 is in contact with the subsequently formed light-emitting functional layer 130 .
  • the second opening 420 is located between adjacent first electrodes 110 , and the sacrificial structure 430 is partially exposed by the second opening 420 .
  • the display substrate is etched using the pixel defining pattern 400 as a mask to remove the sacrificial structure 430 to form the above-mentioned first sub-isolation portion 710 .
  • FIG. 40 is a schematic structural diagram of another display substrate provided by an embodiment of the present disclosure.
  • the display substrate further includes a protection structure 240 located on the flat layer 500 and disposed on the same layer as the first electrode 110 ; the first sub-isolation portion 710 is disposed on the side of the protection structure 240 away from the base substrate 01 , And located at the edge of the protection structure 240 .
  • the protection structure 240 can protect the planar layer 500 during the etching process used to fabricate the first sub-isolation part 710 , preventing the planar layer 500 from being etched.
  • the display substrate further includes a light emitting functional layer 130 and a second electrode 120; side. Due to the effect of the isolation part, the luminescent functional layer 130 will be disconnected at the position where the isolation part is located, and a fracture will be formed; at this time, the second electrode 120 formed subsequently can be connected with the protection structure 240 through the fracture, and the protection structure 240 can act as to the role of the auxiliary electrode.
  • the second electrode is an electrode shared by multiple sub-pixels to provide cathode signals to multiple sub-pixels; even if some of the second electrodes in the entire display substrate are disconnected due to the pixel isolation structure or other reasons, the protection structure serves as an auxiliary
  • the electrodes may connect the disconnected portions of the second electrode to other portions.
  • 41A-41C are schematic steps of another method for manufacturing a display substrate provided by an embodiment of the present disclosure.
  • the method for manufacturing a display substrate includes:
  • the first electrode 110 , the protection structure 240 and the sacrificial structure 430 are formed on the side of the flat layer 500 away from the base substrate 01 , and the protection structure 240 and the first electrode 110 are arranged on the same layer.
  • the material of the protection structure 240 is the same as that of the first electrode 110 , and the material of the protection structure 240 is different from that of the sacrificial structure 430 .
  • a pixel defining pattern 400 is formed on a side of the first electrode 110 and the sacrificial structure 430 away from the base substrate 01 .
  • the pixel defining pattern 400 includes a plurality of first openings 410 and second openings 420; the plurality of first openings 410 are provided in one-to-one correspondence with the plurality of first electrodes 110; the first openings 410 are configured to expose the first electrodes 110, so that the second An electrode 110 is in contact with the subsequently formed light-emitting functional layer 130 .
  • the second opening 420 is located between adjacent first electrodes 110 , and the sacrificial structure 430 is partially exposed by the second opening 420 .
  • the display substrate is etched using the pixel defining pattern 400 as a mask to remove the sacrificial structure 430 to form the above-mentioned first sub-isolation portion 710 .
  • the light emitting functional layer 130 and the second electrode 120 are formed on the side of the first electrode 110 , the pixel defining pattern 400 and the protection structure 240 away from the base substrate 01 . Due to the effect of the isolation part, the luminescent functional layer 130 will be disconnected at the position where the isolation part is located, and a fracture will be formed; at this time, the second electrode 120 formed subsequently can be connected with the protection structure 240 through the fracture, and the protection structure 240 can act as to the role of the auxiliary electrode.
  • the second electrode is an electrode shared by a plurality of sub-pixels to provide cathode signals to the plurality of sub-pixels; even if part of the second electrodes in the entire display substrate are disconnected due to the pixel isolation structure or other reasons, the protection structure
  • the disconnected parts of the second electrode can be connected to other parts as auxiliary electrodes.

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Abstract

一种显示基板及其制作方法、以及显示装置。该显示基板包括子像素以及绝缘层。子像素包括有机发光元件，有机发光元件包括发光功能层。显示基板还包括遮挡部，遮挡部的材料与绝缘层的材料不同，且绝缘栅的厚度大于遮挡部的厚度；绝缘层包括凹槽，凹槽和遮挡部均位于相邻子像素之间，遮挡部位于凹槽边缘且在排列方向上向凹槽内突出以形成向凹槽开口内突出的突出部；或者，遮挡部侧表面具有第一坡度角，凹槽侧表面具有第二坡度角，第一坡度角和第二坡度角至少之一大于60度，发光功能层包括的多个膜层的至少一层在凹槽处断开。通过在显示基板中相邻子像素之间设置凹槽以及向凹槽内突出的遮挡部，可以使得发光功能层的至少一层在凹槽处断开。

Description

显示基板及其制作方法、以及显示装置
本申请要求于2021年11月30日递交的中国专利申请第202111450707.9号的优先权，在此全文引用上述中国专利申请公开的内容以作为本申请的一部分。
技术领域
本公开至少一个实施例涉及一种显示基板及其制作方法、以及显示装置。
背景技术
随着显示技术的发展，用户对显示装置的性能要求越来越高。通过将相邻子像素之间的用于发光的材料层隔断以降低信号串扰的方式可以尽量满足显示装置高亮度和低功耗的性能需求。
发明内容
本公开至少一个实施例提供一种显示基板及其制作方法、以及显示装置。
本公开至少一个实施例提供一种显示基板，包括：衬底基板，至少包括第一显示区域；多个子像素，位于所述衬底基板上的第一显示区域，至少部分子像素中的每个子像素包括发光元件，所述发光元件包括发光功能层以及沿垂直于所述衬底基板的方向位于所述发光功能层两侧的第一电极和第二电极，所述第一电极位于所述发光功能层与所述衬底基板之间，所述发光功能层包括多个膜层；绝缘层，位于所述衬底基板上。所述显示基板还包括遮挡部，位于所述绝缘层远离所述衬底基板的一侧，且所述遮挡部在所述衬底基板上的正投影与所述绝缘层在所述衬底基板上的正投影有交叠；所述绝缘层包括多个凹槽，所述凹槽和所述遮挡部至少部分位于相邻子像素之间，所述遮挡部与所述绝缘层远离所述衬底基板一侧表面中构成所述凹槽边缘的部分在所述衬底基板上的投影有交叠，且向所述凹槽开口内突出以形成突出部，或者，所述遮挡部的至少部分侧表面与平行于所述绝缘层远离所述衬底基板一侧表面的平面的坡度角为第一坡度角，所述凹槽的至少部分侧表面与平行于所述绝缘层远离所述衬底基板一侧表面的平面的坡度角为第二坡度角，所述第一坡度角与所述第二坡度角的至少之一大于60度；所述绝缘层的材料与所述遮挡部的材料不同，且 沿垂直于所述衬底基板的方向，所述绝缘层与所述遮挡部在衬底基板上投影交叠的至少部分的厚度大于所述遮挡部的厚度；所述发光功能层的多个膜层中的至少一层在所述凹槽处断开。
例如，根据本公开实施例，所述子像素中，所述发光功能层包括层叠设置的第一发光层、电荷产生层以及第二发光层，所述电荷产生层位于所述第一发光层与所述第二发光层之间，所述电荷产生层在所述遮挡部的至少部分边缘处断开。
例如，根据本公开实施例，所述第二电极在所述遮挡部的至少部分边缘处断开。
例如，根据本公开实施例，所述绝缘层位于所述第一电极与所述衬底基板之间。
例如，根据本公开实施例，所述绝缘层包括有机层。
例如，根据本公开实施例，所述凹槽位于所述有机层中，所述凹槽的深度与所述有机层平坦部分的厚度比为0.1～1。
例如，根据本公开实施例，所述第一电极包括至少一层膜层，所述遮挡部与所述第一电极的至少一层膜层同层设置。
例如，根据本公开实施例，显示基板还包括：像素限定图案，位于所述绝缘层远离所述衬底基板的一侧，至少位于所述第一显示区域的所述像素限定图案包括多个第一开口，一个所述子像素对应至少一个第一开口，所述子像素的发光元件至少部分位于所述子像素对应的第一开口中，且所述第一开口被配置为暴露所述第一电极。所述像素限定图案还包括多个第二开口，所述第二开口暴露所述凹槽的至少一部分。
例如，根据本公开实施例，所述绝缘层包括像素限定图案，至少位于所述第一显示区域的所述像素限定图案包括多个第一开口，一个所述子像素对应至少一个第一开口，所述子像素的发光元件至少部分位于所述子像素对应的第一开口中，且所述第一开口被配置为暴露所述第一电极。
例如，根据本公开实施例，所述凹槽包括在垂直于所述衬底基板的方向贯穿所述像素限定图案的像素限定部的第二开口；或者，所述凹槽的深度与所述像素限定图案的像素限定部的平坦部分的厚度比大于等于0.2，且小于1。
例如，根据本公开实施例，所述遮挡部位于所述像素限定图案的像素限定部远离所述衬底基板的一侧。
例如，根据本公开实施例，所述多个子像素包括多个第一颜色子像素、多个第二颜色子像素以及多个第三颜色子像素，所述多个第一颜色子像素和所述多个第三颜色子像素沿平行于所述衬底基板的第一方向和第二方向均交替设置以形成多个第一像素行和多个第一像素列，所述多个第二颜色子像素沿所述第一方向和所述第二方向均阵列排布以形成多个第二像素行和多个第二像素列，所述多个第一像素行和所述多个第二像素行沿所述第二方向交替设置且在所述第一方向上彼此错开，所述多个第一像素列和所述多个第二像素列沿所述第一方向交替设置且在所述第二方向上彼此错开；所述凹槽包括环状凹槽，所述环状凹槽围绕一个第一颜色子像素、一个第二颜色子像素或者一个第三颜色子像素。
例如，根据本公开实施例，至少部分环状凹槽包括至少一个缺口，所述遮挡部在所述衬底基板上的正投影位于所述凹槽的垂直于其在所述衬底基板上的正投影的延伸方向的两侧。
例如，根据本公开实施例，沿垂直于所述凹槽的所述正投影延伸方向，所述遮挡部向所述凹槽内突出的所述突出部在所述衬底基板上的正投影的尺寸与该遮挡部在所述衬底基板上的正投影的尺寸之比为0.005～0.5。
例如，根据本公开实施例，相邻子像素之间设置有沿该相邻两个子像素的排列方向排列的多个遮挡部，相邻子像素之间设置的多个遮挡部中的相邻两个遮挡部之间设置有一个凹槽，且位于所述凹槽边缘两侧的两个遮挡部均向所述凹槽内突出。
例如，根据本公开实施例，相邻子像素之间设置有至少一个凹槽。
例如，根据本公开实施例，显示基板还包括：数据线，位于所述绝缘层与所述衬底基板之间；以及电源线，位于所述绝缘层与所述衬底基板之间，所述电源线的至少部分与所述数据线同层设置。沿垂直于所述衬底基板的方向，所述凹槽与所述数据线和所述电源线的至少之一交叠。
例如，根据本公开实施例，所述绝缘层的材料包括有机材料，所述遮挡部的材料包括无机非金属材料或者金属材料。
例如，根据本公开实施例，所述凹槽内包括所述发光功能层中的至少部分膜层以及所述第二电极。
例如，根据本公开实施例，显示基板还包括：封装层，位于所述发光元件远离所述衬底基板的一侧。所述封装层包括层叠设置的第一封装层、第二封装 层以及第三封装层，所述第一封装层位于所述第二封装层与所述衬底基板之间，所述第一封装层和所述第二封装层的至少部分位于所述凹槽内。
例如，根据本公开实施例，沿垂直于所述衬底基板的方向，所述第二封装层在所述凹槽位置处的厚度大于所述第二封装层在所述发光元件的发光区位置处的厚度。
例如，根据本公开实施例，所述凹槽的至少部分边界和与其紧邻的子像素的发光区的边界轮廓大致相同。
例如，根据本公开实施例，沿一方向，该方向垂直于所述凹槽的所述正投影的延伸方向且平行于所述衬底基板，位于所述凹槽边缘两侧的两个遮挡部的尺寸相同，且所述两个遮挡部向所述凹槽内突出的尺寸相同。
例如，根据本公开实施例，所述凹槽在所述衬底基板上的正投影的延伸方向与所述数据线和所述电源线的至少之一的延伸方向不同。
例如，根据本公开实施例，所述衬底基板还包括第二显示区域，所述第一显示区域围绕所述第二显示区域的至少部分。
本公开实施例提供一种显示装置，包括上述显示基板。
本公开实施例提供一种显示基板的制作方法，包括：在衬底基板上形成多个子像素，其中，形成所述子像素包括在垂直于所述衬底基板的方向上依次形成层叠设置的第一电极、发光功能层以及第二电极；在所述衬底基板上形成绝缘层；在所述绝缘层上形成遮挡部材料层，并对所述遮挡部材料层图案化形成多个遮挡部，其中，所述遮挡部位于相邻子像素之间，且相邻子像素之间设置有沿该相邻子像素的排列方向排列的至少两个遮挡部；对所述绝缘层进行刻蚀形成凹槽，其中，所述凹槽的开口边缘相对于所述相邻两个遮挡部彼此靠近的边缘向外扩展以使所述遮挡部包括在所述排列方向上向所述凹槽内突出的突出部；或者，所述遮挡部的至少部分侧表面与平行于所述绝缘层远离所述衬底基板一侧表面的平面的坡度角为第一坡度角，所述凹槽的至少部分侧表面与平行于所述绝缘层远离所述衬底基板一侧表面的平面的坡度角为第二坡度角，所述第一坡度角与所述第二坡度角的至少之一大于60度。所述绝缘层的材料与所述遮挡部的材料不同，且沿垂直于所述衬底基板的方向，所述绝缘层与所述遮挡部在衬底基板上投影交叠的至少部分的厚度大于所述遮挡部的厚度；所述发光功能层在形成所述凹槽后形成，所述发光功能层包括多个膜层，所述多个膜层中的至少一层在所述凹槽处断开。
例如，根据本公开实施例，形成所述第一电极包括：在形成所述绝缘层之后且在形成所述凹槽之前，在所述绝缘层上形成电极层，并对所述电极层图案化以形成所述第一电极。
例如，根据本公开实施例，所述绝缘层包括像素限定图案，形成所述第一电极包括：在形成所述像素限定图案之前，在所述衬底基板上形成电极层，并对所述电极层图案化以形成所述第一电极；形成所述像素限定图案包括：在所述第一电极上形成像素限定膜；以及对所述像素限定膜化以形成暴露所述第一电极的第一开口以及所述凹槽，所述第一开口被配置为限定所述子像素的发光区。
附图说明
为了更清楚地说明本公开实施例的技术方案，下面将对实施例的附图作简单地介绍，显而易见地，下面描述中的附图仅仅涉及本公开的一些实施例，而非对本公开的限制。
图1A为根据本公开实施例的一示例提供的显示基板的局部截面结构示意图；
图1B为根据本公开实施例的另一示例提供的显示基板的局部截面结构示意图；
图1C为根据本公开实施例提供的显示基板的平面图；
图2为根据本公开实施例的另一示例提供的显示基板的局部截面结构示意图；
图3为根据本公开实施例的另一示例提供的显示基板的局部截面结构示意图；
图4A为形成图2之前的显示基板的示意图；
图4B为形成图2之后的显示基板的示意图；
图5A至图5D为形成图3之前的显示基板的制作方法流程示意图；
图6为根据本公开实施例的另一示例提供的显示基板的局部截面结构示意图；
图7为图6所示显示基板的基础上包括发光功能层及其远离衬底基板一侧的多层膜层的示意图；
图8为根据本公开实施例的另一示例提供的显示基板的局部截面结构示意 图；
图9A至图9B为形成图8之前的显示基板的制作方法流程示意图；
图10A至图10E为根据本公开实施例的提供的显示基板的平面结构示意图；
图11A为根据本公开另一实施例的一示例提供的显示基板的局部截面结构示意图；
图11B为根据本公开另一实施例的另一示例提供的显示基板的局部截面结构示意图；
图12为根据本公开另一实施例的一示例提供的显示基板的局部截面结构示意图；
图13A至图13F为形成图11A之前的显示基板的制作方法流程示意图；
图14为根据本公开另一实施例的一示例提供的显示基板的局部截面结构示意图；
图15A至图15B为形成图14之前的显示基板的制作方法流程示意图；
图16为根据本公开另一实施例的一示例提供的显示基板的局部截面结构示意图；
图17A至图17B为形成图16之前的显示基板的制作方法流程示意图；
图18为根据本公开另一实施例的一示例提供的显示基板的局部截面结构示意图；
图19A至图19B为形成图18之前的显示基板的制作方法流程示意图；
图20为根据本公开另一实施例的一示例提供的显示基板的局部截面结构示意图；
图21A至图21B为形成图20之前的显示基板的一种制作方法流程示意图；
图22A至图22C为形成图20之前的显示基板的另一种制作方法流程示意图；
图23为根据本公开另一实施例的一示例提供的显示基板的局部截面结构示意图；
图24为形成图23之前的显示基板的一种制作方法流程示意图；
图25为根据本公开另一实施例的一示例提供的显示基板的局部截面结构示意图；
图26A至图26B为形成图25之前的显示基板的一种制作方法流程示意图；
图27为根据本公开另一实施例的一示例提供的显示基板的局部截面结构示意图；
图28A为根据本公开另一实施例的一示例提供的显示基板的局部截面结构示意图；
图28B为根据本公开另一实施例的另一示例提供的显示基板的局部截面结构示意图；
图29A至图29D为形成图27之前的显示基板的一种制作方法流程示意图；
图30A至图30C为形成图28A所示显示基板之前的一种制作方法流程示意图；
图31为根据本公开另一实施例的一示例提供的显示基板的局部截面结构示意图；
图32为根据本公开另一实施例的一示例提供的显示基板的局部截面结构示意图；
图33A至图33B为形成图31之前的显示基板的一种制作方法流程示意图；
图34A至图34B为形成图32之前的显示基板的一种制作方法流程示意图；
图35为本公开一实施例提供的另一种显示基板的结构示意图；
图36为本公开一实施例提供的另一种显示基板的结构示意图；
图37为本公开一实施例提供的另一种显示基板的结构示意图；
图38为本公开一实施例提供的另一种显示基板的结构示意图；
图39A-图39C为本公开一实施例提供的另一种显示基板的制作方法的步骤示意图；
图40为本公开一实施例提供的另一种显示基板的结构示意图；以及
图41A-图41C为本公开一实施例提供的另一种显示基板的制作方法的步骤示意图。
具体实施方式
为使本公开实施例的目的、技术方案和优点更加清楚，下面将结合本公开实施例的附图，对本公开实施例的技术方案进行清楚、完整地描述。显然，所描述的实施例是本公开的一部分实施例，而不是全部的实施例。基于所描述的本公开的实施例，本领域普通技术人员在无需创造性劳动的前提下所获得的所有其它实施例，都属于本公开保护的范围。
除非另外定义，本公开使用的技术术语或者科学术语应当为本公开所属领域内具有一般技能的人士所理解的通常意义。本公开中使用的“第一”、“第二”以及类似的词语并不表示任何顺序、数量或者重要性，而只是用来区分不同的组成部分。“包括”或者“包含”等类似的词语意指出现该词前面的元件或者物件涵盖出现在该词后面列举的元件或者物件及其等同，而不排除其他元件或者物件。
本公开实施例中使用的“平行”、“垂直”以及“相同”等特征均包括严格意义的“平行”、“垂直”、“相同”等特征，以及“大致平行”、“大致垂直”、“大致相同”等包含一定误差的情况，考虑到测量和与特定量的测量相关的误差(例如，测量系统的限制)，表示在本领域的普通技术人员所确定的对于特定值的可接受的偏差范围内。例如，“大致”能够表示在一个或多个标准偏差内，或者在所述值的10％或者5％内。在本公开实施例的下文中没有特别指出一个成分的数量时，意味着该成分可以是一个也可以是多个，或可理解为至少一个。“至少一个”指一个或多个，“多个”指至少两个。本公开实施例中的“同层”指同一材料在经过同一步骤(例如一步图案化工艺)后形成的多个膜层之间的关系。这里的“同层”并不总是指多个膜层的厚度相同或者多个膜层在截面图中的高度相同。
在研究中，本申请的发明人发现：发光功能层可以包括层叠设置的多层发光层，该多层发光层中的至少两层之间设置有电荷产生层(CGL)，电荷产生层的导电率较大，在电荷产生层为整面膜层时，相邻两个有机发光元件的电荷产生层是连续膜层，容易使得相邻子像素之间产生串扰。
本公开至少一个实施例提供一种显示基板及其制作方法、以及显示装置。该显示基板包括衬底基板以及位于衬底基板上的多个子像素以及绝缘层。子像素位于衬底基板上的第一显示区域，每个子像素包括有机发光元件，有机发光元件包括发光功能层以及沿垂直于衬底基板的方向位于发光功能层两侧的第一电极和第二电极，第一电极位于发光功能层与衬底基板之间，发光功能层包括多个膜层。显示基板还包括遮挡部，位于绝缘层远离衬底基板的一侧，且遮挡部在衬底基板上的正投影与绝缘层在衬底基板上的正投影有交叠；所述绝缘层包括多个凹槽，所述凹槽和所述遮挡部至少部分位于相邻子像素之间，所述遮挡部与所述绝缘层远离衬底基板一侧表面中构成所述凹槽边缘的部分在衬底基板上的投影有交叠，且向所述凹槽开口内突出以形成突出部，或者，所述 遮挡部的至少部分侧表面与平行于所述绝缘层远离所述衬底基板一侧表面的平面的坡度角为第一坡度角，所述凹槽的至少部分侧表面与平行于所述绝缘层远离所述衬底基板一侧表面的平面的坡度角为第二坡度角，所述第一坡度角与所述第二坡度角的至少之一大于60度；所述绝缘层的材料与所述遮挡部的材料不同，且沿垂直于所述衬底基板的方向，所述绝缘层与所述遮挡部在衬底基板上投影交叠的至少部分的厚度大于所述遮挡部的厚度；所述发光功能层的多个膜层中的至少一层在所述凹槽处断开。本公开实施例通过在显示基板中相邻子像素之间设置凹槽以及向凹槽内突出的遮挡部，可以使得发光功能层的多个膜层的至少一层在遮挡部边缘处断开，有利于降低相邻子像素之间产生串扰的几率。
下面结合附图对本公开实施例提供的显示基板及其制作方法、以及显示装置进行描述。
图1A为根据本公开实施例的一示例提供的显示基板的局部截面结构示意图，图1B为根据本公开实施例的另一示例提供的显示基板的局部截面结构示意图，图1C为根据本公开实施例提供的显示基板的平面图。如图1A至图1C所示，显示基板包括位于衬底基板01上的第一显示区A1和第一显示区A2。例如，第一显示区域A1围绕第二显示区域A2的至少部分。例如，图1B示出的第二显示区域A2位于衬底基板01的顶部正中间位置，例如呈矩形的第一显示区域A1的四侧可以均围绕第二显示区域A2，即第二显示区域A2可以被第一显示区域A1包围。例如，该第二显示区域A2也可以不位于图1B所示衬底基板01的顶部正中间位置处，而是位于其他位置。例如，第二显示区域A2可以位于衬底基板01的左上角位置或右上角位置处。例如，第一显示区域A1可以为非透光显示区，第二显示区域A2可以为透光显示区，由此显示基板无需进行挖孔处理就可以将感光传感器等所需硬件结构直接设置于第二显示区域A2内，为实现全面屏提供基础。
如图1A至图1C所示，显示基板包括衬底基板01、位于衬底基板01上的第一显示区域A1的多个子像素10以及位于衬底基板01上的绝缘层200。例如，绝缘层200的材料可以包括有机材料，绝缘层200可以为有机层。
如图1A至图1C所示，子像素10包括有机发光元件100，有机发光元件100包括发光功能层130以及沿垂直于衬底基板01的方向位于发光功能层130两侧的第一电极110和第二电极120，第一电极110位于发光功能层130与衬 底基板01之间，发光功能层130包括多个膜层，例如发光功能层130包括电荷产生层133。
如图1A至图1C所示，显示基板还包括遮挡部300，位于绝缘层200远离衬底基板01的一侧，且遮挡部300在衬底基板01上的正投影与绝缘层200在衬底基板01上的正投影有交叠。遮挡部300的材料与绝缘层200的材料不同。例如，遮挡部300的材料包括无机非金属材料或者金属材料。
如图1A至图1C所示，绝缘层200包括多个凹槽210，沿垂直于衬底基板01的方向，绝缘层200除凹槽210位置以外的部分的厚度大于遮挡部300的厚度。绝缘层200与所述遮挡部300在衬底基板01上投影交叠的至少部分的厚度大于所述遮挡部300的厚度。
如图1B所示，凹槽210和遮挡部300至少部分位于相邻子像素10之间，且相邻子像素10之间设置有沿该相邻子像素10的排列方向排列且彼此间隔的至少两个遮挡部300，遮挡部300位于凹槽210边缘且在该排列方向上向凹槽210内突出以形成覆盖凹槽开口的一部分的突出部310。上述排列方向可以大致是相邻子像素的发光区中心连线或最近距离连线的延伸方向，或者相邻子像素的发光区沿X方向分布，上述方向就是X方向。
如图1C所示，遮挡部300的至少部分侧表面与平行于所述绝缘层200远离所述衬底基板01一侧表面的平面的坡度角为第一坡度角，所述凹槽210的至少部分侧表面与平行于所述绝缘层200远离所述衬底基板01一侧表面的平面的坡度角为第二坡度角，所述第一坡度角与所述第二坡度角的至少之一大于60度。
如图1C所示，遮挡部300的至少部分侧表面与平行于遮挡部300和绝缘层200的接触面的平面的坡度角为第一坡度角，凹槽210的至少部分侧表面与平行于遮挡部300和绝缘层200的接触面的平面的坡度角为第二坡度角，第一坡度角与第二坡度角的至少之一大于60度。例如，第一坡度角与第二坡度角的至少之一为60～120度。例如，第一坡度角与第二坡度角的至少之一为70～110度。例如，第一坡度角与第二坡度角的至少之一为80～100度。例如，第一坡度角与第二坡度角的至少之一大于70度。例如，第一坡度角与第二坡度角的至少之一大于80度。例如，第一坡度角与第二坡度角的至少之一大于70度。例如，第一坡度角与第二坡度角的至少之一大于80度。例如，第一坡度角与第二坡度角的至少之一大于90度。
上述第一坡度角可以为遮挡部远离衬底基板一侧的表面与遮挡部的侧表面之间的夹角，也可以为遮挡部面向衬底基板一侧的表面与遮挡部的侧表面之间的夹角；上述第二坡度角可以为绝缘层远离衬底基板一侧的表面与凹槽的侧表面之间的夹角。上述遮挡部的侧表面可以指遮挡部的与衬底基板之间具有一定夹角的表面，上述凹槽的侧表面可以指凹槽的侧壁，该侧壁与衬底基板之间具有一定夹角。
图1B和图1C所示示例区别在于遮挡部300与凹槽210的侧壁的位置关系以及角度关系。
如图1A至图1C所述，发光功能层130的至少一层膜层在遮挡部300的至少部分边缘处断开。
本公开实施例在显示基板中相邻子像素之间设置凹槽以及遮挡部，通过调节遮挡部与凹槽边缘的相对位置关系，或者遮挡部侧表面的角度以及凹槽侧壁的角度，可以使得发光功能层的至少一层膜层在遮挡部相对于凹槽的边缘突出的突出部处断开，或者在遮挡部与凹槽侧壁的边缘处断开，有利于降低相邻子像素之间产生串扰的几率。
例如，在绝缘层200和遮挡部300的材料均为透光材料时，绝缘层200的折射率小于遮挡部的折射率。例如，在垂直于衬底基板01的方向，遮挡部300可以与后续描述的像素电路中的某一晶体管交叠，以起到遮光作用。
本公开任一实施例中的“相邻子像素”指两个子像素之间没有设置其他子像素。
例如，如图1A所示，多个子像素10可以包括沿X方向排列的相邻两个子像素10。例如，该相邻两个子像素10中设置的多个遮挡部300沿X方向排列。例如，相邻两个子像素10之间设置的遮挡部300在沿X方向上相对于凹槽210的边缘向凹槽210内突出以形成突出部310，遮挡部300中的突出部310悬空设置，突出部310遮挡了凹槽210的开口的边缘部分，遮挡部300中除突出部310外的部分与绝缘层200远离衬底基板01一侧的表面贴合。例如，突出部310沿平行于衬底基板01的方向延伸。例如，突出部310在绝缘层200上的正投影位于凹槽210内。
例如，如图1A所示，位于相邻两个子像素10中的一个遮挡部300与该相邻两个子像素10之一的距离小于与该相邻两个子像素10中另一个的距离；相邻两个子像素10中，距离该遮挡部300距离较近的子像素10为子像素P1，该 遮挡部300中的突出部310比该遮挡部300的其他部分更远离子像素P1，凹槽210的中心位于该遮挡部300远离子像素P1的一侧。
例如，如图1A所示，发光功能层130可以包括层叠设置的第一发光层(EML)131、电荷产生层(CGL)133以及第二发光层132，电荷产生层133位于第一发光层131与第二发光层132之间。电荷产生层具有较强的导电性，可以使得发光功能层具有寿命长、功耗低以及可实现高亮度的优点，例如，相对于没有设置电荷产生层的发光功能层，子像素通过在发光功能层中设置电荷产生层可以将发光亮度提高近一倍。
例如，上述包括电荷产生层的子像素采用了Tandem技术，使用N/P-CGL作为异质结，将两层发光层串联，该技术实现了双发光器件串联，在相同发光强度下，极大地降低了发光器件的发光电流，提升了有机发光元件的寿命，有利于应用于车载等高寿命新技术。
例如，各子像素10中，发光功能层130还可以包括空穴注入层(HIL)、空穴传输层(HTL)、电子传输层(ETL)和电子注入层(EIL)。例如，空穴注入层、空穴传输层、电子传输层、电子注入层以及电荷产生层133均为多个子像素10的共用膜层，可以称为共通层。例如，发光功能层130中在凹槽的边缘处断开的至少一层膜层可以为上述共通层中的至少一层膜层。通过将上述共通层中的至少一层膜层在位于相邻子像素之间的凹槽的边缘处断开，可以有利于降低相邻子像素之间产生串扰的几率。
例如，第二发光层132可以位于第一发光层131与第二电极120之间，空穴注入层可以位于第一电极110与第一发光层131之间。例如，电荷产生层133与第一发光层131之间还可以设置电子传输层。例如，第二发光层132与电荷产生层133之间可以设置空穴传输层。例如，第二发光层132与第二电极120之间可以设置电子传输层和电子注入层。
例如，同一个子像素10中，第一发光层131和第二发光层132可以为发射相同颜色光的发光层。例如，发不同颜色光的子像素10中的第一发光层131(或第二发光层132)发射不同颜色光。当然，本公开实施例不限于此，例如，同一子像素10中，第一发光层131和第二发光层132可以为发射不同颜色光的发光层，通过在同一子像素10中设置发射不同颜色光的发光层可以使得子像素10包括的多层发光层发射的光混合为白光，通过设置彩膜层来调节每个子像素出射光的颜色。
例如，相邻子像素10中，位于电荷产生层133同一侧的发光层可以彼此间隔设置，也可以在两个子像素10之间的间隔处交叠或者相接，本公开实施例对此不作限制。
例如，相邻子像素的第一发光层131(第二发光层132)可以在凹槽210内交叠。但不限于此，例如，相邻子像素的第一发光层131(第二发光层132)可以在凹槽210内间隔设置；或者，凹槽210内可以仅设置相邻子像素中的一个子像素的第一发光层131(第二发光层132)。
例如，电子传输层的材料可以包括芳族杂环化合物，例如苯并咪唑衍生物、咪唑并吡啶衍生物、苯并咪唑并菲啶衍生物等咪唑衍生物；嘧啶衍生物、三嗪衍生物等嗪衍生物；喹啉衍生物、异喹啉衍生物、菲咯啉衍生物等包含含氮六元环结构的化合物(也包括在杂环上具有氧化膦系的取代基的化合物)等。
例如，电荷产生层133的材料可以是含有磷氧基团的材料，也可以是含有三嗪的材料。
例如，在上述相邻两个子像素10之间的绝缘层200没有设置凹槽210，且绝缘层200上没有设置遮挡部300时，该相邻两个子像素10的发光功能层130中的至少一层膜层可能连接或者为整层膜层。通过在相邻子像素之间设置凹槽以及遮挡部，该相邻两个子像素的发光功能层中至少一个膜层(如电荷产生层)间隔设置，可以增加相邻子像素之间发光功能层的电阻，从而在降低该相邻两个子像素之间产生串扰的几率的同时，又不影响子像素的正常显示。
本公开实施例提供的显示基板中，通过在该相邻两个子像素之间的有机层设置凹槽，且在该凹槽的边缘设置相对于凹槽的边缘向内突出的遮挡部，可以使得形成在遮挡部向凹槽内突出的突出部处的电荷产生层断开，此时，该相邻两个子像素的发光功能层中至少一个膜层(如电荷产生层)间隔设置，可以增加相邻子像素之间发光功能层的电阻，从而在降低该相邻两个子像素之间产生串扰的几率的同时，又不影响子像素的正常显示。
例如，第二发光层132与第一电极110之间的膜层均在遮挡部300的突出部310处断开。
例如，凹槽210的深度大于发光功能层130的厚度，发光功能层130包括的所有膜层均在突出部310处断开。例如，凹槽210内可以设置有发光功能层130的部分膜层以及第二电极120。例如，凹槽210内可以设置有发光功能层130的所有膜层以及第二电极120。
例如，发光功能层130中至少一层在衬底基板01上的第一正投影是连续的，且在垂直于衬底基板01的平面上的第二正投影不连续；或者，发光功能层130中至少一层在衬底基板01上的第一正投影与在垂直于衬底基板01的平面上的第二正投影均不连续，且第一正投影中不连续位置处的间隔的宽度小于第二正投影中不连续位置处的间隔的宽度。
例如，发光功能层130中至少一层可以为电荷产生层133，电荷产生层133在衬底基板01上的第一正投影是连续的，且在垂直于衬底基板01的平面上的第二正投影不连续。例如，电荷产生层133可以包括位于凹槽210内的部分以及没有位于凹槽210内的部分，这两部分在凹槽210的边缘处断开。例如，这两部分在衬底基板01上的第一正投影可以相接或者交叠，第一正投影是连续的。例如，这两部分与衬底基板01之间的距离不同，则这两部分在XY面上的第二正投影是不连续的。
例如，发光功能层130中至少一层可以为电荷产生层133，电荷产生层133在衬底基板01上的第一正投影与在垂直于衬底基板01的平面上的第二正投影均不连续，且第一正投影中不连续位置处的间隔的宽度小于第二正投影中不连续位置处的间隔的宽度。例如，电荷产生层133可以包括位于凹槽210内的部分以及没有位于凹槽210内的部分，这两部分在限定结构300的边缘处断开。例如，这两部分在衬底基板01上的第一正投影之间设置有间隔，第一正投影是断开的。例如，这两部分与衬底基板01之间的距离不同，则这两部分在XY面上的第二正投影是不连续的，两部分在XY面上的第二正投影之间设置有间隔。
例如，如图1A所示，绝缘层200位于第一电极110与衬底基板01之间。
例如，衬底基板01的材料可以由玻璃、聚酰亚胺、聚碳酸酯、聚丙烯酸酯、聚醚酰亚胺、聚醚砜中的一种或多种材料制成，本实施例包括但不限于此。
例如，绝缘层200包括有机层。例如，有机层包括平坦(PLN，Planarization)层。例如，第一电极110与有机层远离衬底基板01的表面接触。例如，凹槽210位于有机层中，凹槽210的深度与有机层的平坦部分的厚度比大于等于0.2，且小于1。例如，凹槽210位于平坦层中，凹槽210的深度与平坦层的厚度比为0.2～0.9。例如，凹槽210的深度与平坦层的厚度比为0.3～0.8。例如，凹槽210的深度与平坦层的厚度比为0.4～0.7。例如，凹槽210的深度与平坦层的厚度比为0.5～0.6。上述平坦层的厚度可以指平坦层最大厚度位置处的厚度，也可 以指平坦层中除凹槽以及过孔位置外的最小厚度位置处的厚度，还可以指平坦层的平均厚度。例如，平坦层的厚度可以为1.5微米，凹槽210的深度可以为0.5微米。
例如，平坦层的材料包括树脂、亚克力或聚对苯二甲酸乙二醇酯、聚酰亚胺、聚酰胺、聚碳酸酯、环氧树脂等中的一种或几种的组合等。
例如，如图1A所示，多个子像素10中的第二电极120可以为多个子像素10共用的公共电极，在上述相邻两个子像素10之间的绝缘层200没有设置凹槽210，且绝缘层200上没有设置遮挡部300时，第二电极120为整层膜层；在该相邻两个子像素10之间的绝缘层200设置凹槽210，且在该凹槽210的边缘设置相对于凹槽210的边缘向内突出的遮挡部300时，发光功能层130和第二电极120均在遮挡部300的突出部310处断开。
例如，第二电极210在衬底基板01上的正投影是连续的。例如，第二电极120在垂直于衬底基板01上的正投影可以是不连续的。
例如，凹槽210的深度可以大于发光功能层130的厚度以使发光功能层130和第二电极120均在遮挡部300的突出部310处断开。例如，凹槽210的深度也可以设置的较小，以使发光功能层130在遮挡部300的突出部310处断开，而第二电极120没有在突出部310处断开。
例如，遮挡部300的材料可以包括氮化硅、氧化硅或者氮氧化硅中的任意一种或多种。例如，遮挡部300的材料还可以采用金属或者合金、金属氧化物、金属硫化物或金属氮化物等无机材料，本实施对此不作限制。例如，金属氧化物可以包括氧化钙、氧化锌、氧化铜、二氧化钛、二氧化锡等；金属硫化物可以包括硫化铁、硫化铜、硫化锌、二硫化锡等；金属氮化物可以包括氮化硅、氮化铝等，本实施例包括但不限于此。
例如，如图1A所示，沿X方向，遮挡部300向凹槽210内突出的突出部310的尺寸与该遮挡部300的尺寸之比可以为0.005～0.5。例如，沿X方向，遮挡部300向凹槽210内突出的突出部310的尺寸与该遮挡部300的尺寸之比可以为0.01～0.45。例如，沿X方向，遮挡部300向凹槽210内突出的突出部310的尺寸与该遮挡部300的尺寸之比可以为0.05～0.4。例如，沿X方向，遮挡部300向凹槽210内突出的突出部310的尺寸与该遮挡部300的尺寸之比可以为0.1～0.35。例如，沿X方向，遮挡部300向凹槽210内突出的突出部310的尺寸与该遮挡部300的尺寸之比可以为0.2～0.3。例如，遮挡部300向凹槽210 内突出的突出部310的尺寸可以在0.1～5微米的范围内。例如，遮挡部300向凹槽210内突出的突出部310的尺寸可以在0.2～2微米的范围内。
例如，如图1A所示，显示基板还包括像素限定图案400，位于第一电极110远离衬底基板01的一侧，至少位于第一显示区域A1的像素限定图案400包括多个第一开口410，一个子像素对应至少一个第一开口410，子像素的发光元件至少部分位于子像素对应的第一开口410中，且第一开口410被配置为暴露第一电极110。例如，第一电极110的至少部分位于像素限定图案400与衬底基板01之间。例如，当发光功能层130形成在像素限定图案400的第一开口410中时，位于发光功能层130两侧的第一电极110和第二电极120能够驱动像素限定图案400的第一开口410中的发光功能层130进行发光。例如，上述发光区可以指子像素有效发光的区域，发光区的形状指二维形状，例如发光区的形状可以与像素限定图案400的第一开口410的形状相同。
例如，像素限定图案400除第一开口410外的部分包括像素限定部，像素限定部的材料可以包括聚酰亚胺、亚克力或聚对苯二甲酸乙二醇酯等。
例如，如图1A所示，像素限定部覆盖遮挡部300的至少一部分。例如，像素限定部没有覆盖遮挡部300的突出部310。
例如，如图1A所示，沿平行于衬底基板01的方向，遮挡部300与第一电极110之间设置有像素限定部，即像素限定部可以将遮挡部300与第一电极110分隔开。
例如，第一电极110包括至少一层膜层，遮挡部300与第一电极110的一层膜层同层设置。例如，第一电极110中的一层膜层的材料与遮挡部300的材料相同。例如，第一电极包括至少一层膜层，遮挡部与第一电极的至少一层膜层同层设置。例如，遮挡部与第一电极的至少一层膜层设置在同一膜层的同一表面。
例如，第一电极110可以为阳极，第二电极120可以为阴极。例如，阴极可由高导电性和低功函数的材料形成，例如，阴极可采用金属材料制成。例如，阳极可由具有高功函数的透明导电材料形成。
例如，遮挡部300可以和与其距离最近的第一电极110中最靠近衬底基板01一侧的一层膜层为一体化结构。例如，通过将第一电极沿例如图1A所示的X方向的尺寸设置的较长以包括延伸至凹槽210边缘的突出部310，可以节省图案化制作遮挡部的图案化工艺。
例如，沿图1A所示的X方向，第一电极110的尺寸可以大于像素限定部的尺寸。例如，第一电极110可以包括被第一开口410暴露的部分，被像素限定部覆盖的部分以及延伸至凹槽210的边缘内的突出部310。
例如，如图1A所示，沿相邻子像素10的排列方向(如图中的X方向)，位于该相邻子像素10的发光区中心之间的像素限定部称为第一像素限定部，位于该相邻子像素10的发光区中心两侧的像素限定部称为第二像素限定部，第一像素限定部沿X方向的尺寸可以小于第二像素限定部沿X方向的尺寸，从而可以增大两个第一像素限定部之间的距离，以在这两个第一像素限定部之间设置凹槽210以及遮挡部300。
例如，如图1A所示，像素限定图案400还包括第二开口420，第二开口420被配置为暴露至少部分凹槽210。例如，第二开口420可以暴露部分遮挡部300。例如，第二开口420可以完全暴露凹槽210。
例如，如图1A所示，沿X方向，两个遮挡部300彼此靠近的边缘(即突出部310彼此靠近的边缘)之间的距离小于凹槽210的开口。
例如，如图1A所示，凹槽210被平行于XY面所截的截面可以包括三条直边围成的具有开口的图形，其中相交的两条直边可以形成直角、锐角或者钝角；凹槽210被平行于XY面所截的截面可以包括弧形边围成的具有开口的图形，沿与图1A所示的Y方向的箭头所指方向相反的方向，该图形的沿X方向的尺寸可以逐渐增大，或者先增大再减小。
例如，如图1A所示，绝缘层200与衬底基板01之间设置有其他膜层011，该其他膜层011可以包括栅极绝缘层、层间绝缘层、像素电路(例如包括薄膜晶体管、存储电容等结构)中的各膜层、数据线、栅线、电源信号线、复位电源信号线、复位控制信号线、发光控制信号线等膜层或者结构。例如，其他膜层011中仅包括一层电源信号线。例如，绝缘层200面向衬底基板01的一侧表面可以与层间绝缘层接触。
例如，图2为根据本公开实施例的另一示例提供的显示基板的局部截面结构示意图。图2所示的衬底基板01、绝缘层200、遮挡部300、其他膜层011、有机发光元件包括的各膜层可以与图1A所示显示基板中相应的结构相同，在此不再赘述。例如，如图2所示，有机发光元件的第一电极110可以通过贯穿绝缘层200的过孔与像素电路中的薄膜晶体管的源极和漏极之一连接。例如，像素电路还包括存储电容014。
例如，如图2所示，像素限定图案400的像素限定部上还设置有隔垫物012，用于支撑制作发光层的蒸镀掩模板。
例如，如图2所示，遮挡部300在衬底基板01上的正投影完全位于像素限定部在衬底基板01上的正投影内。例如，像素限定部覆盖了遮挡部300的突出部310。
例如，如图2所示，像素限定图案400的像素限定部覆盖了部分凹槽210的开口，像素限定图案400的第二开口420仅暴露了凹槽210的部分开口。
例如，如图2所示，位于相邻子像素之间的两个遮挡部300之间的距离可以为2～15微米。例如，位于相邻子像素之间的两个遮挡部300之间的距离可以为5～10微米。例如，位于相邻子像素之间的两个遮挡部300之间的距离可以为3～7微米。例如，位于相邻子像素之间的两个遮挡部300之间的距离可以为4～12微米。
例如，图1A至图2所示的其他膜层011中可以包括一层源漏金属层SD层(即数据线和电源信号线所在膜层)，也可以包括两层源漏金属层SD1和SD2层(例如，其他膜层可以包括两层电源信号线，这两层电源信号线可以电连接)。
例如，图3为根据本公开实施例的另一示例提供的显示基板的局部截面结构示意图。图3所示的衬底基板01、遮挡部300、有机发光元件包括的各膜层、隔垫物012可以与图2所示显示基板中相应的结构相同，在此不再赘述。例如，如图3所示，像素限定图案400的像素限定部在衬底基板01上的正投影可以与遮挡部300在衬底基板01上的正投影没有交叠。例如，像素限定图案400的第二开口420可以完全暴露遮挡部300。
例如，如图3所示，相邻子像素之间可以设置两个凹槽210，每个凹槽210的开口在X方向的两侧均设置遮挡部300。当然，本公开实施例不限于相邻子像素之间凹槽的数量为一个或者两个，还可以为三个或者更多个，可以根据相邻子像素之间的距离以及凹槽的尺寸对凹槽的数量进行设置。
例如，如图3所示，相邻两个凹槽210之间的两个遮挡部300可以间隔设置。本公开实施例不限于此，相邻两个凹槽210之间的距离较小时，也可以在该相邻两个凹槽210之间设置一个遮挡部300，且该遮挡部300的两端向两个凹槽210的开口延伸以形成两个突出部310。
例如，如图3所示，在相邻两个子像素之间设置两个凹槽210时，位于两个凹槽210两侧的两个遮挡部300的至少之一也可以为该相邻两个子像素的两 个第一电极110的至少之一的一部分，例如，第一电极110的一部分被像素限定图案400的第一开口410暴露以用于驱动发光功能层发光，第一电极110的另一部分被像素限定图案400的第二开口420暴露且延伸至凹槽210的开口边缘以用于断开电荷产生层133，从而节省工艺步骤。
例如，如图3所示，显示基板包括位于第一电极110与衬底基板01之间的第一导电层图案015和第二导电层图案016，第一导电层图案015位于衬底基板01与第二导电层图案016之间。例如，第一导电层图案015可以包括数据线和第一电源信号线，第二导电层图案016可以包括第二电源信号线，第一电源信号线与第二电源信号线电连接。例如，数据线被配置为与像素电路电连接，以为像素电路提供数据信号data，第一电源信号线与像素电路电连接，以为像素电路提供电源信号vdd。
例如，沿垂直于衬底基板01的方向，凹槽210与第一导电层图案015交叠。例如，沿垂直于衬底基板01的方向，凹槽210与数据线和电源线的至少之一交叠。例如，凹槽210在衬底基板01上的正投影的延伸方向与数据线和电源线的至少之一的延伸方向不同。例如，数据线的延伸方向可以为图10A所示的V方向或者U方向。例如，电源线的延伸方向可以为图10A所示的V方向或者U方向。
例如，如图3所示，凹槽210被平行于XY面所截的截面可以包括弧形边围成的具有开口的图形，沿与图3所示的Y方向的箭头所指方向相反的方向，该图形的沿X方向的尺寸可以先增大再减小。
例如，如图3所示，子像素中的第一发光层131和第二发光层132的沿平行于衬底基板01的方向的尺寸可以设置的较小，第一发光层131和第二发光层132可以没有延伸至凹槽210的开口边缘。
例如，图4A为形成图2之前的显示基板的示意图，图4B为形成图2之后的显示基板的示意图，图5A至图5D为形成图3之前的显示基板的制作方法流程示意图。例如，如图2-3、图4A以及图5A至图5D所示，显示基板的制作方法包括在衬底基板01上形成多个子像素，其中，形成子像素包括在垂直于衬底基板01的方向上依次形成层叠设置的第一电极110、发光功能层130以及第二电极120；在衬底基板01上形成绝缘层200；在绝缘层200上形成遮挡部材料层，并对遮挡部材料层图案化形成多个遮挡部300，其中，遮挡部300位于相邻子像素之间，且相邻子像素之间设置有沿该相邻子像素的排列方向排 列的至少两个遮挡部300；对绝缘层200进行刻蚀形成凹槽210。凹槽210的开口边缘相对于相邻两个遮挡部300彼此靠近的边缘向外扩展以使遮挡部300包括在排列方向上向凹槽210内突出的突出部310；或者，遮挡部300的至少部分侧表面与平行于遮挡部300和绝缘层200的接触面的平面的坡度角为第一坡度角，凹槽210的至少部分侧表面与平行于遮挡部300和绝缘层200的接触面的平面的坡度角为第二坡度角，第一坡度角与第二坡度角的至少之一大于60度。
绝缘层200的材料与遮挡部300的材料不同，且沿垂直于衬底基板01的方向，绝缘层200除凹槽210位置以外的部分的厚度大于遮挡部300的厚度。例如，绝缘层200的材料可以包括有机材料，遮挡部材料层可以为无机非金属材料层或者金属材料层。
发光功能层130在形成凹槽210后形成，发光功能层130包括多个膜层，多个膜层中的至少一层在遮挡部300靠近凹槽210的边缘处断开。
例如，在形成绝缘层200之后且在形成凹槽210之前，制作方法还包括：在绝缘层200上形成电极层，并对电极层图案化以形成第一电极110。
例如，如图2和图4A所示，显示基板的制作方法可以包括在玻璃载板上制备衬底基板01。例如，衬底基板01可以为柔性衬底基板。例如，形成衬底基板01可以包括在玻璃载板上依次形成叠设的第一柔性材料层、第一无机材料层、半导体层、第二柔性材料层和第二无机材料层。第一柔性材料层、第二柔性材料层的材料采用聚酰亚胺(PI)、聚对苯二甲酸乙二酯(PET)或经表面处理的聚合物软膜等材料。第一无机材料层、第二无机材料层的材料采用氮化硅(SiNx)或氧化硅(SiOx)等，用于提高衬底基板的抗水氧能力，第一无机材料层、第二无机材料层也称之为阻挡(Barrier)层。半导体层的材料采用非晶硅(a-si)。例如，以叠层结构PI1/Barrier1/a-si/PI2/Barrier2为例，其制备过程包括：先在玻璃载板上涂布一层聚酰亚胺，固化成膜后形成第一柔性(PI1)层；随后在第一柔性层上沉积一层阻挡薄膜，形成覆盖第一柔性层的第一阻挡(Barrier1)层；然后在第一阻挡层上沉积一层非晶硅薄膜，形成覆盖第一阻挡层的非晶硅(a-si)层；然后在非晶硅层上再涂布一层聚酰亚胺，固化成膜后形成第二柔性(PI2)层；然后在第二柔性层上沉积一层阻挡薄膜，形成覆盖第二柔性层的第二阻挡(Barrier2)层，最终完成衬底基板01的制备。
例如，如图2和图4A所示，在衬底基板01上形成其他膜层011包括在衬 底基板01上形成驱动结构层。驱动结构层包括多个驱动电路，每个驱动电路包括多个晶体管013和至少一个存储电容014，例如驱动电路可以采用2T1C、3T1C或7T1C设计。例如，形成驱动结构层可以包括在衬底基板01上依次沉积第一绝缘薄膜和有源层薄膜，通过构图工艺对有源层薄膜进行构图，形成覆盖整个衬底基板01的第一绝缘层0111，以及设置在第一绝缘层0111上的有源层图案0112，有源层图案0112至少包括第一有源层。
例如，如图2和图4A所示，依次沉积第二绝缘薄膜和第一金属薄膜，通过构图工艺对第一金属薄膜进行构图，形成覆盖有源层图案的第二绝缘层0113，以及设置在第二绝缘层0113上的第一栅金属层图案0114，第一栅金属层图案0114至少包括第一栅电极0131和第一电容电极。
例如，如图2和图4A所示，依次沉积第三绝缘薄膜和第二金属薄膜，通过构图工艺对第二金属薄膜进行构图，形成覆盖第一栅金属层的第三绝缘层0115，以及设置在第三绝缘层0115上的第二栅金属层图案0116，第二栅金属层图案0116至少包括第二电容电极，第二电容电极的位置与第一电容电极的位置相对应。
随后，沉积第四绝缘薄膜，通过构图工艺对第四绝缘薄膜进行构图，形成覆盖第二栅金属层的第四绝缘层0117，第四绝缘层0117上开设有至少两个第一过孔，两个第一过孔内的第四绝缘层0117、第三绝缘层0115和第二绝缘层0113被刻蚀掉，暴露出有源层图案0112的第一有源层的表面。
随后，沉积第三金属薄膜，通过构图工艺对第三金属薄膜进行构图，在第四绝缘层0117上形成源漏金属层图案，源漏金属层图案至少包括位于显示区域的第一源电极0132和第一漏电极0133。第一源电极0132和第一漏电极0133可以分别通过第一过孔与有源层图案0112中的第一有源层连接。
例如，如图2和图4A所示，在驱动电路中，有源层图案0112中的第一有源层、第一栅电极0131、第一源电极0132和第一漏电极0133可以组成一晶体管013，第一电容电极和第二电容电极可以组成一存储电容014。在上述制备过程中，可以同时形成绿色子像素的驱动电路以及蓝色子像素的驱动电路。
例如，如图2和图4A所示，第一绝缘层、第二绝缘层、第三绝缘层和第四绝缘层采用硅氧化物(SiOx)、硅氮化物(SiNx)和氮氧化硅(SiON)中的任意一种或更多种，可以是单层、多层或复合层。第一绝缘层0111称之为缓冲(Buffer)层，用于提高衬底基板01的抗水氧能力；第二绝缘层0113和第 三绝缘层0115称之为栅绝缘(GI，Gate Insulator)层；第四绝缘层0117称之为层间绝缘(ILD，Interlayer Dielectric)层。第一金属薄膜、第二金属薄膜和第三金属薄膜采用金属材料，如银(Ag)、铜(Cu)、铝(Al)、钛(Ti)和钼(Mo)中的任意一种或更多种，或上述金属的合金材料，如铝钕合金(AlNd)或钼铌合金(MoNb)，可以是单层结构，或者多层复合结构，如Ti/Al/Ti等。有源层薄膜采用非晶态氧化铟镓锌材料(a-IGZO)、氮氧化锌(ZnON)、氧化铟锌锡(IZTO)、非晶硅(a-Si)、多晶硅(p-Si)、六噻吩、聚噻吩等一种或多种材料，即本公开适用于基于氧化物(Oxide)技术、硅技术以及有机物技术制造的晶体管。
例如，如图2和图4A所示，在形成前述图案的衬底基板01上形成绝缘层200，例如平坦层。例如，在形成前述图案的衬底基板01上涂覆有机材料的平坦薄膜，形成覆盖整个衬底基板01的平坦(PLN，Planarization)层200，并通过掩膜、曝光、显影工艺，在显示区域的平坦层200上形成多个第二过孔。多个第二过孔内的平坦层200被显影掉，分别暴露出多个子像素的驱动电路的晶体管013的第一漏电极0133的表面。
例如，如图2和图4A所示，在平坦层200上形成无机材料层，并对无机材料层图案化形成遮挡部300。例如，遮挡部300的材料可以包括氮化硅、氧化硅或者氮氧化硅中的任意一种或多种。
例如，如图2和图4A所示，在本公开实施例的一示例中，在形成遮挡部300后，在平坦层200上图案化形成子像素的第一电极110。例如，第一电极110通过平坦层200中的第二过孔与晶体管013的第一漏电极0133连接。
例如，如图2和图4A所示，第一电极110可以采用金属材料，如镁(Mg)、银(Ag)、铜(Cu)、铝(Al)、钛(Ti)和钼(Mo)中的任意一种或更多种，或上述金属的合金材料，如铝钕合金(AlNd)或钼铌合金(MoNb)，可以是单层结构，或者多层复合结构，如Ti/Al/Ti等，或者，是金属和透明导电材料形成的堆栈结构，如ITO/Ag/ITO、Mo/AlNd/ITO等反射型材料。
当然，本公开实施例不限于遮挡部300形成后，再形成第一电极110；第一电极110也可以在遮挡部300形成前形成。
例如，在本公开实施例的另一示例中，遮挡部300可以与第一电极110采用同一步图案化工艺形成。例如，在绝缘层200上形成材料层，对该材料层图案化可以同时形成遮挡部300和第一电极110。例如，第一电极110和遮挡部 300可以均为单层结构。例如，第一电极110可以为多层复合结构，如ITO/Ag/ITO，遮挡部300可以为单层结构，遮挡部300的材料可以与第一电极110的一层膜层的材料相同，如ITO。例如，第一电极110和遮挡部300可以均为单层结构，遮挡部300的材料与第一电极110的材料相同。
例如，遮挡部300的材料可以为ITO，遮挡部300的厚度可以为
Figure PCTCN2022124055-appb-000001
可以使有机发光功能层130阻隔断，而第二电极120保持连续不被隔断，从而起到防止相邻子像素间串扰的作用，同时第二电极不隔断又保证了显示的均一性。
例如，如图2和图4A所示，在形成第一电极110和遮挡部300后，可以形成像素限定图案400。例如，在形成前述图案的衬底基板01上涂覆像素限定薄膜，通过掩膜、曝光、显影工艺，形成像素限定图案400。例如，显示区域的像素限定图案400包括多个像素限定部，相邻像素限定部之间形成有多个第一开口410和第二开口420，第一开口410和第二开口420内的像素限定膜被显影掉，分别暴露出多个子像素的第一电极110的至少部分表面以及绝缘层200。
例如，如图2和图4A所示，像素限定图案400的像素限定部可以完全覆盖遮挡部300。但不限于此，像素限定图案400的像素限定部也可以覆盖部分遮挡部300，或者像素限定图案400的像素限定部也可以不覆盖遮挡部300。
例如，如图2和图4A所示，形成像素限定图案400后，可以在像素限定部上形成隔垫物012。例如，在形成前述图案的衬底基板01上涂覆有机材料薄膜，通过掩膜、曝光、显影工艺，形成隔垫物012。隔垫物012可以作为支撑层，配置为在蒸镀过程中支撑FMM(高精度掩膜板)。
例如，如图2和图4A所示，在形成隔垫物012后，可以对除第二开口420外的部分采用掩模遮挡以对第二开口420内的绝缘层200进行干刻以形成凹槽210，遮挡部300的边缘与凹槽210的边缘形成了底切(undercut)结构，此时，遮挡部300包括向凹槽210内突出的突出部310。
例如，如图2和图4B所示，在形成凹槽210之后，依次形成发光功能层130以及第二电极120。例如，第二电极120可以为透明阴极。发光功能层130可以通过透明阴极从远离衬底基板010一侧出光，实现顶发射。例如，第二电极120可以采用镁(Mg)、银(Ag)、铝(Al)中的任意一种或更多种，或采用上述金属中任意一种或多种制成的合金，或者采用透明导电材料，例如，氧 化铟锡(ITO)，或者，金属与透明导电材料的多层复合结构。
例如，在形成第二电极120以后，形成显示基板包括：采用开口掩膜板(Open Mask)依次蒸镀形成空穴注入层和空穴传输层；采用FMM依次蒸镀形成发不同颜色光的第一发光层131，例如蓝色发光层、绿色发光层和红色发光层；采用开口掩膜板依次蒸镀电子传输层、电荷产生层133、以及空穴传输层；采用FMM依次蒸镀形成发不同颜色光的第二发光层132，例如蓝色发光层、绿色发光层和红色发光层；采用开口掩膜板依次蒸镀电子传输层、第二电极以及光耦合层。例如，空穴注入层、空穴传输层、电子传输层、电荷产生层、第二电极以及光耦合层均为多个子像素的共通层。
例如，如图4B所示，形成的发光功能层130会在遮挡部300的突出部310处断开，使得一部分发光功能层130位于遮挡部300边缘，另一部分发光功能层130沉积到凹槽210内。例如，如图4B所示，形成的第二电极120会在遮挡部300的突出部310处断开，使得一部分第二电极120位于遮挡部300边缘，另一部分第二电极120沉积到凹槽210内。
例如，如图2和图4B所示，形成第二电极120以后，显示基板的制作方法还包括形成封装层，封装层可以包括叠设的第一封装层017、第二封装层018和第三封装层019。第一封装层017采用无机材料，在显示区域覆盖第二电极120。第二封装层018采用有机材料。第三封装层019采用无机材料，覆盖第一封装层017和第二封装层018。然而，本实施例对此并不限定。例如，封装层也可以采用无机/有机/无机/有机/无机的五层结构。例如，第一封装层017和第二封装层018均填充凹槽210。例如，沿垂直于衬底基板01的方向，第二封装层018在凹槽210位置处的厚度大于第二封装层018在发光元件的发光区位置处的厚度。
例如，如图3、图5A至图5D所示，本示例形成的显示基板与图2、图4A-图4B所示显示基板不同之处在于，本示例中的显示基板包括两层源漏金属层图案015和016(第一导电层图案015和第二导电层图案016)。
例如，如图3、图5A至图5D所示，在形成绝缘层200后，显示基板的制作方法包括在绝缘层200远离衬底基板01的一侧表面图案化形成多个遮挡部300；形成遮挡部300后，图案化形成第一电极110。本示例示意性的示出遮挡部300和第一电极110的材料不同，且通过两步图案化工艺形成，但不限于此，例如，在形成绝缘层200后，显示基板的制作方法可以包括在绝缘层200远离 衬底基板01的一侧表面采用一步图案化工艺形成多个遮挡部300以及多个第一电极110。
例如，如图3、图5A至图5D所示，在形成第一电极110后，可以形成像素限定图案400。例如，在形成前述图案的衬底基板01上涂覆像素限定薄膜，通过掩膜、曝光、显影工艺，形成像素限定图案400。例如，显示区域的像素限定图案400包括多个像素限定部，相邻像素限定部之间形成有多个第一开口410和第二开口420，第一开口410和第二开口420内的像素限定膜被显影掉，分别暴露出多个子像素的第一电极110的至少部分表面、遮挡部300以及部分绝缘层200。
例如，如图3、图5A至图5D所示，像素限定图案400的像素限定部可以与遮挡部300没有交叠。但不限于此，像素限定图案400的像素限定部也可以覆盖部分遮挡部300，或者像素限定图案400的像素限定部完全覆盖遮挡部300。
例如，如图3、图5A至图5D所示，形成像素限定图案400后，可以在像素限定部上形成隔垫物012，隔垫物012的形成方法可以与图4B所示方法相同，在此不再赘述。
例如，如图3、图5A至图5D所示，在形成隔垫物012后，可以第二开口420外的部分采用掩模遮挡以对第二开口420内的绝缘层200进行干刻形成凹槽210，遮挡部300的边缘与凹槽210的边缘形成了底切(undercut)结构，此时，遮挡部300包括向凹槽210内突出的突出部310。
例如，如图3、图5A至图5D所示，在形成凹槽210之后，依次形成发光功能层130以及第二电极120。例如，形成的发光功能层130会在遮挡部300的突出部310处断开，使得一部分发光功能层130位于遮挡部300边缘，另一部分发光功能层130沉积到凹槽210内。例如，形成的第二电极120也会在遮挡部300的突出部310处断开，使得一部分第二电极120位于遮挡部300边缘，另一部分第二电极120沉积到凹槽210内。
例如，图6为根据本公开实施例的另一示例提供的显示基板的局部截面结构示意图，图7为图6所示显示基板的基础上包括发光功能层及其远离衬底基板一侧的多层膜层的示意图。图6和图7所示示例中的显示基板中的衬底基板01、其他膜层011、发光功能层130、第二电极120、隔垫物012以及封装层等膜层可与图2、图4A至图4B所示的衬底基板01、其他膜层011、发光功能层 130、第二电极120、隔垫物012以及封装层等膜层具有相同的特征，在此不再赘述。图6所示示例中的显示基板与图1A至图5D所示的显示基板的不同之处在于图6所示的绝缘层200包括像素限定图案400，即像素限定图案400包括凹槽210，而平坦层500不包括凹槽210。
例如，如图6和图7所示，沿X方向，凹槽210的尺寸可以小于第一开口410的尺寸。
例如，如图6和图7所示，遮挡部300位于像素限定图案400远离衬底基板01的一侧。例如，如图6和图7所示，凹槽210包括贯穿像素限定图案400的像素限定部的第二开口420。但不限于此，例如，凹槽210的深度与像素限定图案400中的像素限定部的平坦部分的厚度比大于等于0.2，且小于1。例如，凹槽210的深度与像素限定图案400中的像素限定部的平坦部分的厚度比可以为0.1～1。例如，凹槽210的深度与像素限定图案400中的像素限定部的厚度比可以为0.2～0.9。例如，凹槽210的深度与像素限定图案400中的像素限定部的厚度比可以为0.3～0.8。例如，凹槽210的深度与像素限定图案400中的像素限定部的厚度比可以为0.4～0.7。例如，凹槽210的深度与像素限定图案400中的像素限定部的厚度比可以为0.5～0.6。本公开实施例中像素限定部的厚度可以指像素限定部的平均厚度，但不限于此，也可以指像素限定部厚度最大位置处的厚度，或者厚度最小位置处的厚度。
例如，像素限定图案400中的凹槽210的深度可以大于发光功能层130的厚度以使发光功能层130和第二电极120均在遮挡部300的突出部310处断开。例如，凹槽210的深度也可以设置的较小，以使发光功能层130在遮挡部300的突出部310处断开，而第二电极120没有在突出部310处断开。
例如，如图6和图7所示，隔垫物012可以覆盖遮挡部300的一部分。但不限于此，例如，隔垫物012可以覆盖遮挡部300的全部，或者隔垫物012也可以与遮挡部300没有交叠。
例如，如图6和图7所示，第一电极110与发光功能层130之间设置有导电层140，导电层140的材料与遮挡部300的材料相同。例如，导电层140的材料可以与第一电极110的材料相同。例如，位于第一电极110与发光功能层130之间的导电层140可与第一电极110电连接，以与第一电极110共同起到激发发光功能层发光的作用。
当然，本公开实施例不限于此，第一电极110与发光功能层130之间还可 以不设置任何膜层，第一电极110与发光功能层130接触。
例如，导电层140和遮挡部300的材料可以包括金属材料(如钛、铝、银等)或者金属氧化物(如氧化铟锡)等。
例如，图8为根据本公开实施例的另一示例提供的显示基板的局部截面结构示意图。图8所示示例中的显示基板中的衬底基板01、其他膜层011可与图3所示的衬底基板01、其他膜层011具有相同的特征，在此不再赘述。图8所示示例中的显示基板与图1A至图5D所示的显示基板的不同之处在于图8所示的绝缘层200包括像素限定图案400，即像素限定图案400包括凹槽210，而平坦层500不包括凹槽210。图8所示的位于像素限定图案400中的凹槽210可以与图3所示平坦层中的凹槽210具有相同的形状、尺寸等特征，在此不再赘述。
例如，如图8所示，沿X方向，凹槽210的尺寸可以小于第一开口410的尺寸。
例如，如图8所示，遮挡部300位于像素限定图案400远离衬底基板01的一侧。例如，如图8所示，凹槽210的深度与像素限定图案400中的像素限定部的厚度比可以为0.2～0.9。例如，凹槽210的深度与像素限定图案400中的像素限定部的厚度比可以为0.4～0.7。例如，凹槽210的深度与像素限定图案400中的像素限定部的厚度比可以为0.5～0.6。本公开实施例中像素限定部的厚度可以指像素限定部的平均厚度，但不限于此，也可以指像素限定部厚度最大位置处的厚度，或者厚度最小位置处的厚度。
本示例中，凹槽210可以不是贯穿像素限定部的开口，以防止对平坦层进行刻蚀而影响到第二导电层图案016。
例如，图9A至图9B为形成图8之前的显示基板的制作方法流程示意图。例如，如图8至图9B所示，显示基板的制作方法包括在衬底基板01上形成多个子像素，其中，形成子像素包括在垂直于衬底基板01的方向上依次形成层叠设置的第一电极110、发光功能层130以及第二电极120；在衬底基板01上形成绝缘层200；在绝缘层200上形成遮挡部材料层，并对遮挡部材料层图案化形成多个遮挡部300，其中，遮挡部300位于相邻子像素之间，且相邻子像素之间设置有沿该相邻子像素的排列方向排列且彼此间隔的至少两个遮挡部300；对绝缘层200进行刻蚀形成凹槽210。凹槽210的开口边缘相对于相邻两个遮挡部300彼此靠近的边缘向外扩展以使遮挡部300包括在排列方向上向凹 槽210内突出的突出部310。在形成凹槽210后，在绝缘层200上形成发光功能层130，发光功能层130包括电荷产生层133，电荷产生层133在遮挡部300的突出部310处断开。
例如，如图8至图9B所示，形成绝缘层200之前，制作方法还包括：在衬底基板01上形成电极层，并对电极层图案化以形成第一电极110；形成绝缘层200包括：在第一电极110上形成像素限定膜(即绝缘层200)；以及对像素限定膜图案化以形成暴露第一电极110的第一开口410以及凹槽210，第一开口410被配置为限定子像素的发光区。
例如，如图8至图9B所示，形成第一开口410以后，在绝缘层200上形成隔垫物012。
例如，如图8至图9B所示，形成隔垫物012以后，在绝缘层200上形成遮挡部材料层，并对遮挡部材料层图案化形成遮挡部300。例如，遮挡部300的材料可以包括氮化硅、氧化硅或者氮氧化硅中的任意一种或多种。
例如，如图8至图9B所示，形成遮挡部300后，将掩模覆盖遮挡部300以外的区域以对相邻遮挡部300之间的绝缘层200进行干刻以形成凹槽210，遮挡部300的边缘与凹槽210的边缘形成了底切(undercut)结构，此时，遮挡部300包括向凹槽210内突出的突出部310。
例如，图10A至图10E为根据本公开实施例的提供的显示基板的平面结构示意图。上述图1A至图9B所示实施例中的凹槽210和遮挡部300构成隔断结构，用于隔断发光功能层130中的电荷产生层133。
例如，如图10A至图10E所示，多个子像素10包括多个第一颜色子像素101、多个第二颜色子像素102以及多个第三颜色子像素103。例如，第一颜色子像素101和第三颜色子像素103之一发红光，另一个发蓝光；第二颜色子像素102发绿光。图10A至图10E示意性的示出第一颜色子像素101发红光，为红色子像素；第三颜色子像素103发蓝光，为蓝色子像素；第二颜色子像素102发绿光，为绿色子像素。
例如，如图10A至图10E所示，多个第一颜色子像素101和多个第三颜色子像素103沿平行于衬底基板01的第一方向和第二方向(例如，第一方向和第二方向之一可以为图中所示U方向，另一个为图中所示的V方向)均交替设置以形成多个第一像素行02和多个第一像素列03，多个第二颜色子像素101沿第一方向和第二方向均阵列排布以形成多个第二像素行04和多个第二 像素列05，多个第一像素行02和多个第二像素行04沿第二方向交替设置且在第一方向上彼此错开，多个第一像素列03和多个第二像素列05沿第一方向交替设置且在第二方向上彼此错开。
例如，凹槽210包括环状凹槽，环状凹槽围绕一个第一颜色子像素101、一个第二颜色子像素102或者一个第三颜色子像素103。例如，至少部分环状凹槽包括至少一个缺口G1，遮挡部300在衬底基板上的正投影位于凹槽210的垂直于其在衬底基板01上的正投影的延伸方向的两侧。例如，凹槽210在衬底基板01上的正投影的形状为条形时，该正投影的延伸方向指条形的延伸方向；在凹槽210在衬底基板01上的正投影的形状为弧形时，该正投影的延伸方向指弧形边的延伸方向；凹槽210在衬底基板01上的正投影的形状为环形时，该正投影的延伸方向指环形边的延伸方向。
例如，凹槽210的至少部分边界和与其紧邻的子像素10的发光区的边界轮廓大致相同。例如，子像素10的发光区的边界轮廓可以包括多条直边，和/或，连接相邻直线的弧形边，围绕该发光区的凹槽210的边界轮廓中可以包括与发光区的直边对应的直边轮廓，和/或，与弧形边对应的弧边轮廓。
例如，沿垂直于210凹槽在衬底基板01上的正投影延伸方向，遮挡部300向凹槽210内突出的突出部在衬底基板01上的正投影的尺寸与该遮挡部300在衬底基板01上的正投影的尺寸之比为0.005～0.5。例如，上述尺寸之比可以为0.01～0.4。例如，上述尺寸之比可以为0.05～3。例如，上述尺寸之比可以为0.1～2。例如，上述尺寸之比可以为0.5～1。
例如，沿一方向，该方向垂直于凹槽210的正投影的延伸方向且平行于衬底基板01，位于凹槽210边缘两侧的两个遮挡部300的尺寸相同，且两个遮挡部300向凹槽210内突出的尺寸相同。
例如，如图10A至图10E所示，凹槽210位于相邻的第一颜色子像素101和第三颜色子像素103之间，和/或，凹槽210位于相邻的第二颜色子像素102与第三颜色子像素103之间，和/或，凹槽210位于相邻的第一颜色子像素101和第二颜色子像素102之间。
例如，如图10A所示，本公开实施例的一示例中，像素限定图案的像素限定部401包括围绕各第一开口410的一圈结构，以及位于隔垫物012与衬底基板01之间的结构，相邻第一开口410之间的部分像素限定部被去除，以方便形成平坦层中的凹槽210。但不限于此，像素限定部除与凹槽210对应位置以 及第一开口410外的其他位置处也可以设置。例如，在凹槽位于像素限定图案中时，相邻第一开口410之间的像素限定部不能被去除。
例如，图1A所示相邻两个子像素10可以沿图10A所示的X方向排列。例如，图1A所示相邻两个子像素10可以为第二颜色子像素102和第一颜色子像素101，或者也可以为第三颜色子像素103和第二颜色子像素102。
例如，如图1A至图3、图6、图7以及图10A至图10B所示，沿X方向排列的相邻两个子像素，如第一颜色子像素101和第二颜色子像素102之间没有设置凹槽210时，这两个子像素的电荷产生层133会沿路径PA1导通，该路径尺寸较短，容易造成这两个子像素之间产生串扰；在第一颜色子像素101和第二颜色子像素102之间设置了凹槽210以及遮挡部300以使电荷产生层133在X方向断开时，这两个子像素的电荷产生层133会沿路径PA2导通，相对于路径PA1，路径PA2的尺寸更长(例如路径P2相对于路径PA1可增加路径P1的0.5倍)，使得两个子像素之间间隔处的电荷产生层133的电阻增大，有利于降低相邻两个子像素发生串扰的风险。
例如，如图1A至图3、图6、图7以及图10A至图10B所示，至少部分子像素的发光区的形状包括矩形，至少部分凹槽210的形状为长条形，且长条形的延伸方向(X方向或者Z方向)平行于与其紧邻的子像素的发光区的矩形边的延伸方向，遮挡部300位于凹槽210的垂直于其延伸方向的两侧。例如，位于沿X方向排列的相邻两个子像素10中的凹槽210可以沿Z方向延伸，位于沿Z方向排列的相邻两个子像素10中的凹槽210可以沿X方向延伸。
例如，如图1A至图3、图6、图7以及图10A至图10B所示，凹槽210可以围绕子像素10设置，且在子像素10的发光区的角部位置处有断口。例如，沿X方向或者Z方向排列的相邻两个子像素的发光区之间的间距小于沿U方向或者V方向排列的相邻两个子像素的发光区之间的间距，因此可以在沿X方向或者Z方向排列的相邻两个子像素的发光区之间设置凹槽210，在沿U方向或者V方向排列的相邻两个子像素之间不设置凹槽210以保证各子像素的第二电极的连通，减小第二电极的电阻以降低损耗。
例如，如图1A至图3、图6、图7以及图10A至图10B所示，围绕一个子像素的发光区的凹槽210的数量可以包括四个，四个凹槽210分别平行于发光区的四条边。
例如，如图10A至图10B所示，第三颜色子像素103的发光区的顶角包 括相对设置的第一角部C1和第二角部C2，构成第一角部C1的两条边的延长线或两条边的切线的交点到该子像素的中心的距离大于构成第二角部C2的两条边或其延长线或两条边的切线的交点到该子像素的中心的距离；第三子像素103包括第一类型子像素和第二类型子像素，不同类型子像素中，第一角部C1的顶点指向第二角部C2的顶点的方向不同，且第一类型子像素和第二类型子像素中，第一角部C1的顶点指向第二角部C2的顶点的方向分别为第一指向方向和第二指向方向，第一指向方向和第二指向方向相反。例如，第一指向方向可以为U方向的箭头所指的方向，第二指向方向可以为U方向的箭头所指的方向相反的方向，第一指向方向和第二指向方向可以互换；例如，第一指向方向也可以为V方向的箭头所指的方向，第二指向方向也可以为V方向的箭头所指的方向相反的方向，第一指向方向和第二指向方向可以互换。
例如，如图10A至图10B所示，第三颜色子像素103的发光区的第一角部C1可以为圆倒角，第三颜色子像素103的发光区的第一角部C1和该第一角部C1相对的第一颜色子像素101的发光区的顶角之间的距离为第一角部间距CD1，第三颜色子像素103的发光区的第二角部C2和该第二角部C2相对的第一颜色子像素101的发光区的顶角之间的距离为第二角部间距CD2，第一角部间距CD1大于第二角部间距CD2，由此，隔垫物012可以设置在第一角部对应的间隔的位置处。
例如，如图10A至图10B所示，在隔垫物012附近的凹槽210的形状可以与其他位置处的凹槽210的形状不同，例如，隔垫物012两侧第二颜色子像素102与隔垫物012之间设置的凹槽210的平面形状可以为弧形，且围绕相应的第二颜色子像素102的发光区的顶角。例如，一个第二颜色子像素102和与其相邻的第一颜色子像素101之间的凹槽210为第一子凹槽，这个第二颜色子像素102和与其相邻的第三颜色子像素103之间的凹槽210为第二子凹槽，第一子凹槽与第二子凹槽可以一体化为一个弯曲的凹槽210，该弯曲的凹槽210位于隔垫物012与第二颜色子像素102之间，且朝向第二颜色子像素102弯曲。
上述圆倒角可以指一段曲线形成的顶角，该曲线可以为圆弧，也可以为非规则的曲线，例如椭圆形中截取的曲线、波浪线等。本公开实施例示意性的示出该曲线具有相对于子像素的中心向外凸的形状，但不限于此，也可以为该曲线具有相对于子像素的中心向内凹的形状。例如，曲线为圆弧时，该圆弧的圆心角的范围可以为10°～150°。例如，该圆弧的圆心角的范围可以为60°～120°。 例如，该圆弧的圆心角的范围可以为90°。例如，第一角部111包括的圆倒角的曲线长度可以为10～60微米。
例如，如图10A和图10B所示，相邻子像素之间设置有沿该相邻两个子像素的排列方向排列且间隔设置的多个遮挡部300，相邻子像素之间设置的多个遮挡部300中的相邻两个遮挡部300之间设置有一个凹槽210，且位于凹槽210边缘两侧的两个遮挡部300均向凹槽210内突出。
例如，如图10A和图10B所示，沿Z方向排列的相邻的第一颜色子像素101和第二颜色子像素102的发光区之间的间距较小，两个发光区之间的凹槽210沿X方向延伸，遮挡部300可以位于凹槽210的沿Z方向的两侧，且向凹槽210的内部突出以形成突出部(遮挡部300的边缘与凹槽210边缘共同形成底切结构)，由此，上述第一颜色子像素101和第二颜色子像素102的电荷产生层会在突出部位置处断开，防止这两个子像素之间发生串扰。
例如，如图10A和图10B所示，沿Z方向排列的相邻的第一颜色子像素101和第二颜色子像素102之间的凹槽210沿X方向延伸，遮挡部300可以位于凹槽210的沿Z方向的两侧，凹槽210的沿X方向的两侧可以不设置遮挡部以使得在X方向上仅经过凹槽210的发光功能层以及第二电极均不会发生断裂，从而保证了在X方向上第二电极的连通性，减小了第二电极的电阻。
例如，如图10A和图10B所示，由于沿U方向和V方向至少之一方向排列的相邻两个子像素的发光区之间的距离大于沿X方向(或Y方向)排列的相邻两个子像素的发光区之间的距离，则沿U方向和V方向至少之一方向排列的相邻两个子像素的发光区之间可以不设置凹槽以及遮挡部。
例如，如图10C至图10E所示，至少一个子像素的四周围绕了一圈不连续的凹槽210。例如，如图10C至图10E所示，每个子像素的四周围绕了一圈不连续的凹槽210。图10A、图10C至图10E仅示意出了凹槽210，各图中遮挡部可以如图10B所示遮挡部300与凹槽210的位置关系进行设置。
例如，如图10C所示，沿X方向或者Z方向排列的相邻两个子像素中，一个子像素的发光区的顶角处被凹槽210包围，另一个子像素的发光区的边缘处被凹槽210包围。例如，沿X方向或者Z方向排列的第一颜色子像素101和第二颜色子像素102中，第二颜色子像素102的发光区的顶角处被凹槽210包围，第一颜色子像素101的发光区的边缘处被凹槽210包围。例如，沿X方向或者Z方向排列的第三颜色子像素103和第二颜色子像素102中，第二颜色 子像素102的发光区的顶角处被凹槽210包围，第三颜色子像素103的发光区的边缘处被凹槽210包围。本公开实施例的一示例提供的显示基板中，通过将沿X方向或者Z方向排列的相邻两个子像素的发光区中，一个发光区的边缘对应设置凹槽，一个发光区的顶角对应设置凹槽，既可以将这两个发光区之间最短间隔(具有图10A所示的路径PA1)内的电荷产生层断开，还可以将这两个发光区之间较长间隔(具有图10A所示的路径PA2)内的电荷产生层断开。
例如，如图10C所示，位于隔垫物012两侧的第二颜色子像素102的发光区的边缘的凹槽210可以为围绕第二颜色子像素102的发光区的三个顶角和两个边缘的连续弯曲的凹槽210。
例如，图10D所示显示基板与图10C所示显示基板的区别在于第二颜色子像素102的发光区的边缘被凹槽210包围，第一颜色子像素101和第三颜色子像素103的发光区的顶角被凹槽210包围。
例如，图10E所示显示基板与图10C所示显示基板的区别在于沿U方向和V方向的至少之一的方向，相邻第一颜色子像素101和第三颜色子像素103之间的间隔处增设了凹槽210，从而尽量使得在各不同方向上排列的相邻两个子像素的电荷产生层在凹槽210和遮挡部的共同作用下断开。例如，沿U方向和V方向，相邻第一颜色子像素101和第三颜色子像素103之间的间隔处均增设了凹槽210。
本公开另一实施例提供一种显示装置，包括图1A至图10E所示的显示基板，通过在显示装置中的相邻子像素之间设置凹槽以及向凹槽内突出的遮挡部，可以使得发光功能层的电荷产生层在遮挡部相对于凹槽的边缘突出的突出部处断开，有利于降低相邻子像素之间产生串扰的几率。
例如，该显示装置还包括位于显示面板出光侧的盖板。
例如，该显示装置可以为有机发光二极管显示装置等显示器件以及包括该显示装置的电视、数码相机、手机、手表、平板电脑、笔记本电脑、导航仪等任何具有显示功能的产品或者部件，本实施例不限于此。
图11A为根据本公开另一实施例的一示例提供的显示基板的局部截面结构示意图，图11B为根据本公开另一实施例的另一示例提供的显示基板的局部截面结构示意图。图11A所示显示基板可以与图1C所示显示基板具有相同的第一显示区域A1和第二显示区域A2。如图11A和图11B所示，显示基板包括衬底基板01以及设置在衬底基板01上的第一显示区域A1的多个子像素10。 子像素10包括有机发光元件100，有机发光元件100包括发光功能层130以及沿垂直于衬底基板01的方向位于发光功能层130两侧的第一电极110和第二电极120，第一电极110位于发光功能层130与衬底基板01之间，发光功能层130包括多个膜层，例如，多个膜层包括电荷产生层133。
如图11A所示，显示基板还包括多个隔离结构600，相邻子像素10之间设置有至少一个隔离结构600，隔离结构600包括层叠设置的第一子隔离结构610和第二子隔离结构620，第一子隔离结构610位于第二子隔离结构620面向衬底基板01的一侧。沿相邻子像素10的排列方向，位于该相邻子像素10之间的隔离结构600中第一子隔离结构610的尺寸小于第二子隔离结构620的尺寸以使第二子隔离结构620包括相对于第一子隔离结构610的边缘突出的部分。例如，所述第一子隔离结构610的材料与所述第二子隔离结构620均包括同种元素，或者所述第一子隔离结构610的材料与所述第二子隔离结构620均包括金属。例如，所述第一子隔离结构610的材料包括无机非金属材料或者金属材料或金属氧化物，所述第二子隔离结构620的材料包括有机材料。
如图11B所示，第一子隔离结构610的至少部分侧表面与平行于第一子隔离结构610和第二子隔离结构620的接触面的平面的坡度角大于60度且小于120度，和/或，第二子隔离结构620的至少部分侧表面与平行于第一子隔离结构610和第二子隔离结构620的接触面的平面的坡度角大于60度且小于120度。例如，第一子隔离结构610的至少部分侧表面与平行于第一子隔离结构610和第二子隔离结构620的接触面的平面的坡度角大于70度且小于110度，和/或，第二子隔离结构620的至少部分侧表面与平行于第一子隔离结构610和第二子隔离结构620的接触面的平面的坡度角大于70度且小于110度。例如，第一子隔离结构610的至少部分侧表面与平行于第一子隔离结构610和第二子隔离结构620的接触面的平面的坡度角大于80度且小于100度，和/或，第二子隔离结构620的至少部分侧表面与平行于第一子隔离结构610和第二子隔离结构620的接触面的平面的坡度角大于80度且小于100度。
上述第一子隔离结构的至少部分侧表面与平行于第一子隔离结构和第二子隔离结构的接触面的平面的坡度角可以第一子隔离结构远离衬底基板一侧的表面与第一子隔离结构的侧表面之间的夹角，也可以为第一子隔离结构面向衬底基板一侧的表面与第一子隔离结构的侧表面之间的夹角；上述第二子隔离结构的至少部分侧表面与平行于第一子隔离结构和第二子隔离结构的接触面 的平面的坡度角可以为第二子隔离结构远离衬底基板一侧的表面与第二子隔离结构的侧表面之间的夹角，也可以为第二子隔离结构面向衬底基板一侧的表面与第二子隔离结构的侧表面之间的夹角。上述第一子隔离结构的侧表面可以指第一子隔离结构的与衬底基板之间具有一定夹角的表面，上述第二子隔离结构的侧表面可以指第二子隔离结构的与衬底基板之间的夹角具有一定夹角的表面。
图11A和图11B所示示例区别在于第一子隔离结构610和第二子隔离结构620的位置关系以及角度关系。
如图11A和图11B所示，发光功能层130包括的多个膜层中的至少一层在隔离结构600处断开。例如，发光功能层130包括电荷产生层133，电荷产生层133在隔离结构600的边缘处断开。
本公开实施例在显示基板中相邻子像素之间设置隔离结构，通过调节第一子隔离结构和第二子隔离结构的相对位置关系，或者第一子隔离结构的侧表面的角度以及第二子隔离结构的侧表面的角度，可以使得发光功能层的至少一层膜层在第二子隔离结构相对于第一子隔离结构的边缘突出的突出部处断开，或者在隔离结构的边缘处断开，有利于降低相邻子像素之间产生串扰的几率。本公开实施例通过在显示基板中相邻子像素之间设置隔离结构，可以使得电荷产生层在隔离结构的边缘断开，有利于降低相邻子像素之间产生串扰的几率。
本实施例中的衬底基板01以及有机发光元件100可与图1A至图9B所示实施例中的衬底基板01以及有机发光元件100具有相同的特征，在此不再赘述。本示例中的其他膜层011可以与图1A至图9B所示实施例中的其他膜层011具有相同的特征，在此不再赘述。
例如，第一子隔离结构610的材料和第二子隔离结构620的材料不同。
例如，第一子隔离结构610的材料包括无机非金属材料或者金属材料，第二子隔离结构620的材料包括有机材料。
例如，如图11A所示，多个子像素10可以包括沿X方向排列的相邻两个子像素10。例如，该相邻两个子像素10中设置的多个遮挡部300沿X方向排列。例如，相邻两个子像素10之间设置的第二子隔离结构620的至少一个边缘在沿X方向上相对于第一子隔离结构610的边缘突出以形成隔离突出部601，第二子隔离结构620中的隔离突出部601悬空设置，以使得子像素10的电荷产生层133中靠近该至少一个边缘位置处断开。例如，隔离突出部601沿 平行于衬底基板01的方向延伸。例如，隔离突出部601在衬底基板01上的正投影与第一子隔离结构610在衬底基板01上的正投影没有交叠。
例如，相邻子像素的第一发光层131(第二发光层132)可以在隔离结构600上交叠。但不限于此，例如，相邻子像素的第一发光层131(第二发光层132)可以在隔离结构600上间隔设置；或者，隔离结构600上可以仅设置相邻子像素中的一个子像素的第一发光层131(第二发光层132)。
例如，隔离结构600上可以设置有发光功能层130的部分膜层以及第二电极120。例如，隔离结构600上可以设置有发光功能层130的所有膜层以及第二电极120。
例如，发光功能层130中至少一层在衬底基板01上的第一正投影是连续的，且在垂直于衬底基板01的平面上的第二正投影不连续；或者，发光功能层130中至少一层在衬底基板01上的第一正投影与在垂直于衬底基板01的平面上的第二正投影均不连续，且第一正投影中不连续位置处的间隔的宽度小于第二正投影中不连续位置处的间隔的宽度。
例如，发光功能层130中至少一层可以为电荷产生层133，电荷产生层133在衬底基板01上的第一正投影是连续的，且在垂直于衬底基板01的平面上的第二正投影不连续。例如，电荷产生层133可以包括位于凹槽210内的部分以及没有位于凹槽210内的部分，这两部分在凹槽210的边缘处断开。例如，这两部分在衬底基板01上的第一正投影可以相接或者交叠，第一正投影是连续的。例如，这两部分与衬底基板01之间的距离不同，则这两部分在XY面上的第二正投影是不连续的。
例如，发光功能层130中至少一层可以为电荷产生层133，电荷产生层133在衬底基板01上的第一正投影与在垂直于衬底基板01的平面上的第二正投影均不连续，且第一正投影中不连续位置处的间隔的宽度小于第二正投影中不连续位置处的间隔的宽度。例如，电荷产生层133可以包括位于隔离结构600上的部分以及没有位于隔离结构600上的部分，这两部分在隔离结构600上的边缘处断开。例如，这两部分在衬底基板01上的第一正投影之间设置有间隔，第一正投影是断开的。例如，这两部分与衬底基板01之间的距离不同，则这两部分在XY面上的第二正投影是不连续的，两部分在XY面上的第二正投影之间设置有间隔。
例如，发光功能层130中电荷产生层133面向衬底基板01一侧的至少部 分膜层在隔离结构600处断开。例如，发光功能层130中电荷产生层133面向衬底基板01一侧的全部膜层在隔离结构600处断开。
例如，第一发光层131发出的光的颜色与第二发光层132发出的光的颜色相同。
例如，发光功能层130包括发光层(第一发光层或第二发光层)，发光功能层130中至少一层断开的膜层在衬底基板01上的正投影的面积大于发光层(第一发光层或第二发光层)在衬底基板上01的正投影的面积。例如，断开的膜层可以为共通层，发光层可以为通过精细金属掩模板形成的图案化膜层。
例如，发光功能层130包括至少一层发光层(第一发光层或第二发光层)，发光功能层130中在隔离结构600处断开的膜层中包括至少一层发光层以及至少一层其他膜层。例如，断开的至少一层其他膜层在衬底基板01上的正投影的面积大于断开的至少一层发光层在衬底基板01上的正投影的面积。例如，断开的至少一层其他膜层覆盖隔离结构600的部分的面积，大于断开的至少一层发光层覆盖隔离结构的部分的面积。例如，断开的至少一层其他膜层完全覆盖隔离结构600，至少一层发光层仅覆盖了隔离结构600的部分。
例如，发光功能层130包括的多个膜层的至少一层以及第二电极120与隔离结构600在衬底基板01上的投影有交叠。
例如，发光功能层130包括的多个膜层的至少一层的至少部分覆盖隔离结构600的部分侧表面。例如，上述膜层可以覆盖第一子隔离结构610的侧表面，和/或，覆盖第二子隔离结构620的侧表面。
例如，如图11A所示，相邻子像素10之间可以设置两个隔离结构600，每个隔离结构600中，第二子隔离结构620的至少一个边缘在沿X方向上相对于第一子隔离结构610的边缘突出。例如，相邻子像素10之间可以设置两个隔离结构600，两个隔离结构600中的第二子隔离结构620的两个边缘均在沿X方向上相对于第一子隔离结构610的边缘突出；或者，一个隔离结构600中的第二子隔离结构620的两个边缘均在沿X方向上相对于第一子隔离结构610的边缘突出，另一个隔离结构600中的第二子隔离结构620的一个边缘在沿X方向上相对于第一子隔离结构610的边缘突出；或者，两个隔离结构600中的第二子隔离结构620均只有一个边缘在沿X方向上相对于第一子隔离结构610的边缘突出，本公开实施例对此不作限制，可以根据实际产品需求进行设置。本公开实施例不限于相邻子像素之间设置两个隔离结构，还可以设置一个隔离 结构，或者三个以上隔离结构。
例如，在上述相邻两个子像素10之间没有设置隔离结构600时，该相邻两个子像素10的发光功能层130中的电荷产生层133可能连接或者为整层膜层。由于电荷产生层133具有较高的导电率，对于具有高分辨率的显示装置而言，电荷产生层133的高导电性容易导致相邻子像素10发生串扰。
本公开实施例提供的显示基板中，通过在该相邻两个子像素之间设置隔离结构，可以使得形成在隔离结构的隔离结构的边缘处的发光功能层的至少一层(如电荷产生层)断开，此时，该相邻两个子像素的发光功能层的至少一层间隔设置，可以增加相邻子像素之间发光功能层的电阻，从而在降低该相邻两个子像素之间产生串扰的几率的同时，又不影响子像素的正常显示。
例如，如图11A所示，隔离结构600面向衬底基板01的一侧表面与衬底基板01之间的距离小于第一电极110面向衬底基板01一侧表面与衬底基板01之间的距离。
例如，如图11A所示，第一电极110与衬底基板01之间设置有有机层500，第一电极110与有机层500的表面接触。
例如，如图11A所示，第一子隔离结构610的材料包括无机金属材料或者金属材料，第二子隔离结构620的材料包括有机材料。
例如，第一子隔离结构610的材料可以为氧化硅和氮化硅的一种或组合。但不限次，第一子隔离结构610的材料也可以为金属或者金属氧化物。
例如，沿垂直于衬底基板01的方向，第一子隔离结构610的厚度可以大于发光功能层130的厚度，以使发光功能层130和第二电极120均在第二子隔离结构620相对于第一子隔离结构610的边缘突出的部分，即隔离突出部601处断开。
例如，第二子隔离结构620可以采用感光性的聚酰亚胺制作而成。
例如，第二子隔离结构620与有机层500的材料相同。例如，有机层500可以与图1A至图9B所示的有机层500采用相同的材料，在此不再赘述。
例如，第二子隔离结构620与有机层500可以在同一步图案化工艺中形成。
例如，如图11A所示，所述第二子隔离结构620包括沿与其相邻的两个子像素10排布方向分布的中心区域以及位于所述中心区域两侧的边缘区域，沿垂直于所述衬底基板01的方向，所述第二子隔离结构620的所述中心区域的厚度大于所述边缘区域的厚度。
例如，如图11A所示，第二子隔离结构620包括中心区域CR以及围绕所述中心区域CR的边缘区域ER，沿垂直于衬底基板01的方向，第二子隔离结构620的中心区域CR的厚度大于边缘区域ER的厚度。上述中心区域的厚度可以指第二子隔离结构位于中心区域的平均厚度，也可以指第二子隔离结构位于中心区域的最大厚度；上述第二子隔离结构位于边缘区域的厚度可以指第二子隔离结构位于边缘区域的平均厚度，也可以指第二子隔离结构位于边缘区域的最大厚度。例如，第二子隔离结构位于中心区域的平均厚度大于第二子隔离结构位于边缘区域的平均厚度，或者，第二子隔离结构位于中心区域的最大厚度大于第二子隔离结构位于边缘区域的最大厚度。
例如，从第二子隔离结构620的中心指向边缘的方向，第二子隔离结构620的厚度可以逐渐减小。
例如，第二子隔离结构620远离衬底基板01一侧的表面是平滑过渡的，例如，第二子隔离结构620包括上表面和侧表面，两者是连续平滑表面。
例如，如图11A和图11B所示，第二子隔离结构620的相对于第一子隔离结构610的边缘突出的部分远离第一子隔离结构610的表面的坡度角小于第二子隔离结构620的至少部分侧表面与平行于第一子隔离结构610和第二子隔离结构620的接触面的平面的坡度角。
例如，第一子隔离结构610的侧边可以为曲边也可以为直边，例如，第一子隔离结构610的侧边可以向靠近第一子隔离结构610的中心弯曲。例如，第一子隔离结构610的侧边与其远离衬底基板01一侧的表面之间的夹角可以为60度～90度。例如，第一子隔离结构610的侧边与其靠近衬底基板01一侧的表面之间的夹角可以为60度～90度。上述曲边与一表面之间的夹角可以指该曲边与该表面交点位置处的切线与该表面之间的夹角。但不限于此，也可以为上述曲边中点处的切线与该表面之间的夹角。例如，第二子隔离结构620的侧边与其靠近衬底基板01一侧的表面的夹角可以为15～70度。
例如，如图11A所示，有机层500包括多个有机层开口510，隔离结构600位于有机层开口510内。本公开实施例通过在有机层中设置有机层开口，且有机层开口内设置隔离结构，使得相邻子像素的电荷产生层在隔离结构的隔离突出部处断开，有利于降低相邻子像素之间发生串扰的几率。
例如，隔离结构600与有机层开口510的侧壁间隔设置。例如，隔离结构600与像素限定部之间是有间隙，例如间隙可以2微米以上，隔离结构600的 宽度可以为3um以上，两侧像素限定部的宽度分别4um以上，隔离结构600的厚度小于像素限定部的厚度。
例如，隔离结构600与有机层500之间设置有一定间隔。例如，隔离结构600与有机层500之间间隔的最小尺寸不小于2微米。
例如，在一个有机层开口510中设置一个隔离结构600时，隔离结构600可以位于有机层开口510的中部。例如，在一个有机层开口510中设置多个隔离结构600时，多个隔离结构600可以均匀分布。例如，相邻子像素之间可以设置一个隔离结构600，该隔离结构600靠近相邻子像素之中的一个子像素，且与隔离结构600距离较近的子像素中的发光层的至少部分位于隔离结构600上，而与该隔离结构600距离较远的子像素中的发光层可以不位于该隔离结构600上。
例如，如图11A所示，沿X方向，隔离结构600的最大尺寸可以不小于3微米。
例如，如图11A所示，沿垂直于衬底基板01的方向，第一子隔离结构610的厚度可以小于有机层500的厚度。例如，第一子隔离结构610的厚度与有机层500的厚度之比可以为0.1～0.9。例如，第一子隔离结构610的厚度与有机层500的厚度之比可以为0.2～0.8。例如，第一子隔离结构610的厚度与有机层500的厚度之比可以为0.3～0.7。例如，第一子隔离结构610的厚度与有机层500的厚度之比可以为0.4～0.6。例如，第一子隔离结构610的厚度与有机层500的厚度之比可以为0.5。
例如，如图11A所示，沿垂直于衬底基板01的方向，隔离结构600的厚度与有机层500的厚度比例可以为0.8～1.2。例如，隔离结构600的厚度与有机层500的厚度比例可以为0.9～1.1。例如，隔离结构600的厚度与有机层500的厚度可以相等。本公开实施例不限于此，例如，隔离结构600的厚度可以大于有机层500的厚度。
例如，如图11A所示，像素限定图案400位于有机层500远离衬底基板01的一侧。例如，像素限定图案400中的第一开口410可以与图1A至图9B所示的第一开口410具有相同的特征，在此不再赘述。
例如，如图11A所示，像素限定图案400还包括多个第二开口420，第二开口420被配置为暴露隔离结构600，且隔离结构600与像素限定图案400的像素限定部401之间设置有间隔。
例如，第二开口420被配置为暴露有机层开口510的至少部分以及隔离结构600。例如，像素限定图案400的第二开口420在衬底基板01上的正投影可以与有机层500的有机层开口510在衬底基板01上的正投影重合。例如，第二开口420可以完全暴露有机层开口510。
例如，如图11A所示，显示基板中的第一导电层图案015包括第一电源信号线和数据线，第二导电层图案016包括第二电源信号线，第二子隔离结构620与第二导电层图案016同层设置。本公开实施例中的其他膜层011中的第一导电层图案015和第二导电层图案016可以与图3、图5A至图5D所示的第一导电层图案015和第二导电层图案016具有相同的特征，在此不再赘述。
例如，隔离结构600在衬底基板01上的正投影的形状可以与图10A至图10E所示的凹槽210在衬底基板01上的正投影的形状相同。例如，隔离结构600在衬底基板01上的正投影的延伸方向可以与第一电源信号线、数据线以及第二电源信号线的至少之一的延伸方向不同。
例如，如图11A所示，第二子隔离结构620远离衬底基板01一侧的表面为弯曲表面，且弯曲表面朝向第一子隔离结构610弯曲，例如，第一子隔离结构610和第二子隔离结构620形成了“蘑菇型”隔离结构。例如，在通过曝光、显影等工序形成采用有机材料的第二子隔离结构620时，第二子隔离结构620远离衬底基板01一侧的表面为弯曲表面。
例如，第一子隔离结构610包括至少一层膜层，第一电极110包括至少一层电极层，第一子隔离结构610的一层膜层与第一电极110的一层电极层同层设置。
例如，图12为根据本公开另一实施例的一示例提供的显示基板的局部截面结构示意图。图12所示示例中的显示基板与图11A所示的显示基板的不同之处在于图12所示的显示基板中的第一子隔离结构610的厚度较小，例如，第一子隔离结构610的厚度与发光功能层130的厚度比例为0.7～1.5。图12所示显示基板中的衬底基板01以及有机发光元件100可与图1A至图9B所示实施例中的衬底基板01以及有机发光元件100具有相同的特征，在此不再赘述。本示例中的其他膜层011可以与图1A至图9B所示实施例中的其他膜层011具有相同的特征，在此不再赘述。图12所示显示基板中的隔离结构600中第一子隔离结构610和第二子隔离结构620的材料可以与图11A所示的隔离结构600的第一子隔离结构610和第二子隔离结构620的材料相同，在此不再赘述。 图12所示平坦层500和像素限定图案400可以与图11A所示平坦层500和像素限定图案400具有相同的特征，在此不再赘述。
例如，如图12所示，例如，第一子隔离结构610的厚度与发光功能层130的厚度比例为0.8～1.3。第一子隔离结构610的厚度与发光功能层130的厚度比例为0.9～1.1。例如，第一子隔离结构610的厚度与发光功能层130的厚度比例为1。本公开实施例的一示例通过将第一子隔离结构与发光功能层的厚度设置的相当，可以在使得电荷产生层在隔离结构边缘断开的同时，尽量使得第二电极在隔离结构边缘不断开，使得第二电极具有较好的电学特征，提高显示基板的亮度均一性。
例如，第一子隔离结构610的厚度可以为100～10000埃。例如，第一子隔离结构610的厚度可以为200～5000埃。例如，第一子隔离结构610的厚度可以为300～1500埃。
例如，如图12所示，第一子隔离结构610在X方向上的至少一侧边缘相对于第二子隔离结构620的对应的边缘内缩0.1微米以上以形成底切结构。例如，隔离突出部601沿X方向的尺寸可以不小于0.1微米。例如，隔离突出部601沿X方向的尺寸可以不小于0.2微米。
例如，如图12所示，第二子隔离结构620的厚度可以为0.5～3微米。例如，第二子隔离结构620的厚度可以为0.8～1.6微米。例如，第二子隔离结构620的厚度可以为1～1.2微米。
例如，如图12所示，第二子隔离结构620的相对于第一子隔离结构610的边缘突出的部分远离第一子隔离结构610的表面的坡度角可以为15～70度。例如，第二子隔离结构620的隔离突出部601的弯曲表面的边缘的坡度角可以为15～70度。例如，第二子隔离结构620的隔离突出部601的弯曲表面的边缘的坡度角为20～60度。例如，第二子隔离结构620的隔离突出部601的弯曲表面的边缘的坡度角为30～45度。上述弯曲表面被XY面所截的图形为曲线，上述隔离突出部601的弯曲表面的坡度角可以指该曲线端点处的切线与平行于X方向的直线之间的夹角，或者隔离突出部601的曲线中点处的切线与平行于X方向的直线之间的夹角。第二子隔离结构的隔离突出部的弯曲表面的坡度角设置的较小，有利于降低第二电极在该隔离突出部断开的几率。
本公开实施例可以通过对第一子隔离结构和第二子隔离结构的厚度的设置，第二子隔离结构相对于第一子隔离结构的边缘突出的隔离突出部的平行于 衬底基板的方向的尺寸的设置以及对第二隔离结构的弯曲表面的坡度角的设置，可以使得发光功能层的部分材料填充在底切结构内，在使得隔离结构在断开电荷产生层的基础上，尽量不断开第二电极，保证第二电极具有较好的电学特性。
例如，图13A至图13F为形成图11A之前的显示基板的制作方法流程示意图。例如，如图11A和图13A所示，显示基板的制作方法可以包括在玻璃载板上制备衬底基板01。本示例中形成的衬底基板01可以与图4A和图5A所示显示基板中形成的衬底基板01具有相同的特征，在此不再赘述。例如，如图11A和图13A所示，在衬底基板01上形成其他膜层011的工艺流程可以与图5A所示显示基板中形成其他膜层011的工艺流程相同，也可以与图4A所示显示基板中形成其他膜层011的工艺流程相同，在此不再赘述。
例如，如图11A和图13A所示，在其他膜层011上形成第一子隔离结构层，并对该第一子隔离结构层图案化形成第一子隔离结构图案6100。例如，可以对第一子隔离结构层进行干刻或湿刻形成第一子隔离结构图案6100。
例如，如图11A和图13B所示，在形成第一子隔离结构图案6100后，可以图案化形成第二导电层图案016。例如，第一子隔离结构图案6100的材料与第二导电层图案016的材料不同。例如，第一子隔离结构图案6100的材料可以包括氮化硅、氧化硅或者氮氧化硅中的任意一种或多种，第二导电层图案016的材料可以包括金属材料。但本公开实施例不限于此，例如，第一子隔离结构图案与第二导电层图案还可以在同一步图案化工艺中形成，此时，第一子隔离结构图案的材料可以包括金属材料。
例如，如图11A和图13C所示，在第一子隔离结构图案6100与第二导电层图案016上形成有机材料层，并对该有机材料层图案化形成有机层开口510以及位于第一子隔离结构图案6100上的第二子隔离结构620。例如，在第一子隔离结构图案6100与第二导电层图案016上形成感光层，通过涂胶、曝光以及显影后使得有机层开口510中除第一子隔离结构图案6100位置外的其他位置有机材料层刻蚀掉。
例如，如图11A和图13D所示，在有机层500上图案化形成第一电极110。形成第一电极110的工艺方法可以与图5B所示形成第一电极110的工艺方法相同，在此不再赘述。
例如，如图11A和图13E所示，对第一子隔离结构图案6100进行湿刻(刻 蚀液对第二子隔离结构620的影响较小)以使得第一子隔离结构图案6100的边缘相对于第二子隔离结构620的边缘内缩形成底切结构。例如，对第一子隔离结构图案6100进行湿刻后形成第一子隔离结构610以及隔离结构600。
例如，如图11A和图13E所示，在形成隔离结构600后，在有机层500以及隔离结构600上形成像素限定膜，并对像素限定膜图案化形成像素限定图案400，像素限定图案400包括暴露第一电极110的第一开口410以及暴露隔离结构600的第二开口420。例如，第二子隔离结构620的材料与像素限定图案400中的像素限定部401的材料不同，以防止图案化形成第二开口420的过程中对第二子隔离结构620产生影响。
图14为根据本公开另一实施例的一示例提供的显示基板的局部截面结构示意图。图14所示示例中的显示基板与图12所示的显示基板的不同之处在于图14所示的显示基板中的第一子隔离结构610与第二子隔离结构620为一体成型的结构。图14所示显示基板中的衬底基板01以及有机发光元件100可与图1A至图9B所示实施例中的衬底基板01以及有机发光元件100具有相同的特征，在此不再赘述。本示例中的其他膜层011可以与图1A至图9B所示实施例中的其他膜层011具有相同的特征，在此不再赘述。图14所示平坦层500和像素限定图案400可以与图11A所示平坦层500和像素限定图案400具有相同的特征，在此不再赘述。
例如，如图14所示，隔离结构600的材料可以与平坦层500的材料相同。图14所示的隔离结构600可以与图11A-图12任一示例中的隔离结构600具有相同的尺寸和数量关系，在此不再赘述。
例如，图14示意性的示出隔离结构600与平坦层500之间设置有间隔，但不限于此，隔离结构600还可以与平坦层500为一体化结构，即隔离结构600可以为平坦层500的一部分，平坦层500包括的有机层开口510在X方向的两侧分别为两个隔离结构600，用以断开电荷产生层。
本示例提供的显示基板中的第一子隔离结构和第二子隔离结构的材料相同，可以在制作隔离结构的过程中不增加掩模次数且不降低产能的基础上，对电荷产生层进行隔断。
例如，图15A至图15B为形成图14之前的显示基板的制作方法流程示意图。例如，如图14和图15A所示显示基板中形成衬底基板01和其他膜层011的工艺流程和工艺方法可以与图4A所示显示基板中形成衬底基板01和其他膜 层011的工艺流程和工艺方法相同，也可以与图5A所示显示基板中形成衬底基板01和其他膜层011的工艺流程和工艺方法相同，在此不再赘述。
例如，如图14和图15A所示，形成显示基板的制作方法包括在其他膜层011上图案化形成多个无机材料图案601。例如，在形成无机材料图案601后，形成有机材料层，并对有机材料层图案化形成有机层开口510以及位于有机层开口510内的隔离结构图案6000。例如，如图15A所示，沿X方向，每个隔离结构图案6000的至少一侧边缘覆盖无机材料图案601。例如，沿X方向，每个隔离结构图案6000的两侧边缘均覆盖无机材料图案601。
例如，如图15A所示，沿X方向，被隔离结构图案6000覆盖的无机材料图案601的边缘相对于覆盖其的隔离结构图案6000的边缘突出，或者被隔离结构图案6000覆盖的无机材料图案601的边缘与覆盖其的隔离结构图案6000的边缘齐平。
例如，图15A示意性的示出相邻两个隔离结构图案6000覆盖的无机材料图案601为彼此分离的结构，但不限于此，例如位于两个隔离结构图案6000之间的无机材料图案601可以为一体化的结构，即两个隔离结构图案6000共用位于两者之间的无机材料图案601。
例如，如图14和图15B所示，对无机材料图案601进行湿刻(刻蚀液对隔离结构图案6000的影响较小)以将无机材料图案601刻蚀掉，使得隔离结构图案6000形成具有底切结构的隔离结构600。本公开实施例不限于此，无机材料图案也可以不完全被刻蚀掉，只要隔离结构图案形成了底切结构，且该底切结构可以将电荷产生层隔断即可。
例如，如图14和图15B所示，沿X方向，相邻子像素之间可以设置多个隔离结构600，每个隔离结构600的最大尺寸可以与相邻隔离结构600之间的间隔的最小尺寸相同。例如，沿X方向，每个隔离结构600的最大尺寸与相邻隔离结构600之间的间隔的最小尺寸可以均为10微米。当然，本公开实施例不限于此，沿X方向，每个隔离结构600的最大尺寸与相邻隔离结构600之间的间隔的最小尺寸也可以不相等，例如，隔离结构的尺寸可以较大，或者间隔的尺寸可以较大。
例如，如图14和图15B所示，沿X方向，第二子隔离结构620的隔离突出部601的尺寸可以为1～3微米。
图16为根据本公开另一实施例的一示例提供的显示基板的局部截面结构 示意图。图16所示示例中的显示基板与图11A至图15B所示的显示基板的不同之处在于隔离结构600与第一电极110均设置在平坦层500上。图16所示显示基板中的衬底基板01以及有机发光元件100可与图1A至图9B所示实施例中的衬底基板01以及有机发光元件100具有相同的特征，在此不再赘述。本示例中的其他膜层011可以与图1A至图9B所示实施例中的其他膜层011具有相同的特征，在此不再赘述。图16所示的第一子隔离结构610与第二子隔离结构620的形状、厚度以及两者平行于衬底基板方向的尺寸关系可以与图11A至图15B所示的显示基板中第一子隔离结构610与第二子隔离结构620的形状、厚度以及两者平行于衬底基板方向的尺寸关系相同，在此不再赘述。
例如，如图16所示，像素限定图案400的第二开口420暴露了隔离结构600以及部分平坦层500。例如，隔离结构600与第二开口420的边缘之间设置有间隔。
例如，如图16所示，第一子隔离结构610与第一电极110同层设置。例如，第一子隔离结构610与第一电极110的厚度可以相同。例如，第一子隔离结构610与第一电极110材料相同，以节省工艺步骤。例如，第一电极110可以包括多层膜层，第一子隔离结构610也可以包括与第一电极110相同的多层膜层。例如，第一电极110可以包括多层膜层，第一子隔离结构610可以包括与第一电极110中的一层膜层相同的膜层。
例如，如图16所示，第二子隔离结构620与像素限定图案400的像素限定部401同层设置且材料相同。例如，如图16所示，第二子隔离结构610远离衬底基板01一侧的表面可以为弯曲表面。
例如，如图16所示，相邻子像素之间可以设置一个隔离结构600，但不限于此，也可以设置两个或者更多个，可以根据产品尺寸以及需求进行设置。
例如，如图16所示，第二子隔离结构620远离衬底基板01一侧表面与衬底基板01之间的最大距离可以与像素限定部401远离衬底基板01一侧表面与衬底基板01之间的最大距离相等。
例如，如图16所示，第二子隔离结构620沿X方向的尺寸小于第一电极110沿X方向的尺寸。
例如，第一子隔离结构610与第二子隔离结构620也可以为一体化的结构，且第一子隔离结构610和第二子隔离结构620的材料采用像素限定部401的材料。
例如，第一子隔离结构610和第二子隔离结构620为一体化的结构，且该隔离结构600可以为像素限定图案400的像素限定部401的一部分。例如，一个像素限定部401在X方向的一侧用于形成第一开口401，该像素限定部401在X方向的另一侧形成了包括突出部的隔离结构600以形成第二开口420。本公开实施例的一示例通过将像素限定图案的像素限定部的一部分用作隔离结构，可以节省工艺步骤。
例如，可以通过对第一子隔离结构610的厚度的设置、第二子隔离结构620相对于第一子隔离结构610的边缘突出部分尺寸的设置以及第二子隔离结构620的弯曲表面的边缘的角度的设置，使得电荷产生层在隔离结构600的边缘断开，第二电极在隔离结构600的边缘没有断开。
例如，图17A至图17B为形成图16之前的显示基板的制作方法流程示意图。例如，如图16和图17A所示，显示基板的制作方法可以包括在玻璃载板上制备衬底基板01。本示例中形成的衬底基板01可以与图4A和图5A所示显示基板中形成的衬底基板01具有相同的特征，在此不再赘述。例如，如图16和图17A所示，在衬底基板01上形成其他膜层011以及平坦层500的工艺流程可以与图5A所示显示基板中形成其他膜层011以及平坦层500的工艺流程相同，也可以与图4A所示显示基板中形成其他膜层011以及平坦层500的工艺流程相同，在此不再赘述。
例如，如图16和图17A所示，在平坦层500上形成电极层，并对电极层图案化形成第一电极110和第一子隔离结构图案6100。例如，第一电极110的形状和尺寸可以与第一子隔离结构图案6100的形状和尺寸均相同。
例如，如图16和图17B所示，在第一电极110和第一子隔离结构图案6100上形成像素限定膜，并对像素限定膜图案化形成像素限定图案400以及第二子隔离结构620，像素限定图案400包括暴露第一电极110的第一开口410以及暴露第一子隔离结构图案6100的第二开口420，第二子隔离结构620位于第二开口420暴露的第一子隔离结构图案6100上。例如，在形成像素限定图案400后，图案化形成隔垫物012。
例如，如图17B所示，沿X方向，第一子隔离结构图案6100的尺寸大于第二子隔离结构620的尺寸。例如，沿X方向，第一子隔离结构图案6100相对于第二子隔离结构620的至少一个边缘具有突出的部分。例如，沿X方向，第一子隔离结构图案6100相对于第二子隔离结构620的两个边缘具有突出的 部分。当然，本示例不限于此，第一子隔离结构图案6100的边缘还可以与第二子隔离结构620的边缘齐平。
例如，如图16和图17B所示，对第一子隔离结构图案6100进行湿刻(刻蚀液对第二子隔离结构620的影响较小)以使得第一子隔离结构图案6100的边缘相对于第二子隔离结构620的边缘内缩形成底切结构。例如，对第一子隔离结构图案6100进行湿刻后形成第一子隔离结构610以及隔离结构600。
图18为根据本公开另一实施例的一示例提供的显示基板的局部截面结构示意图。图18所示示例中的显示基板与图16至图17B所示的显示基板的不同之处在于第一子隔离结构610与第一电极110的材料不同。图18所示显示基板中的衬底基板01以及有机发光元件100可与图1A至图9B所示实施例中的衬底基板01以及有机发光元件100具有相同的特征，在此不再赘述。本示例中的其他膜层011可以与图1A至图9B所示实施例中的其他膜层011具有相同的特征，在此不再赘述。图18所示的第一子隔离结构610与第二子隔离结构620的形状、厚度以及两者平行于衬底基板方向的尺寸关系可以与图11A至图17B所示的显示基板中第一子隔离结构610与第二子隔离结构620的形状、厚度以及两者平行于衬底基板方向的尺寸关系相同，在此不再赘述。
例如，如图18所示，第一子隔离结构610的材料可以包括氮化硅、氧化硅或者氮氧化硅中的任意一种或多种，第二子隔离结构620的材料可以与像素限定部401的材料相同。
例如，图19A至图19B为形成图18之前的显示基板的制作方法流程示意图。例如，如图18和图19A所示，显示基板的制作方法可以包括在玻璃载板上制备衬底基板01。本示例中形成的衬底基板01可以与图4A和图5A所示显示基板中形成的衬底基板01具有相同的特征，在此不再赘述。例如，如图18和图19A所示，在衬底基板01上形成其他膜层011以及平坦层500的工艺流程可以与图5A所示显示基板中形成其他膜层011以及平坦层500的工艺流程相同，也可以与图4A所示显示基板中形成其他膜层011以及平坦层500的工艺流程相同，在此不再赘述。
例如，如图18和图19A所示，在平坦层500上形成第一子隔离结构层，例如，在平坦层500上沉积第一子隔离结构层。例如，第一子隔离结构层的厚度可以为300～10000埃。例如，形成第一子隔离结构层后，对第一子隔离结构层图案化形成第一子隔离结构图案。例如，对第一子隔离结构层进行干刻以形 成第一子隔离结构图案。例如，在第一子隔离结构图案上形成第二子隔离结构层。例如，第二子隔离结构层的厚度可以为0.5～3微米。例如，在第二子隔离结构层上涂胶、曝光以及显影后，在第一子隔离结构图案上形成第二子隔离结构620。
例如，如图19A所示，在第二子隔离结构620形成后，对第一子隔离结构图案进行湿刻(刻蚀液对第二子隔离结构的影响较小)以使第一子隔离结构图案的边缘相对于第二子隔离结构的边缘内缩以形成底切结构(即隔离结构600)，该底切结构包括第一子隔离结构610和第二子隔离结构620的边缘。例如，第二子隔离结构620的边缘相对于第一子隔离结构610突出的隔离突出部601沿X方向的尺寸可以不小于0.2微米。
例如，如图18和图19B所示，在形成隔离结构600后，在平坦层500上图案化形成第一电极110。本示例中形成第一电极以及后续形成的像素限定图案等膜层的工艺方法可以与图1A至图5D所示显示基板中形成第一电极以及后续形成的像素限定图案等膜层的工艺方法相同，在此不再赘述。
例如，如图18所示，隔离结构600与像素限定图案400的像素限定部401之间设置有间隔。例如，隔离结构600的厚度可以小于像素限定部401的厚度。
图20为根据本公开另一实施例的一示例提供的显示基板的局部截面结构示意图。图20所示示例中的显示基板与图16所示显示基板不同之处在于隔离结构的层叠层数不同。图20所示显示基板中的衬底基板01以及有机发光元件100可与图1A至图9B所示实施例中的衬底基板01以及有机发光元件100具有相同的特征，在此不再赘述。本示例中的其他膜层011可以与图1A至图9B所示实施例中的其他膜层011具有相同的特征，在此不再赘述。图20所示显示基板中的平坦层500可以与图16所示显示基板中的平坦层500具备相同的特征，在此不再赘述。
例如，如图20所示，每个隔离结构600还包括与第二子隔离结构620和第一子隔离结构610层叠设置的第三子隔离结构630，第三子隔离结构630位于第一子隔离结构610与衬底基板01之间；沿相邻子像素100的排列方向(如图所示的X方向)，该相邻子像素100之间的隔离结构600中，第三子隔离结构630的尺寸大于第一子隔离结构610的最大尺寸。
例如，如图20所示，沿X方向，第二子隔离结构620的尺寸与第三子隔离结构630的尺寸之比可以为0.8～1.2。例如，沿X方向，第二子隔离结构620 的尺寸与第三子隔离结构630的尺寸之比可以为0.9～1.1。例如，沿X方向，第二子隔离结构620的尺寸与第三子隔离结构630的尺寸可以相等。
例如，如图20所示，像素限定图案400包括第二开口420，第二开口420被配置为暴露隔离结构600。例如，隔离结构600与第二开口420的边缘之间设置有一定的间隔。
例如，如图20所示，沿垂直于衬底基板01的方向，第二子隔离结构620的厚度和第三子隔离结构630的厚度均小于第一子隔离结构610的厚度。
例如，如图20所示，沿垂直于衬底基板01的方向，隔离结构600的厚度可以小于像素限定图案400的像素限定部401的厚度。但不限于此，隔离结构600的厚度也可以大于或者等于像素限定部401的厚度。
例如，如图20所示，第三子隔离结构630与第一电极110同层设置。例如，第三子隔离结构630和第一电极110均设置在平坦层500的表面。
例如，如图20所示，第二子隔离结构620的材料与第三子隔离结构630的材料相同，第二子隔离结构620的材料与第一子隔离结构630的材料不同。例如，第一子隔离结构610和第二子隔离结构620的材料均为无机材料。例如，第一子隔离结构610的材料可以为氮化硅，第二子隔离结构620和第三子隔离结构630的材料可以为氧化硅。例如，第一子隔离结构610的材料可以为铝，第二子隔离结构620和第三子隔离结构630的材料可以为钛。上述两者的材料不同可以指两者的材料的致密度不同，或者两者的材料的折射率不同，或者两者的材料的亲液性不同，或者两者的材料的和某种溶剂化学活性不同等。
例如，如图20所示，第一子隔离结构610被平行于XY面的平面所截的截面可以为梯形，梯形的上底与第二子隔离结构620的表面接触，梯形的下底与第三子隔离结构630的表面接触。当然本公开实施例不限于此，第一子隔离结构610被平行于XY面的平面所截的截面也可以为矩形。
例如，如图20所示，第二子隔离结构620和第三子隔离结构630被平行于XY面的平面所截的截面可以均为矩形。
例如，第一子隔离结构610和第三子隔离结构630的厚度之和与发光功能层的厚度可以为0.8～1.2。例如，第一子隔离结构610和第三子隔离结构630的厚度之和与发光功能层的厚度可以为0.9～1.1，通过将第一子隔离结构610和第三子隔离结构630的厚度之和设置的较小可以使得电荷产生层在第二子隔离结构620的隔离突出部601的位置处断开，而第二电极在该隔离突出部601 的位置处没有断开，保持连续。当然，本公开实施例不限于此，第一子隔离结构610和第三子隔离结构630的厚度之和可以大于发光功能层的厚度以使电荷产生层和第二电极均在第二子隔离结构620的隔离突出部601的位置处断开。
例如，第一子隔离结构610、第二子隔离结构620和第三子隔离结构630的至少之一包括至少一层膜层。
例如，图21A至图21B为形成图20之前的显示基板的一种制作方法流程示意图。例如，如图20和图21A所示，显示基板的制作方法可以包括在玻璃载板上制备衬底基板01。本示例中形成的衬底基板01可以与图4A和图5A所示显示基板中形成的衬底基板01具有相同的特征，在此不再赘述。例如，如图20和图21A所示，在衬底基板01上形成其他膜层011以及平坦层500的工艺流程可以与图5A所示显示基板中形成其他膜层011以及平坦层500的工艺流程相同，也可以与图4A所示显示基板中形成其他膜层011以及平坦层500的工艺流程相同，在此不再赘述。
例如，如图20和图21A所示，在平坦层500上依次形成第三子隔离结构层、第一子隔离结构层以及第二子隔离结构层，然后通过干刻形成三层隔离结构图案，之后对位于中间层的第一子隔离结构图案进行湿刻(刻蚀液对第一子隔离结构图案的材料的刻蚀选择比大于对第二子隔离结构图案和第三子隔离结构图案的材料的刻蚀选择比)以使第一子隔离结构图案的边缘相对于第二子隔离结构图案的边缘内缩以在第二隔离结构图案的边缘和第一子隔离结构图案的边缘处形成底切结构，从而形成隔离结构600。
例如，如图20和图21B所示，在形成隔离结构600后，在平坦层500上图案化形成第一电极110。本示例中形成第一电极以及后续形成的像素限定图案等膜层的工艺方法可以与图1A至图5D所示显示基板中形成第一电极以及后续形成的像素限定图案等膜层的工艺方法相同，在此不再赘述。
例如，图22A至图22C为形成图20之前的显示基板的另一种制作方法流程示意图。图22A至图22C所示的显示基板的制作方法与图21A至图21B所示的显示基板的制作方法的不同之处在于形成具有底切结构特点的隔离结构600的步骤位于形成像素限定图案400之后。例如，如图20和图22A所示，显示基板的制作方法可以包括在玻璃载板上制备衬底基板01。本示例中形成的衬底基板01可以与图4A和图5A所示显示基板中形成的衬底基板01具有相同的特征，在此不再赘述。例如，如图20和图22A所示，在衬底基板01上形 成其他膜层011以及平坦层500的工艺流程可以与图5A所示显示基板中形成其他膜层011以及平坦层500的工艺流程相同，也可以与图4A所示显示基板中形成其他膜层011以及平坦层500的工艺流程相同，在此不再赘述。
例如，如图20和图22A所示，在平坦层500上依次形成第三子隔离结构层、第一子隔离结构层以及第二子隔离结构层，然后通过干刻形成第三子隔离结构图案6300、第一子隔离结构图案6100以及第二子隔离结构图案6200。例如，第三子隔离结构图案6300、第一子隔离结构图案6100以及第二子隔离结构图案6200在衬底基板01上的正投影完全重合。
例如，如图20和图22B所示，在形成第三子隔离结构图案6300、第一子隔离结构图案6100以及第二子隔离结构图案6200之后，在平坦层500上图案化形成第一电极110。本示例中形成第一电极的工艺方法可以与图1A至图5D所示显示基板中形成第一电极的工艺方法相同，在此不再赘述。
例如，如图20和图22C所示，在形成第一电极110之后，在第一电极110上形成像素限定膜，并对像素限定膜图案化形成像素限定图案400，像素限定图案400包括暴露第一电极110的第一开口410以及暴露第三子隔离结构图案6300、第一子隔离结构图案6100以及第二子隔离结构图案6200的第二开口420。
例如，如图20和图22C所示，在形成像素限定图案400以及隔垫物012后，采用暴露各子隔离结构图案的层叠结构掩模板，对暴露的各子隔离结构图案的层叠结构中的第一子隔离结构图案6100进行湿刻使得第一子隔离结构图案6100的边缘相对于第二子隔离结构图案6100的边缘内缩形成底切结构，进而形成隔离结构600。后续形成发光功能层等膜层的工艺步骤可以与图4B和图7所示示例中形成发光功能层等膜层的工艺步骤相同，在此不再赘述。
图23为根据本公开另一实施例的一示例提供的显示基板的局部截面结构示意图。图23所示示例中的显示基板与图20所示显示基板不同之处在于隔离结构的位置不同。图23所示显示基板中的衬底基板01以及有机发光元件100可与图1A至图9B所示实施例中的衬底基板01以及有机发光元件100具有相同的特征，在此不再赘述。本示例中的其他膜层011可以与图1A至图9B所示实施例中的其他膜层011具有相同的特征，在此不再赘述。图23所示显示基板中的平坦层500可以与图20所示显示基板中的平坦层500具备相同的特征，在此不再赘述。
例如，如图23所示，像素限定图案400包括多个第一开口410，多个第一开口410与多个子像素100一一对应设置以限定多个子像素100的发光区，第一开口410被配置为暴露第一电极110。例如，如图23所示，像素限定图案400除第一开口410外的部分为像素限定部401，隔离结构600位于像素限定图案400的像素限定部401远离衬底基板01的一侧。
例如，如图23所示，每个隔离结构600包括依次层叠设置第一子隔离结构610、第二子隔离结构620以及第三子隔离结构630，第三子隔离结构630位于第一子隔离结构610与衬底基板01之间；沿相邻子像素100的排列方向(如图所示的X方向)，该相邻子像素100之间的隔离结构600中，第三子隔离结构630的尺寸大于第一子隔离结构610的最大尺寸。图23所示显示基板中的隔离结构600可以与图20所示显示基板中的隔离结构600具有相同的特征，在此不再赘述。
例如，图24为形成图23之前的显示基板的一种制作方法流程示意图。例如，如图23和图24所示，显示基板的制作方法可以包括在玻璃载板上制备衬底基板01。本示例中形成的衬底基板01可以与图4A和图5A所示显示基板中形成的衬底基板01具有相同的特征，在此不再赘述。例如，如图23和图24所示，在衬底基板01上形成其他膜层011、平坦层500以及第一电极110的工艺流程可以与图5A所示显示基板中形成其他膜层011、平坦层500以及第一电极110的工艺流程相同，也可以与图4A所示显示基板中形成其他膜层011、平坦层500以及第一电极110的工艺流程相同，在此不再赘述。
例如，如图23和图24所示，在形成第一电极110后，在平坦层500以及第一电极110上形成像素限定膜，并对像素限定膜图案化以形成具有暴露多个第一电极110的多个第一开口110的像素限定图案400。
例如，如图23和图24所示，在形成像素限定图案400以及隔垫物012后，在像素限定部401上依次形成第三子隔离结构层、第一子隔离结构层以及第二子隔离结构层，然后通过干刻形成三层隔离结构图案，之后对位于中间层的第一子隔离结构图案进行湿刻(刻蚀液对第一子隔离结构图案的刻蚀选择比大于对第二子隔离结构图案和第三子隔离结构图案的材料的刻蚀选择比)以使第一子隔离结构图案的边缘相对于第二子隔离结构图案的边缘内缩以在第二隔离结构图案的边缘和第一子隔离结构图案的边缘处形成底切结构，从而形成隔离结构600。
图25为根据本公开另一实施例的一示例提供的显示基板的局部截面结构示意图。图25所示示例中的显示基板与图20所示显示基板不同之处在于隔离结构包括的层叠结构不同。例如，如图25所示，像素限定图案400包括被配置为包括第一电极110的第一开口410以及被配置为暴露隔离结构600的第二开口410，隔离结构600还包括位于第三子隔离结构630与衬底基板01之间的阻隔部640，阻隔部640与第一电极110同层设置。阻隔部可以起到阻隔隔离结构和平坦层的效果，防止形成隔离结构的过程中对平坦层造成损伤。
例如，第一电极110可以包括多层膜层，阻隔部640可以采用无机材料。例如，阻隔部640的材料可以与第一子隔离结构、第二子隔离结构和第三子隔离结构的至少之一的材料相同。
图25所示显示基板中的衬底基板01以及有机发光元件100可与图1A至图9B所示实施例中的衬底基板01以及有机发光元件100具有相同的特征，在此不再赘述。本示例中的其他膜层011可以与图1A至图9B所示实施例中的其他膜层011具有相同的特征，在此不再赘述。图25所示显示基板中的平坦层500可以与图20所示显示基板中的平坦层500具备相同的特征，在此不再赘述。
例如，如图25所示，沿垂直于衬底基板01的方向，阻隔部640的厚度与第一电极110的厚度之比可以为0.8～1.2。例如，阻隔部640的厚度与第一电极110的厚度之比可以为0.9～1.1。阻隔部640的厚度与第一电极110的厚度可以相等。
例如，如图25所示，阻隔部640的形状和尺寸可以与第一电极110的形状和尺寸均相同，但不限于此，阻隔部的形状和尺寸可以根据产品的实际需求进行设置。
例如，如图25所示，阻隔部640没有被像素限定图案400的像素限定部401覆盖，阻隔部640在衬底基板01上的正投影与像素限定部401在衬底基板01上的正投影没有交叠。例如，隔离结构600与像素限定图案400的像素限定部401之间设置有一定间隔。当然，本示例不限于此，阻隔部640也可以被像素限定部401覆盖。
例如，如图25所示，隔离结构600位于相邻子像素100之间，沿该相邻子像素100的排列方向，阻隔部640的尺寸可以大于第三子隔离结构620的尺寸。
例如，如图25所示，沿垂直于衬底基板01方向，第一子隔离结构610、第三子隔离结构630以及阻隔部640的厚度之和可以大于发光功能层的厚度，以使电荷产生层和第二电极均在第二子隔离结构620的隔离突出部601处断开。
例如，图26A至图26B为形成图25之前的显示基板的一种制作方法流程示意图。例如，如图25和图26A所示，显示基板的制作方法可以包括在玻璃载板上制备衬底基板01。本示例中形成的衬底基板01可以与图4A和图5A所示显示基板中形成的衬底基板01具有相同的特征，在此不再赘述。例如，如图25和图26A所示，在衬底基板01上形成其他膜层011以及平坦层500的工艺流程可以与图5A所示显示基板中形成其他膜层011以及平坦层500的工艺流程相同，也可以与图4A所示显示基板中形成其他膜层011以及平坦层500的工艺流程相同，在此不再赘述。
例如，如图25和图26A所示，在平坦层500上形成电极层，并对电极层图案化形成第一电极110。例如，可以在形成第一电极110之前形成阻隔部640，也可以在第一电极110形成之后形成阻隔部640。
例如，如图25和图26B所示，在阻隔部640上依次形成第三子隔离结构层、第一子隔离结构层以及第二子隔离结构层，然后通过干刻形成三层隔离结构图案，之后对位于中间层的第一子隔离结构图案进行湿刻(刻蚀液对第一子隔离结构图案的材料的刻蚀选择比大于对第二子隔离结构图案和第三子隔离结构图案的材料的刻蚀选择比)以使第一子隔离结构图案的边缘相对于第二子隔离结构图案的边缘内缩以在第二隔离结构图案的边缘和第一子隔离结构图案的边缘处形成底切结构，从而形成隔离结构600。
例如，如图25和图26B所示，阻隔部640的材料不同于第一子隔离结构610、第二子隔离结构620和第三子隔离结构630的材料，以防止在形成第一子隔离结构610、第二子隔离结构620和第三子隔离结构630的过程中影响阻隔部640。
例如，如图25和图26B所示，在形成隔离结构600后，在隔离结构600以及第一电极110上形成像素限定膜，并对像素限定膜图案化以形成暴露第一电极110的第一开口410和暴露隔离结构600的第二开口420。
本示例中形成像素限定膜后的其他各膜层的工艺方法可以与图1A至图5D所示显示基板中形成第像素限定膜后的其他各膜层的工艺方法相同，在此 不再赘述。
例如，图11A至图26B所示各显示基板中的多个子像素的排列方式均可以与图10A至图10E所示的显示基板中的多个子像素的排列方式相同，且可以图11A至图26B所示隔离结构600可以位于图10A至图10E所示凹槽210的位置，例如图11A至图26B所示隔离结构600可以与图10A至图10E所示凹槽210具有相同的排列方式，可以图11A至图26B所示隔离结构600替换图10A至图10E所示凹槽210。
例如，在隔离结构位于平坦层中时，相邻子像素之间的像素限定部可以保留，也可以去除；在隔离结构位于像素限定图案的第二开口中时，相邻子像素之间的像素限定部可以保留。
本公开另一实施例提供一种显示装置，包括图11A至图26B所示的显示基板，通过在显示装置中相邻子像素之间设置隔离结构，可以使得电荷产生层在隔离结构的边缘断开，有利于降低相邻子像素之间产生串扰的几率。
例如，该显示装置还包括位于显示面板出光侧的盖板。
例如，该显示装置可以为有机发光二极管显示装置等显示器件以及包括该显示装置的电视、数码相机、手机、手表、平板电脑、笔记本电脑、导航仪等任何具有显示功能的产品或者部件，本实施例不限于此。
图27为根据本公开另一实施例的一示例提供的显示基板的局部截面结构示意图，图28A为根据本公开另一实施例的另一示例提供的显示基板的局部截面结构示意图，图28B为根据本公开另一实施例的另一示例提供的显示基板的局部截面结构示意图。图27所示显示基板可以与图1C所示显示基板具有相同的第一显示区域A1和第二显示区域A2。如图27至图28B所示，显示基板包括衬底基板01以及设置在衬底基板01上的第一显示区域A1的多个子像素10。子像素10包括有机发光元件100，有机发光元件100包括发光功能层130以及沿垂直于衬底基板01的方向位于发光功能层130两侧的第一电极110和第二电极120，第一电极110位于发光功能层130与衬底基板01之间，发光功能层130包括多个膜层，例如，多个膜层包括电荷产生层133(可以如图1或图11A所示的电荷产生层133)。显示基板还包括隔离部700，隔离部700包括层叠设置的第一子隔离部710和第二子隔离部720，第一子隔离部710位于第二子隔离部720与衬底基板01之间。例如，第一子隔离部710的材料包括无机非金属材料或者金属材料，第二子隔离部720的材料包括有机材料。
如图27和图28A所示，第二子隔离部720包括相对于第一子隔离部710的边缘突出的突出部701，突出部701位于相邻子像素100之间。
如图28B所示，第二子隔离部720的至少部分侧表面与平行于第一子隔离部710和第二子隔离部720的接触面的平面的坡度角大于60度且小于120度，和/或，第二子隔离部720的至少部分侧表面与平行于第一子隔离部710和第二子隔离部720的接触面的平面的坡度角大于60度且小于120度。
例如，第一子隔离结构610的至少部分侧表面与平行于第一子隔离部710和第二子隔离部720的接触面的平面的坡度角大于70度且小于110度，和/或，第二子隔离部720的至少部分侧表面与平行于第一子隔离部710和第二子隔离部720的接触面的平面的坡度角大于70度且小于110度。例如，第一子隔离部710的至少部分侧表面与平行于第一子隔离部710和第二子隔离部720的接触面的平面的坡度角大于80度且小于100度，和/或，第二子隔离部720的至少部分侧表面与平行于第一子隔离部710和第二子隔离部720的接触面的平面的坡度角大于80度且小于100度。
上述第一子隔离部的至少部分侧表面与平行于第一子隔离部和第二子隔离部的接触面的平面的坡度角可以第一子隔离部远离衬底基板一侧的表面与第一子隔离部的侧表面之间的夹角，也可以为第一子隔离部面向衬底基板一侧的表面与第一子隔离部的侧表面之间的夹角；上述第二子隔离部的至少部分侧表面与平行于第一子隔离部和第二子隔离部的接触面的平面的坡度角可以为第二子隔离部远离衬底基板一侧的表面与第二子隔离部的侧表面之间的夹角，也可以为第二子隔离部面向衬底基板一侧的表面与第二子隔离部的侧表面之间的夹角。上述第一子隔离部的侧表面可以指第一子隔离部的与衬底基板之间具有一定夹角的表面，上述第二子隔离部的侧表面可以指第二子隔离部的与衬底基板之间的夹角具有一定夹角的表面。
图28A和图28B所示示例区别在于第一子隔离部710和第二子隔离部720的位置关系以及角度关系。
如图27至图28B所示，发光功能层130包括的多个膜层中的至少一层在隔离部700处断开。例如，发光功能层130包括电荷产生层133，电荷产生层133在隔离部700的边缘处断开。
本公开实施例在显示基板中相邻子像素之间设置隔离部，通过调节第一子隔离部和第二子隔离部的相对位置关系，或者第一子隔离部的侧表面的角度以 及第二子隔离部的侧表面的角度，可以使得发光功能层的至少一层膜层在第二子隔离部相对于第一子隔离部的边缘突出的突出部处断开，或者在隔离部的边缘处断开，有利于降低相邻子像素之间产生串扰的几率。
本公开实施例通过在显示基板中相邻子像素之间设置隔离部，可以使得电荷产生层在隔离部的边缘断开，有利于降低相邻子像素之间产生串扰的几率。
本实施例中的衬底基板01以及有机发光元件100可与图1A至图9B所示实施例中的衬底基板01以及有机发光元件100具有相同的特征，在此不再赘述。本示例中的其他膜层011可以与图1A至图9B所示实施例中的其他膜层011具有相同的特征，在此不再赘述。本示例中的平坦层500可以与图16至图26B所示平坦层500具有相同的特征，在此不再赘述。
例如，如图27所示，多个子像素10可以包括沿X方向排列的相邻两个子像素10。例如，该相邻两个子像素10中设置的多个隔离部700沿X方向排列。例如，图27示意性的示出相邻子像素100之间设置有至少一组隔离部，每组隔离部包括间隔设置的两个隔离部700，两个隔离部700沿该相邻子像素100的排列方向排列(例如X方向)且间隔设置，且两个隔离部700的突出部701彼此靠近，但不限于此，相邻子像素100之间还可以设置彼此间隔的三个隔离部或者彼此间隔的更多个隔离部。例如，第一子隔离部710的边缘相对于覆盖其的第二子隔离部720的边缘内缩以形成底切结构，第二子隔离部720的突出部701悬空设置。
例如，在上述相邻两个子像素10之间没有设置隔离部700时，该相邻两个子像素10的发光功能层130中的共通膜层(例如包括电荷产生层)为整层膜层。由于电荷产生层具有较高的导电率，对于具有高分辨率的显示装置而言，电荷产生层的高导电性容易导致相邻子像素10发生串扰。
本公开实施例提供的显示基板中，通过在该相邻两个子像素之间设置隔离部，可以使得形成在隔离部的突出部处的电荷产生层断开，此时，该相邻两个子像素的电荷产生层间隔设置，可以增加相邻子像素之间发光功能层的电阻，从而在降低该相邻两个子像素之间产生串扰的几率的同时，又不影响子像素的正常显示。
例如，如图27所示，沿该相邻子像素10的排列方向，所述两个隔离部700中的两个第一子隔离部710之间的间隔大于两个第二子隔离部720之间的间隔。
例如，如图27所示，在两个隔离部700之间断开的膜层与第一子隔离部710之间设置有间隔，且断开的膜层在衬底基板01上的正投影与第二子隔离部720在衬底基板01上的正投影交叠或者相接。
例如，如图27所示，沿垂直于衬底基板01的方向，第二子隔离部720的最大厚度大于所述第一子隔离部710的最大厚度。例如，第二子隔离部720的平均厚度大于第一子隔离部710的平均厚度。
例如，如图27所示，沿垂直于衬底基板01的方向，突出部701的厚度小于第二子隔离部720中除突出部701外的部分的厚度。例如，突出部701的厚度与第二子隔离部720中除突出部701外的部分的厚度差可以为第一子隔离部710的厚度。
例如，如图28B所示，突出部701远离衬底基板01一侧的表面包括弯曲表面，且弯曲表面朝向第一子隔离部710弯曲，突出部701的弯曲表面的坡度角为15～70度。例如，突出部701的弯曲表面的坡度角为30～60度。例如，突出部701的弯曲表面的坡度角为40～50度。例如，突出部701的弯曲表面的坡度角小于第一子隔离部710的侧表面与衬底基板01之间的角度。例如，第一子隔离部710的侧边可以为曲边也可以为直边，例如，第一子隔离部710的侧边可以向靠近第一子隔离部710的中心弯曲。例如，第一子隔离部710的侧边与其远离衬底基板01一侧的表面之间的夹角可以为60度～90度。例如，第一子隔离部710的侧边与其靠近衬底基板01一侧的表面之间的夹角可以为60度～90度。上述曲边与一表面之间的夹角可以指该曲边与该表面交点位置处的切线与该表面之间的夹角。但不限于此，也可以为上述曲边中点处的切线与该表面之间的夹角。
例如，如图27所示，发光功能层130中电荷产生层133面向衬底基板01一侧的膜层在隔离部710处断开。
例如，如图27所示，第一发光层发出的光的颜色与第二发光层发出的光的颜色相同。例如，同一个子像素中所述第一发光层发出的光的颜色与所述第二发光层发出的光的颜色相同，且相邻的至少两个子像素中，发光层发出的光颜色不同。
例如，如图27所示，发光功能层130包括发光层(第一发光层或第二发光层)，发光功能层130中至少一层断开的膜层在衬底基板01上的正投影的面积大于发光层(第一发光层或第二发光层)在衬底基板上01的正投影的面积。 例如，断开的膜层可以为共通层，发光层可以为通过精细金属掩模板形成的图案化膜层。
例如，发光功能层130包括至少一层发光层(第一发光层或第二发光层)，发光功能层130中在隔离部700处断开的膜层中包括至少一层发光层以及至少一层其他膜层。例如，断开的至少一层其他膜层在衬底基板01上的正投影的面积大于断开的至少一层发光层在衬底基板01上的正投影的面积。例如，断开的至少一层其他膜层覆盖隔离部700的部分的面积，大于断开的至少一层发光层覆盖隔离部的部分的面积。例如，断开的至少一层其他膜层完全覆盖隔离部700，至少一层发光层仅覆盖了隔离部700的部分。
例如，发光功能层130包括的多个膜层的至少一层以及第二电极120与隔离部700在衬底基板01上的投影有交叠。
例如，发光功能层130包括的多个膜层的至少一层的至少部分覆盖隔离部700的部分侧表面。例如，上述膜层可以覆盖第一子隔离部710的侧表面，和/或，覆盖第二子隔离部720的侧表面。
例如，如图27所示，沿垂直于衬底基板01的方向，第一子隔离部710的厚度小于第二子隔离部720的厚度。
例如，如图27所示，沿相邻子像素100的排列方向，如X方向，位于该相邻子像素100之间的隔离部700中，突出部701的尺寸可以大于第一子隔离部710的尺寸。但不限于此，突出部在上述排列方向上的尺寸也可以小于或者等于第一子隔离部的尺寸。
例如，发光功能层130中的所述多个膜层中的至少一层在所述隔离部700面向其中一个相邻子像素一侧边缘处断开，在面向另一个相邻子像素一侧边缘处不断开。
例如，所述第二子隔离部720面向其中一个相邻子像素的至少部分，与所述第二子隔离部720面向另一个相邻子像素的至少部分坡度角不同；和/或，所述第二子隔离部720的面向其中一个相邻子像素的至少部分具有所述突出部，所述第二子隔离部720面向另一个相邻子像素的部分没有所述突出部。
例如，至少在所述突出部所在的所述隔离部的部分，所述所述第一子隔离部在衬底基板上的投影全部落入所述第二子隔离部的投影内。
例如，如图27所示，显示基板还包括像素限定图案400，像素限定图案400包括多个第一开口410，多个第一开口410与多个子像素100一一对应设 置以限定多个子像素100的发光区，第一开口410被配置为暴露第一电极110。例如，像素限定图案400中包括围绕第一开口410的像素限定部401。例如，像素限定图案400还包括第二开口420，像素限定部401围绕第二开口420。
例如，如图27至图28B所示，像素限定图案400包括位于相邻设置的第一开口410和第二开口420之间的像素限定部401，像素限定部401的一端被配置为形成第一开口410，该像素限定部401的另一端包括第二子隔离部720，该像素限定部401被配置为形成第一开口410的侧壁与平行于衬底基板01的平面之间的角度不同于第二子隔离部720的侧壁与平行于衬底基板01的平面之间的角度。例如，第一开口410的侧壁和第二开口420的侧壁可以具有不同的倾斜角度，或者具有不同的形状。
例如，如图27所示，像素限定图案400包括第二子隔离部720。例如，围绕第二开口420的像素限定部401包括第二子隔离部720，第二子隔离部720为像素限定图案400的一部分，即部分像素限定部401复用为第二子隔离部720。
例如，如图27所示，第一电极110包括至少一层电极，第一子隔离部710与第一电极110的一层电极同层设置。例如，第一电极110和第一子隔离部710可以均设置在平坦层500上。例如，第一电极110可以包括层叠设置的三层电极层，该三层电极层依次包括氧化铟锡(ITO)、银(Ag)以及氧化铟锡(ITO)，但不限于此，还可以依次包括钛(Ti)、铝(Al)以及钛(Ti)，或者钼(Mo)、铝钕合金(AlNd)以及氧化铟锡(ITO)。
例如，第一电极包括至少一层电极层，第一子隔离部包括至少一层膜层，第一子隔离部的一层膜层与第一电极的一层电极层同层设置，像素限定部被配置为分隔第一子隔离部与第一电极。
例如，第一电极与第一子隔离部的一层膜层同层设置的电极层的材料与该膜层的材料相同。
例如，在第一电极110包括多层电极层时，第一子隔离部710可以与第一电极110中最靠近衬底基板01的一层电极层同层设置。
例如，如图27所示，第一电极110中与第一子隔离部710同层设置的电极层的材料与第一子隔离部710的材料相同。例如，第一子隔离部710的材料可以与第一电极110中最靠近衬底基板01的一层电极层的材料相同，例如可以为氧化铟锡。
例如，第二子隔离部720相对于第一子隔离部710突出的部分的尺寸可以为0.1～5微米。例如，第二子隔离部720相对于第一子隔离部710突出的部分的尺寸可以为0.2～1微米。
例如，如图27所示，第一子隔离部710与发光功能层的厚度之比为0.7～1.3。例如，第一子隔离部710与发光功能层的厚度之比为0.8～1.2。例如，第一子隔离部710与发光功能层的厚度之比为0.9～1.2。
例如，第一子隔离部710的厚度可以设置的较小，例如1000～5000埃，例如，2000～4000埃，以使得形成在第二子隔离部720的突出部701位置处的电荷产生层断开，而位于突出部701位置处的第二电极120没有断开，保证第二电极120具有较好的电学特性。
例如，如图27所示，发光功能层130在隔离部700的边缘断开后填充在第一子隔离部710和第二子隔离部720形成的底切结构内，在使得隔离部在断开电荷产生层的基础上，尽量不断开第二电极，保证第二电极具有较好的电学特性，以及亮度的均一性。当然，本公开实施例不限于此，第一子隔离部的厚度也可以设置的较大以使得第二电极在隔离部的底切结构位置处断开(与图4B所示的第二电极120在底切结构处断开相似)。
例如，如图27所示，第一子隔离部710与第一电极110间隔设置。例如，像素限定图案400的像素限定部401被配置为分隔第一子隔离部710与第一电极110。
例如，图28A为根据本公开另一实施例的一示例提供的显示基板的局部截面结构示意图。图28A所示示例中的显示基板与图27所示的显示基板的不同之处在于图28A所示的显示基板中的第一子隔离部710的材料与第一电极110的材料不同。例如，在本公开实施例的一示例中，第一子隔离部710的材料可以包括氮化硅、氧化硅或者氮氧化硅中的任意一种或多种。
图28A所示显示基板中的衬底基板01以及有机发光元件100可与图1A至图9B所示实施例中的衬底基板01以及有机发光元件100具有相同的特征，在此不再赘述。本示例中的其他膜层011以及平坦层500可以与图1A至图9B所示实施例中的其他膜层011具有相同的特征，在此不再赘述。本示例中的平坦层500可以与图16至图26B所示平坦层500具有相同的特征，在此不再赘述。本示例中的像素限定图案400可以与图27所示的像素限定图案400具有相同的特征，在此不再赘述。
例如，图29A至图29D为形成图27之前的显示基板的一种制作方法流程示意图。例如，如图27、图29A至图29D所示，显示基板的制作方法包括：在衬底基板01上形成多个子像素100，其中，形成子像素100包括在垂直于衬底基板01的方向上依次形成层叠设置的第二电极120、发光功能层130以及第一电极110；在衬底基板01上图案化形成无机层图案；在无机层图案上形成有机层，并对有机层图案化形成开口图案420；对无机层图案进行刻蚀以形成第一子隔离部710，其中，开口图案420的边缘包括与第一子隔离部710层叠设置的第二子隔离部720，第一子隔离部710的边缘相对于第二子隔离部720的边缘向外扩展以使第二子隔离部720包括相对于第一子隔离部710的边缘突出的突出部701，突出部701位于相邻子像素100之间。在形成第一子隔离部710后，在第二子隔离部720上形成发光功能层130，发光功能层包括电荷产生层，电荷产生层在第二子隔离部720的突出部701处断开。
例如，如图27和图29A所示，显示基板的制作方法可以包括在玻璃载板上制备衬底基板01。本示例中形成的衬底基板01可以与图4A和图5A所示显示基板中形成的衬底基板01具有相同的特征，在此不再赘述。例如，如图27和图29A所示，在衬底基板01上形成其他膜层011以及平坦层500的工艺流程可以与图5A所示显示基板中形成其他膜层011以及平坦层500的工艺流程相同，也可以与图4A所示显示基板中形成其他膜层011以及平坦层500的工艺流程相同，在此不再赘述。
例如，如图27和图29A所示，在平坦层500上形成电极层并图案化形成第一电极110和第一子隔离部图案7100。例如，相邻第一电极110之间可以设置两个第一子隔离部图案7100，这两个第一子隔离部图案7100之间的距离可以为2～15微米。例如，如图29A所示，第一电极110和第一子隔离部图案7100均包括层叠设置的多层膜层。例如，如图29A所示，第一电极110和第一子隔离部图案7100均包括层叠设置的氧化铟锡(ITO)、银(Ag)以及氧化铟锡(ITO)，但不限于此，还可以依次包括钛(Ti)、铝(Al)以及钛(Ti)，或者钼(Mo)、铝钕合金(AlNd)以及氧化铟锡(ITO)。
例如，如图27和图29B所示，采用掩模对第一电极110进行遮挡，对掩模暴露的第一子隔离部图案7100进行刻蚀以保留第一子隔离部图案7100中最靠近衬底基板01一侧的一层膜层。例如，对第一子隔离部图案7100刻蚀后保留一层氧化铟锡层。例如，可以在对第一子隔离部图案7100进行刻蚀的过程 中，对刻蚀程度进行控制以控制保留的一侧膜层的厚度。例如，第一子隔离部图案7100刻蚀后保留的一层氧化铟锡层的厚度可以为1000～5000埃，通过将该膜层厚度设置的较小，可以在保证电荷产生层在后续形成的隔离部的突出部处断开的同时，第二电极在该突出部处不断开，使得第二电极具有较好的电学特性。
例如，如图27、图29C至图29D所示，无机层图案7100位于相邻子像素100之间，形成的开口图案420暴露无机层图案7100或者形成的开口图案420的边缘与无机层图案7100的边缘齐平；对无机层图案7100进行刻蚀以使无机层图案7100保留的部分的边缘与开口图案420的边缘形成底切结构。例如，无机层图案7100保留的部分为第一子隔离部710。
例如，如图27和图29C所示，在对第一子隔离部图案7100(也称为无机层图案7100)进行刻蚀并保留一层膜层后，在该膜层和第一电极110上形成像素限定膜以及隔垫物层，对像素限定膜进行图案化以形成像素限定图案400，对隔垫物层图案化形成隔垫物012。例如，如图29C所示，像素限定图案400包括暴露第一电极110的第一开口410以及第二开口420(也称为开口图案420)。例如，第二开口420的边缘可以与第一子隔离部图案7100剩余的一侧膜层的边缘齐平。当然，本公开实施例不限于此，还可以在相邻两个第一电极110之间形成一个第一子隔离部图案7100，在该第一子隔离部图案7100刻蚀并保留一层膜层后，在该层膜层上图案化形成具有第二开口420的像素限定图案400，第二开口420暴露该层膜层，对该暴露的膜层进行湿刻以形成第一子隔离部710。
例如，如图27和图29D所示，对无机层图案7100进行湿刻(刻蚀液对像素限定部401以及平坦层500的材料的影响较小)以使开口图案420的边缘相对于无机层图案7100保留的部分的边缘形成突出部701。但不限于此，也可以对无机层图案7100进行干刻。
例如，如图27所示，后续形成封装层017-019等膜层的工艺流程可以与图7所示显示基板中形成封装层等膜层的工艺流程相同，在此不再赘述。
例如，图30A至图30C为形成图28A所示显示基板之前的一种制作方法流程示意图。如图28A和图30A所示，显示基板的制作方法可以包括在玻璃载板上制备衬底基板01。本示例中形成的衬底基板01可以与图4A和图5A所示显示基板中形成的衬底基板01具有相同的特征，在此不再赘述。例如，如 图28A和图30A所示，在衬底基板01上形成其他膜层011以及平坦层500的工艺流程可以与图5A所示显示基板中形成其他膜层011以及平坦层500的工艺流程相同，也可以与图4A所示显示基板中形成其他膜层011以及平坦层500的工艺流程相同，在此不再赘述。
例如，形成的第一子隔离部的至少部分侧表面与平行于第一子隔离部和第二子隔离部的接触面的平面的坡度角大于60度且小于120度，和/或，形成的第二子隔离部的至少部分侧表面与平行于第一子隔离部和第二子隔离部的接触面的平面的坡度角大于60度且小于120度。
例如，如图28A和图30A所示，在平坦层500上形成无机材料层并图案化形成第一子隔离部材料702。例如，在形成第一子隔离部材料702以后，在第一子隔离部材料702形成电极层，并对电极层图案化形成第一电极110。
例如，如图30A所示，相邻两个第一电极110之间可以设置一个第一子隔离部材料702。例如，第一子隔离部材料702与第一电极110之间设置有一定间隔。本示例中的第一电极110可以与图29A所示的第一电极110具有相同的特征，在此不再赘述。
例如，如图30A所示，第一子隔离部材料702的材料与第一电极110的材料不同。例如，第一子隔离部材料702的厚度可以为1000～5000埃，通过将该膜层厚度设置的较小，可以在保证电荷产生层在后续形成的隔离部的突出部处断开的同时，第二电极在该突出部处不断开，使得第二电极具有较好的电学特性。当然，第一子隔离部材料702的厚度也可以设置的较大以使得发光功能层和第二电极均在后续形成的隔离部的突出部处断开。本公开实施例不限于此，第一子隔离部材料702的材料可以与第一电极110的材料相同，则第一子隔离部材料702与第一电极110可以在同一步图案化工艺中形成。
例如，如图28A、图30B至图30C所示，在第一子隔离部材料702和第一电极110上形成像素限定膜以及隔垫物层，对像素限定膜进行图案化以形成像素限定图案400，对隔垫物层图案化形成隔垫物012。例如，如图30B至图30C所示，像素限定图案400包括暴露第一电极110的第一开口410以及第二开口420(也称为开口图案420)，第二开口420暴露第一子隔离部材料702的一部分，对暴露的第一子隔离部材料702进行干刻以形成第一子隔离部图案7100。例如，如图30B至图30C所示，第二开口420的边缘可以与第一子隔离部图案7100的边缘齐平。
例如，如图28A和图30C所示，对第二开口420暴露的第一子隔离部图案7100的边缘进行湿刻以使的第一子隔离部图案7100的边缘相对于围绕第二开口420的像素限定部401的边缘内缩以形成底切结构。例如，开口图案420的边缘相对于无机层图案7100保留的部分的边缘形成突出部701。例如，对第一子隔离部图案7100进行湿刻后形成了第一子隔离部710。
例如，如图28A所示，后续形成封装层等膜层的工艺流程可以与图7所示显示基板中形成封装层等膜层的工艺流程相同，在此不再赘述。
图31为根据本公开另一实施例的一示例提供的显示基板的局部截面结构示意图。图31所示示例中的显示基板与图27所示的显示基板的不同之处在于第一电极110被第二子隔离部720覆盖的部分包括第一子隔离部710。图31所示显示基板中的衬底基板01以及有机发光元件100可与图1A至图9B所示实施例中的衬底基板01以及有机发光元件100具有相同的特征，在此不再赘述。本示例中的其他膜层011可以与图1A至图9B所示实施例中的其他膜层011具有相同的特征，在此不再赘述。本示例中的平坦层500可以与图16至图26B所示平坦层500具有相同的特征，在此不再赘述。
例如，如图31所示，第一电极110与第一子隔离部710为一体化的结构，像素限定部401与第二子隔离结构720为一体化的结构。例如，第一电极110复用为第一子隔离部710，像素限定部401复用为第二子隔离结构720。本公开实施例通过将第一电极的一部分与像素限定部的一部分形成为隔离部，可以节省工艺。
例如，如图31所示，像素限定图案400包括第一开口410和第二开口420，第一开口410被配置为暴露第一电极110，第二开口420暴露平坦层500的一部分。例如，像素限定图案400包括围绕第一开口410和第二开口420的像素限定部401。
例如，如图31所示，位于一个子像素的第一电极110上的像素限定部401向与该子像素相邻的子像素延伸，且该像素限定部401的边缘比该子像素的第一电极110的边缘更靠近该子像素相邻的子像素。
例如，如图31所示，相邻两个子像素中，两个第一电极110的彼此靠近的边缘之间的距离大于位于这两个第一电极110上的两个像素限定部401的彼此靠近的边缘之间的距离。
图32为根据本公开另一实施例的一示例提供的显示基板的局部截面结构 示意图。图32所示示例中的显示基板与图31所示的显示基板的不同之处在于位于相邻两个子像素之间的彼此靠近的两个突出部701之间设置有间隔结构800。图32所示显示基板中的衬底基板01以及有机发光元件100可与图1A至图9B所示实施例中的衬底基板01以及有机发光元件100具有相同的特征，在此不再赘述。本示例中的其他膜层011可以与图1A至图9B所示实施例中的其他膜层011具有相同的特征，在此不再赘述。本示例中的平坦层500可以与图16至图26B所示平坦层500具有相同的特征，在此不再赘述。
例如，如图32所示，彼此靠近的两个突出部701之间设置有间隔结构800，间隔结构800与突出部701间隔设置，且间隔结构800与第二子隔离部720的材料相同。例如，在显示基板应用于像素密度较低的显示产品时，相邻子像素之间的距离设置的较大，通过设置间隔结构，有利于减少第一电极的刻蚀量。
例如，如图32所示，沿垂直于衬底基板01的方向，间隔结构800的厚度与隔离部700的厚度之比可以为0.8～1.2。例如，间隔结构800的厚度与隔离部700的厚度之比可以为0.9～1.1。例如，间隔结构800的厚度可以与隔离部700的厚度相同。
例如，图33A至图33B为形成图31之前的显示基板的一种制作方法流程示意图。例如，如图31和图33A所示，显示基板的制作方法可以包括在玻璃载板上制备衬底基板01。本示例中形成的衬底基板01可以与图4A和图5A所示显示基板中形成的衬底基板01具有相同的特征，在此不再赘述。例如，如图31和图33A所示，在衬底基板01上形成其他膜层011以及平坦层500的工艺流程可以与图5A所示显示基板中形成其他膜层011以及平坦层500的工艺流程相同，也可以与图4A所示显示基板中形成其他膜层011以及平坦层500的工艺流程相同，在此不再赘述。
例如，如图31和图33A所示，在平坦层500上形成电极层，并对电极层图案化形成无机层图案，无机层图案包括第一电极110。
例如，如图31和图33B所示，在第一电极110上形成像素限定膜以及隔垫物层，对像素限定膜进行图案化以形成像素限定图案400，对隔垫物层图案化形成隔垫物012。
例如，如图31和图33B所示，像素限定图案400包括暴露第一电极110的第一开口410以及第二开口420(也称为开口图案420)，第二开口420暴露平坦层500，第二开口420位于相邻子像素之间。例如，第二开口420的边缘 可以与第一电极110的边缘齐平。
例如，如图31和图33B所示，对第二开口420暴露的无机层图案进行刻蚀包括：对第一电极110靠近第二开口420边缘的部分进行刻蚀以使第一电极110的边缘与第二开口420的边缘形成底切结构。
例如，图34A至图34B为形成图32之前的显示基板的一种制作方法流程示意图。例如，如图32和图34A所示，显示基板的制作方法可以包括在玻璃载板上制备衬底基板01。本示例中形成的衬底基板01可以与图4A和图5A所示显示基板中形成的衬底基板01具有相同的特征，在此不再赘述。例如，如图32和图34A所示，在衬底基板01上形成其他膜层011以及平坦层500的工艺流程可以与图5A所示显示基板中形成其他膜层011以及平坦层500的工艺流程相同，也可以与图4A所示显示基板中形成其他膜层011以及平坦层500的工艺流程相同，在此不再赘述。
例如，如图32和图34A所示，在平坦层500上形成电极层，并对电极层图案化形成无机层图案，无机层图案包括第一电极110。
例如，如图32和图34B所示，在第一电极110上形成像素限定膜以及隔垫物层，对像素限定膜进行图案化以形成像素限定图案400，对隔垫物层图案化形成隔垫物012。
例如，如图32和图34B所示，像素限定图案400包括暴露第一电极110的第一开口410、第二开口420(也称为开口图案420)以及间隔结构800，第二开口420暴露平坦层500，第二开口420位于相邻子像素之间，且间隔结构800位于第二开口420内。例如，第二开口420的边缘可以与第一电极110的边缘齐平。
例如，如图32和图34B所示，对第二开口420暴露的无机层图案进行刻蚀包括：对第一电极110靠近第二开口420边缘的部分进行刻蚀以使第一电极110的边缘与第二开口420的边缘形成底切结构。
例如，图27至图34B所示各显示基板中的多个子像素的排列方式均可以与图10A至图10E所示的显示基板中的多个子像素的排列方式相同，且可以图27至图34B所示隔离部700可以位于图10A至图10E所示凹槽210的位置，例如图27至图34B所示隔离部700可以与图10A至图10E所示凹槽210具有相同的排列方式，可以图27至图34B所示隔离部700替换图10A至图10E所示凹槽210。
例如，隔离部位于像素限定图案的第二开口中，相邻子像素之间的像素限定部可以保留。
本公开另一实施例提供一种显示装置，包括图27至图34B所示的显示基板，通过在显示装置中相邻子像素之间设置隔离部，可以使得电荷产生层在隔离部的边缘断开，有利于降低相邻子像素之间产生串扰的几率。
例如，该显示装置还包括位于显示面板出光侧的盖板。
例如，该显示装置可以为有机发光二极管显示装置等显示器件以及包括该显示装置的电视、数码相机、手机、手表、平板电脑、笔记本电脑、导航仪等任何具有显示功能的产品或者部件，本实施例不限于此。
本公开至少一个实施例还提供一种显示基板。图35为本公开一实施例提供的另一种显示基板的结构示意图。如图35所示，该显示基板包括衬底基板01和多个子像素(未示出)；多个子像素位于衬底基板01上，各子像素包括发光元件；各发光元件包括发光功能层和位于发光功能层的两侧的第一电极110和第二电极(未示出)，第一电极110位于发光功能层与衬底基板01之间；第二电极至少部分位于发光功能层远离第一电极110的一侧。需要说明的，子像素、发光元件和发光功能层的具体结构可参见上述实施例，本公开在此不再赘述。本公开实施例与图27至图34B所示实施例不同之处在于本实施例中的第一子隔离部710包括至少两层膜层。
例如，如图35所示，显示基板还包括隔离部700，隔离部700包括层叠设置的第一子隔离部710和第二子隔离部720，第一子隔离部710位于第二子隔离部720与衬底基板01之间。
例如，第一子隔离部710包括至少两层膜层，突出部701相对于上述至少两层膜层中最靠近第二子隔离部720的膜层的边缘突出，至少两层膜层中包括图案不同的两层膜层，和/或，至少两层膜层中包括厚度不同的两层膜层。
例如，如图35所示，发光功能层中的多个子功能膜层中的至少一个在隔离部700所在的位置断开。该显示基板100还包括像素限定图案400；像素限定图案400部分位于第一电极远离衬底基板01的一侧；像素限定图案400包括多个第二开口420。
如图35所示，第二子隔离部720包括内凹结构，内凹结构位于第一子隔离部710的边缘，且向像素限定图案400凹入，第二子隔离部720为像素限定图案400的一部分。由此，发光功能层的至少一层在第二子隔离部的边缘处断 开。由此，通过在相邻的子像素之间设置上述的隔离部，该显示基板可避免发光功能层中导电性较高的子功能层造成相邻子像素之间的串扰。
例如，本示例中的第一子隔离部710的厚度较小，没有填充满第二子隔离部720形成的内凹结构。
另一方面，由于该显示基板可通过像素隔离部避免相邻子像素之间的串扰，因此该显示基板可在采用双层发光(Tandem EL)设计的同时，提高像素密度。所以，该显示基板可具有寿命长、功耗低、亮度高、分辨率高等优点。
在一些示例中，如图35所示，内凹结构在衬底基板01上的正投影与第二子隔离部720在衬底基板01上的正投影重叠。
图36为本公开一实施例提供的另一种显示基板的结构示意图。如图36所示，该内凹结构包括残留结构，该残留结构可以为第一子隔离部710中的一层膜层712。例如，第一子隔离部710包括膜层711和膜层712，突出部701相对于膜层712的边缘突出，膜层711和膜层712图案不同。
在一些示例中，如图36所示，膜层712的材料包括金属材料、金属氧化物或者无机非金属材料，例如可以为银或铝，也可以包括ITO、IZO等；膜层711可以为与发光元件的第一电极同层且材料相同的结构，例如，可以包括包括多层结构，例如包括ITO/Ag/ITO。
例如，本示例中的膜层711的厚度较小，没有填充满第二子隔离部720形成的内凹结构，膜层712填充了膜层711没有填充的内凹结构中的一部分，但是第一子隔离部710也没有将第二子隔离部720内凹结构填充满。
本公开一实施例还提供一种显示基板。图37为本公开一实施例提供的另一种显示基板的结构示意图。图37所示的显示基板提供了另一种像素隔断结构。如图37所示，该显示基板100还包括位于衬底基板01上的像素限定图案400；像素限定图案400部分位于第一电极110远离衬底基板01的一侧；像素限定图案400包括多个第一开口410和第二开口420；多个第一开口410与多个子像素一一对应以限定多个子像素的有效发光区；第一开口410被配置为暴露第一电极110，以便第一电极110与后续形成的发光功能层130接触。第二开口420位于相邻的第一电极110之间。
如图37所示，像素限定图案400的像素限定部可以复用为隔离部。本示例中的隔离部可以仅包括第二子隔离部720，没有包括上述示例中的第一子隔离部。由此，发光功能层的至少一个膜层在第二子隔离部所在的位置处断开。 由此，通过在相邻的子像素之间设置上述的第二子隔离部，该显示基板可避免发光功能层中导电性较高的子功能层造成相邻子像素之间的串扰。
图38为本公开一实施例提供的另一种显示基板的结构示意图。如图38所示，该第二子隔离部720形成的内凹结构中设置有第一子隔离部710，第二子隔离部720的边缘相对于第一子隔离部710的边缘向外延伸。
在一些示例中，如图38所示，该第一子隔离部710的材料包括金属、金属氧化物、有机物中的至少一种；上述的金属可为银，上述的金属氧化物可为氧化铟锌，上述的有机物可为氟基聚合物。
在一些示例中，当第一子隔离部710的材料为氟基聚合物时，由于平坦层的材料包括光致抗蚀剂、聚酰亚胺(PI)树脂、丙烯酸树脂，硅化合物或聚丙烯酸树脂的材料。因此平坦层的溶剂以非氟化有机溶剂作为主要成分，这些光致抗蚀剂虽然可能含有少量氟化，但未能达到基本可溶于氟化液或全氟溶剂的程度，因此可利用他们正交的特性(溶液和溶剂不会相互反应)，可以利用刻蚀工艺形成上述的像素隔断结构。
例如，上述的氟基聚合物可为光敏氟基聚合物，该光敏氟基聚合物是一种类似负性光致抗蚀剂剂的聚合物，与常规光致抗蚀剂相比，这种聚合物氟含量40～70％，必须用全氟溶剂才能溶解如HFE7100、HFE7500等。而全氟溶剂不能溶解PLN(氟含量不足)，并且氟基聚合物也不溶于PLN的溶剂，这两种光刻胶和其溶剂是正交的。
例如，上述的氟基聚合物的化学式如下所示：
Figure PCTCN2022124055-appb-000002
其中，R1为烷基、H等，R2为含氟基团。
图39A-图39C为本公开一实施例提供的另一种显示基板的制作方法的步骤示意图，该显示基板的制作方法包括：
如图39A所示，在平坦层500远离衬底基板01的一侧形成第一电极110和牺牲结构702。需要说明的是，上述的残留结构(第一子隔离部)可为牺牲结构的一部分。
如图39B所示，在第一电极110和牺牲结构430远离衬底基板01的一侧 形成像素限定图案400。像素限定图案400包括多个第一开口410和第二开口420；多个第一开口410与多个第一电极110一一对应设置；第一开口410被配置为暴露第一电极110，以便第一电极110与后续形成的发光功能层130接触。第二开口420位于相邻的第一电极110之间，牺牲结构430被第二开口420部分暴露。
如图39C所示，以像素限定图案400为掩膜对显示基板进行刻蚀，以将牺牲结构430去除，以形成上述的第一子隔离部710。
图40为本公开一实施例提供的另一种显示基板的结构示意图。如图40所示，该显示基板还包括位于平坦层500上且与第一电极110同层设置的保护结构240；第一子隔离部710设置在保护结构240远离衬底基板01的一侧，且位于保护结构240的边缘。由此，保护结构240可在用于制作第一子隔离部710的刻蚀工艺中保护平坦层500，避免平坦层500被刻蚀。
在一些示例中，如图40所示，该显示基板还包括发光功能层130和第二电极120；发光功能层130位于第一电极110、像素限定图案400和保护结构240远离衬底基板01的一侧。由于隔离部的作用，发光功能层130会在隔离部所在的位置处断开，并形成断口；此时，后续形成的第二电极120可通过该断口与保护结构240相连，保护结构240可起到辅助电极的作用。
在该显示基板中，第二电极为多个子像素共用的电极，以向多个子像素提供阴极信号；即使整个显示基板中部分第二电极由于像素隔断结构或者其他原因而断开，保护结构作为辅助电极可将第二电极的断开的部分与其他部分相连。
图41A-图41C为本公开一实施例提供的另一种显示基板的制作方法的步骤示意图，该显示基板的制作方法包括：
例如，如图41A所示，在平坦层500远离衬底基板01的一侧形成第一电极110、保护结构240和牺牲结构430，保护结构240与第一电极110同层设置。保护结构240的材料与第一电极110的材料相同，保护结构240的材料与牺牲结构430的材料不同。
例如，如图41B所示，在第一电极110和牺牲结构430远离衬底基板01的一侧形成像素限定图案400。像素限定图案400包括多个第一开口410和第二开口420；多个第一开口410与多个第一电极110一一对应设置；第一开口410被配置为暴露第一电极110，以便第一电极110与后续形成的发光功能层 130接触。第二开口420位于相邻的第一电极110之间，牺牲结构430被第二开口420部分暴露。
例如，如图41C所示，以像素限定图案400为掩膜对显示基板进行刻蚀，以将牺牲结构430的去除，以形成上述的第一子隔离部710。
例如，在第一电极110、像素限定图案400和保护结构240远离衬底基板01的一侧形成发光功能层130和第二电极120。由于隔离部的作用，发光功能层130会在隔离部所在的位置处断开，并形成断口；此时，后续形成的第二电极120可通过该断口与保护结构240相连，保护结构240可起到辅助电极的作用。
例如，在该显示基板中，第二电极为多个子像素共用的电极，以向多个子像素提供阴极信号；即使整个显示基板中部分第二电极由于像素隔断结构或者其他原因而断开，保护结构作为辅助电极可将第二电极的断开的部分与其他部分相连。
有以下几点需要说明：
(1)本公开的实施例附图中，只涉及到与本公开实施例涉及到的结构，其他结构可参考通常设计。
(2)在不冲突的情况下，本公开的同一实施例及不同实施例中的特征可以相互组合。
以上所述仅是本公开的示范性实施方式，而非用于限制本公开的保护范围，本公开的保护范围由所附的权利要求确定。

Claims (29)

  1. 一种显示基板，包括：
    衬底基板，至少包括第一显示区域；
    多个子像素，位于所述衬底基板上的第一显示区域，至少部分子像素中的每个子像素包括发光元件，所述发光元件包括发光功能层以及沿垂直于所述衬底基板的方向位于所述发光功能层两侧的第一电极和第二电极，所述第一电极位于所述发光功能层与所述衬底基板之间，所述发光功能层包括多个膜层；
    绝缘层，位于所述衬底基板上，
    其中，所述显示基板还包括遮挡部，位于所述绝缘层远离所述衬底基板的一侧，且所述遮挡部在所述衬底基板上的正投影与所述绝缘层在所述衬底基板上的正投影有交叠；
    所述绝缘层包括多个凹槽，所述凹槽和所述遮挡部至少部分位于相邻子像素之间，所述遮挡部与所述绝缘层远离所述衬底基板一侧表面中构成所述凹槽边缘的部分在所述衬底基板上的投影有交叠，且向所述凹槽开口内突出以形成突出部，或者，所述遮挡部的至少部分侧表面与平行于所述绝缘层远离所述衬底基板一侧表面的平面的坡度角为第一坡度角，所述凹槽的至少部分侧表面与平行于所述绝缘层远离所述衬底基板一侧表面的平面的坡度角为第二坡度角，所述第一坡度角与所述第二坡度角的至少之一大于60度；
    所述绝缘层的材料与所述遮挡部的材料不同，且沿垂直于所述衬底基板的方向，所述绝缘层与所述遮挡部在衬底基板上投影交叠的至少部分的厚度大于所述遮挡部的厚度；
    所述发光功能层的多个膜层中的至少一层在所述凹槽处断开。
  2. 根据权利要求1所述的显示基板，其中，所述子像素中，所述发光功能层包括层叠设置的第一发光层、电荷产生层以及第二发光层，所述电荷产生层位于所述第一发光层与所述第二发光层之间，所述电荷产生层在所述遮挡部的至少部分边缘处断开。
  3. 根据权利要求1或2所述的显示基板，其中，所述第二电极在所述遮挡部的至少部分边缘处断开。
  4. 根据权利要求1-3任一项所述的显示基板，其中，所述绝缘层位于所述第一电极与所述衬底基板之间。
  5. 根据权利要求4所述的显示基板，其中，所述绝缘层包括有机层。
  6. 根据权利要求5所述的显示基板，其中，所述凹槽位于所述有机层中，所述凹槽的深度与所述有机层平坦部分的厚度比为0.1～1。
  7. 根据权利要求4-6任一项所述的显示基板，其中，所述第一电极包括至少一层膜层，所述遮挡部与所述第一电极的至少一层膜层同层设置。
  8. 根据权利要求4-7任一项所述的显示基板，还包括：
    像素限定图案，位于所述绝缘层远离所述衬底基板的一侧，至少位于所述第一显示区域的所述像素限定图案包括多个第一开口，一个所述子像素对应至少一个第一开口，所述子像素的发光元件至少部分位于所述子像素对应的第一开口中，且所述第一开口被配置为暴露所述第一电极，
    其中，所述像素限定图案还包括多个第二开口，所述第二开口暴露所述凹槽的至少一部分。
  9. 根据权利要求1-3任一项所述的显示基板，其中，所述绝缘层包括像素限定图案，至少位于所述第一显示区域的所述像素限定图案包括多个第一开口，一个所述子像素对应至少一个第一开口，所述子像素的发光元件至少部分位于所述子像素对应的第一开口中，且所述第一开口被配置为暴露所述第一电极。
  10. 根据权利要求9所述的显示基板，其中，所述凹槽包括在垂直于所述衬底基板的方向贯穿所述像素限定图案的像素限定部的第二开口；或者，所述凹槽的深度与所述像素限定图案的像素限定部的平坦部分的厚度比大于等于0.2，且小于1。
  11. 根据权利要求9所述的显示基板，其中，所述遮挡部位于所述像素限定图案的像素限定部远离所述衬底基板的一侧。
  12. 根据权利要求1-3任一项所述的显示基板，其中，所述多个子像素包括多个第一颜色子像素、多个第二颜色子像素以及多个第三颜色子像素，
    所述多个第一颜色子像素和所述多个第三颜色子像素沿平行于所述衬底基板的第一方向和第二方向均交替设置以形成多个第一像素行和多个第一像素列，所述多个第二颜色子像素沿所述第一方向和所述第二方向均阵列排布以形成多个第二像素行和多个第二像素列，所述多个第一像素行和所述多个第二像素行沿所述第二方向交替设置且在所述第一方向上彼此错开，所述多个第一像素列和所述多个第二像素列沿所述第一方向交替设置且在所述第二方向上 彼此错开；
    所述凹槽包括环状凹槽，所述环状凹槽围绕一个第一颜色子像素、一个第二颜色子像素或者一个第三颜色子像素。
  13. 根据权利要求12所述的显示基板，其中，至少部分环状凹槽包括至少一个缺口，所述遮挡部在所述衬底基板上的正投影位于所述凹槽的垂直于其在所述衬底基板上的正投影的延伸方向的两侧。
  14. 根据权利要求13所述的显示基板，其中，沿垂直于所述凹槽的所述正投影延伸方向，所述遮挡部向所述凹槽内突出的所述突出部在所述衬底基板上的正投影的尺寸与该遮挡部在所述衬底基板上的正投影的尺寸之比为0.005～0.5。
  15. 根据权利要求1-3任一项所述的显示基板，其中，相邻子像素之间设置有沿该相邻两个子像素的排列方向排列的多个遮挡部，相邻子像素之间设置的多个遮挡部中的相邻两个遮挡部之间设置有一个凹槽，且位于所述凹槽边缘两侧的两个遮挡部均向所述凹槽内突出。
  16. 根据权利要求15所述的显示基板，其中，相邻子像素之间设置有至少一个凹槽。
  17. 根据权利要求1-16任一项所述的显示基板，还包括：
    数据线，位于所述绝缘层与所述衬底基板之间；以及
    电源线，位于所述绝缘层与所述衬底基板之间，所述电源线的至少部分与所述数据线同层设置，
    其中，沿垂直于所述衬底基板的方向，所述凹槽与所述数据线和所述电源线的至少之一交叠。
  18. 根据权利要求1-17任一项所述的显示基板，其中，所述绝缘层的材料包括有机材料，所述遮挡部的材料包括无机非金属材料或者金属材料。
  19. 根据权利要求1-18任一项所述的显示基板，其中，所述凹槽内包括所述发光功能层中的至少部分膜层以及所述第二电极。
  20. 根据权利要求1-19任一项所述的显示基板，还包括：封装层，位于所述发光元件远离所述衬底基板的一侧，
    其中，所述封装层包括层叠设置的第一封装层、第二封装层以及第三封装层，所述第一封装层位于所述所述第二封装层与所述衬底基板之间，所述第一封装层和所述第二封装层的至少部分位于所述凹槽内。
  21. 根据权利要求20所述的显示基板，其中，沿垂直于所述衬底基板的方向，所述第二封装层在所述凹槽位置处的厚度大于所述第二封装层在所述发光元件的发光区位置处的厚度。
  22. 根据权利要求12所述的显示基板，其中，所述凹槽的至少部分边界和与其紧邻的子像素的发光区的边界轮廓大致相同。
  23. 根据权利要求13所述的显示基板，其中，沿一方向，该方向垂直于所述凹槽的所述正投影的延伸方向且平行于所述衬底基板，位于所述凹槽边缘两侧的两个遮挡部的尺寸相同，且所述两个遮挡部向所述凹槽内突出的尺寸相同。
  24. 根据权利要求17所述的显示基板，其中，所述凹槽在所述衬底基板上的正投影的延伸方向与所述数据线和所述电源线的至少之一的延伸方向不同。
  25. 根据权利要求1-24任一项所述的显示基板，其中，所述衬底基板还包括第二显示区域，所述第一显示区域围绕所述第二显示区域的至少部分。
  26. 一种显示装置，包括权利要求1-25任一项所述的显示基板。
  27. 一种显示基板的制作方法，包括：
    在衬底基板上形成多个子像素，其中，形成所述子像素包括在垂直于所述衬底基板的方向上依次形成层叠设置的第一电极、发光功能层以及第二电极；
    在所述衬底基板上形成绝缘层；
    在所述绝缘层上形成遮挡部材料层，并对所述遮挡部材料层图案化形成多个遮挡部，其中，所述遮挡部位于相邻子像素之间，且相邻子像素之间设置有沿该相邻子像素的排列方向排列的至少两个遮挡部；
    对所述绝缘层进行刻蚀形成凹槽，其中，所述凹槽的开口边缘相对于所述相邻两个遮挡部彼此靠近的边缘向外扩展以使所述遮挡部包括在所述排列方向上向所述凹槽内突出的突出部；或者，所述遮挡部的至少部分侧表面与平行于所述绝缘层远离所述衬底基板一侧表面的平面的坡度角为第一坡度角，所述凹槽的至少部分侧表面与平行于所述绝缘层远离所述衬底基板一侧表面的平面的坡度角为第二坡度角，所述第一坡度角与所述第二坡度角的至少之一大于60度；
    其中，所述绝缘层的材料与所述遮挡部的材料不同，且沿垂直于所述衬底基板的方向，所述绝缘层与所述遮挡部在衬底基板上投影交叠的至少部分的厚 度大于所述遮挡部的厚度；
    所述发光功能层在形成所述凹槽后形成，所述发光功能层包括多个膜层，所述多个膜层中的至少一层在所述凹槽处断开。
  28. 根据权利要求27所述的制作方法，其中，形成所述第一电极包括：
    在形成所述绝缘层之后且在形成所述凹槽之前，在所述绝缘层上形成电极层，并对所述电极层图案化以形成所述第一电极。
  29. 根据权利要求27所述的制作方法，其中，所述绝缘层包括像素限定图案，形成所述第一电极包括：在形成所述像素限定图案之前，在所述衬底基板上形成电极层，并对所述电极层图案化以形成所述第一电极；
    形成所述像素限定图案包括：
    在所述第一电极上形成像素限定膜；以及
    对所述像素限定膜化以形成暴露所述第一电极的第一开口以及所述凹槽，所述第一开口被配置为限定所述子像素的发光区。
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