WO2020244432A1 - 显示基板的制备方法、显示基板及显示装置 - Google Patents

显示基板的制备方法、显示基板及显示装置 Download PDF

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Publication number
WO2020244432A1
WO2020244432A1 PCT/CN2020/092535 CN2020092535W WO2020244432A1 WO 2020244432 A1 WO2020244432 A1 WO 2020244432A1 CN 2020092535 W CN2020092535 W CN 2020092535W WO 2020244432 A1 WO2020244432 A1 WO 2020244432A1
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Prior art keywords
layer
barrier wall
substrate
display
display substrate
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PCT/CN2020/092535
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English (en)
French (fr)
Inventor
赵攀
蒋志亮
王格
Original Assignee
京东方科技集团股份有限公司
成都京东方光电科技有限公司
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Application filed by 京东方科技集团股份有限公司, 成都京东方光电科技有限公司 filed Critical 京东方科技集团股份有限公司
Priority to US17/253,271 priority Critical patent/US11678524B2/en
Publication of WO2020244432A1 publication Critical patent/WO2020244432A1/zh
Priority to US18/307,083 priority patent/US20230263015A1/en

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80—Constructional details
    • H10K59/87—Passivation; Containers; Encapsulations
    • H10K59/873—Encapsulations
    • H10K59/8731—Encapsulations multilayered coatings having a repetitive structure, e.g. having multiple organic-inorganic bilayers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04M—TELEPHONIC COMMUNICATION
    • H04M1/00—Substation equipment, e.g. for use by subscribers
    • H04M1/02—Constructional features of telephone sets
    • H04M1/0202—Portable telephone sets, e.g. cordless phones, mobile phones or bar type handsets
    • H04M1/026—Details of the structure or mounting of specific components
    • H04M1/0264—Details of the structure or mounting of specific components for a camera module assembly
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04M—TELEPHONIC COMMUNICATION
    • H04M1/00—Substation equipment, e.g. for use by subscribers
    • H04M1/02—Constructional features of telephone sets
    • H04M1/0202—Portable telephone sets, e.g. cordless phones, mobile phones or bar type handsets
    • H04M1/026—Details of the structure or mounting of specific components
    • H04M1/0266—Details of the structure or mounting of specific components for a display module assembly
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K2102/00—Constructional details relating to the organic devices covered by this subclass
    • H10K2102/301—Details of OLEDs
    • H10K2102/351—Thickness
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/121—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
    • H10K59/1213—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements the pixel elements being TFTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/122—Pixel-defining structures or layers, e.g. banks
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/124—Insulating layers formed between TFT elements and OLED elements

Definitions

  • the present disclosure relates to the field of display technology, and in particular to a method for preparing a display substrate, a display substrate, and a display device.
  • a display substrate wherein the display substrate includes an effective display area, a perforated area, and a critical area provided between the effective display area and the perforated area, the display
  • the critical area of the substrate includes:
  • the at least one first barrier wall includes a first gate metal layer, a first gate insulating layer, a second gate metal layer, a second gate insulating layer, and source and drain electrodes stacked in sequence.
  • a metal layer, the first gate metal layer is closer to the substrate than the first gate insulating layer.
  • the thin film transistor in the effective display area is a top gate type, and the first gate metal layer, the first gate insulating layer, the second gate metal layer, and the second gate metal layer of the at least one first barrier wall
  • the two gate insulating layers and the source and drain electrode metal layers are respectively connected to the first gate metal layer, the first gate insulating layer, the second gate metal layer, the second gate insulating layer, and the source and drain of the effective display area
  • the electrode metal layers are in the same layer and have the same materials.
  • the thin film transistor includes the first gate metal layer, the first gate insulating layer and the source and drain electrode metal layers in the display area.
  • the base includes: a substrate and an inorganic film layer disposed on the substrate.
  • the thickness of the portion of the inorganic film layer close to the perforated area is smaller than the thickness of other portions of the inorganic film layer.
  • the critical area of the display substrate further includes: a second barrier wall disposed on the substrate and located between the first barrier wall and the effective display area, the second barrier wall It includes a planarization layer, a first pixel defining layer, and a first support layer that are stacked, the planarization layer is closer to the substrate than the first pixel defining layer, and the height of the second barrier wall is higher than that of the first support layer. The height of the blocking wall.
  • the planarization layer, the first pixel defining layer, and the first supporting layer of the second barrier wall are respectively the same as the planarizing layer, the pixel defining portion, and the supporting portion of the display device in the effective display area.
  • the layers and materials are the same.
  • the critical area of the display substrate further includes: a third barrier wall disposed on the substrate and located between the second barrier wall and the effective display area, the third barrier wall It includes a second pixel defining layer and a second supporting layer that are stacked, the second pixel defining layer is closer to the substrate than the second supporting layer, and the height of the third barrier wall is greater than the height of the first barrier wall , Less than or equal to the height of the second barrier wall.
  • the second pixel defining layer and the second supporting layer of the third barrier wall are respectively in the same layer and the same material as the pixel defining portion and the supporting portion of the display device in the effective display area.
  • the second pixel defining layer and the second supporting layer of the third barrier wall are made of the same material, and the first pixel defining layer and the first supporting layer of the second barrier wall are made of the same material.
  • the source and drain electrode metal layers include a first titanium material layer, an aluminum material layer, and a second titanium material layer that are stacked, and the edge of the aluminum material layer is opposite to the first titanium material layer and The edge of the second titanium material layer is retracted.
  • the critical region of the display substrate further includes: a first functional layer disposed on the base and the first barrier wall, and the first functional layer is disconnected at the source and drain electrode metal layers .
  • the first functional layer is an organic light emitting layer.
  • the first barrier wall includes a stacked metal layer and an insulating layer.
  • a method for manufacturing a display substrate wherein the display substrate includes an effective display area, a perforated area, and a critical area provided between the effective display area and the perforated area
  • the preparation method includes: providing a substrate; forming at least one first barrier wall on the substrate at a position corresponding to the critical region, wherein the at least one first barrier wall is a convex structure.
  • the step of forming at least one first barrier wall on the substrate includes: sequentially forming a first gate metal layer, a first gate insulating layer, and a second gate metal layer on the substrate , A second gate insulating layer and a source and drain electrode metal layer to obtain the at least one first barrier wall.
  • the step of providing a base includes: providing a substrate; forming an inorganic film material layer on the substrate; and etching the inorganic film material layer to obtain an inorganic film layer.
  • the preparation method further includes: sequentially forming a planarization layer, a first pixel defining layer, and a first support layer on the substrate between the first barrier wall and the effective display area , To obtain a second barrier wall, the height of the second barrier wall is greater than the height of the first barrier wall.
  • the preparation method further includes: sequentially forming a second pixel defining layer and a second supporting layer on the substrate between the second barrier wall and the effective display area to obtain The third barrier wall, the height of the third barrier wall is greater than the height of the first barrier wall, and less than or equal to the height of the second barrier wall.
  • the preparation method further includes: forming a first functional layer on the substrate and the first barrier wall, the first functional layer being disconnected by the source and drain electrode metal layers.
  • a display device wherein the display device includes the above-mentioned display substrate.
  • FIG. 1 shows a schematic diagram of a planar structure of a display substrate provided by an embodiment of the present disclosure
  • FIG. 2 shows a schematic cross-sectional structure diagram of a display substrate at the position AA' in FIG. 1 according to an embodiment of the present disclosure
  • Figure 3 shows a schematic cross-sectional structure diagram of a first barrier wall provided by an embodiment of the present disclosure, (b) shows a schematic cross-sectional structure diagram of the TFT in the effective display area, wherein (b) Some of the film layers in (a) are made of the same material;
  • FIG. 4 shows a schematic cross-sectional structure diagram of a metal layer in a first barrier wall provided by an embodiment of the present disclosure.
  • FIG. 5 shows a step flow chart of a method for preparing a display substrate provided by an embodiment of the present disclosure.
  • CVD Chemical Vapor Deposition
  • Mask and other masks cannot support and shield the perforated area. Therefore, the inorganic film deposited by CVD will extend from the effective display area to the hole.
  • the cutting edge leads to an increase in the thickness of the inorganic film layer at the cutting edge, which causes cracks to be easily generated during the cutting process, and then the cracks extend to the effective display area in the subsequent process, resulting in package failure.
  • the display substrate includes an effective display area, a perforated area, and a critical area provided between the effective display area and the perforated area.
  • the critical area of the display substrate includes: a base 21, and at least one first barrier wall 22 disposed on the base 21, for example, as shown in FIG. 2 including two first barrier walls, at this time, one of the two first barrier walls 22
  • the first barrier wall 22 includes a stacked metal layer and an insulating layer, and the first barrier wall 22 is a convex structure.
  • the base 21 includes a substrate 211, and the substrate 211 may be a flexible base, and specifically may include a first organic layer PI1, a first inorganic layer Barrier1, and a second organic layer PI2 that are stacked. In practical applications, the base 21 may also include an inorganic material layer formed on the substrate 211.
  • the inorganic material layer may specifically include a second inorganic layer barrier2, an interlayer dielectric layer (ILD), a gate insulating layer GI, and As the buffer layer, the second inorganic layer barrier2 is disposed close to the second organic layer PI2.
  • the plurality of first barrier walls 22 independently arranged on the base 21 form a plurality of undulations, and these undulations can block the propagation of cracks generated in the process of cutting to form the perforated area.
  • the cracks formed in the cutting process spread to the ups and downs, and if they continue to propagate, they need to change the direction.
  • the change of the direction of the cracks requires a large amount of energy to prevent crack propagation.
  • these fluctuations increase the cracks.
  • the propagation path of the cracks is prevented from reaching the effective display area.
  • the number of the first barrier walls 22 can be determined according to actual needs. For example, 5-7 first barrier walls 22 can be provided on the base 21. The present embodiment does not limit the number of the first barrier walls 22.
  • the undulations formed by the first barrier wall on the surface of the base can block the propagation of the crack and block the extension of the crack to the effective display area, thereby improving Show the reliability of the product.
  • the first barrier wall 22 may include a first gate metal layer 31, a first gate insulating layer 32, and a second gate metal layer 33 stacked in sequence. , The second gate insulating layer 34 and the source and drain electrode metal layer 35, the first gate metal layer 31 is disposed closer to the substrate 21 than the first gate insulating layer.
  • each layer of the first barrier wall 22 and the corresponding film layer of the thin film transistor, the capacitor structure and the display device in the effective display area can be manufactured in the same layer with the same material.
  • the first barrier wall 22 is not limited to the layer structure shown in FIG. 3, and any raised structure that includes a stacked metal layer and an insulating layer can be used as the first barrier wall.
  • the material and structure of the wall are not specifically limited.
  • the thin film transistor in the effective display area may be a top gate type, and the thin film transistor may include an active layer 104, a first gate insulating layer 105, a gate 106, and a second gate insulating layer. 108. Interlayer dielectric layer 103, source 110, and drain 111.
  • the active layer 104 may be formed on the buffer layer 102, the first gate insulating layer 105 covers the buffer layer 102 and the active layer 104, and the gate 106 is formed on the side of the first gate insulating layer 105 away from the active layer 104
  • the second gate insulating layer 108 covers the gate 106 and the first gate insulating layer 105
  • the interlayer dielectric layer 103 covers the second gate insulating layer 108
  • the source 110 and the drain 111 are formed on the interlayer dielectric layer 103 away from the base substrate
  • the source electrode 110 and the drain electrode 111 can respectively contact the opposite sides of the active layer 104 through via holes (for example, metal via holes).
  • the thin film transistor may also be a bottom gate type.
  • the capacitor structure may include a first plate 130 and a second plate 131.
  • the first plate 130 and the gate 106 are arranged on the same layer, and the second plate 131 is located at the second
  • the gate insulating layer 108 and the interlayer dielectric layer 103 are arranged opposite to the first electrode plate 130.
  • the materials of the gate 106, the first electrode plate 130, and the second electrode plate 131 may include metal materials or alloy materials, such as molybdenum, aluminum, and titanium.
  • the source 110 and the drain 111 may include a metal material or an alloy material, such as a metal single-layer or multi-layer structure formed of molybdenum, aluminum, titanium, etc.
  • the multi-layer structure is a multi-metal laminate layer, such as titanium, aluminum, Titanium three-layer metal laminate (Al/Ti/Al), etc.
  • the display device is located in the display area.
  • the display device may include a first electrode 112 and a pixel defining portion 113 sequentially formed on the interlayer dielectric layer 103. It should be understood that the display The device may further include the light emitting part 114a and the second electrode 115.
  • a planarization layer can be fabricated before the display device is fabricated.
  • the planarization layer can be a single-layer structure or a multilayer structure; the planarization layer is usually Made of organic materials, such as photoresist, acrylic-based polymer, silicon-based polymer, etc.; as shown in FIG. 3, the planarization layer may include a planarization portion 116 located in the display area 10a, and a planarization portion 116 It is formed between the interlayer dielectric layer 103 and the first electrode 112.
  • the first electrode 112 may be electrically connected to the drain 111 through a metal via.
  • the first electrode 112 may be an anode.
  • the anode may be ITO (Indium Tin Oxide), Indium Zinc Oxide (IZO), or Zinc Oxide (ZnO). ) And other materials; the pixel defining portion 113 can cover the planarizing portion 116, the pixel defining portion 113 can be made of organic materials, such as organic materials such as photoresist, and the pixel defining portion 113 is located in the display area 10a
  • the portion of may have a pixel opening exposing the first electrode 112; the light-emitting portion 114a is located in the pixel opening and is formed on the first electrode 112, and the light-emitting portion 114a may include small molecular organic materials or polymer molecular organic materials, which may be fluorescent light emitting
  • the material or phosphorescent light-emitting material can emit red light, green light, blue light, or white light, etc.; and, according to different actual needs, in different examples, the light-emitting portion 114a may further include an electron injection layer, an electron transport layer, Functional layers such
  • the first electrode 112, the light-emitting portion 114a, and the second electrode 115 may constitute one light-emitting sub-pixel 1d.
  • the portion of the display device located in the display area 10a may include a plurality of light-emitting sub-pixels 1d arranged in an array.
  • the first electrode 112 of each light-emitting sub-pixel 1d is independent of each other, and the second electrode 115 of each light-emitting sub-pixel 1d is connected over the entire surface; that is, the second electrode 115 is disposed on the entire surface of the display substrate 10.
  • the structure is a common electrode for multiple display devices.
  • the side of the pixel defining portion 113 away from the interlayer dielectric layer 103 may further be provided with a supporting portion 132, which may serve to support the protective film layer ( (Not shown in the figure) to prevent the protective film layer from contacting the first electrode 112 or other traces, causing the first electrode 112 or other traces to be easily damaged.
  • this protective film layer mainly occurs during the transfer of the semi-finished product to avoid damage to the semi-finished product during the transfer process, specifically: in the process of transferring the substrate on which the support portion 132 has been manufactured to the evaporation production line , Can be covered with a protective film layer, when the evaporation of the luminescent material is needed, the protective film layer is removed.
  • the material of the support portion 132 can be the same as the material of the pixel defining portion 113, and the support portion 132 and the pixel defining portion 113 can be formed by the same patterning process, but it is not limited to this.
  • the material of the support portion 132 can also be the same as that of the pixel.
  • the material of the defining portion 113 is different, and the supporting portion 132 and the pixel defining portion 113 can also be formed using different patterning processes.
  • the base 21 near the perforated area includes a substrate 211 and an inorganic film layer 212 disposed on the substrate 211.
  • the thickness of the inorganic film layer 212 is less than a preset threshold.
  • the specific numerical value of the preset threshold can be set according to actual conditions, which is not limited in this embodiment.
  • the inorganic material layer at the cutting edge of the substrate 211 can be processed by an etching process (for example, the interlayer dielectric layer ILD, the gate insulating layer GI, and the buffer layer buffer can be etched away, leaving only a lot of The thin layer of the second inorganic layer barrier2) makes the thickness of the inorganic film layer 212 at the cutting edge (the boundary between the perforated area and the critical area) thinner, thereby reducing the risk of cracks during the cutting process.
  • an etching process for example, the interlayer dielectric layer ILD, the gate insulating layer GI, and the buffer layer buffer can be etched away, leaving only a lot of The thin layer of the second inorganic layer barrier2 makes the thickness of the inorganic film layer 212 at the cutting edge (the boundary between the perforated area and the critical area) thinner, thereby reducing the risk of cracks during the cutting process.
  • the critical area of the display substrate may further include: a second barrier wall disposed on the substrate 21 and located between the first barrier wall 22 and the effective display area 23.
  • the second barrier wall 23 includes a stacked planarization layer, a first pixel defining layer, and a first support layer.
  • the planarization layer is closer to the substrate 21 than the first pixel defining layer, and the height of the second barrier wall is greater than State the height of the first barrier wall.
  • the second barrier wall is a convex structure.
  • the critical area of the display substrate may further include: a third barrier wall 24 disposed on the base 21 and located between the second barrier wall 23 and the effective display area, the third barrier wall 24 includes a second pixel boundary layer arranged in a stack.
  • the second supporting layer and the second pixel defining layer are arranged closer to the substrate 21 than the second supporting layer.
  • the third barrier wall is a convex structure. By providing the third barrier wall, the organic layer material in the effective display area can be further prevented from flowing to the cutting edge.
  • the height of the third barrier wall is greater than the height of the first barrier wall and less than or equal to the height of the second barrier wall. It should be noted that the heights of the first, second and third barrier walls in this disclosure all refer to the height of the raised structure. In FIG. 2, the height h1 of the first barrier wall 22, the height h2 of the second barrier wall 23, and the height h3 of the third barrier wall 24 are related as follows: h1 ⁇ h3 ⁇ h2.
  • first barrier wall 22, the second barrier wall 23, and the third barrier wall 24 are separately arranged in the critical area in a ring shape.
  • the inventor also found that in the process of depositing the EL material, because the open Mask cannot cover the perforated area, the EL material will be deposited on the cutting edge, which will cause water and oxygen to corrode along the EL material to the effective display area, and finally cause the package to fail .
  • the metal layer is disposed away from the substrate 21, and the material of the metal layer includes a first titanium material layer, an aluminum material layer, and a second titanium material layer that are stacked.
  • the metal layer may include a source and drain electrode metal layer 35, and the material of the source and drain electrode metal layer 35 may be a first titanium material layer, an aluminum material layer, and a second titanium material layer that are stacked.
  • the edges of the aluminum material layer are recessed with respect to the edges of the first titanium material layer and the second titanium material layer.
  • a first functional layer is also arranged on the substrate and the first barrier wall. It is precisely because the first titanium material layer, the aluminum material layer, and the second titanium material layer form an I-shaped structure together, the source and drain electrodes The metal layer can easily disconnect the first functional layer.
  • the first functional layer may be an organic light-emitting layer or a cathode of a light-emitting device.
  • the first functional layer is an organic light-emitting layer as an example
  • the critical area of the display substrate may also include: an organic light-emitting layer 25 disposed on the base 21 and the first barrier wall 22, the organic light-emitting layer 25 is disconnected by the metal layer (or source and drain electrode metal layer).
  • a wet etching process can be used.
  • the etching solution etches the edges of the aluminum material layer so that the edges of the aluminum material layer are retracted relative to the edges of the first titanium material layer and the second titanium material layer.
  • a "I-shaped structure" is naturally formed. In this way, the organic light-emitting layer 25 will be disconnected at the edge of the metal layer during the formation process, and the disconnected EL material will block the water and oxygen propagation path, preventing water and oxygen from entering the effective display area , And finally meet the reliability requirements.
  • the display substrate includes an effective display area, a perforated area, and a critical area provided between the effective display area and the perforated area.
  • the preparation method includes :
  • Step 501 Provide a base
  • Step 502 forming at least one first barrier wall at a position corresponding to the critical area on the substrate, the first barrier wall being a convex structure.
  • 1 shows a schematic plan view of the structure of a display substrate prepared in this embodiment
  • reference FIG. 2 shows a schematic view of the cross-sectional structure of a display substrate prepared in this embodiment.
  • the step of forming a first barrier wall on the substrate in step 502 may include:
  • a first gate metal layer, a first gate insulating layer, a second gate metal layer, a second gate insulating layer, and a source and drain electrode metal layer are sequentially formed on the substrate to obtain a first barrier wall.
  • 3 shows a schematic cross-sectional structure diagram of the first barrier wall prepared in this embodiment.
  • step 501 may include:
  • the inorganic film material is etched to obtain an inorganic film layer.
  • It may further include etching the inorganic film material layer to obtain an inorganic film layer, so that the thickness of the part of the inorganic film layer close to the perforated area is smaller than the thickness of other parts of the inorganic film layer .
  • a series of patterning processes such as exposure, development, and etching can be used to sequentially etch the inorganic film material layers such as the interlayer dielectric layer ILD, the gate insulating layer GI, the buffer layer, and the second inorganic layer barrier2.
  • a very thin layer of the second inorganic layer barrier2 is left, thereby achieving the effect of reducing the thickness of the inorganic layer and reducing the risk of cracks during the cutting process.
  • the preparation method provided in this embodiment may further include:
  • a planarization layer, a first pixel defining layer and a first support layer are sequentially formed on the substrate in an area between the first barrier wall and the effective display area to obtain a second barrier wall.
  • the height of the second barrier wall is greater than the height of the first barrier wall.
  • the preparation method provided in this embodiment may further include:
  • a second pixel defining layer and a second supporting layer are sequentially formed on the substrate in an area between the second barrier wall and the effective display area to obtain a third barrier wall.
  • the height of the third barrier wall is greater than the height of the first barrier wall and less than or equal to the height of the second barrier wall.
  • the step of forming a first barrier wall on the substrate in step 502 may include:
  • a metal layer is formed on one side of the substrate, the metal layer includes a first titanium material layer, an aluminum material layer, and a second titanium material layer that are stacked;
  • the metal layer is processed by a wet etching process, and the edge of the aluminum material layer is etched away.
  • the display substrate forming the metal layer is put into the etching solution, and the etching solution reacts with the exposed edge of the aluminum metal layer to naturally form an indented "I-shaped structure".
  • I-shaped The structure causes the subsequently formed EL layer to be disconnected here.
  • the disconnected EL material blocks the transmission path of water and oxygen, prevents water and oxygen from entering the effective display area, and finally meets the reliability requirements.
  • the preparation method provided in this embodiment may further include:
  • a first functional layer for example, an organic light-emitting layer
  • the first functional layer is disconnected by the metal layer (specifically, a source and drain electrode metal layer).
  • Another embodiment of the present disclosure provides a display device including the display substrate described in any one of the embodiments.
  • the display device in this embodiment may be any product or component with a display function, such as a display panel, electronic paper, mobile phone, tablet computer, television, notebook computer, digital photo frame, navigator, etc.
  • This embodiment provides a method for preparing a display substrate, a display substrate, and a display device.
  • the display substrate includes an effective display area, a perforated area, and a critical area provided between the effective display area and the perforated area ,
  • the critical area of the display substrate includes: a base, and at least one first barrier wall disposed on the base, the first barrier walls are arranged separately, and the first barrier wall includes stacked metal layers And an insulating layer, the first barrier wall protrudes from the surface of the substrate.
  • the undulations formed by the first barrier wall on the surface of the substrate can block the propagation of the crack and block the extension of the crack to the effective display area, thereby improving the reliability of the display product.

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  • Microelectronics & Electronic Packaging (AREA)
  • Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Manufacturing & Machinery (AREA)
  • Electroluminescent Light Sources (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)

Abstract

本公开提供了一种显示基板的制备方法、显示基板及显示装置，所述显示基板包括所述显示基板包括有效显示区域、打孔区域以及设置在所述有效显示区域和所述打孔区域之间的临界区域，所述显示基板的临界区域包括：基底，以及设置在所述基底上的至少一个第一阻挡墙，所述至少一个第一阻挡墙为凸起结构。

Description

显示基板的制备方法、显示基板及显示装置
相关申请的交叉引用
本公开要求于2019年6月3日递交中国专利局的、申请号为201910478176.0的中国专利申请的权益，该申请的全部公开内容以引用方式并入本文。
技术领域
本公开涉及显示技术领域，特别是涉及一种显示基板的制备方法、显示基板及显示装置。
背景技术
随着手机市场对全面屏手机的青睐，在显示区内打孔，孔区放置摄像头的产品孕育而生。然而，在显示区打孔的技术存在较多的难点。例如，在对显示区进行切割时容易产生裂纹(crack)，并且在后续工艺过程中裂纹容易延伸到有效显示区域，造成封装失效，使显示产品的可靠性降低。
发明内容
根据本公开的一个方面，提供一种显示基板，其中，所述显示基板包括有效显示区域、打孔区域以及设置在所述有效显示区域和所述打孔区域之间的临界区域，所述显示基板的临界区域包括：
基底，以及设置在所述基底上的至少一个第一阻挡墙，所述至少一个第一阻挡墙为凸起结构。
在一些实施例中，所述至少一个第一阻挡墙包括依次层叠设置的第一栅极金属层、第一栅极绝缘层、第二栅极金属层、第二栅极绝缘层以及源漏电极金属层，所述第一栅极金属层比第一栅极绝缘层更靠近所述基底。
在一些实施例中，所述有效显示区的薄膜晶体管为顶栅型，所述至少一个第一阻挡墙的第一栅极金属层、第一栅极绝缘层、第二栅极金属层、第二栅极绝缘层以及源漏电极金属层分别与所述有效显示区的的第一栅极金属层、第一栅极绝缘层、第二栅极金属层、第二栅极绝缘层以及源漏电极金属层处于相同的层且材料分别相同，其中，所述薄膜晶体管包括位于所述显示区的所述第一栅极金属层、第一栅极绝缘层以及源漏电极金属层。
在一些实施例中，所述基底包括：衬底以及设置在所述衬底上的无机膜层。
在一些实施例中，所述无机膜层的靠近所述打孔区域的部分的厚度比所述无机膜层的其它部分的厚度小。
在一些实施例中，所述显示基板的临界区域还包括：设置在所述基底上、位于所述第一阻挡墙和所述有效显示区域之间的第二阻挡墙，所述第二阻挡墙包括层叠设置的平坦化层、第一像素界定层和第一支撑层，所述平坦化层比所述第一像素界定层更靠近所述基底，第二阻挡墙的高度高于所述第一阻挡墙的高度。
在一些实施例中，所述第二阻挡墙的平坦化层、第一像素界定层和第一支撑层分别与所述有效显示区的显示器件的平坦化层、像素界定部和支撑部处于相同的层且材料分别相同。
在一些实施例中，所述显示基板的临界区域还包括：设置在所述基底上、位于所述第二阻挡墙和所述有效显示区域之间的第三阻挡墙，所述第三阻挡墙包括层叠设置的第二像素界定层和第二支撑层，所述第二像素界定层比所述第二支撑层更靠近所述基底，所述第三阻挡墙的高度大于第一阻挡墙的高度，小于等于第二阻挡墙的高度。
在一些实施例中，所述第三阻挡墙的第二像素界定层和第二支撑层分别与所述有效显示区的显示器件的像素界定部和支撑部处于相同的层且材料分别相同。
在一些实施例中，所述第三阻挡墙的第二像素界定层和第二支撑层的材料相同，并且所述第二阻挡墙的第一像素界定层和第一支撑层的材料相同。
在一些实施例中，所述源漏电极金属层包括层叠设置的第一钛材料层、铝材料层和第二钛材料层，所述铝材料层的边缘相对于所述第一钛材料层和所述 第二钛材料层的边缘缩进。
在一些实施例中，所述显示基板的临界区域还包括：设置在所述基底和所述第一阻挡墙上的第一功能层，所述第一功能层在源漏电极金属层处断开。
在一些实施例中，所述第一功能层是有机发光层。
在一些实施例中，所述第一阻挡墙包括层叠设置的金属层和绝缘层。
根据本公开的另一方面，提供一种显示基板的制备方法，其中，所述显示基板包括有效显示区域、打孔区域以及设置在所述有效显示区域和所述打孔区域之间的临界区域，所述制备方法包括：提供基底；在所述基底上对应所述临界区域的位置形成至少一个第一阻挡墙，其中，所述至少一个第一阻挡墙为凸起结构。
在一些实施例中，在所述基底上形成至少一个第一阻挡墙的步骤，包括：依次在所述基底上形成第一栅极金属层、第一栅极绝缘层、第二栅极金属层、第二栅极绝缘层以及源漏电极金属层，以得到所述至少一个第一阻挡墙。
在一些实施例中，所述提供基底的步骤，包括：提供衬底；在所述衬底上形成无机膜材料层；对所述无机膜材料层进行刻蚀，得到无机膜层。
在一些实施例中，所述制备方法还包括：在所述基底上、位于所述第一阻挡墙和所述有效显示区域之间依次形成平坦化层、第一像素界定层和第一支撑层，以得到第二阻挡墙，所述第二阻挡墙的高度大于所述第一阻挡墙的高度。
在一些实施例中，所述制备方法还包括：在所述基底上、且位于所述第二阻挡墙和所述有效显示区域之间依次形成第二像素界定层和第二支撑层，以得到第三阻挡墙，所述第三阻挡墙的高度大于第一阻挡墙的高度，小于等于第二阻挡墙的高度。
在一些实施例中，所述制备方法还包括：在所述基底和所述第一阻挡墙上形成第一功能层，所述第一功能层被所述源漏电极金属层断开。
根据本公开的又一方面，提供一种显示装置，其中，所述显示装置包括上述显示基板。
附图说明
为了更清楚地说明本公开实施例的技术方案，下面将对本公开实施例的描 述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本公开的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动性的前提下，还可以根据这些附图获得其他的附图。
图1示出了本公开实施例提供的一种显示基板的平面结构示意图；
图2示出了本公开实施例提供的一种显示基板在图1的AA’位置处的剖面结构示意图；
图3中(a)图示出了本公开实施例提供的一种第一阻挡墙的剖面结构示意图,(b)图示出了有效显示区中的TFT的剖面结构示意图，其中(b)图中的一些膜层与(a)中的一些膜层的材料相同；
图4示出了本公开实施例提供的一种第一阻挡墙中的金属层的剖面结构示意图；以及
图5示出了本公开实施例提供的一种显示基板的制备方法的步骤流程图。
具体实施方式
为使本公开的上述目的、特征和优点能够更加明显易懂，下面结合附图和具体实施方式对本公开作进一步详细的说明。
发明人发现，为了在显示区内打孔，在切割过程中形成的裂纹crack与切割边处的无机层厚度有关。在沉积膜层的过程中，CVD(Chemical Vapor Deposition，化学气相沉积)Mask等掩膜版无法对打孔区域进行支撑遮挡，因此，CVD沉积的无机膜层会从有效显示区域一直延伸到孔的切割边，导致切割边处的无机膜层厚度增加，导致切割过程中容易产生crack，进而在后续工艺过程中crack延伸到有效显示区域，造成封装失效。
为了解决上述问题，本公开的一实施例提供了一种显示基板，参照图1，显示基板包括有效显示区域、打孔区域以及设置在有效显示区域和打孔区域之间的临界区域，参照图2，显示基板的临界区域包括：基底21，以及设置在基底21上的至少一个第一阻挡墙22，例如图2所示包括两个第一阻挡墙，此时 两个第一阻挡墙22之间间隔开设置，两者之间形成凹陷部，至少一个第一阻挡墙22包括层叠设置的金属层和绝缘层，第一阻挡墙22为凸起结构。
其中，基底21包括衬底211，衬底211可以为柔性基底，具体可以包括层叠设置的第一有机层PI1、第一无机层Barrier1以及第二有机层PI2。在实际应用中，基底21还可以包括形成在衬底211上的无机材料层，无机材料层具体可以包括第二无机层barrier2、层间介质层ILD(Inter Layer Dielectric)、栅极绝缘层GI以及缓冲层buffer，第二无机层barrier2靠近第二有机层PI2设置。
由于第一阻挡墙22凸出基底21设置，独立设置在基底21上的多个第一阻挡墙22形成多个起伏，这些起伏可以阻挡切割形成打孔区域的过程中产生的裂纹Crack的传播。一方面，切割过程中形成的裂纹Crack传播至起伏处，如果继续传播则需改变方向，裂纹改变方向传播需要消耗较大能量，从而达到阻碍裂纹传播的效果；另一方面，这些起伏增加了裂纹的传播路径，从而阻碍裂纹传至有效显示区域。
第一阻挡墙22的设置数量可以根据实际需要确定，例如基底21上可以设置5-7个第一阻挡墙22，本实施例对第一阻挡墙22的设置数量不作限定。
本实施例提供的显示基板，通过在临界区域设置凸出基底表面的第一阻挡墙，第一阻挡墙在基底表面形成的起伏可以阻挡Crack的传播，阻断Crack延伸至有效显示区域，从而提升显示产品的可靠性。
一种实现方式中，参照图3中的(a)图，第一阻挡墙22可以包括依次层叠设置的第一栅极金属层31、第一栅极绝缘层32、第二栅极金属层33、第二栅极绝缘层34以及源漏电极金属层35，第一栅极金属层31比第一栅绝缘层更靠近基底21设置。换言之，第一阻挡墙22的各层与有效显示区中的薄膜晶体管、电容结构以及显示器件的相应膜层可以同层制造，材料相同。需要说明的是，第一阻挡墙22并不仅限于图3示出的层结构，凡是包括层叠设置的金属层和绝缘层的凸起结构都可以作为第一阻挡墙，本实施例对第一阻挡墙的材料和结构不作具体限定。
如图3中的(b)图所示，有效显示区的薄膜晶体管可为顶栅型，此薄膜晶体管可包括有源层104、第一栅绝缘层105、栅极106、第二栅绝缘层108、层间介质层103、源极110、漏极111。具体地，有源层104可形成在缓冲层102上，第一栅绝缘层105覆盖缓冲层102及有源层104，栅极106形成在第一栅绝缘层105背离有源层104的一侧，第二栅绝缘层108覆盖栅极106和第一栅绝缘层105，层间介质层103覆盖第二栅绝缘层108，源极110和漏极111形成在层间介质层103背离衬底基板的一侧并分别位于栅极106的相对两侧，该源极110和漏极111可分别通过过孔(例如：金属过孔)与有源层104的相对两侧接触。应当理解的是，此薄膜晶体管也可为底栅型。
如图3中的(b)图所示，电容结构可包括第一极板130和第二极板131，此第一极板130与栅极106同层设置，第二极板131位于第二栅绝缘层108与层间介质层103之间，并与第一极板130相对设置。
举例而言，栅极106和第一极板130、第二极板131的材料可以包括金属材料或者合金材料，例如包括钼、铝及钛等。源极110和漏极111可以包括金属材料或者合金材料，例如由钼、铝及钛等形成的金属单层或多层结构，例如，该多层结构为多金属层叠层，例如钛、铝、钛三层金属叠层(Al/Ti/Al)等。
如图3中的(b)图所示，显示器件位于显示区，该显示器件可包括依次形成在层间介质层103上的第一电极112和像素界定部113，应当理解的是，该显示器件还可包括发光部114a和第二电极115。
详细说明，在显示区的薄膜晶体管为顶栅型时，在制作显示器件之前还可制作平坦化层，此平坦化层可为单层结构，也可为多层结构；此平坦化层通常采用有机材料制作而成，例如：光刻胶、丙烯酸基聚合物、硅基聚合物等材料；如图3所示，此平坦化层可包括位于显示区10a的平坦化部116，平坦化部116形成在层间介质层103与第一电极112之间。其中，第一电极112可通过金属过孔与漏极111电性连接，该第一电极112可为阳极，此阳极可为ITO(氧化铟锡)、氧化铟锌(IZO)、氧化锌(ZnO)等材料制作而成；像素界定部113可覆盖平坦化部116，此像素界定部113可为有机材料制作而成，例如：光刻胶等有机材料，且像素界定部113中位于显示区10a的部分可具有露出第一电 极112的像素开口；发光部114a位于像素开口内并形成在第一电极112上，该发光部114a可包括小分子有机材料或聚合物分子有机材料，可以为荧光发光材料或磷光发光材料，可以发红光、绿光、蓝光，或可以发白光等；并且，根据实际不同需要，在不同的示例中，发光部114a还可以进一步包括电子注入层、电子传输层、空穴注入层、空穴传输层等功能层；第二电极115覆盖发光部114a，且该第二电极115的极性与第一电极112的极性相反；此第二电极115可为阴极，此阴极可为锂(Li)、铝(Al)、镁(Mg)、银(Ag)等金属材料制作而成。
需要说明的是，如图3中的(b)图所示，第一电极112、发光部114a和第二电极115可构成一个发光子像素1d。其中，此显示器件中位于显示区10a的部分可包括多个阵列排布的发光子像素1d。此外，还需说明的是，各发光子像素1d的第一电极112相互独立，各发光子像素1d的第二电极115整面连接；即第二电极115为设置在显示基板10上的整面结构，为用于多个显示器件的公共电极。
在一些实施例中，如图3中的(b)图所示，像素界定部113背离层间介质层103的一侧还可设置支撑部132，该支撑部132可起到支撑保护膜层(图中未示出)的作用，以避免保护膜层与第一电极112或其他走线接触而导致第一电极112或其他走线容易损坏的情况。需要说明的是，此保护膜层主要出现在半成品转移的过程中，以避免转移过程中半成品出现损坏的情况，具体地：在将制作完支撑部132的基板转移到蒸镀产线的过程中，可覆盖一层保护膜层，当需要进行发光材料的蒸镀时，而将保护膜层移除。
举例而言，支撑部132的材料可与像素界定部113的材料相同，且支撑部132与像素界定部113可采用同一次构图工艺形成，但不限于此，支撑部132的材料也可与像素界定部113的材料不同，且支撑部132与像素界定部113也可采用不同构图工艺形成。
为了降低裂纹crack产生的风险，参照图2，基底21的靠近打孔区域处包括：衬底211以及设置在衬底211上的无机膜层212，无机膜层212的厚度小于预设阈值。其中，预设阈值的具体数值可以根据实际情况设定，本实施例对此不作限定。在实际应用中，可以通过刻蚀工艺对衬底211上切割边处的无机材料层进行处理(例如可以刻蚀掉层间介质层ILD、栅极绝缘层GI以及缓冲 层buffer等，只剩很薄一层的第二无机层barrier2)，使得切割边处(打孔区域与临界区域的交界)的无机膜层212厚度变薄，从而降低切割过程中产生Crack的风险。
为了避免有效显示区域的有机层材料流到切割边，参照图2，显示基板的临界区域还可以包括：设置在基底21上、位于第一阻挡墙22和有效显示区域之间的第二阻挡墙23，第二阻挡墙23包括层叠设置的平坦化层、第一像素界定层和第一支撑层，平坦化层比第一像素界定层更靠近基底21，所述第二阻挡墙的高度大于所述第一阻挡墙的高度。所述第二阻挡墙为凸起结构。
进一步地，显示基板的临界区域还可以包括：设置在基底21上、位于第二阻挡墙23和有效显示区域之间的第三阻挡墙24，第三阻挡墙24包括层叠设置的第二像素界定层和第二支撑层，第二像素界定层比第二支撑层更靠近基底21设置。所述第三阻挡墙为凸起结构。通过设置第三阻挡墙，可以进一步避免有效显示区域的有机层材料流到切割边。所述第三阻挡墙的高度大于第一阻挡墙的高度，小于等于第二阻挡墙的高度。需要说明的是本公开中的第一、第二和第三阻挡墙的高度都是指凸起结构的高度。在图2中，第一阻挡墙22的高度h1、第二阻挡墙23的高度h2，第三阻挡墙24的高度h3的大小关系为：h1＜h3＜h2。
需要说明的是，第一阻挡墙22、第二阻挡墙23以及第三阻挡墙24是以环状分立设置在临界区域中。
发明人还发现，在沉积EL材料的过程中，由于open Mask无法遮挡打孔区域，导致EL材料会沉积到切割边，进而导致水氧会沿着EL材料侵蚀到有效显示区域，最终造成封装失效。
为了解决这一问题，参照图4，金属层远离基底21设置，金属层的材料包括层叠设置的第一钛材料层、铝材料层和第二钛材料层。在实际应用中，金属层可以包括源漏电极金属层35，源漏电极金属层35的材料可以为层叠设置的第一钛材料层、铝材料层和第二钛材料层。铝材料层的边缘相对于第一钛材料 层和第二钛材料层的边缘缩进。
在所述基底和所述第一阻挡墙上还设置有第一功能层，正是由于所述第一钛材料层、铝材料层和第二钛材料层共同形成工字形结构，所以源漏电极金属层才能很容易将第一功能层断开。第一功能层可以是有机发光层或者发光器件的阴极等。
参照图2和图4，以第一功能层为有机发光层为例进行说明，显示基板的临界区域还可以包括：设置在基底21和第一阻挡墙22上的有机发光层25，有机发光层25被金属层(或源漏电极金属层)断开。
在实际应用中，可以采用湿法刻蚀工艺，刻蚀液对铝材料层的边缘进行刻蚀，使铝材料层的边缘相对于第一钛材料层和第二钛材料层的边缘缩进，自然形成一个“工字形结构”，这样，有机发光层25在形成的过程中会在金属层的边缘处断开，断开的EL材料将水氧传播路径阻断，避免水氧进入有效显示区域，最终达到可靠性要求。
本公开另一实施例提供了一种显示基板的制备方法，显示基板包括有效显示区域、打孔区域以及设置在有效显示区域和打孔区域之间的临界区域，参照图5，该制备方法包括：
步骤501：提供基底；
步骤502：在基底上对应临界区域的位置形成至少一个第一阻挡墙，第一阻挡墙为凸起结构。参照图1示出了本实施例制备得到的一种显示基板的平面结构示意图；参照图2示出了本实施例制备得到的一种显示基板的剖面结构示意图。
一种实现方式中，步骤502中在基底上形成第一阻挡墙的步骤，可以包括：
依次在基底上形成第一栅极金属层、第一栅极绝缘层、第二栅极金属层、第二栅极绝缘层以及源漏电极金属层，得到第一阻挡墙。参照图3示出了本实施例制备得到的第一阻挡墙的剖面结构示意图。
一种实现方式中，步骤501可以包括：
提供衬底；
在衬底上形成无机膜材料；
对无机膜材料进行刻蚀，得到无机膜层。
还可以进一步包括，对所述无机膜材料层进行刻蚀，得到无机膜层，使得所述无机膜层的靠近所述打孔区域的部分的厚度比所述无机膜层的其它部分的厚度小。
具体地，可以采用曝光、显影和刻蚀等一系列构图工艺，依次将无机膜材料层如层间介质层ILD、栅极绝缘层GI、缓冲层buffer以及第二无机层barrier2进行刻蚀，只剩很薄一层的第二无机层barrier2，从而达到减薄无机层厚度的效果，降低切割过程中产生裂纹的风险。
为了避免有效显示区域的有机层材料流到切割边，本实施例提供的制备方法还可以包括：
在基底上、位于第一阻挡墙和有效显示区域之间的区域依次形成平坦化层、第一像素界定层和第一支撑层，得到第二阻挡墙。第二阻挡墙的高度大于第一阻挡墙的高度。
为了进一步避免有效显示区域的有机层材料流到切割边，本实施例提供的制备方法还可以包括：
在基底上、位于第二阻挡墙和有效显示区域之间的区域依次形成第二像素界定层和第二支撑层，得到第三阻挡墙。所述第三阻挡墙的高度大于第一阻挡墙的高度，小于等于第二阻挡墙的高度。
为了避免水氧会沿着EL材料侵蚀到有效显示区域，步骤502中在基底上形成第一阻挡墙的步骤，可以包括：
在基底的一侧形成金属层，金属层包括层叠设置的第一钛材料层、铝材料层和第二钛材料层；
采用湿法刻蚀工艺对金属层进行处理，刻蚀掉铝材料层的边缘。
具体地，将形成金属层的显示基板放入刻蚀液中，刻蚀液与裸露在外的铝金属层边缘发生反应，自然形成一个缩进的“工字形结构”，参照图4，“工字 形结构”使后续形成的EL层在这里断开。断开的EL材料将水氧传播路径阻断，避免水氧进入有效显示区域，最终达到可靠性要求。
完成刻蚀后，本实施例提供的制备方法还可以包括：
在基底和第一阻挡墙上形成第一功能层(例如可以是有机发光层)，第一功能层被所述金属层(具体可以是源漏电极金属层)断开。
通过本实施例提供的制备方法得到的显示基板结构和有益效果可以参照前述显示基板实施例的描述，这里不再赘述。
本公开另一实施例提供了一种显示装置，该显示装置包括任一实施例所述的显示基板。
需要说明的是，本实施例中的显示装置可以为：显示面板、电子纸、手机、平板电脑、电视机、笔记本电脑、数码相框、导航仪等任何具有显示功能的产品或部件。
本实施例提供了一种显示基板的制备方法、显示基板及显示装置，所述显示基板包括有效显示区域、打孔区域以及设置在所述有效显示区域和所述打孔区域之间的临界区域，所述显示基板的临界区域包括：基底，以及设置在所述基底上的至少一个第一阻挡墙，所述第一阻挡墙之间分立设置，所述第一阻挡墙包括层叠设置的金属层和绝缘层，所述第一阻挡墙凸出所述基底表面。通过在临界区域设置凸出基底表面的第一阻挡墙，第一阻挡墙在基底表面形成的起伏可以阻挡Crack的传播，阻断Crack延伸至有效显示区域，从而提升显示产品的可靠性。
本说明书中的各个实施例均采用递进的方式描述，每个实施例重点说明的都是与其他实施例的不同之处，各个实施例之间相同相似的部分互相参见即可。
最后，还需要说明的是，在本文中，诸如第一和第二等之类的关系术语仅仅用来将一个实体或者操作与另一个实体或操作区分开来，而不一定要求或者暗示这些实体或操作之间存在任何这种实际的关系或者顺序。而且，术语“包 括”、“包括”或者其任何其他变体意在涵盖非排他性的包括，从而使得包括一系列要素的过程、方法、商品或者设备不仅包括那些要素，而且还包括没有明确列出的其他要素，或者是还包括为这种过程、方法、商品或者设备所固有的要素。在没有更多限制的情况下，由语句“包括一个……”限定的要素，并不排除在包括所述要素的过程、方法、商品或者设备中还存在另外的相同要素。
以上对本公开所提供的一种显示基板的制备方法、显示基板及显示装置进行了详细介绍，本文中应用了具体个例对本公开的原理及实施方式进行了阐述，以上实施例的说明只是用于帮助理解本公开的方法及其核心思想；同时，对于本领域的一般技术人员，依据本公开的思想，在具体实施方式及应用范围上均会有改变之处，综上所述，本说明书内容不应理解为对本公开的限制。

Claims (21)

  1. 一种显示基板，其中，所述显示基板包括有效显示区域、打孔区域以及设置在所述有效显示区域和所述打孔区域之间的临界区域，所述显示基板的临界区域包括：
    基底，以及设置在所述基底上的至少一个第一阻挡墙，所述至少一个第一阻挡墙为凸起结构。
  2. 根据权利要求1所述的显示基板，其中，所述至少一个第一阻挡墙包括依次层叠设置的第一栅极金属层、第一栅极绝缘层、第二栅极金属层、第二栅极绝缘层以及源漏电极金属层，所述第一栅极金属层比第一栅极绝缘层更靠近所述基底。
  3. 根据权利要求2所述的显示基板，其中，所述有效显示区的薄膜晶体管为顶栅型，所述至少一个第一阻挡墙的第一栅极金属层、第一栅极绝缘层、第二栅极金属层、第二栅极绝缘层以及源漏电极金属层分别与所述有效显示区的的第一栅极金属层、第一栅极绝缘层、第二栅极金属层、第二栅极绝缘层以及源漏电极金属层处于相同的层且材料分别相同，其中，所述薄膜晶体管包括位于所述显示区的所述第一栅极金属层、第一栅极绝缘层以及源漏电极金属层。
  4. 根据权利要求1-3中任一项所述的显示基板，其中，所述基底包括：衬底以及设置在所述衬底上的无机膜层。
  5. 根据权利要求4所述的显示基板，其中，所述无机膜层的靠近所述打孔区域的部分的厚度比所述无机膜层的其它部分的厚度小。
  6. 根据权利要求1-3中任一项所述的显示基板，其中，所述显示基板的临界区域还包括：
    设置在所述基底上、位于所述第一阻挡墙和所述有效显示区域之间的第二阻挡墙，所述第二阻挡墙包括层叠设置的平坦化层、第一像素界定层和第一支撑层，所述平坦化层比所述第一像素界定层更靠近所述基底，第二阻挡墙的高度高于所述第一阻挡墙的高度。
  7. 根据权利要求6所述的显示基板，其中，所述第二阻挡墙的平坦化层、第一像素界定层和第一支撑层分别与所述有效显示区的显示器件的平坦化层、像素界定部和支撑部处于相同的层且材料分别相同。
  8. 根据权利要求7所述的显示基板，其中，所述显示基板的临界区域还包括：
    设置在所述基底上、位于所述第二阻挡墙和所述有效显示区域之间的第三阻挡墙，所述第三阻挡墙包括层叠设置的第二像素界定层和第二支撑层，所述第二像素界定层比所述第二支撑层更靠近所述基底，所述第三阻挡墙的高度大于第一阻挡墙的高度，小于等于第二阻挡墙的高度。
  9. 根据权利要求8所述的显示基板，其中，所述第三阻挡墙的第二像素界定层和第二支撑层分别与所述有效显示区的显示器件的像素界定部和支撑部处于相同的层且材料分别相同。
  10. 根据权利要求7或9所述的显示基板，其中，所述第三阻挡墙的第二像素界定层和第二支撑层的材料相同，并且所述第二阻挡墙的第一像素界定层和第一支撑层的材料相同。
  11. 根据权利要求2或3所述的显示基板，其中，所述源漏电极金属层包括层叠设置的第一钛材料层、铝材料层和第二钛材料层，所述铝材料层的边缘相对于所述第一钛材料层和所述第二钛材料层的边缘缩进。
  12. 根据权利要求11所述的显示基板，其中，所述显示基板的临界区域 还包括：
    设置在所述基底和所述第一阻挡墙上的第一功能层，所述第一功能层在源漏电极金属层处断开。
  13. 根据权利要求12所述的显示基板，其中，所述第一功能层是有机发光层。
  14. 根据权利要求1-3中任一项所述的显示基板，其中，所述第一阻挡墙包括层叠设置的金属层和绝缘层。
  15. 一种显示基板的制备方法，其中，所述显示基板包括有效显示区域、打孔区域以及设置在所述有效显示区域和所述打孔区域之间的临界区域，所述制备方法包括：
    提供基底；
    在所述基底上对应所述临界区域的位置形成至少一个第一阻挡墙，其中，所述至少一个第一阻挡墙为凸起结构。
  16. 根据权利要求15所述的制备方法，其中，在所述基底上形成至少一个第一阻挡墙的步骤，包括：
    依次在所述基底上形成第一栅极金属层、第一栅极绝缘层、第二栅极金属层、第二栅极绝缘层以及源漏电极金属层，以得到所述至少一个第一阻挡墙。
  17. 根据权利要求15所述的制备方法，其中，所述提供基底的步骤，包括：
    提供衬底；
    在所述衬底上形成无机膜材料层；
    对所述无机膜材料层进行刻蚀，得到无机膜层。
  18. 根据权利要求11所述的制备方法，其中，所述制备方法还包括：
    在所述基底上、位于所述第一阻挡墙和所述有效显示区域之间依次形成平坦化层、第一像素界定层和第一支撑层，以得到第二阻挡墙，所述第二阻挡墙的高度大于所述第一阻挡墙的高度。
  19. 根据权利要求15所述的制备方法，其中，所述制备方法还包括：
    在所述基底上、且位于所述第二阻挡墙和所述有效显示区域之间依次形成第二像素界定层和第二支撑层，以得到第三阻挡墙，所述第三阻挡墙的高度大于第一阻挡墙的高度，小于等于第二阻挡墙的高度。
  20. 根据权利要求12所述的制备方法，其中，所述制备方法还包括：
    在所述基底和所述第一阻挡墙上形成第一功能层，所述第一功能层被所述源漏电极金属层断开。
  21. 一种显示装置，其中，所述显示装置包括如权利要求1至14任一项所述的显示基板。
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