WO2021174622A1 - 显示面板及显示面板的制备方法 - Google Patents

显示面板及显示面板的制备方法 Download PDF

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Publication number
WO2021174622A1
WO2021174622A1 PCT/CN2020/082438 CN2020082438W WO2021174622A1 WO 2021174622 A1 WO2021174622 A1 WO 2021174622A1 CN 2020082438 W CN2020082438 W CN 2020082438W WO 2021174622 A1 WO2021174622 A1 WO 2021174622A1
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WO
WIPO (PCT)
Prior art keywords
circuit
display device
glass substrate
line
insulating layer
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PCT/CN2020/082438
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English (en)
French (fr)
Inventor
孟小龙
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Tcl华星光电技术有限公司
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Publication of WO2021174622A1 publication Critical patent/WO2021174622A1/zh

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
    • H01L27/1244—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits for preventing breakage, peeling or short circuiting
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3266—Details of drivers for scan electrodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1259—Multistep manufacturing methods
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/131—Interconnections, e.g. wiring lines or terminals
    • H10K59/1315—Interconnections, e.g. wiring lines or terminals comprising structures specially adapted for lowering the resistance

Definitions

  • the present invention relates to the field of display technology, in particular to a display panel and a method for manufacturing the display panel.
  • AMLCD active matrix liquid crystal displays
  • AMOLED active matrix organic electroluminescent diodes
  • the metal wiring industry has adopted the technical route from Al to Cu and Cu to thick Cu.
  • the size of the thin film transistor (TFT) is designed to be smaller, and the aperture ratio of the design can also be increased.
  • thick Cu wiring is prone to warpage due to high film-forming stress, and large etched critical dimension loss (CD Loss).
  • CD Loss critical dimension loss
  • the embodiment of the present invention provides a display device and a manufacturing method of the display device, which are used to solve the technical problems of the current display device that cannot simultaneously solve the abnormal technical problems such as excessively wide frame, excessive resistance delay effect, and fragile wire breakage.
  • the present invention provides a display device, including:
  • the first circuit is arranged on the first surface of the glass substrate
  • the first insulating layer is disposed on the first circuit, and the first insulating layer is provided with via holes;
  • a bonding circuit is disposed on the first insulating layer and is connected to the first circuit through the via hole;
  • the second circuit is arranged on a second surface of the glass substrate opposite to the first surface.
  • the first line is a scanning circuit, a driving circuit, or a combination of a scanning circuit and a driving circuit.
  • the line width of the overlapping area of the scanning circuit and the driving circuit is smaller than the line width of the non-overlapping area.
  • a conductive adhesive is further included, which is arranged on a side surface of the glass substrate adjacent to the first surface, and the first circuit and the second circuit are connected by the conductive adhesive.
  • a plurality of the first circuits correspond to a plurality of the second circuits, and a plurality of the first circuits correspond to a plurality of the vias in a one-to-one correspondence.
  • the first line and the second line corresponding to each group are a scanning circuit and a driving circuit, respectively, and the bonding line is connected to the scanning circuit and the driving circuit.
  • At least one group of corresponding first lines has a width greater than that of the second lines.
  • At least one of the first lines is a line with uneven width, and at least two of the bound lines have different widths.
  • the first circuit is connected to the second circuit by means of film bonding.
  • the material of the first insulating layer is silicon nitride or silicon oxide.
  • the present invention provides a method for preparing a display device, which is used to prepare the above-mentioned display device, including the following steps:
  • a second circuit is prepared on the second surface of the glass substrate opposite to the first surface to manufacture the display device.
  • the method further includes: cutting the glass substrate, and then conducting the first circuit and the second circuit one by one through transfer.
  • the method further includes: cutting the glass substrate, coating conductive glue and performing a laser process, preparing conductive glue on the side adjacent to the first surface of the glass substrate, and A circuit is connected with the second circuit through the conductive glue.
  • it further includes: preparing a flat protective layer on the bonding circuit, the flat protective layer covering the entire first surface of the glass substrate.
  • the first line is a scanning circuit, a driving circuit, or a combination of a scanning circuit and a driving circuit.
  • the material of the first insulating layer is silicon nitride or silicon oxide.
  • a plurality of the first circuits correspond to a plurality of the second circuits, and a plurality of the first circuits correspond to a plurality of the vias in a one-to-one correspondence.
  • the first circuit is connected to the second circuit by means of film bonding.
  • the present invention can be realized by designing the first circuit and the second circuit on different side surfaces of the glass substrate, and using the first circuit to prepare the scanning circuit, the driving circuit, or the combination of the scanning circuit and the driving circuit.
  • bilateral drive the design resistance specification of the scanning and drive circuit in the front AA area can be doubled, thereby reducing the width of the frame while reducing the resistance delay effect caused by the distance between the pixel and the drive end.
  • FIG. 1 is a schematic diagram of the structure of a display device in an embodiment of the present invention
  • Figure 2 is a schematic diagram of the first circuit in an embodiment of the present invention.
  • 3A to 3F are schematic diagrams of the steps of the preparation method in an embodiment of the present invention.
  • Fig. 4 is a flow chart of the preparation method in an embodiment of the present invention.
  • first and second are only used for descriptive purposes, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of indicated technical features. Therefore, the features defined with “first” and “second” may explicitly or implicitly include one or more of the features. In the description of the present invention, “plurality” means two or more than two, unless otherwise specifically defined.
  • the embodiment of the present invention provides a display device and a manufacturing method of the display device. Detailed descriptions are given below.
  • the present invention provides a display device, as shown in FIG. 1, which is a schematic structural diagram of the display device in an embodiment of the present invention.
  • the display device includes: a glass substrate 101; a first circuit 102 disposed on the first surface of the glass substrate 101; a first insulating layer 103 disposed on the first circuit 102, and the first insulating layer 103 is provided with a via 104; a bonding circuit 105 is provided on the first insulating layer 103 and passes through the via 104 to be connected to the first circuit 102; a second circuit 201 is provided on the glass The second surface of the substrate 101 opposite to the first surface.
  • the present invention designs the first circuit 102 and the second circuit 201 on different side surfaces of the glass substrate 101, and uses the first circuit 102 to prepare a scanning circuit and drive
  • the circuit or the combination of the scanning circuit and the driving circuit can realize double-sided driving.
  • the scanning and driving circuit design resistance specifications of the active area (AA) area 203 on the front side can be doubled, thus reducing the frame width. At the same time, the resistance delay effect caused by the distance between the pixel and the driving end is reduced.
  • the first line 102 is a scanning circuit, a driving circuit, or a combination of a scanning circuit and a driving circuit; correspondingly, the second line 201 may also be a scanning circuit, a driving circuit, or a scanning circuit and Combination of drive circuits.
  • the first line 102 is taken as an example for description, and the second line 201 can be known in the same way, and will not be repeated.
  • FIG. 2 it is a schematic diagram of the first circuit in an embodiment of the present invention.
  • the first circuit 102 is a combination of a scanning circuit 1021 and a driving circuit 1022
  • the scanning circuit 1021 and the driving circuit 1022 will overlap on the first surface of the glass substrate 101, and the scanning circuit layer A second insulating layer (not shown in the figure) is provided between 1021 and the driving circuit layer 1022, which can avoid short circuits.
  • the line width of the overlapping area of the scanning circuit 1021 and the driving circuit 1022 is D1, the line width of the non-overlapping area is D2, and the line width D1 of the overlapping area is smaller than the line width D2 of the non-overlapping area.
  • the area line width D1 can reduce the facing area S of the capacitor plate and reduce the value of the parasitic capacitance.
  • the distance d of the capacitor plate can also be increased, and the second insulating layer can be set to achieve For this purpose, but in order to ensure the thickness of the display device, it is generally not suitable to increase too much.
  • a conductive adhesive 202 is further included, which is disposed on the side surface adjacent to the first surface of the glass substrate 101, and the first circuit 102 and the second circuit 201 pass through the conductive adhesive. 202 connections.
  • the conductive adhesive 202 serves to electrically connect the first circuit 102 and the second circuit 201, wherein the side surface is adjacent to the first surface or the second surface, and the side surface may be It is one side surface or both sides surface.
  • the conductive glue is a colloid doped with silver particles and is arranged on both sides of the glass substrate.
  • the material of the first insulating layer 103 and the second insulating layer is silicon nitride (SiN) or silicon oxide (SiN).
  • the first circuit 102 is connected to the second circuit by film binding.
  • a plurality of the first circuits 102 correspond to a plurality of the second circuits 201 one-to-one
  • a plurality of the first circuits 102 and a plurality of the vias 104 correspond to a one-to-one.
  • each group of lines is connected to one of the second lines 201 by one of the first lines 102 through the corresponding conductive adhesive 202, and one of the binding lines 105 passes through a corresponding all of the lines.
  • the via hole 104 is connected to the first circuit 102.
  • the first line 102 and the second line 201 corresponding to each group are a scanning circuit and a driving circuit, respectively, and the bonding circuit 105 is connected to one-half of the conductivity of the scanning circuit and the driving circuit. Place.
  • the width of at least one set of the corresponding first line 102 is greater than the width of the second line 201.
  • the second line 201 is located in the AA area 203. The width of the second line 201 cannot be done too much. Wide, increasing the width of the first line 102 can reduce the resistance of the first line 102, thereby reducing the resistance delay effect of the display device.
  • At least one of the first lines 102 is a line with uneven width, or at least two of the first lines 102 have different widths, so as to avoid the conductivity of each group of the scanning circuit and the driving circuit. One part is too close.
  • the widths of at least two of the binding circuits 105 are different, or the bending shapes of at least two of the binding circuits 105 are different, so as to ensure that the resistance value of each line to the binding end is the same.
  • the embodiment of the present invention also provides a manufacturing method of the display device, and the manufacturing method of the display device is used to prepare the display device as described in the foregoing embodiment.
  • FIGS. 3A to 3F it is a step-by-step schematic diagram of the preparation method in an embodiment of the present invention
  • FIG. 4 it is a flow chart of the preparation method in an embodiment of the present invention.
  • the preparation method includes the following steps:
  • a first circuit 102 is prepared on the first surface of the glass substrate 101;
  • the first circuit 102 is a scanning circuit, a driving circuit, or a combination of a scanning circuit and a driving circuit.
  • the material of the first insulating layer 103 is silicon nitride (SiN) or silicon oxide (SiN).
  • a plurality of the first circuits 102 correspond to a plurality of the bonding circuits 105 one-to-one, and a plurality of the first circuits 102 correspond to a plurality of the vias 104 one-to-one.
  • the preparation method further includes: preparing a flat protective layer 106 on the bonding circuit 105, the flat protective layer 106 covering the entire first surface of the glass substrate 101, and
  • the material of the flat protection layer 106 is polyimide.
  • the plurality of first circuits 102 correspond to the plurality of second circuits 201 in a one-to-one correspondence, and OLED devices are prepared on the second circuits 201 to form an AA area 203.
  • the preparation method further includes, after step S5, cutting the glass substrate 101, and then coating conductive glue 202 and performing a laser process, or making the first The lines 102 and the second lines 201 are connected one by one.
  • each embodiment has its own focus.
  • each of the above units or structures can be implemented as independent entities, or can be combined arbitrarily, and implemented as the same or several entities.
  • For the specific implementation of each of the above units or structures please refer to the previous method embodiments. No longer.

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)
  • Manufacturing & Machinery (AREA)
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Abstract

本发明公开了一种显示装置及显示装置的制备方法，该显示装置包括：玻璃基板；第一线路，设置于玻璃基板的第一表面；第一绝缘层，设置于第一线路表面，且第一绝缘层上设置有过孔；绑定线路，设置于第一绝缘层的表面，并穿过过孔与第一线路连接；第二线路，设置于玻璃基板相对第一表面的第二表面。

Description

显示面板及显示面板的制备方法 技术领域
本发明涉及显示技术领域，具体涉及一种显示面板及显示面板的制备方法。
 背景技术
大尺寸，高帧率处理和可见光范围内穿透率高等显著优点在有源矩阵液晶显示（ AMLCD ）和有源矩阵有机电致发光二极管（AMOLED）等领域具有广阔的应用前景。
TV面板随着尺寸的增大，为进一步降低金属走线的电容-电阻延时效应(RC Delay) ，金属布线业已采用Al至Cu，Cu至厚Cu的技术路线。一方面，为增加TV面板的分辨率（高PPI），将薄膜晶体管（TFT）的尺寸设计更小，同时也可提高设计的开口率。另一方面，厚Cu布线除成膜应力较大易发生翘曲外，同时刻蚀的关键尺寸损失（Critical Dimension Loss；CD Loss）较大，当设计关键尺寸较小时，极易出现断线等异常。因此，当前厚Cu结构布线难于满足大尺寸微型TFT基板的需求。
 技术问题
目前的显示装置中存在无法同时解决边框过宽、电阻延迟效应过大和易断线等异常的技术问题。
 技术解决方案
本发明实施例提供一种显示装置及显示装置的制备方法，用于解决目前的显示装置中存在无法同时解决边框过宽、电阻延迟效应过大和易断线等异常的技术问题。
为解决上述问题，第一方面，本发明提供一种显示装置，包括：
玻璃基板；
第一线路，设置于所述玻璃基板的第一表面；
第一绝缘层，设置于所述第一线路上，且所述第一绝缘层上设置有过孔；
绑定线路，设置于所述第一绝缘层，并穿过所述过孔与所述第一线路连接；及
第二线路，设置于所述玻璃基板相对第一表面的第二表面。
在本发明的一些实施例中，所述第一线路为扫描电路、驱动电路或扫描电路与驱动电路的组合。
在本发明的一些实施例中，当所述第一线路为扫描电路与驱动电路的组合时，所述扫描电路与所述驱动电路的交叠区线宽小于非交叠区线宽。
在本发明的一些实施例中，还包括导电胶，设置于所述玻璃基板与第一表面相邻的侧面，所述第一线路与所述第二线路通过所述导电胶连接。
在本发明的一些实施例中，多个所述第一线路与多个所述第二线路一一对应，多个所述第一线路与多个所述过孔与一一对应。
在本发明的一些实施例中，每组相对应的所述第一线路和所述第二线路分别为扫描电路和驱动电路，所述绑定线路连接于所述扫描电路和所述驱动电路的电导率二分之一处。
在本发明的一些实施例中，至少一组相对应的所述第一线路宽度大于所述第二线路。
在本发明的一些实施例中，至少一条所述第一线路为宽度不均匀的线路，至少两条所述绑定线路的宽度相异。
在本发明的一些实施例中，所述第一线路通过薄膜绑定的方式连接所述第二线路。
在本发明的一些实施例中，所述第一绝缘层的材料为氮化硅或氧化硅。
第二方面，本发明提供一种显示装置的制备方法，用于制备上述显示装置，包括如下步骤：
提供玻璃基板；
在所述玻璃基板的第一表面制备第一线路；
在所述第一线路上制备第一绝缘层，并在所述第一绝缘层上开设过孔；
在所述第一绝缘层制备绑定线路，所述绑定线路穿过所述过孔与所述第一线路连接；及
在所述玻璃基板相对第一表面的第二表面制备第二线路，制得所述显示装置。
在本发明的一些实施例中，还包括：对所述玻璃基板进行切割，然后通过转印使所述第一线路和所述第二线路一一导通。
在本发明的一些实施例中，还包括：对所述玻璃基板进行切割，然后涂布导电胶和进行激光制程，在所述玻璃基板与第一表面相邻的侧面制备导电胶，所述第一线路与所述第二线路通过所述导电胶连接。
在本发明的一些实施例中，还包括：在所述绑定线路上制备平坦保护层，所述平坦保护层覆盖所述玻璃基板的整个第一表面。
在本发明的一些实施例中，所述第一线路为扫描电路、驱动电路或扫描电路与驱动电路的组合。
在本发明的一些实施例中，所述第一绝缘层的材料为氮化硅或氧化硅。
在本发明的一些实施例中，多个所述第一线路与多个所述第二线路一一对应，多个所述第一线路与多个所述过孔与一一对应。
在本发明的一些实施例中，所述第一线路通过薄膜绑定的方式连接所述第二线路。
 有益效果
相较于现有的显示装置，本发明通过将第一线路和第二线路设计在玻璃基板不同侧表面，且使用第一线路制备扫描电路、驱动电路或扫描电路与驱动电路的组合，可以实现双边驱动，正面AA区的扫描和驱动电路设计阻值规格可放大约一倍，从而在减小了边框宽度的同时，减小了像素距离驱动端远近导致的电阻延时效应。
 附图说明
为了更清楚地说明本发明实施例中的技术方案，下面将对实施例描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本发明的一些实施例，对于本领域技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1为本发明一个实施例中显示装置的结构示意图；
图2为本发明一个实施例中第一线路示意图；
图3A~3F为本发明一个实施例中制备方法的分步示意图；及
图4为本发明一个实施例中制备方法的流程图。
 本发明的实施方式
下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进行清楚、完整地描述。显然，所描述的实施例仅仅是本发明一部分实施例，而不是全部的实施例。基于本发明中的实施例，本领域技术人员在没有作出创造性劳动前提下所获得的所有其他实施例，都属于本发明保护的范围。
在本发明的描述中，需要理解的是，术语“中心”、“纵向”、“横向”、“长度”、“宽度”、“厚度”、“上”、“下”、“前”、“后”、“左”、“右”、“竖直”、“水平”、“顶”、“底”、“内”、“外”、“顺时针”、“逆时针”等指示的方位或位置关系为基于附图所示的方位或位置关系，仅是为了便于描述本发明和简化描述，而不是指示或暗示所指的装置或元件必须具有特定的方位、以特定的方位构造和操作，因此不能理解为对本发明的限制。此外，术语“第一”、“第二”仅用于描述目的，而不能理解为指示或暗示相对重要性或者隐含指明所指示的技术特征的数量。由此，限定有“第一”、“第二”的特征可以明示或者隐含地包括一个或者更多个所述特征。在本发明的描述中，“多个”的含义是两个或两个以上，除非另有明确具体的限定。
目前的显示装置中存在无法同时解决边框过宽、电阻延迟效应过大和易断线等异常的技术问题。
基于此，本发明实施例提供一种显示装置及显示装置的制备方法。以下分别进行详细说明。
首先，本发明提供一种显示装置，如图1所示，为本发明一个实施例中显示装置的结构示意图。所述显示装置包括：玻璃基板101；第一线路102，设置于所述玻璃基板101的第一表面；第一绝缘层103，设置于所述第一线路102上，且所述第一绝缘层103上设置有过孔104；绑定线路105，设置于所述第一绝缘层103，并穿过所述过孔104与所述第一线路102连接；第二线路201，设置于所述玻璃基板101相对第一表面的第二表面。
相较于现有的显示装置，本发明通过将所述第一线路102和所述第二线路201设计在所述玻璃基板101不同侧表面，且使用所述第一线路102制备扫描电路、驱动电路或扫描电路与驱动电路的组合，可以实现双边驱动，正面可操作区（Active Area，AA）区203的扫描和驱动电路设计阻值规格可放大约一倍，从而在减小了边框宽度的同时，减小了像素距离驱动端远近导致的电阻延时效应。
在本发明实施例中，所述第一线路102为扫描电路、驱动电路或扫描电路与驱动电路的组合；相对应的，所述第二线路201也可以是扫描电路、驱动电路或扫描电路与驱动电路的组合。
在上述实施例的基础上，以所述第一线路102为例说明，所述第二线路201同理可知，不再赘述。如图2所示，为本发明一个实施例中第一线路示意图。当所述第一线路102为扫描电路1021与驱动电路1022的组合时，所述扫描电路1021与所述驱动电路1022会在所述玻璃基板101的第一表面产生交叠，所述扫描电路层1021与所述驱动电路层1022之间设置有第二绝缘层（图中未示出），可以避免发生短路。
所述扫描电路1021与所述驱动电路1022的交叠区线宽为D1，非交叠区线宽为D2，所述交叠区线宽D1小于所述非交叠区线宽D2，根据电容计算公式为：C=εS/4πkd可知，其中ε是一个常数，S为电容极板的正对面积，d为电容极板的距离，k则是静电力常量，可以理解的是，缩小交叠区线宽D1即可缩小电容极板的正对面积S，即可减小寄生电容的值，除此之外，还可以增大电容极板的距离d，设置所述第二绝缘层可以达到此目的，但为了保证所述显示装置的厚度，一般不宜增加太大。
在本发明的另一些实施例中，还包括导电胶202，设置于所述玻璃基板101与第一表面相邻的侧面，所述第一线路102与所述第二线路201通过所述导电胶202连接。所述导电胶202起到电性连接所述第一线路102和所述第二线路201的，其中，所述侧面分别与所述第一表面或所述第二表面相邻，所述侧面可以为一侧表面或两侧表面，优选的，所述导电胶为掺杂有银颗粒的胶状物，设置于所述玻璃基板的两侧。
优选的，所述第一绝缘层103和所述第二绝缘层的材料为氮化硅（SiN）或氧化硅（SiN）。
优选的，所述第一线路102通过薄膜绑定的方式连接所述第二线路。
在本发明实施例中，多个所述第一线路102与多个所述第二线路201一一对应，多个所述第一线路102与多个所述过孔104与一一对应。结合上述实施例可知，即每一组线路由一条所述第一线路102通过相对应的所述导电胶202连接一条所述第二线路201，一条所述绑定线路105通过一个相对应的所述过孔104连接一条所述第一线路102。每组相对应的所述第一线路102和所述第二线路201分别为扫描电路和驱动电路，所述绑定线路105连接于所述扫描电路和所述驱动电路的电导率二分之一处。
优选的，至少一组相对应的所述第一线路102宽度大于所述第二线路201宽度，通常所述第二线路201位于所述AA区203，所述第二线路201宽度无法做的过宽，增大所述第一线路102宽度，可以减小所述第一线路102的阻值，从而降低所述显示装置的电阻延时效应。
优选的，至少一条所述第一线路102为宽度不均匀的线路，或至少两条所述第一线路102的宽度相异，以避免各组所述扫描电路和所述驱动电路的电导率二分之一处距离过近。
优选的，至少两条所述绑定电路105的宽度相异，或至少两条所述绑定电路105的弯折形状不同，确保每一根线路到绑定端的阻值相同。
为了更好得到本发明实施例中的显示装置，本发明实施例中还提供一种显示装置的制备方法，所述显示装置的制备方法用于制备如上述实施例中所述的显示装置。
如图3A~3F所示，为本发明一个实施例中制备方法的分步示意图；如图4所示，为本发明一个实施例中制备方法的流程图。所述制备方法包括如下步骤：
S1、提供玻璃基板101；
S2、在所述玻璃基板101的第一表面制备第一线路102；
具体的，如图3A所示，所述第一线路102为扫描电路、驱动电路或扫描电路与驱动电路的组合。
S3、在所述第一线路102上制备第一绝缘层103，并在所述第一绝缘层上开设过孔104；
具体的，如图3B所示，所述第一绝缘层103的材料为氮化硅（SiN）或氧化硅（SiN）。
S4、在所述第一绝缘层103制备绑定线路105，所述绑定线路105穿过所述过孔104与所述第一线路102连接；及
具体的，如图3C所示，多个所述第一线路102与多个所述绑定线路105一一对应，多个所述第一线路102与多个所述过孔104一一对应。
优选的，如图3D所示，所述制备方法还包括：在所述绑定线路105上制备平坦保护层106，所述平坦保护层106覆盖所述玻璃基板101的整个第一表面，所述平坦保护层106的材料为聚酰亚胺。
S5、在所述玻璃基板101相对第一表面的第二表面制备第二线路201。
具体的，如图3E所示，多个所述第一线路102与多个所述第二线路201一一对应，所述第二线路201上制备有OLED器件构成AA区203。
优选的，如图3F所示，所述制备方法还包括，在步骤S5之后，对所述玻璃基板101进行切割，然后涂布导电胶202和进行激光制程，或通过转印使所述第一线路102和所述第二线路201一一导通。
在上述实施例中，对各个实施例的描述都各有侧重，某个实施例中没有详述的部分，可以参见上文针对其他实施例的详细描述，此处不再赘述。具体实施时，以上各个单元或结构可以作为独立的实体来实现，也可以进行任意组合，作为同一或若干个实体来实现，以上各个单元或结构的具体实施可参见前面的方法实施例，在此不再赘述。以上各个操作的具体实施可参见前面的实施例，在此不再赘述。
以上对本发明实施例进行了详细介绍，本文中应用了具体个例对本发明的原理及实施方式进行了阐述，以上实施例的说明只是用于帮助理解本发明的方法及其核心思想；同时，对于本领域的技术人员，依据本发明的思想，在具体实施方式及应用范围上均会有改变之处，综上所述，本说明书内容不应理解为对本发明的限制。

Claims (18)

  1. 一种显示装置，包括：
    玻璃基板；
    第一线路，设置于所述玻璃基板的第一表面；
    第一绝缘层，设置于所述第一线路上，且所述第一绝缘层上设置有过孔；
    绑定线路，设置于所述第一绝缘层，并穿过所述过孔与所述第一线路连接；及
    第二线路，设置于所述玻璃基板相对第一表面的第二表面。
  2. 根据权利要求1所述的显示装置，其中，所述第一线路为扫描电路、驱动电路或扫描电路与驱动电路的组合。
  3. 根据权利要求2所述的显示装置，其中，当所述第一线路为扫描电路与驱动电路的组合时，所述扫描电路与所述驱动电路的交叠区线宽小于非交叠区线宽。
  4. 根据权利要求1所述的显示装置，其中，还包括导电胶，设置于所述玻璃基板与第一表面相邻的侧面，所述第一线路与所述第二线路通过所述导电胶连接。
  5. 根据权利要求1所述的显示装置，其中，多个所述第一线路与多个所述第二线路一一对应，多个所述第一线路与多个所述过孔与一一对应。
  6. 根据权利要求5所述的显示装置，其中，每组相对应的所述第一线路和所述第二线路分别为扫描电路和驱动电路，所述绑定线路连接于所述扫描电路和所述驱动电路的电导率二分之一处。
  7. 根据权利要求5所述的显示装置，其中，至少一组相对应的所述第一线路宽度大于所述第二线路。
  8. 根据权利要求1所述的显示装置，其中，至少一条所述第一线路为宽度不均匀的线路，至少两条所述绑定线路的宽度相异。
  9. 根据权利要求1所述的显示装置，其中，所述第一线路通过薄膜绑定的方式连接所述第二线路。
  10. 根据权利要求1所述的显示装置，其中，所述第一绝缘层的材料为氮化硅或氧化硅。
  11. 一种显示装置的制备方法，包括：
    提供玻璃基板；
    在所述玻璃基板的第一表面制备第一线路；
    在所述第一线路上制备第一绝缘层，并在所述第一绝缘层上开设过孔；
    在所述第一绝缘层制备绑定线路，所述绑定线路穿过所述过孔与所述第一线路连接；及
    在所述玻璃基板相对第一表面的第二表面制备第二线路，制得所述显示装置。
  12. 根据权利要求11所述的显示装置的制备方法，其中，还包括：对所述玻璃基板进行切割，然后通过转印使所述第一线路和所述第二线路一一导通。
  13. 根据权利要求11所述的显示装置的制备方法，其中，还包括：对所述玻璃基板进行切割，然后涂布导电胶和进行激光制程，在所述玻璃基板与第一表面相邻的侧面制备导电胶，所述第一线路与所述第二线路通过所述导电胶连接。
  14. 根据权利要求11所述的显示装置的制备方法，其中，还包括：在所述绑定线路上制备平坦保护层，所述平坦保护层覆盖所述玻璃基板的整个第一表面。
  15. 根据权利要求11所述的显示装置的制备方法，其中，所述第一线路为扫描电路、驱动电路或扫描电路与驱动电路的组合。
  16. 根据权利要求11所述的显示装置的制备方法，其中，所述第一绝缘层的材料为氮化硅或氧化硅。
  17. 根据权利要求11所述的显示装置的制备方法，其中，多个所述第一线路与多个所述第二线路一一对应，多个所述第一线路与多个所述过孔与一一对应。
  18. 根据权利要求11所述的显示装置的制备方法，其中，所述第一线路通过薄膜绑定的方式连接所述第二线路。
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