WO2022100335A1 - 显示面板、电子装置 - Google Patents

显示面板、电子装置 Download PDF

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Publication number
WO2022100335A1
WO2022100335A1 PCT/CN2021/123181 CN2021123181W WO2022100335A1 WO 2022100335 A1 WO2022100335 A1 WO 2022100335A1 CN 2021123181 W CN2021123181 W CN 2021123181W WO 2022100335 A1 WO2022100335 A1 WO 2022100335A1
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WIPO (PCT)
Prior art keywords
layer
gate
conductive
base substrate
display
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PCT/CN2021/123181
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English (en)
French (fr)
Inventor
刘兆范
段献学
张志海
Original Assignee
京东方科技集团股份有限公司
合肥京东方光电科技有限公司
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Application filed by 京东方科技集团股份有限公司, 合肥京东方光电科技有限公司 filed Critical 京东方科技集团股份有限公司
Priority to US17/801,833 priority Critical patent/US11774818B2/en
Publication of WO2022100335A1 publication Critical patent/WO2022100335A1/zh

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    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1335—Structural association of cells with optical devices, e.g. polarisers or reflectors
    • G02F1/133553—Reflecting elements
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1345—Conductors connecting electrodes to cell terminals
    • G02F1/13452—Conductors connecting driver circuitry and terminals of panels
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1343—Electrodes
    • G02F1/134309—Electrodes characterised by their geometrical arrangement
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136227—Through-hole connection of the pixel electrode to the active element through an insulation layer
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136286—Wiring, e.g. gate line, drain line
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/133388—Constructional arrangements; Manufacturing methods with constructional differences between the display region and the peripheral region
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F2201/00—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00
    • G02F2201/50—Protective arrangements
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F2201/00—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00
    • G02F2201/50—Protective arrangements
    • G02F2201/501—Blocking layers, e.g. against migration of ions
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F2203/00—Function characteristic
    • G02F2203/02—Function characteristic reflective

Definitions

  • the present disclosure relates to the field of display technology, and in particular, to a display substrate and an electronic device.
  • Thin film transistor liquid crystal display devices have been widely used in the field of display devices due to their small size and low power consumption.
  • Transmissive liquid crystal display panels and reflective liquid crystal display panels are two common types of liquid crystal display panels.
  • the reflective liquid crystal display panel can reflect the light entering the display panel and use it as the light source required to display the image to realize the display function, thereby eliminating the need for a special backlight source and reducing power consumption. It can be used for e-books , outdoor advertising and other applications.
  • a binding area may generally be provided in the peripheral area for electrical connection with external electronic components.
  • Embodiments of the present disclosure provide a display substrate, including: a base substrate, the base substrate includes a display area and a peripheral area surrounding the display area; wherein a peripheral area for communicating with external components is provided in the peripheral area
  • At least one binding member for electrical connection the binding member includes a first conductive layer, and the first conductive layer includes a metal oxide conductive lead; a second conductive layer between the second conductive layers, the second conductive layer includes metal conductive leads;
  • the binding element further includes an insulating layer located between the second conductive layer and the first conductive layer, wherein, on the insulating layer One or more vias are provided in a region corresponding to at least one metal oxide conductive lead, the at least one metal oxide conductive lead including a portion on the insulating layer in contact with the insulating layer and extending to the insulating layer the part in the via hole on the layer; the metal conductive lead and the metal oxide conductive lead are connected in one-to-one correspondence, and the metal conductive lead and the metal oxide conductive
  • the area of the orthographic projection of the via-hole protection layer on the base substrate is smaller than the orthographic projection of the surface of the first conductive layer not covered by the via-hole protection layer on the base substrate area, the surface of the first conductive layer not covered by the via protective layer is the contact surface electrically connected to the external component.
  • the via protection layer includes at least one metal layer
  • the display substrate further includes a reflective electrode located in the display area, and the reflective electrode is made of the same material as the at least one metal layer.
  • the at least one metal layer is a double-layer metal layer
  • the double-layer metal layer is a stacked metal adhesion layer and a metal reflection layer that plays a reflective role.
  • a plurality of sub-pixel units are arranged on the display area, and a pixel electrode layer is arranged in each sub-pixel unit, and the pixel electrode layer is located on the side of the reflective electrode facing the base substrate and It is electrically connected to the pixel electrode, the orthographic projection of the pixel electrode layer on the base substrate is block-shaped, and in the same sub-pixel unit in the display area, the edge of the orthographic projection of the reflective electrode on the base substrate is the same as the edge of the orthographic projection of the reflective electrode.
  • the minimum distance of the edge of the orthographic projection of the pixel electrode layer on the base substrate is less than 10 microns.
  • a plurality of data lines and a plurality of gate lines are provided in the display area, and the plurality of data lines and the plurality of gate lines intersect with each other, and the reflective electrodes are located on the side of the display area.
  • the distance between the orthographic projection of the edge in the sub-pixel unit on the base substrate and the orthographic projection of the data line closest to the reflective electrode on the base substrate is less than 8 microns.
  • the orthographic projection of the via hole on the base substrate falls into the orthographic projection of the via hole protection layer on the base substrate, and the outer edge of the orthographic projection of the via hole on the base substrate and the via hole protection layer
  • the minimum distance between the outer edges of the orthographic projection on the base substrate is less than 15 microns.
  • a gate layer and a source and drain layer are provided in the display area, the gate layer includes a gate of a thin film transistor, the source and drain layers include a source and a drain of the thin film transistor, so The material of the second conductive layer is the same as that of the source and drain layers in the display area, or the same as that of the gate layer in the display area.
  • a gate layer and a source and drain layer are provided in the display area, the gate layer includes a gate of a thin film transistor, the source and drain layers include a source and a drain of the thin film transistor, so
  • the at least one binding member includes a first set of binding members and a second set of binding members.
  • the material of the second conductive layer is the same as that of the source and drain layers in the display area; in the first set of binding members In the two sets of binding elements, the material of the second conductive layer is the same as that of the gate layer in the display area, and the first group of binding elements and the second group of binding elements are alternately arranged in the peripheral area.
  • the slope angles of the vias in the first set of binders are greater than the slope angles of the vias in the second set of binders.
  • the slope angle of the vias in the first set of binding members ranges from 20 degrees to 80 degrees; the slope angles of the via holes in the second set of binding members range from 10 degrees to 60 degrees. between degrees.
  • the via hole is circular; the via protection layer is circular;
  • the via hole protection layer and the via hole are non-concentric circles.
  • the display substrate is a reflective display substrate; a display area of the display substrate includes a pixel electrode and a metal reflective electrode located on the pixel electrode; and a transistor located in the display area, the transistor includes a gate electrode, gate insulating layer, source and drain;
  • the second conductive layer of the peripheral region includes a gate lead of the gate and a source lead of the source;
  • the first conductive layer in the peripheral region includes a transparent metal oxide layer formed of the same material and the same process as the pixel electrode;
  • the insulating layer arranged between the transparent metal oxide layer and the gate lead or source lead includes the gate insulating layer; the via hole is arranged on the gate insulating layer; the gate electrode lead or source lead is connected with the transparent metal oxide layer through the via hole;
  • the gate lead or the source lead is a metal lead
  • the transparent metal oxide layer of the binding member region forms a metal via hole protection layer corresponding to the via hole region of the gate insulating layer and the same material as the metal reflective electrode.
  • Embodiments of the present disclosure also provide an electronic device, including the display substrate according to any of the above embodiments.
  • FIG. 1 shows a schematic diagram of a display substrate according to some embodiments of the present disclosure
  • FIG. 2 illustrates a schematic top view of a binding member in a peripheral region of a display substrate according to some embodiments of the present disclosure
  • Figure 3 shows a schematic cross-sectional view taken along line A-A as shown in Figure 2;
  • Figure 4 shows a schematic cross-sectional view taken along the line B-B as shown in Figure 2;
  • FIG. 5 illustrates a schematic top view of a binding member in a peripheral area of a display substrate according to other embodiments of the present disclosure
  • FIG. 6 illustrates a schematic diagram of a sub-pixel unit in a display substrate according to some embodiments of the present disclosure
  • FIG. 7 illustrates a schematic cross-sectional view of a sub-pixel unit in a display substrate according to some embodiments of the present disclosure
  • FIG. 8 illustrates a schematic diagram of a reflective liquid crystal display panel according to some embodiments of the present disclosure
  • FIG. 9 shows a schematic flowchart of a method for manufacturing a binding member of a reflective liquid crystal display panel according to some embodiments of the present disclosure
  • FIG. 10 schematically shows a schematic flow chart of a method for fabricating a film layer structure in a display area of a reflective liquid crystal display panel according to other embodiments of the present disclosure.
  • FIG. 11 schematically shows an exemplary structure of a via protection layer.
  • a reflective liquid crystal display panel may generally include an array substrate (display substrate), a color filter substrate, and a liquid crystal layer sandwiched between the display substrate and the color filter substrate.
  • FIG. 1 shows a schematic diagram of a display substrate 100 used in a reflective liquid crystal display panel.
  • the display substrate 10 may be, for example, an array substrate.
  • the display substrate 100 may include a base substrate 10 .
  • a display area AA and a peripheral area P are provided on the base substrate 10 .
  • the peripheral area P surrounds the display area AA.
  • binding members 21 for electrical connection with external components may be provided in the peripheral region 20 .
  • the binding member 21 may comprise pads, for example.
  • some of the binding members 21 may be directly or indirectly connected with the above-mentioned plurality of data lines 51 or gate lines.
  • the binding member 21 is not limited to transmitting signals for the data lines 51, but can also transmit any other signals required for the operation of the display panel.
  • the area where the binding members 21 are arranged in the plurality of peripheral areas 20 may also be referred to as a “bonding area” 22 .
  • FIG. 2 shows an example of the planar shape of the binding member 21 .
  • the binding member 21 may include a first conductive layer 31 , a second conductive layer 32 located between the first conductive layer 31 and the base substrate 10 , a second conductive layer 32 and a first conductive layer 32 .
  • the first conductive layer 31 may be made of, for example, a metal oxide such as indium tin oxide (ITO).
  • the first conductive layer 31 may include metal oxide conductive leads.
  • the second conductive layer 32 may include metal conductive leads.
  • the insulating layer 33 can be, for example, a passivation layer, which can isolate the first conductive layer 31 and the second conductive layer 32 .
  • the second conductive layer 32 may be electrically connected to the first conductive layer 31 through, for example, via holes 34 penetrating the insulating layer 33 .
  • one or more vias 34 are provided on the insulating layer 33 in a region corresponding to at least one metal oxide conductive lead, and each metal oxide conductive lead includes a portion located on the insulating layer. The portion on the insulating layer 33 in contact with the insulating layer and the portion extending into the via hole 34 on the insulating layer 33 .
  • the metal conductive leads and the metal oxide conductive leads are connected in a one-to-one correspondence, and the metal conductive leads and the metal oxide conductive leads are electrically connected through the one or more via holes 34 .
  • the binding member 21 may further include a via hole protection layer 35, and the via hole protection layer 35 is disposed on the metal oxide conductive lead in a region corresponding to the via hole.
  • the via hole protection layer 35 may be located on a side of the first conductive layer 31 away from the base substrate 10 and cover the via hole 34 .
  • the first conductive layer 31 has a non-covering surface 36 .
  • the non-covered surface 36 is not covered by the via protection layer 35 .
  • the non-covered surface 36 may serve as a contact surface for electrical connection with external components.
  • the first conductive layer 31 , the second conductive layer 32 and the insulating layer 33 may be arranged in the same layer as some film structures in the display area AA of the display substrate, that is, formed of the same material in the same process.
  • a gate layer 41 on the base substrate 10 , in the display area AA of the display substrate are provided: a gate layer 41 , a gate insulating layer 42 , a source and drain layer 43 , and a passivation layer 44.
  • the pixel electrode layer 45 and the reflection layer 46 are provided on the base substrate 10 .
  • the gate insulating layer 42 is arranged on the side of the gate layer 41 away from the base substrate 10
  • the source and drain layers 43 are arranged on the side of the gate insulating layer 42 away from the base substrate 10
  • the passivation layer 44 is arranged on the source
  • the pixel electrode layer 45 is arranged on the side of the passivation layer 44 away from the base substrate 10
  • the reflective layer 46 is arranged on the side of the pixel electrode layer 45 away from the base substrate 10 . side.
  • the reflective layer 46 covers the pixel electrode layer 45 .
  • the gate electrode layer 41 may include the gate electrode of the thin film transistor TFT1.
  • the source-drain layer 43 may include a source electrode 431 and a drain electrode 432 of the thin film transistor TFT1.
  • the first conductive layer 31 and the pixel electrode layer 45 may be made of the same material in the same process.
  • FIG. 7 only shows an exemplary situation, in this example, the thin film transistor TFT1 adopts a bottom gate type structure.
  • the embodiments of the present disclosure are not limited thereto.
  • the thin film transistor TFT1 may also adopt a top-gate structure. In the case where the display substrate adopts a thin-film transistor with a top-gate structure, the gate layer 41 will be located on the source and drain layers 43 the side away from the base substrate 10 .
  • the reflective electrode 46 is further provided on the side of the pixel electrode layer 45 away from the base substrate 10 in the film layer structure of the display substrate, when the binding member 21 is fabricated, the first conductive layer 31 needs to be placed away from the base substrate 10 .
  • the material of the reflective electrode 46 on one side of the base substrate 10 is etched away to expose at least a portion of the outer surface of the first conductive layer 31 for electrical connection with external components.
  • the etching solution may be etched to the second conductive layer 32 through the via hole 34 .
  • the first conductive layer 31 is used to receive electrical signals from external components, and the role of the second conductive layer 32 is to transmit the electrical signals received from the first conductive layer 31 to the display area. Therefore, once the second conductive layer 32 is damaged, the transmission of electrical signals may be unstable or even interrupted, which will seriously affect the stability of the screen display.
  • the via hole protection layer 35 is used to cover the via hole 34 , so as to prevent damage to the second conductive layer 32 by the etching solution.
  • the via protection layer 35 may be made of the same material and in the same process as the reflective electrode 46 .
  • the material of the reflective electrode 46 is usually composed of aluminum or aluminum-molybdenum lamination and aluminum may be oxidized at high temperature to reduce the conductivity, if the via protection layer 35 completely covers the surface of the first conductive layer 31, the via hole The protective layer 35 may be oxidized (the binding operation may be performed at high temperature) and thus affect the signal transmission. Therefore, in the embodiment of the present disclosure, the via protection layer 35 not only covers the via hole 34, but also does not completely cover the metal oxide conductive leads in the first conductive layer 31, which can prevent the second conductive layer 32 from being damaged by the etching solution At the same time, the contact surface of the first conductive layer 31 is exposed to ensure stable transmission of electrical signals.
  • the via protection layer 35 may include at least one metal layer.
  • the at least one metal layer may be a double metal layer.
  • the double-layer metal layer may be a stacked metal adhesion layer 352 and a metal reflective layer 351 that plays a reflective role.
  • the metal reflection layer 351 may be made of aluminum or aluminum-neodymium alloy, for example.
  • Metal attachment layer 352 may be made of molybdenum, for example.
  • This structure is beneficial for realizing the reflective electrode 46 in the display area AA. Adopting such a structure is advantageous in that the via protective layer 35 and the reflective electrode 46 are formed in the same process. That is, in the display substrate, the material of the reflective electrode 46 and the via protective layer 35 are the same. And such a structure can also well block the etchant to protect the via hole 34 .
  • the at least one metal layer may, for example, also comprise only one metal layer (such as an aluminum layer).
  • the via protection layer 35 and the reflective electrode 46 may be made of, for example, an aluminum layer, a laminate of aluminum and molybdenum, or a laminate of aluminum-neodymium alloy and molybdenum.
  • the binding member 21 shows two different embodiments of the binding member 21 .
  • the second conductive layer 32 and the source and drain layers 43 in the display area AA are formed of the same material in the same process.
  • the second conductive layer 32 and the source and drain layers 43 in the display area AA have the same material.
  • the second conductive layer 32' and the gate layer 41 in the display area AA are formed of the same material in the same process.
  • the second conductive layer 32 and the gate layer 41 in the display area AA have the same material.
  • the at least one binding member 21 includes a first set of binding members 211 and a second set of binding members 212 .
  • the second conductive layer 32 ′ and the source and drain layers 43 in the display area AA are formed of the same material in the same process; and in the second set of binding members 212 , the The second conductive layer 32 and the gate layer 41 in the display area AA are formed of the same material in the same process.
  • the first set of binding members 211 the second conductive layer 32' and the source and drain layers 43 in the display area AA have the same material; in the second set of binding members 212, the first The two conductive layers 32 and the gate layer 41 in the display area AA have the same material.
  • the first set of binding members 211 and the second set of binding members 212 are alternately arranged in the peripheral area P.
  • the second conductive layers 32 and 32 ′ in the adjacent binding members 21 are in different layers, which has Conducive to improving wiring density and saving wiring space. This is also beneficial for reducing the spacing between adjacent bindings.
  • the slope angle ⁇ 1 of the via holes in the first set of binding members 211 is greater than the slope angle ⁇ 2 of the via holes in the second set of binding members 212 . This is because the second conductive layer 32' is closer to the non-covering surface 36 of the first conductive layer 31 and further away from the base substrate 10 than the second set of binding members 212 in the first set of binding members 211 . As shown in FIG.
  • the insulating layer 33 includes at least a passivation layer 44 and a gate insulating layer 42 .
  • the second conductive layer 32 ′ and the source and drain layers 43 are made of the same material and the same process, at other positions where the via holes are removed, the second conductive layer 32 ′ and the first
  • the insulating layer 33 between a conductive layer 31 includes at least the passivation layer 44 and does not include the gate insulating layer 42 .
  • the slope angle ⁇ 1 of the via holes in the first set of binding members 211 ranges from 20 degrees to 80 degrees; the slope angle ⁇ 2 of the via holes in the second set of binding members 212 ranges from 10 degrees to 80 degrees. between 60 degrees.
  • the shape of the orthographic projection of the via hole 34 of the binding element 21 on the base substrate 10 is a circle.
  • a plurality of vias 34 may be provided in one binding member 21 .
  • the shape of the orthographic projection of the via hole 34 of the binding member 21 on the base substrate 10 may be an elongated shape.
  • a single via 34 may be provided in one binding 21 .
  • the diameter of the via hole 34 (as can be measured at half height) may be, for example, several micrometers to several tens of micrometers. In the example shown in FIG.
  • the width of the via hole 34 (as measured at half height) may be, for example, several micrometers to several tens of micrometers, such as about 10 micrometers.
  • the embodiments of the present disclosure are not limited thereto, for example, the via holes 34 may also have other shapes, and the number of the via holes 34 in each binding member 21 may also be set according to actual needs.
  • the orthographic projection of the via hole 34 on the base substrate 10 falls into the orthographic projection of the via hole protection layer 35 on the base substrate 10 . This can ensure that the via hole 34 is well covered by the via hole protection layer 35 .
  • the minimum distance h between the outer edge of the orthographic projection of the via hole 34 on the base substrate 10 and the outer edge of the orthographic projection of the via hole protection layer 35 on the base substrate 10 is, for example, less than 15 ⁇ m, such as less than 3 ⁇ m or 2 ⁇ m. microns.
  • the area of the orthographic projection of the via protection layer 35 on the base substrate 10 is smaller than that of the orthographic projection of the non-covering surface 36 of the first conductive layer 31 on the base substrate 10 area. Since the non-covering surface 36 can be used as a contact surface for electrical connection with external components, this enables the first conductive layer 31 to have a sufficient contact surface for electrical connection with external components to ensure signal stability.
  • an organic film layer 47 may also be disposed on the display area AA. As shown in FIG. 7 , the organic film layer 47 is located on the side of the source/drain layer 43 away from the base substrate 10 and It is located on the side of the passivation layer 44 away from the base substrate 10 . The thickness of the organic film layer 47 may be greater than that of the passivation layer 44 . The organic film layer 47 can increase the distance between the pixel electrode layer 45 and the gate layer 41 and the source and drain layers 43 to reduce the parasitic capacitance between the pixel electrode layer 45 and other conductive layers. As an example, the organic film layer 47 may be made of a photoresist-like material.
  • an active layer 48 may be further included on the display area AA, and the active layer 48 is located on the side of the gate insulating layer 42 away from the base substrate 10 and located on the side of the source and drain layers 43 facing the substrate one side of the substrate 10 .
  • the gate layer 41 , the active layer 48 and the source and drain layers 43 described above may form a thin film transistor structure together.
  • Connection vias 49 are shown in both FIGS. 6 and 7 . The connection via 49 penetrates through the organic film layer 47 and the passivation layer 44 to electrically connect the pixel electrode layer 45 and the source and drain layers 43 (usually the drain electrode), thereby realizing the control of the thin film transistor for sub-pixel display.
  • a plurality of sub-pixel units PX are provided on the display area AA, and the orthographic projection of the pixel electrode layer 45 in each sub-pixel unit PX on the base substrate 10 block.
  • the minimum distance b between the edge of the orthographic projection of the reflective electrode 46 on the base substrate 10 and the edge of the orthographic projection of the pixel electrode layer 45 on the base substrate 10 is less than 10 ⁇ m .
  • a plurality of data lines 51 and a plurality of gate lines 52 are provided in the display area AA, and the plurality of data lines 51 and the plurality of gate lines 52 cross each other, and in the display area
  • the distance between the orthographic projection of the edge of the reflective electrode 46 in the sub-pixel unit PX of AA on the base substrate 10 and the orthographic projection of the data line 51 closest to the reflective electrode on the base substrate 10 is less than 8 microns. This can not only make the reflective electrode 46 have as large an area as possible, but also avoid the generation of parasitic capacitance between the data line 51 and the reflective electrode 46 .
  • FIG. 6 only a part of one row of sub-pixels is shown. In FIG.
  • the gate line 52 overlaps with the reflective electrode 46 at the upper part of the sub-pixel, and the common line overlaps with the reflective electrode 46 at the lower part of the sub-pixel.
  • Electrode wire 50 The common electrode is used together with the pixel electrode layer 45 to apply voltage to the liquid crystal layer.
  • the common electrode may be located on an opposite substrate (eg, a color filter substrate) of the display substrate (eg, an array substrate).
  • a common electrode line 50 can be provided on the display substrate (such as an array substrate), and the common electrode line 50 is connected to the opposite substrate (such as a color filter substrate).
  • the gate layer 41 may be made of the same material and process, or the common electrode line 50 and the gate layer 41 may be made of the same material.
  • the via hole is circular; the via hole protection layer is circular; the via hole protection layer and the via hole are non-concentric circles. The process difficulty can be reduced.
  • the display substrate is a reflective display substrate; a display area of the display substrate includes a pixel electrode and a metal reflective electrode located on the pixel electrode; and a transistor located in the display area, the transistor includes a gate electrode, gate insulating layer, source and drain;
  • the second conductive layer of the peripheral region includes a gate lead of the gate and a source lead of the source;
  • the first conductive layer in the peripheral region includes a transparent metal oxide layer formed of the same material and the same process as the pixel electrode;
  • the insulating layer arranged between the transparent metal oxide layer and the gate lead or source lead includes the gate insulating layer; the via hole is arranged on the gate insulating layer; the gate electrode lead or source lead is connected with the transparent metal oxide layer through the via hole;
  • the gate lead or the source lead is a metal lead
  • the transparent metal oxide layer of the binding member region forms a metal via hole protection layer corresponding to the via hole region of the gate insulating layer and has the same material as the metal reflective electrode.
  • the base substrate may be a glass substrate, or a substrate made of other materials (eg, plastic, resin, etc.).
  • an embodiment of the present disclosure further provides a reflective liquid crystal display panel 1000 .
  • the reflective liquid crystal display panel 1000 may include the display substrate 100 described in any of the foregoing embodiments, and may also include an opposite substrate (eg, a color filter substrate) 200 and a liquid crystal layer 300 between the display substrate 100 and the opposite substrate 200 .
  • the reflective liquid crystal display panel 1000 can be used in any display device, such as smart phones, tablet computers, televisions, monitors, notebook computers, digital photo frames, navigators, car monitors, e-books, and the like.
  • Embodiments of the present disclosure also provide an electronic device, which may include the display substrate 100 or the reflective liquid crystal display panel 1000 described in any of the foregoing embodiments.
  • the electronic device can be any kind of display device, such as a smart phone, a tablet computer, a TV, a monitor, a notebook computer, a digital photo frame, a navigator, a car monitor, an e-book, and the like.
  • Embodiments of the present disclosure also provide a method for fabricating a display substrate, including:
  • Step S10 forming at least one binding member for electrical connection with external components in the peripheral region on the base substrate, the binding member includes a first conductive layer, a binding member located between the first conductive layer and the base substrate; A second conductive layer, an insulating layer between the second conductive layer and the first conductive layer, the first conductive layer includes metal oxide conductive leads, the second conductive layer includes metal conductive leads, and the insulating layer corresponds to One or more via holes are arranged in the area of at least one metal oxide conductive lead, and the at least one metal oxide conductive lead includes a portion located on the insulating layer and a portion extending into the via hole on the insulating layer.
  • the binding member further includes A via hole protection layer, the via hole protection layer is disposed on a region corresponding to the via hole on the metal oxide conductive wire.
  • forming at least one binding member in the peripheral region on the base substrate for electrical connection with external components includes:
  • Step S11 forming a second conductive layer in the peripheral region on the base substrate
  • Step S12 forming an insulating layer on the side of the second conductive layer away from the base substrate and forming a via hole in the insulating layer;
  • Step S13 forming a first conductive layer on a side of the insulating layer away from the base substrate, the first conductive layer is electrically connected to the second conductive layer through a via hole passing through the insulating layer;
  • Step S14 forming a via hole protection layer on the side of the first conductive layer away from the base substrate, the via hole protection layer covering the via holes.
  • FIG. 10 shows an example of manufacturing steps of the film layer structure of the display area of the base substrate, which specifically includes:
  • Step S21 forming a gate layer on the base substrate
  • Step S22 forming a gate insulating layer and an active layer in sequence on the side of the gate layer away from the base substrate;
  • Step S23 forming a source and drain layer on the side of the active layer away from the base substrate;
  • Step S24 forming an organic film layer on the side of the source and drain layers away from the base substrate;
  • Step S25 forming a passivation layer on the side of the organic film layer away from the base substrate;
  • Step S26 forming a pixel electrode layer on the side of the passivation layer away from the base substrate;
  • Step S27 forming a reflective electrode on the side of the pixel electrode layer away from the base substrate.
  • the step of forming the binding member in the peripheral area shown in FIG. 9 may be performed together with the step of forming the film layer structure of the display area shown in FIG. 10 .
  • the second conductive layer and the gate layer can be made of the same material and the same process, that is, the above-mentioned step S11 and step S21 can be performed at the same time and combined into one step; and in other embodiments, the second conductive layer
  • the conductive layer and the source and drain layers can be made of the same material and the same process, that is, the above-mentioned step S11 and step S23 can be performed at the same time and combined into one step.
  • the first conductive layer and the pixel electrode layer can be made of the same material and the same process, that is, the above-mentioned step S13 and step S26 can be performed simultaneously and combined into one step.
  • the via hole protection layer and the reflective electrode may be made of the same material and the same process, that is, the above-mentioned step S14 and step S27 may be performed simultaneously and combined into one step.
  • step S14 as an example, the part of the binding member 21 covered by the metal layer laid on the same layer as the reflective electrode 46 can be patterned, the part of the metal layer covering the via hole is reserved to form the via hole protection layer 35, and the cover layer 35 can be removed. A major portion of the metal layer of the conductive layer 31, thereby ensuring stable and reliable electrical contact between the binding element 21 and external components.
  • the manufacturing method of the display substrate shown in FIG. 10 is only an example, and in this example, the thin film transistor TFT1 in the display area adopts a bottom gate type structure.
  • the embodiments of the present disclosure are not limited thereto.
  • the thin film transistor TFT1 may also adopt a top-gate structure.
  • the gate layer will be formed after the source and drain layers. .
  • the specific fabrication steps of the thin film transistor with the top-gate structure are known to those skilled in the art, and are not repeated here.
  • the steps of forming the film layer structure of the binding member can be incorporated into the step of forming the film layer structure of the display area, and no new process needs to be added. step.
  • the at least one binding member 21 includes a first set of binding members 211 and a second set of binding members 212 , and the first set of binding members 211
  • the two conductive layers 32 and the source and drain layers 43 in the display area are formed of the same material in the same process.
  • the second conductive layer 32 in the second set of binding members 212 and the gate layer 41 in the display area Formed from the same material in the same process, the first set of binding members 211 and the second set of binding members 212 are alternately arranged in the peripheral region.
  • Embodiments of the present disclosure also provide an electronic device, including the transparent display panels 100, 100', 100" described in any of the foregoing embodiments.
  • the electronic device may be any display device, such as a smart phone, a Wearable smart watches, smart glasses, tablet computers, TV sets, monitors, notebook computers, digital photo frames, navigators, car monitors, e-books, etc.

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Abstract

一种显示基板（100），包括：衬底基板（10），包括显示区（AA）和周边区（P）；其中，在周边区（P）中设置有用于与外部组件电连接的至少一个绑定件（21），绑定件（21）包括第一导电层（31）、第二导电层（32）和位于第二导电层（32）和第一导电层（31）之间的绝缘层（33），第一导电层（31）包括金属氧化物导电引线，第二导电层（32）包括金属导电引线；其中，绝缘层（33）上对应于金属氧化物导电引线的区域设置有一个或多个过孔（34）；金属导电引线和金属氧化物导电引线一一对应连接，金属导电引线和金属氧化物导电引线通过一个或多个过孔（34）电连接；绑定件（21）还包括过孔保护层(35)，过孔保护层(35)设置于金属氧化物导电引线上的对应于过孔（34）的区域。提供了一种反射式液晶显示面板及电子装置。

Description

显示面板、电子装置
相关申请的交叉引用
本申请要求于2020年11月10日递交中国专利局的、申请号为202011252036.0 的中国专利申请的权益，该申请的全部内容以引用方式并入本文。
技术领域
本公开涉及显示技术领域，尤其涉及一种显示基板、电子装置。
背景技术
薄膜晶体管液晶显示装置由于具有体积小、功耗低等特点在显示装置领域得到了广泛的应用。透射式液晶显示面板和反射式液晶显示面板是两种常见类型的液晶显示面板。反射式液晶显示面板可以对进入显示面板内部的光线进行反射，以此作为显示图像所需的光源来实现显示功能，从而可省去专门的背光源，有利于降低功耗，可以用于电子书、户外广告等应用上。在反射式液晶显示面板中为了与外部电子组件进行电连接通常可以在周边区中设置绑定区。
公开内容
本公开的实施例提供了一种显示基板，包括：衬底基板，所述衬底基板包括显示区和围绕所述显示区的周边区；其中，在所述周边区中设置有用于与外部组件电连接的至少一个绑定件，所述绑定件包括第一导电层，所述第一导电层包括金属氧化物导电引线；所述绑定件还包括位于第一导电层和衬底基板之间的第二导电层，所述第二导电层包括金属导电引线；所述绑定件还包括位于所述第二导电层和第一导电层之间的绝缘层，其中，所述绝缘层上对应于至少一条金属氧化物导电引线的区域设置有一个或多个过孔，所述至少一条金属氧化物导电引线包括位于所述绝缘层上与所述绝缘层接触的部分和延伸到所述绝缘层上的过孔内的部分；所述金属导电引线和所述金属氧化物导电引线一一对应连接，所述金属导电引线和金属氧化物导电引线通过所述一个或多个过孔电连接；所述绑定件还包括过孔保护层，该过孔保护层设置于所述金属氧化物导电引线上的对应于所述过孔的区域。
在一些实施例中，在同一绑定件中，过孔保护层在衬底基板上的正投影的面积小于第一导电层的未被过孔保护层覆盖的表面在衬底基板上的正投影的面积，所述第一导电层的未被过孔保护层覆盖的表面为与外部组件电连接的接触表面。
在一些实施例中，所述过孔保护层包括至少一层金属层，所述显示基板还包括位于显示区中的反射电极，所述反射电极与所述至少一层金属层的材质相同。
在一些实施例中，所述至少一层金属层为双层金属层，所述双层金属层为叠层设置的金属附着层和起反射作用的金属反射层。
在一些实施例中，在所述显示区上设置有多个子像素单元，在每个子像素单元中设有像素电极层，所述像素电极层位于所述反射电极的朝向衬底基板的一侧且与所述像素电极电连接，所述像素电极层在衬底基板上的正投影为块状，在显示区的同一子像素单元中，所述反射电极在衬底基板上的正投影的边缘与像素电极层在衬底基板上的正投影的边缘的最小距离小于10微米。
在一些实施例中，在所述显示区中设置有多条数据线和多条栅极线，所述多条数据线和所述多条栅极线相互交叉，所述反射电极在显示区的子像素单元中的边缘在衬底基板上的正投影与离所述反射电极最近的数据线在衬底基板上的正投影之间的距离小于8微米。
在一些实施例中，过孔在衬底基板上的正投影落入过孔保护层在衬底基板上的正投影，且过孔在衬底基板上的正投影的外边缘与过孔保护层在衬底基板上的正投影的外边缘之间的最小距离小于15微米。
在一些实施例中，在显示区中设置有栅极层和源漏极层，所述栅极层包括薄膜晶体管的栅极，所述源漏极层包括薄膜晶体管的源极和漏极，所述第二导电层与显示区中的源漏极层材质相同，或与显示区中的栅极层材质相同。
在一些实施例中，在显示区中设置有栅极层和源漏极层，所述栅极层包括薄膜晶体管的栅极，所述源漏极层包括薄膜晶体管的源极和漏极，所述至少一个绑定件包括第一组绑定件和第二组绑定件，在第一组绑定件中，所述第二导电层与显示区中的源漏极层材质相同；在第二组绑定件中，所述第二导电层与显示区中的栅极层材质相同，所述第一组绑定件和第二组绑定件交替地布设在所述周边区中。
在一些实施例中，第一组绑定件中的过孔的坡度角大于第二组绑定件中的过孔的坡度角。
在一些实施例中，第一组绑定件中的过孔的坡度角的范围在20度至80度之间；第二组绑定件中的过孔的坡度角的范围在10度至60度之间。
在一些实施例中，所述过孔为圆形；所述过孔保护层为圆形；
所述过孔保护层和所述过孔为非同心圆。
在一些实施例中，所述显示基板为反射式显示基板；所述显示基板的显示区包括像素电极和位于所述像素电极上的金属反射电极；以及位于显示区的晶体管，所述晶体管包括栅极、栅极绝缘层、源极和漏极；
所述周边区的所述第二导电层包括所述栅极的栅极引线和所述源极的源极引线；
所述周边区域的所述第一导电层包括与所述像素电极同材料同工艺形成的透明金属氧化物层；
所述透明金属氧化物层与所述栅极引线或源极引线之间设置的所述绝缘层包括所述栅极绝缘层；所述栅极绝缘层上设置有所述过孔；所述栅极引线或源极引线通过所述过孔与所述透明金属氧化物层连接；
所述栅极引线或源极引线为金属引线；
所述绑定件区域的透明金属氧化物层对应于所述栅极绝缘层的过孔区域形成与所述金属反射电极材料相同的金属过孔保护层。
本公开的实施例还提供了一种电子装置，包括如上述任一实施例所述的显示基板。
附图说明
为了更清楚地说明本公开文本的实施例的技术方案，下面将对实施例的附图进行简要说明，应当知道，以下描述的附图仅仅涉及本公开文本的一些实施例，而非对本公开文本的限制，其中：
图1示出根据本公开的一些实施例的显示基板的示意图；
图2示出根据本公开的一些实施例的显示基板的周边区中的绑定件的示意性俯视图；
图3示出沿如图2所示的线A-A截得的示意性剖视图；
图4示出沿如图2所示的线B-B截得的示意性剖视图；
图5示出根据本公开的另一些实施例的显示基板的周边区中的绑定件的示意性俯视图；
图6示出根据本公开的一些实施例的显示基板中的子像素单元的示意图；
图7示出根据本公开的一些实施例的显示基板中的子像素单元的示意性剖视图；
图8示出根据本公开的一些实施例的反射式液晶显示面板的示意图；
图9示出根据本公开的一些实施例的反射式液晶显示面板的绑定件的制作方法的示意性流程图；
图10示意性地示出根据本公开的另一些实施例的反射式液晶显示面板的显示区膜层结构制作方法的示意性流程图；以及
图11示意性地示出了过孔保护层的示例性结构。
具体实施方式
为更清楚地阐述本公开的目的、技术方案及优点，以下将结合附图对本公开的实施例进行详细的说明。应当理解，下文对于实施例的描述旨在对本公开的总体构思进行解释和说明，而不应当理解为是对本公开的限制。在说明书和附图中，相同或相似的附图标记指代相同或相似的部件或构件。为了清晰起见，附图不一定按比例绘制，并且附图中可能省略了一些公知部件和结构。
除非另外定义，本公开使用的技术术语或者科学术语应当为本公开所属领域内具有一般技能的人士所理解的通常意义。本公开中使用的“第一”、“第二”以及类似的词语并不表示任何顺序、数量或者重要性，而只是用来区分不同的组成部分。措词“一”或“一个”不排除多个。“包括”或者“包含”等类似的词语意指出现该词前面的元件或者物件涵盖出现在该词后面列举的元件或者物件及其等同，而不排除其他元件或者物件。“连接”或者“相连”等类似的词语并非限定于物理的或者机械的连接，而是可以包括电性的连接，不管是直接的还是间接的。“上”、“下”、“左”、“右”“顶”或“底”等等仅用于表示相对位置关系，当被描述对象的绝对位置改变后，则该相对位置关系也可能相应地改变。当诸如层、膜、区域或衬底基板之类的元件被称作位于另一元件“上”或“下”时，该元件可以“直接”位于另一元件“上”或“下”，或者可以存在中间元件。
反射式液晶显示面板通常可以包括阵列基板(显示基板)和彩膜基板以及夹在显示基板和彩膜基板之间的液晶层。图1给出了用于反射式液晶显示面板中的显示基板100的示意图。该显示基板10例如可以是阵列基板。该显示基板100可以包括衬底基板10。在衬底基板10上设置有显示区AA和周边区P。该周边区P围绕显示区AA。 在显示区AA中可以具有多个子像素PX和多条数据线51。在周边区20中可以设置有用于与外部组件(例如柔性电路板、外部集成电路板等)电连接的一个或多个绑定件21。该绑定件21例如可以包括焊盘。作为示例，某些绑定件21可以与上述多条数据线51或栅线直接或间接地连接。当然，绑定件21并不限于为数据线51传递信号，还可以传递显示面板工作所需的任何其他信号。多个周边区20中布设绑定件21的区域也可以称为“绑定(bonding)区”22。图2示出了绑定件21的平面形状的示例。结合图2和图3可知，绑定件21可以包括第一导电层31、位于第一导电层31和衬底基板10之间的第二导电层32、位于第二导电层32和第一导电层31之间的绝缘层33。第一导电层31例如可以由金属氧化物(例如氧化锡铟(ITO))制成。所述第一导电层31可以包括金属氧化物导电引线。所述第二导电层32可以包括金属导电引线。绝缘层33例如可以为钝化层，其可以将第一导电层31和第二导电层32隔离开。第二导电层32例如可以通过贯穿绝缘层33的过孔34与第一导电层31电连接。具体地，在一些实施例中，在所述绝缘层33上对应于至少一条金属氧化物导电引线的区域设置有一个或多个过孔34，每条金属氧化物导电引线包括位于所述绝缘层33上与所述绝缘层接触的部分和延伸到所述绝缘层33上的过孔34内的部分。所述金属导电引线和所述金属氧化物导电引线一一对应连接，所述金属导电引线和金属氧化物导电引线通过所述一个或多个过孔34电连接。所述绑定件21还可以包括过孔保护层35，该过孔保护层35设置于所述金属氧化物导电引线上的对应于所述过孔的区域。过孔保护层35可位于第一导电层31的远离衬底基板10的一侧且覆盖所述过孔34。作为示例，所述第一导电层31具有非覆盖表面36。所述非覆盖表面36未被过孔保护层35所覆盖。该非覆盖表面36可用作与外部组件电连接的接触表面。
为了简化工艺，上述第一导电层31、第二导电层32和绝缘层33可以与显示基板的显示区AA中的某些膜层结构同层布置，即由相同的材料在同一工艺中形成。在一些实施例中，如图7所示，在衬底基板10上，在显示基板的显示区AA中设置有：栅极层41、栅极绝缘层42、源漏极层43、钝化层44、像素电极层45和反射层46。栅极绝缘层42设置在栅极层41的远离衬底基板10的一侧，源漏极层43设置在栅极绝缘层42的远离衬底基板10的一侧，钝化层44设置在源漏极层43的远离衬底基板10的一侧，像素电极层45设置在钝化层44的远离衬底基板10的一侧，反射层46设置在像素电极层45的远离衬底基板10的一侧。所述反射层46覆盖所述像素电极层45。 栅极层41可包括薄膜晶体管TFT1的栅极。源漏极层43可以包括薄膜晶体管TFT1的源极431和漏极432。在一些实施例中，第一导电层31可以与像素电极层45由相同材料在同一工艺中制成。需要说明的是，图7中仅仅给出了一种示例性的情况，在该示例中，薄膜晶体管TFT1采用了底栅型结构。然而，本公开的实施例不限于此，例如，薄膜晶体管TFT1也可以采用顶栅型结构，在显示基板采用顶栅型结构的薄膜晶体管的情况下，栅极层41将位于源漏极层43的远离衬底基板10的一侧。
由于在显示基板的膜层结构中在像素电极层45的远离衬底基板10的一侧上还设有反射电极46，所以在制作绑定件21时，需要将第一导电层31的远离衬底基板10的一侧上的反射电极46的材料蚀刻掉以露出第一导电层31的至少一部分外表面来与外部组件电连接。然而，如果将第一导电层31的远离衬底基板10的一侧上的反射电极46的材料完全蚀刻掉，则蚀刻液可能会透过过孔34腐蚀到第二导电层32。第一导电层31用于接收外部组件的电信号，而第二导电层32的作用是将从第一导电层31接收到的电信号向显示区传送。因此，一旦第二导电层32受损，则电信号的传递可能不稳定，甚至中断，这将严重影响屏幕显示的稳定性。在本公开的实施例中，采用过孔保护层35覆盖过孔34，从而防止蚀刻液对于第二导电层32的伤害。作为示例，过孔保护层35可以与反射电极46由相同材料在同一工艺中制成。由于反射电极46的材料通常由铝或铝钼叠层构成而铝在高温下可能被氧化而导致导电率降低，所以，如果过孔保护层35完全覆盖第一导电层31的表面，那么过孔保护层35就可能被氧化(绑定操作可能在高温下进行)从而影响信号传输。于是，在本公开的实施例中，过孔保护层35既覆盖过孔34，又不完全覆盖第一导电层31中的金属氧化物导电引线，可以在防止第二导电层32被蚀刻液伤害的同时使第一导电层31的接触表面裸露以保证电信号的稳定传输。
在一些实施例中，如图11所示，过孔保护层35可以包括至少一层金属层。作为示例，所述至少一层金属层可以为双层金属层。所述双层金属层可以为叠层设置的金属附着层352和起反射作用的金属反射层351。金属反射层351例如可以由铝或铝钕合金制成。金属附着层352例如可以由钼制成。这种结构对于实现显示区AA中的反射电极46是有益的。采用这样的结构有利于将过孔保护层35与反射电极46在同一工艺中制成。也就是说，在显示基板中反射电极46与过孔保护层35的材质相同。且这样的结构也能够很好地阻挡蚀刻液以保护过孔34。作为另外的示例，所述至少一层金 属层例如也可以仅包括一个金属层(例如铝层)。
在本公开的实施例中，过孔保护层35和反射电极46可以例如由铝层、铝与钼的叠层或铝钕合金与钼的叠层制成。
图3和图4示出了绑定件21的两种不同的实施例。在如图3所示的实施例中，第二导电层32与显示区AA中的源漏极层43由相同材料在同一工艺中形成。在显示基板中，第二导电层32与显示区AA中的源漏极层43具有相同的材质。在如图4所示的实施例中，第二导电层32’与显示区AA中的栅极层41由相同材料在同一工艺中形成。在显示基板中，第二导电层32与显示区AA中的栅极层41具有相同的材质。在一些实施例中，所述至少一个绑定件21包括第一组绑定件211和第二组绑定件212。在第一组绑定件211中，所述第二导电层32’与显示区AA中的源漏极层43由相同材料在同一工艺中形成；而在第二组绑定件212中，所述第二导电层32与显示区AA中的栅极层41由相同材料在同一工艺中形成。或者说，在第一组绑定件211中，所述第二导电层32’与显示区AA中的源漏极层43具有相同的材质；在第二组绑定件212中，所述第二导电层32与显示区AA中的栅极层41具有相同的材质。作为示例，所述第一组绑定件211和第二组绑定件212交替地布设在所述周边区P中。采用这种第一组绑定件211和第二组绑定件212交替布设的结构，可以避免相邻的绑定件21中的第二导电层32、32’处于不同的层中，这有利于提高布线密度，节约布线空间。这对于减小相邻的绑定件之间的间距也是有益的。
在一些实施例中，如图3和图4所示，第一组绑定件211中的过孔的坡度角α1大于第二组绑定件212中的过孔的坡度角α2。这是因为第一组绑定件211与第二组绑定件212相比，第二导电层32’更靠近第一导电层31的非覆盖表面36且更远离衬底基板10。如图3所示，当第二导电层32与栅极层41由相同材料、同一工艺制成时，在除去过孔的其他位置处，第二导电层32与第一导电层31之间的绝缘层33至少包括钝化层44和栅极绝缘层42。与之对照，如图4所示，当第二导电层32’与源漏极层43由相同材料、同一工艺制成时，在除去过孔的其他位置处，第二导电层32’与第一导电层31之间的绝缘层33至少包括钝化层44，而不包括栅极绝缘层42。这造成了第一组绑定件211中的过孔的坡度角α1与第二组绑定件212中的过孔的坡度角α2之间的差异。作为示例，第一组绑定件211中的过孔的坡度角α1的范围在20度至80度之间；第二组绑定件212中的过孔的坡度角α2的范围在10度至60度之间。
在一些实施例中，如图2所示，绑定件21的过孔34在衬底基板10上的正投影的形状为圆形。在一个绑定件21中可以设置多个过孔34。在另一些实施例中，如图5所示，绑定件21的过孔34在衬底基板10上的正投影的形状可以为长条形。在一个绑定件21中可以设置单个过孔34。在如图2所示的示例中，过孔34的直径(如可在半高处测得)例如可以为几微米至几十微米。在如图5所示的示例中，过孔34的宽度(如可在半高处测得)例如可以为几微米至几十微米，如10微米左右。本公开的实施例不限于此，例如，过孔34也可以具有其他形状，每个绑定件21中的过孔34的数量也可以根据实际需要来设定。
在一些实施例中，过孔34在衬底基板10上的正投影落入过孔保护层35在衬底基板10上的正投影。这可以保证过孔34被过孔保护层35良好地覆盖。过孔34在衬底基板10上的正投影的外边缘与过孔保护层35在衬底基板10上的正投影的外边缘之间的最小距离h例如小于15微米，比如小于3微米或2微米。
在一些实施例中，在同一绑定件中，过孔保护层35在衬底基板10上的正投影的面积小于第一导电层31的非覆盖表面36在衬底基板10上的正投影的面积。由于该非覆盖表面36可用作与外部组件电连接的接触表面，因此这可使得第一导电层31具有充分的接触表面与外部组件电连接，以保证信号的稳定性。
在一些实施例中，在显示区AA上还可以设置有有机膜层47，如图7所示，所述有机膜层47位于所述源漏极层43的远离衬底基板10的一侧且位于钝化层44的远离衬底基板10的一侧。该有机膜层47的厚度可以大于钝化层44的厚度。有机膜层47可以增大像素电极层45与栅极层41和源漏极层43之间的距离，以减小像素电极层45与其他导电层之间的寄生电容。作为示例，有机膜层47可以由类似光敏抗蚀剂的材料制成。在一些实施例中，在显示区AA上还可以包括有源层48，该有源层48位于栅极绝缘层42的远离衬底基板10的一侧且位于源漏极层43的朝向衬底基板10的一侧。上述栅极层41、有源层48和源漏极层43可以一起形成薄膜晶体管结构。在图6和图7中都示出了连接过孔49。该连接过孔49贯穿有机膜层47和钝化层44将像素电极层45与源漏极层43(通常是漏极)电连接，从而实现薄膜晶体管对于子像素显示的控制。
在一些实施例中，如图6所示，在所述显示区AA上设置有多个子像素单元PX，在每个子像素单元PX中的所述像素电极层45在衬底基板10上的正投影为块状。在 显示区AA的同一子像素单元中，所述反射电极46在衬底基板10上的正投影的边缘与像素电极层45在衬底基板10上的正投影的边缘的最小距离b小于10微米。这种设计可以使得像素电极层45具有尽可能大的面积，以防止像素电极层45在蚀刻中可能出现的残沙缺陷影响产品的良率。
在一些实施例中，在所述显示区AA中设置有多条数据线51和多条栅极线52，所述多条数据线51和所述多条栅极线52相互交叉，在显示区AA的子像素单元PX中的反射电极46的边缘在衬底基板10上的正投影与离所述反射电极最近的数据线51在衬底基板10上的正投影之间的距离小于8微米。这既可以使得反射电极46具有尽可能大的面积，又可以避免数据线51和反射电极46之间产生寄生电容。在图6中仅示出了一行子像素的局部，在图6中，在子像素上部与反射电极46交叠的是栅极线52，而在子像素下部与反射电极46交叠的是公共电极线50。公共电极是与像素电极层45一起为液晶层施加电压的。公共电极例如可位于该显示基板(例如阵列基板)的对置基板(例如彩膜基板)上。然而，为了增大公共电极在电路板上的面积以提高信号稳定性，可以在该显示基板(例如阵列基板)上设置公共电极线50，该公共电极线50与对置基板(例如彩膜基板)上的公共电极电连接，例如可以与栅极层41由相同材料、同一工艺制成，或者说公共电极线50与栅极层41具有相同的材质。
在一些实施例中，所述过孔为圆形；所述过孔保护层为圆形；所述过孔保护层和所述过孔为非同心圆。可降低工艺难度。
在一些实施例中，所述显示基板为反射式显示基板；所述显示基板的显示区包括像素电极和位于所述像素电极上的金属反射电极；以及位于显示区的晶体管，所述晶体管包括栅极、栅极绝缘层、源极和漏极；
所述周边区的所述第二导电层包括所述栅极的栅极引线和所述源极的源极引线；
所述周边区域的所述第一导电层包括与所述像素电极同材料同工艺形成的透明金属氧化物层；
所述透明金属氧化物层与所述栅极引线或源极引线之间设置的所述绝缘层包括所述栅极绝缘层；所述栅极绝缘层上设置有所述过孔；所述栅极引线或源极引线通过所述过孔与所述透明金属氧化物层连接；
所述栅极引线或源极引线为金属引线；
所述绑定件区域的透明金属氧化物层对应于所述栅极绝缘层的过孔区域形成与 所述金属反射电极材料相同的金属过孔保护层。
在一些实施例中，所述衬底基板可以为玻璃基板，也可以为由其他材料(如塑料、树脂等)制成的基板。
如图8所示，本公开的实施例还提供了一种反射式液晶显示面板1000。该反射式液晶显示面板1000可包括前述任一实施例所述的显示基板100，还可以包括对置基板(例如彩膜基板)200以及位于显示基板100和对置基板200之间的液晶层300。该反射式液晶显示面板1000例如可以用于任何一种显示装置，如智能手机、平板电脑、电视机、显示器、笔记本电脑、数码相框、导航仪、车载显示器、电子书等。本公开的实施例还提供了一种电子装置，该电子装置可以包括前述任一实施例所述的显示基板100或反射式液晶显示面板1000。该电子装置可以是任何一种显示装置，例如智能手机、平板电脑、电视机、显示器、笔记本电脑、数码相框、导航仪、车载显示器、电子书等。
本公开的实施例还提供了一种显示基板的制作方法，包括：
步骤S10：在衬底基板上在周边区中形成用于与外部组件电连接的至少一个绑定件，所述绑定件包括第一导电层、位于第一导电层和衬底基板之间的第二导电层、第二导电层和第一导电层之间的绝缘层，所述第一导电层包括金属氧化物导电引线，所述第二导电层包括金属导电引线，所述绝缘层上对应于至少一条金属氧化物导电引线的区域设置有一个或多个过孔，所述至少一条金属氧化物导电引线包括位于所述绝缘层上的部分和延伸到所述绝缘层上的过孔内的部分；所述金属导电引线和所述金属氧化物导电引线一一对应连接，所述金属导电引线和金属氧化物导电引线通过所述一个或多个过孔电连接；所述绑定件还包括过孔保护层，该过孔保护层设置于所述金属氧化物导电引线上的对应于所述过孔的区域。
在一些实施例中，如图9所示，上述在衬底基板上在周边区中形成用于与外部组件电连接的至少一个绑定件包括：
步骤S11：在衬底基板上在周边区中形成第二导电层；
步骤S12：在第二导电层的远离衬底基板的一侧上形成绝缘层并在绝缘层中形成过孔；
步骤S13：在绝缘层的远离衬底基板的一侧上形成第一导电层，该第一导电层通过贯穿绝缘层的过孔与第二导电层电连接；以及
步骤S14：在第一导电层的远离衬底基板的一侧上形成过孔保护层，所述过孔保护层覆盖所述过孔。
图10示出了衬底基板的显示区的膜层结构的制作步骤的示例，具体包括：
步骤S21：在衬底基板上形成栅极层；
步骤S22：在栅极层的远离衬底基板的一侧上依次形成栅极绝缘层和有源层；
步骤S23：在有源层的远离衬底基板的一侧上形成源漏极层；
步骤S24：在源漏极层的远离衬底基板的一侧上形成有机膜层；
步骤S25：在有机膜层的远离衬底基板的一侧上形成钝化层；
步骤S26：在钝化层的远离衬底基板的一侧上形成像素电极层；以及
步骤S27：在像素电极层的远离衬底基板的一侧上形成反射电极。
为了简化工艺，图9中示出的在周边区中形成绑定件的步骤可以与图10所示的形成显示区的膜层结构的步骤一起进行。在一些实施例中，第二导电层可以与栅极层由相同材料、同一工艺制成，即上述步骤S11可以与步骤S21同时进行而合并成一个步骤；而在另一些实施例中，第二导电层可以与源漏极层由相同材料、同一工艺制成，即上述步骤S11可以与步骤S23同时进行而合并成一个步骤。再例如，第一导电层可以与像素电极层由相同材料、同一工艺制成，即上述步骤S13可以与步骤S26同时进行而合并成一个步骤。又例如，过孔保护层可以与反射电极由相同材料、同一工艺制成，即上述步骤S14可以与步骤S27同时进行而合并成一个步骤。在步骤S14中，作为示例，可以通过对与反射电极46同层铺设的金属层覆盖绑定件21的部分进行图案化，保留覆盖过孔的金属层部分形成过孔保护层35并去除覆盖第一导电层31的大部分金属层部分，从而保证绑定件21与外部组件的稳定可靠的电接触。
然而，本领域技术人员应当理解，图10中所示的显示基板的制作方法仅仅是示例性的，在该示例中，显示区中的薄膜晶体管TFT1采用了底栅型结构。然而，本公开的实施例不限于此，例如，薄膜晶体管TFT1也可以采用顶栅型结构，在显示基板采用顶栅型结构的薄膜晶体管的情况下，栅极层将在源漏极层之后形成。顶栅型结构的薄膜晶体管的具体的制作步骤是本领域技术人员所已知的，在此不再赘述。
从上述可以看出，根据本公开的实施例的显示基板，其绑定件的膜层结构的形成步骤均可以并入到显示区的膜层结构的形成步骤中，并不需要增加新的工艺步骤。
在一些实施例中，如前所述，所述至少一个绑定件21包括第一组绑定件211和 第二组绑定件212，所述第一组绑定件211中的所述第二导电层32与显示区中的源漏极层43由相同材料在同一工艺中形成，所述第二组绑定件212中的所述第二导电层32与显示区中的栅极层41由相同材料在同一工艺中形成，所述第一组绑定件211和第二组绑定件212交替地布设在所述周边区中。
本公开的实施例还提供了一种电子装置，包括前述任一实施例所述的透明显示面板100、100’、100”。该电子装置例如可以为任何一种显示装置，如智能手机、可穿戴式智能手表、智能眼镜、平板电脑、电视机、显示器、笔记本电脑、数码相框、导航仪、车载显示器、电子书等。
虽然结合附图对本公开进行了说明，但是附图中公开的实施例旨在对本公开的实施例进行示例性说明，而不能理解为对本公开的一种限制。附图中的尺寸比例仅仅是示意性的，并不能理解为对本公开的限制。
上述实施例仅例示性的说明了本公开的原理及构造，而非用于限制本公开，本领域的技术人员应明白，在不偏离本公开的总体构思的情况下，对本公开所作的任何改变和改进都在本公开的范围内。本公开的保护范围，应如本申请的权利要求书所界定的范围为准。

Claims (14)

  1. 一种显示基板，包括：
    衬底基板，所述衬底基板包括显示区和围绕所述显示区的周边区；其中，在所述周边区中设置有用于与外部组件电连接的至少一个绑定件，所述绑定件包括第一导电层，所述第一导电层包括金属氧化物导电引线；
    所述绑定件还包括位于第一导电层和衬底基板之间的第二导电层，所述第二导电层包括金属导电引线；
    所述绑定件还包括位于所述第二导电层和第一导电层之间的绝缘层，其中，所述绝缘层上对应于至少一条金属氧化物导电引线的区域设置有一个或多个过孔，所述至少一条金属氧化物导电引线包括位于所述绝缘层上与所述绝缘层接触的部分和延伸到所述绝缘层上的过孔内的部分；
    所述金属导电引线和所述金属氧化物导电引线一一对应连接，所述金属导电引线和金属氧化物导电引线通过所述一个或多个过孔电连接；
    所述绑定件还包括过孔保护层，该过孔保护层设置于所述金属氧化物导电引线上的对应于所述过孔的区域。
  2. 根据权利要求1所述的显示基板，其中，在同一绑定件中，过孔保护层在衬底基板上的正投影的面积小于第一导电层的未被过孔保护层覆盖的表面在衬底基板上的正投影的面积，所述第一导电层的未被过孔保护层覆盖的表面为与外部组件电连接的接触表面。
  3. 根据权利要求1所述的显示基板，其中，
    所述过孔保护层包括至少一层金属层，所述显示基板还包括位于显示区中的反射电极，所述反射电极与所述至少一层金属层的材质相同。
  4. 根据权利要求3所述的显示基板，其中，
    所述至少一层金属层为双层金属层，所述双层金属层为叠层设置的金属附着层和起反射作用的金属反射层。
  5. 根据权利要求3所述的显示基板，其中，在所述显示区上设置有多个子像素单元，在每个子像素单元中设有像素电极层，所述像素电极层位于所述反射电极的朝 向衬底基板的一侧且与所述像素电极电连接，所述像素电极层在衬底基板上的正投影为块状，在显示区的同一子像素单元中，所述反射电极在衬底基板上的正投影的边缘与像素电极层在衬底基板上的正投影的边缘的最小距离小于10微米。
  6. 根据权利要求5所述的显示基板，其中，在所述显示区中设置有多条数据线和多条栅极线，所述多条数据线和所述多条栅极线相互交叉，所述反射电极在显示区的子像素单元中的边缘在衬底基板上的正投影与离所述反射电极最近的数据线在衬底基板上的正投影之间的距离小于8微米。
  7. 根据权利要求1所述的显示基板，其中，所述过孔在衬底基板上的正投影落入过孔保护层在衬底基板上的正投影内，且过孔在衬底基板上的正投影的外边缘与过孔保护层在衬底基板上的正投影的外边缘之间的最小距离小于15微米。
  8. 根据权利要求1所述的显示基板，其中，在显示区中设置有栅极层和源漏极层，所述栅极层包括薄膜晶体管的栅极，所述源漏极层包括薄膜晶体管的源极和漏极，所述第二导电层与显示区中的源漏极层材质相同，或与显示区中的栅极层材质相同。
  9. 根据权利要求1所述的显示基板，其中，在显示区中设置有栅极层和源漏极层，所述栅极层包括薄膜晶体管的栅极，所述源漏极层包括薄膜晶体管的源极和漏极，所述至少一个绑定件包括第一组绑定件和第二组绑定件，在第一组绑定件中，所述第二导电层与显示区中的源漏极层材质相同；在第二组绑定件中，所述第二导电层与显示区中的栅极层材质相同，所述第一组绑定件和第二组绑定件交替地布设在所述周边区中。
  10. 根据权利要求9所述的显示基板，其中，第一组绑定件中的过孔的坡度角大于第二组绑定件中的过孔的坡度角。
  11. 根据权利要求10所述的显示基板，其中，第一组绑定件中的过孔的坡度角的范围在20度至80度之间；第二组绑定件中的过孔的坡度角的范围在10度至60度之间。
  12. 根据权利要求1至11中任一项所述的显示基板，其中，所述过孔为圆形；所述过孔保护层为圆形；
    所述过孔保护层和所述过孔为非同心圆。
  13. 根据权利要求1所述的显示基板，其中，所述显示基板为反射式显示基板；所述显示基板的显示区包括像素电极和位于所述像素电极上的金属反射电极；以及位 于显示区的晶体管，所述晶体管包括栅极、栅极绝缘层、源极和漏极；
    所述周边区的所述第二导电层包括所述栅极的栅极引线和所述源极的源极引线；
    所述周边区域的所述第一导电层包括与所述像素电极同材料同工艺形成的透明金属氧化物层；
    所述透明金属氧化物层与所述栅极引线或源极引线之间设置的所述绝缘层包括所述栅极绝缘层；所述栅极绝缘层上设置有所述过孔；所述栅极引线或源极引线通过所述过孔与所述透明金属氧化物层连接；
    所述栅极引线或源极引线为金属引线；
    所述绑定件区域的透明金属氧化物层对应于所述栅极绝缘层的过孔区域形成与所述金属反射电极材料相同的金属过孔保护层。
  14. 一种电子装置，包括根据权利要求1至13中任一项所述的显示基板。
PCT/CN2021/123181 2020-11-10 2021-10-12 显示面板、电子装置 WO2022100335A1 (zh)

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US20230079331A1 (en) 2023-03-16

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