WO2021027140A1 - 阵列基板及其制作方法 - Google Patents

阵列基板及其制作方法 Download PDF

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Publication number
WO2021027140A1
WO2021027140A1 PCT/CN2019/117364 CN2019117364W WO2021027140A1 WO 2021027140 A1 WO2021027140 A1 WO 2021027140A1 CN 2019117364 W CN2019117364 W CN 2019117364W WO 2021027140 A1 WO2021027140 A1 WO 2021027140A1
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Prior art keywords
layer
organic
fabricating
array substrate
thin film
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PCT/CN2019/117364
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English (en)
French (fr)
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胡泉
李松杉
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武汉华星光电半导体显示技术有限公司
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Priority to US16/623,124 priority Critical patent/US11342397B2/en
Publication of WO2021027140A1 publication Critical patent/WO2021027140A1/zh

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80—Constructional details
    • H10K59/88—Dummy elements, i.e. elements having non-functional features
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/121—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
    • H10K59/1213—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements the pixel elements being TFTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/121—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
    • H10K59/1216—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements the pixel elements being capacitors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/122—Pixel-defining structures or layers, e.g. banks
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/124—Insulating layers formed between TFT elements and OLED elements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/126—Shielding, e.g. light-blocking means over the TFTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K77/00—Constructional details of devices covered by this subclass and not covered by groups H10K10/80, H10K30/80, H10K50/80 or H10K59/80
    • H10K77/10—Substrates, e.g. flexible substrates
    • H10K77/111—Flexible substrates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K2102/00—Constructional details relating to the organic devices covered by this subclass
    • H10K2102/301—Details of OLEDs
    • H10K2102/311—Flexible OLED
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/1201—Manufacture or treatment
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy
    • Y02E10/549—Organic PV cells

Definitions

  • the present invention relates to the field of display technology, in particular to an array substrate and a manufacturing method thereof.
  • Source matrix organic light emitting diode (AMOLED) display panels have gradually become a new generation of display technology due to their high contrast, wide color gamut, low power consumption, and foldable characteristics.
  • the display panel of Organic Light Emitting Display (OLED) is easy to be flexible and is a key technology for wearable and foldable products.
  • the current OLED display panels in the display industry can only achieve static folding (SF, Static Foldable). This is because there are many inorganic film layers with poor bending resistance in the current panel manufacturing technology, and we want to achieve dynamic folding ( DF, Dynamic Foldable). It is difficult to release the stress in the inorganic film. It is easy to break or crack during the bending process, and the cracks are easy to extend along the inorganic film, resulting in damage to the structure of the entire panel, and ultimately resulting in poor display. .
  • the object of the present invention is to provide an array substrate whose structure can maximize the replacement of the inorganic film layer of the existing array substrate with a flexible material that can be bent while retaining the function of thin film transistors, which solves the problem of Problems with breaks or cracks.
  • one of the embodiments of the present invention provides an array substrate, including a flexible substrate, a plurality of thin film transistor units and a plurality of wire change units arranged on the flexible substrate at intervals, an organic filling layer, and a source and drain layer , Flat layer, anode layer and pixel definition layer.
  • the organic filling layer is provided on the flexible substrate to fill the gap between the thin film transistor unit and the wire change unit and cover the thin film transistor unit and the wire change unit; the source and drain layer
  • the flat layer is arranged on the source and drain layer; the anode layer is arranged on the flat layer; the pixel definition layer is arranged on the anode layer.
  • the material of the organic filling layer includes polyimide or acrylic.
  • the thin film transistor unit includes a heat insulation layer, a buffer layer, an active layer, a first insulation layer, and a first metal layer that are stacked.
  • the thermal insulation layer is provided on the flexible substrate; the buffer layer is provided on the thermal insulation layer; the active layer is provided on the buffer layer; the first insulation layer is provided on the On the active layer; the first metal layer is provided on the first insulating layer; wherein the source and drain layers are electrically connected to the active layer.
  • the shape and size of the first insulating layer and the first metal layer are the same.
  • the array substrate further includes a second insulating layer and a second metal layer.
  • the second insulating layer is provided on the first metal layer; the second metal layer is provided on the second insulating layer.
  • the organic filling layer is further included between the first metal layer and the second insulating layer.
  • the wire exchange unit includes a heat insulation layer, a buffer layer, a first insulation layer and a first metal layer that are stacked.
  • the thermal insulation layer is provided on the flexible substrate; the buffer layer is provided on the thermal insulation layer; the first insulation layer is provided on the buffer layer; the first metal layer is provided On the first insulating layer; wherein the source and drain layers are electrically connected to the first metal layer.
  • the organic filling layer includes a first organic layer and a second organic layer located on the first organic layer; the first organic layer completely covers the wire change unit and the thin film transistor unit; or The first organic layer completely covers the wire change unit.
  • the laminated thickness of the heat insulation layer, the buffer layer, the active layer, the first insulating layer and the first metal layer is less than or equal to the thickness of the first organic layer.
  • Another embodiment of the present invention provides a manufacturing method of an array substrate, including the following steps:
  • a thin film transistor unit and a wire change unit are formed, and a plurality of thin film transistor units and a plurality of wire change units are produced by sequentially etching the first insulating layer, the buffer layer, and the heat insulation layer.
  • the thin film transistor units are arranged at corresponding intervals;
  • Prepare a first organic layer deposit an organic material on the flexible substrate to form a first organic layer, the first organic layer fills the gap between the thin film transistor unit and the wire change unit and covers the thin film transistor unit and The line changing unit;
  • a source and drain layer is fabricated, a source and drain layer is fabricated on the organic filling layer and patterned; part of the source and drain layer is electrically connected to the active layer; part of the source and drain layer is connected to the A metal layer is electrically connected;
  • a pixel definition layer is fabricated, and a pixel definition layer is fabricated on the anode layer.
  • the method further includes:
  • a second metal layer is fabricated, and a second metal layer is fabricated on the second insulating layer and patterned.
  • the method further includes:
  • a second organic layer is fabricated, an organic material is deposited on the first organic layer to form a second organic layer, and the second organic layer covers the second metal layer and the second insulating layer.
  • the beneficial effect of the present invention is that the present invention provides an array substrate and a manufacturing method.
  • the structure of the array substrate can maximize the replacement of the inorganic film layer of the existing array substrate with a bendable one while retaining the function of thin film transistors.
  • the flexible material thus fundamentally solves the problem of the difficulty of stress release in the inorganic film layer, reduces breaks and cracks during the bending process, and realizes the dynamic folding of the array substrate.
  • FIG. 1 is a schematic diagram of the structure of an array substrate in the first embodiment of the present invention
  • FIG. 2 is a schematic diagram of the structure of an array substrate in the second embodiment of the present invention.
  • FIG. 3 is a schematic diagram of the structure of an array substrate in the third embodiment of the present invention.
  • FIG. 4 is a flowchart of a manufacturing method of an array substrate in an embodiment of the present invention.
  • FIG. 5 is a schematic structural view of the semi-finished product after completing the step of making the first metal layer in FIG. 4;
  • FIG. 6 is a schematic structural diagram of a semi-finished product after completing the steps of forming a thin film transistor unit and a wire changing unit in FIG.
  • the first embodiment of the present invention provides an array substrate 100, including a flexible substrate 1, a plurality of thin film transistor units (TFT) 10 and a plurality of wire change units arranged on the flexible substrate 1 at intervals 20.
  • the organic filling layer 2 is provided on the flexible substrate 1 to fill the gap between the thin film transistor unit 10 and the wire change unit 20 and cover the thin film transistor unit 10 and the wire change unit 20;
  • the source and drain layer 3 is provided on the organic filling layer 2;
  • the flat layer 4 is provided on the source and drain layer 3;
  • the anode layer 5 is provided on the flat layer 4;
  • the pixel definition layer 6 is provided on the anode layer 5.
  • the organic filling layer 2 is a flexible material, including polyimide (Polyimide) or acrylic, which is an insulating organic photoresist material; the organic filling layer 2 has good bendability, and this embodiment uses the organic
  • the filling layer 2 replaces the inorganic film layer of the existing array substrate, and fundamentally solves the problem of difficult stress release in the inorganic film layer, thereby realizing the dynamic folding of the array substrate 100.
  • the thin film transistor unit 10 includes a heat insulation layer 11, a buffer layer 12, an active layer 13, a first insulating layer 14 and a first metal layer 15 that are stacked.
  • the thermal insulation layer 11 is provided on the flexible substrate 1;
  • the buffer layer 12 is provided on the thermal insulation layer 11;
  • the active layer 13 is provided on the buffer layer 12;
  • the first insulating layer 14 is provided on the active layer 13;
  • the first metal layer 15 is used as a gate electrode on the first insulating layer 14; wherein the source and drain layer 3 and the active layer 13 Electrical connection.
  • the material of the first insulating layer 14 is SiNx.
  • the material of the first metal layer 15 is Mo.
  • the material of the heat insulation layer 11 is SiOx, which prevents the high heat when the active layer 13 is crystallized from affecting the flexible substrate 1 below.
  • the shape and size of the first insulating layer 14 and the first metal layer 15 are the same.
  • the shape and size of the heat insulation layer 11, the buffer layer 12 and the active layer 13 are the same.
  • the shape and size of the first insulating layer 14 are smaller than the shape and size of the active layer 13.
  • the wire exchange unit 20 includes a heat insulation layer 11, a buffer layer 12, a first insulation layer 14 and a first metal layer 15 that are stacked.
  • the thermal insulation layer 11 is provided on the flexible substrate 1;
  • the buffer layer 12 is provided on the thermal insulation layer 11;
  • the first insulation layer 14 is provided on the buffer layer 12;
  • the first metal layer 15 is disposed on the first insulating layer 14; wherein the source and drain layer 3 is electrically connected to the first metal layer 15.
  • the shape and size of the heat insulation layer 11, the buffer layer 12, the first insulation layer 14 and the first metal layer 15 are the same.
  • the corresponding positions of the thin film transistor unit 10 and the wire change unit 20 are defined as the display area 101, and the thin film transistor unit 10 and the wire change unit 20 are not included.
  • the position of 20 is defined as the bending area 102, and the corresponding position of the line changing unit 20 is also called the line changing area.
  • the first metal layer 15 of the thin film transistor unit 10 is electrically connected to the first metal layer 15 of the wire change unit 20, and is connected to the source and drain layers on the first metal layer 15 of the wire change unit 20.
  • the first metal layer 15 of the thin film transistor unit 10 is connected to an external data signal through the source and drain layer 3 located thereon.
  • This arrangement enables the structure of the array substrate 100 to maximize the replacement of the inorganic film layer of the existing array substrate 100 with a flexible material that can be bent while retaining the function of thin film transistors, thereby fundamentally solving the problem of the inorganic film layer. It is difficult to release the stress, so that the array substrate 100 can be dynamically folded.
  • the second embodiment includes all the technical features of the first embodiment.
  • the thin film transistor unit 10 of the array substrate 100 in the second embodiment also includes a second The insulating layer 16 and the second metal layer 17.
  • the second insulating layer 16 is provided on the first metal layer 15; the second metal layer 17 is provided on the second insulating layer 16.
  • the material of the second insulating layer 16 is SiNx.
  • the material of the second metal layer 17 is Mo.
  • the second insulating layer 16 has the same shape and size as the second metal layer 17, and it has the same shape and size as the first insulating layer 14, that is, the first metal layer 15.
  • the second metal layer 17 serves as a layer of the capacitor plate in the driving circuit, which overlaps with the first metal layer 15 driving the thin film transistor unit 10 to form a capacitor, wherein the first metal layer 15 serves as a gate electrode .
  • the array substrate 100 of this embodiment is preferably used in an organic light-emitting diode display device (OLED).
  • a pixel driving circuit includes a plurality of thin film transistor units (TFT) 10, and the circuit preferably includes 7T1C-7TFT1 capacitors. The board is only on one of the TFTs.
  • the third embodiment includes all the technical features of the second embodiment. The difference is that in the second embodiment, the organic filling layer 2 is one layer, while in the third embodiment In the example, the organic filling layer 2 is a multilayer.
  • the organic filling layer 2 includes a first organic layer 21 and a second organic layer 22 located on the first organic layer 21; the first organic layer 21 Completely cover the wire change unit 20 and the thin film transistor unit 10; or the first organic layer 21 completely covers the wire change unit 20. More specifically, the laminated thickness of the thermal insulation layer 11, the buffer layer 12, the active layer 13, the first insulation layer 14 and the first metal layer 15 is less than or equal to that of the first organic layer 21 thickness.
  • the thickness of the first organic layer 21 ranges from 1.5 um to 2.5 um, and the thickness of the second organic layer 22 ranges from 1 um to 2 um.
  • one embodiment of the present invention provides a manufacturing method of an array substrate 100, which includes the following steps:
  • the first metal layer 15 is fabricated, and the first metal layer 15 is fabricated on the first insulating layer 14 and patterned.
  • the shape of the first metal layer 15 after the patterning treatment please refer to FIG. 5
  • the first insulating layer 14 and the first metal layer 15 have the same shape and size, please refer to FIG. 6 for details;
  • a first organic layer 21 deposit an organic material on the flexible substrate 1 to form a first organic layer 21, and the first organic layer 21 fills the gap between the thin film transistor unit 10 and the wire change unit 20 And cover the thin film transistor unit 10 and the wire change unit 20; that is, the heat insulation layer 11, the buffer layer 12, the active layer 13, the first insulating layer 14 and the first metal layer 15
  • the laminated thickness of is less than or equal to the thickness of the first organic layer 21;
  • a source-drain layer 3 fabricate a source-drain layer 3 on the organic filling layer 2 and pattern it; part of the source-drain layer 3 and the active layer 13 are electrically connected; part of the source The drain layer 3 is electrically connected to the first metal layer 15;
  • the method further includes:
  • the method further includes:
  • Layer 16 The first organic layer 21 and the second organic layer 22 located on the first organic layer 21 together constitute the organic filling layer 2.
  • the organic filling layer 2 fills the gap between the thin film transistor unit 10 and the wire change unit 20 and covers the thin film transistor unit 10 and the wire change unit 20.
  • the step S81 of making the second insulating layer 16 and the step S82 of making the second metal layer 17 described above can also be arranged after the step S6 of making the first metal layer 15 and Before the step S7 of forming the thin film transistor unit 10 and the wire changing unit 20 described above.
  • the organic filling layer 2 ie, the first organic layer 21
  • the step S83 of fabricating the second organic layer 22 only needs to be fabricated once, which can save the step S83 of fabricating the second organic layer 22.
  • the beneficial effect of the present invention is that the present invention provides an array substrate and a manufacturing method.
  • the structure of the array substrate can maximize the replacement of the inorganic film layer of the existing array substrate with a bendable one while retaining the function of thin film transistors.
  • the flexible material fundamentally solves the problem of difficult stress release in the inorganic film layer, reduces breaks and cracks during the bending process, thereby realizing the dynamic folding of the array substrate and saving the number of photomasks used.

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  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
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  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)
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Abstract

本发明公开了一种阵列基板及其制作方法。阵列基板包括柔性基底、多个薄膜晶体管单元、多个换线单元、有机填充层、源漏极层、平坦层、阳极层和像素定义层。所述有机填充层为柔性材料，具有良好的可弯折性，减少了弯折过程中的断裂和裂纹，从而实现阵列基板动态可折叠。

Description

阵列基板及其制作方法 技术领域
本发明涉及显示技术领域，尤其涉及一种阵列基板及其制作方法。
 背景技术
源矩阵有机发光二极体(AMOLED)显示面板因其高对比度、广色域、低功耗、可折叠等特性，逐渐成为新一代显示技术。与传统的液晶显示面板（liquid crystal display，LCD）相比，有机发光二极管显示器件(Organic Light Emitting Display, OLED）显示面板易于柔性化，是可穿戴、可折叠产品的关键技术。但是目前显示行业中的OLED显示面板仅能实现静态弯折（SF, Static Foldable），这是因为目前的面板制程技术中耐弯折性较差的无机膜层较多，想要实现动态折叠（DF, Dynamic Foldable），无机膜层中的应力释放较为困难，在弯折的过程中容易产生断裂或产生裂缝，裂缝易沿着无机膜层延伸，导致整个面板的结构受损，最终带来显示的不良。
因此，确有必要来开发一种新型的阵列基板及其制作方法，以便克服现有技术中的缺陷。
 技术问题
本发明的目的在于，提供一种阵列基板，其结构能够在保留薄膜晶体管功能的同时最大限度的将现有阵列基板的无机膜层替换为可弯折的柔性材料，解决了弯折过程中产生断裂或裂缝的问题。
 技术解决方案
为了实现上述目的，本发明其中一实施例提供一种阵列基板，包括柔性基底、间隔设于所述柔性基底上的多个薄膜晶体管单元和多个换线单元、有机填充层、源漏极层、平坦层、阳极层和像素定义层。具体的，所述有机填充层设于所述柔性基底上，填充所述薄膜晶体管单元与所述换线单元的间隙并覆盖所述薄膜晶体管单元与所述换线单元；所述源漏极层设于所述有机填充层上；所述平坦层设于所述源漏极层上；所述阳极层设于所述平坦层上；所述像素定义层设于所述阳极层上。
进一步地，所述有机填充层的材料包括聚酰亚胺或亚克力。
进一步地，所述薄膜晶体管单元包括层叠设置的隔热层、缓冲层、有源层、第一绝缘层和第一金属层。具体的，所述隔热层设于所述柔性基底上；所述缓冲层设于所述隔热层上；所述有源层设于所述缓冲层上；所述第一绝缘层设于所述有源层上；所述第一金属层设于所述第一绝缘层上；其中所述源漏极层与所述有源层电连接。
进一步地，所述第一绝缘层与所述第一金属层的形状及尺寸相同。
进一步地，所述阵列基板，还包括第二绝缘层和第二金属层。具体的，所述第二绝缘层设于所述第一金属层上；所述第二金属层设于所述第二绝缘层上。
进一步地，在所述第一金属层和所述第二绝缘层之间还包括所述有机填充层。
进一步地，所述换线单元包括层叠设置的隔热层、缓冲层、第一绝缘层和第一金属层。具体的，所述隔热层设于所述柔性基底上；所述缓冲层设于所述隔热层上；所述第一绝缘层设于所述缓冲层上；所述第一金属层设于所述第一绝缘层上；其中所述源漏极层与所述第一金属层电连接。
进一步地，所述有机填充层包括第一有机层和位于所述第一有机层上的第二有机层；所述第一有机层完全覆盖所述换线单元和所述薄膜晶体管单元；或所述第一有机层完全覆盖所述换线单元。
进一步地，所述隔热层、所述缓冲层、所述有源层、所述第一绝缘层和第一金属层的层叠厚度小于等于所述第一有机层的厚度。
本发明又一实施例提供一种阵列基板的制作方法，包括以下步骤：
提供一柔性基底；
制作隔热层，在所述柔性基底上制作隔热层；
制作缓冲层，在所述隔热层上制作缓冲层；
制作有源层，在所述缓冲层上制作有源层并图案化处理，并对所述有源层进行掺杂；
制作第一绝缘层，在所述有源层上制作第一绝缘层；
制作第一金属层，在所述第一绝缘层上制作第一金属层并图案化处理；
形成薄膜晶体管单元与换线单元，通过依次蚀刻所述第一绝缘层、所述缓冲层和所述隔热层以制作多个薄膜晶体管单元和多个换线单元，所述换线单元与所述薄膜晶体管单元相应间隔设置；
制作第一有机层，在所述柔性基底上沉积有机材料以形成第一有机层，所述第一有机层填充所述薄膜晶体管单元与所述换线单元的间隙并覆盖所述薄膜晶体管单元与所述换线单元；
制作源漏极层，在所述有机填充层上制作源漏极层并图案化处理；部分所述源漏极层与所述有源层电连接；部分所述源漏极层与所述第一金属层电连接；
制作平坦层，在所述源漏极层上制作平坦层；
制作阳极层，在所述平坦层上制作阳极层；以及
制作像素定义层，在所述阳极层上制作像素定义层。
进一步地，在所述制作有机填充层步骤之后以及在所述制作源漏极层步骤之前还包括：
制作第二绝缘层，在所述第一金属层上制作第二绝缘层并图案化处理；以及
制作第二金属层，在所述第二绝缘层上制作第二金属层并图案化处理。
进一步地，在所述制作第二金属层步骤之后以及在所述制作源漏极层步骤之前还包括：
制作第二有机层，在所述第一有机层上沉积有机材料以形成第二有机层，所述第二有机层覆盖所述第二金属层和所述第二绝缘层。
 有益效果
本发明的有益效果在于，本发明提出一种阵列基板及制作方法，所述阵列基板的结构能够在保留薄膜晶体管功能的同时最大限度的将现有阵列基板的无机膜层替换为可弯折的柔性材料，从而从根本上解决了无机膜层中的应力释放较为困难的问题，减少了弯折过程中的断裂和裂纹，从而实现阵列基板动态可折叠。
 附图说明
图1是本发明第一实施例中一种阵列基板的结构示意图；
图2是本发明第二实施例中一种阵列基板的结构示意图；
图3是本发明第三实施例中一种阵列基板的结构示意图；
图4是本发明实施例中一种阵列基板的制作方法的流程图；
图5是图4中完成所述制作第一金属层步骤的半成品的结构示意图；
图6是图4中完成所述形成薄膜晶体管单元与换线单元步骤的半成品的结构示意图。
图中部件标识如下：
1、柔性基底，2、有机填充层，3、源漏极层，4、平坦层，
5、阳极层，6、像素定义层，10、薄膜晶体管单元，11、隔热层，
12、缓冲层，13、有源层，14、第一绝缘层，15、第一金属层，
16、第二绝缘层，17、第二金属层，20、换线单元，
21、第一有机层，22、第二有机层，100、阵列基板，
101、显示区，102、弯折区。
 本发明的实施方式
以下各实施例的说明是参考附加的图示，用以例示本发明可用以实施的特定实施例。本发明所提到的方向用语，例如[上]、[下]、[前]、[后]、[左]、[右]、[内]、[外]、[侧面]、[横向]等，仅是参考附加图式的方向。因此，使用的方向用语是用以说明及理解本发明，而非用以限制本发明。在图中，结构相似的单元是用以相同标号表示。
实施例1
请参阅图1所示，本发明第一实施例提供一种阵列基板100，包括柔性基底1、间隔设于所述柔性基底1上的多个薄膜晶体管单元（TFT）10和多个换线单元20、有机填充层2、源漏极层3、平坦层4、阳极层5和像素定义层6。具体的，所述有机填充层2设于所述柔性基底1上，填充所述薄膜晶体管单元10与所述换线单元20之间的间隙并覆盖所述薄膜晶体管单元10与所述换线单元20；所述源漏极层3设于所述有机填充层2上；所述平坦层4设于所述源漏极层3上；所述阳极层5设于所述平坦层4上；所述像素定义层6设于所述阳极层5上。
所述有机填充层2为柔性材料，包括聚酰亚胺（Polyimide）或亚克力，为绝缘的有机光阻材料；所述有机填充层2具有良好的可弯折性，本实施例用所述有机填充层2代替现有阵列基板的无机膜层，从根本上解决了无机膜层中的应力释放较为困难的问题，从而实现阵列基板100动态可折叠。
本实施例中，请参阅图1所示，所述薄膜晶体管单元10包括层叠设置的隔热层11、缓冲层12、有源层13、第一绝缘层14和第一金属层15。具体的，所述隔热层11设于所述柔性基底1上；所述缓冲层12设于所述隔热层11上；所述有源层13设于所述缓冲层12上；所述第一绝缘层14设于所述有源层13上；所述第一金属层15作为栅极设于所述第一绝缘层14上；其中所述源漏极层3与所述有源层13电连接。所述第一绝缘层14的材料为SiNx。所述第一金属层15的材料为Mo。所述隔热层11的材料为SiOx，防止所述有源层13结晶时高的热量影响到下面的所述柔性基底1。
在所述薄膜晶体管单元10中，所述第一绝缘层14与所述第一金属层15的形状及尺寸相同。所述隔热层11、所述缓冲层12与所述有源层13的形状及尺寸相同。其中，所述第一绝缘层14的形状及尺寸小于所述有源层13的形状及尺寸。
本实施例中，请参阅图1所示，所述换线单元20包括层叠设置的隔热层11、缓冲层12、第一绝缘层14和第一金属层15。具体的，所述隔热层11设于所述柔性基底1上；所述缓冲层12设于所述隔热层11上；所述第一绝缘层14设于所述缓冲层12上；所述第一金属层15设于所述第一绝缘层14上；其中所述源漏极层3与所述第一金属层15电连接。在所述换线单元20中，所述隔热层11、所述缓冲层12、所述第一绝缘层14与所述第一金属层15的形状及尺寸相同。
值得说明的是，请进一步参阅图1所示，在所述薄膜晶体管单元10与所述换线单元20相应位置定义为显示区101，在不包含所述薄膜晶体管单元10与所述换线单元20的位置定义为弯折区102，所述换线单元20相应位置也称换线区。所述薄膜晶体管单元10的第一金属层15与所述换线单元20的第一金属层15电连接，并与所述换线单元20的第一金属层15上的所述源漏极层3电连接，并与在所述弯折区102上的所述源漏极层3电连接，在所述弯折区102上的所述源漏极层3作为外接引线与外部的扫描信号接通。所述薄膜晶体管单元10的第一金属层15通过位于其上的所述源漏极层3与外部的数据信号接通。
这样设置使得所述阵列基板100的结构能够在保留薄膜晶体管功能的同时最大限度的将现有阵列基板100的无机膜层替换为可弯折的柔性材料，从而从根本上解决了无机膜层中的应力释放较为困难的问题，从而实现阵列基板100动态可折叠。
实施例2
请参阅图2所示，在第二实施例中包括第一实施例中全部的技术特征，其区别在于，第二实施例中的所述阵列基板100的所述薄膜晶体管单元10还包括第二绝缘层16和第二金属层17。具体的，所述第二绝缘层16设于所述第一金属层15上；所述第二金属层17设于所述第二绝缘层16上。所述第二绝缘层16的材料为SiNx。所述第二金属层17的材料为Mo。
其中，所述第二绝缘层16与所述第二金属层17的形状及尺寸相同，其与所述第一绝缘层14即所述第一金属层15的形状及尺寸也相同。
所述第二金属层17作为驱动电路中电容极板的一层，其与驱动所述薄膜晶体管单元10的所述第一金属层15重叠形成电容，其中所述第一金属层15作为栅极。本实施例所述阵列基板100优选用于有机发光二极管显示器件（OLED）中，在一个像素驱动电路包含多个所述薄膜晶体管单元（TFT）10，其电路优选包括7T1C-7TFT1电容，电容极板仅仅在其中一个TFT上。
实施例3
请参阅图3所示，在第三实施例中包括第二实施例中全部的技术特征，其区别在于，在第二实施例中，所述有机填充层2为一层，而在第三实施例中所述有机填充层2为多层。
请参阅图3所示，在第三实施例中，所述有机填充层2包括第一有机层21和位于所述第一有机层21上的第二有机层22；所述第一有机层21完全覆盖所述换线单元20和所述薄膜晶体管单元10；或所述第一有机层21完全覆盖所述换线单元20。更具体的，所述隔热层11、所述缓冲层12、所述有源层13、所述第一绝缘层14和第一金属层15的层叠厚度小于等于所述第一有机层21的厚度。
所述第一有机层21的厚度范围为1.5um-2.5um，所述第二有机层22的厚度范围为1um-2um。
请参阅图4所示，本发明其中一实施例提供一种阵列基板100的制作方法，包括以下步骤：
S1、提供一柔性基底1；
S2、制作隔热层11，在所述柔性基底1上制作隔热层11；
S3、制作缓冲层12，在所述隔热层11上制作缓冲层12；
S4、制作有源层13，在所述缓冲层12上制作有源层13并图案化处理，并对有源层13进行掺杂；
S5、制作第一绝缘层14，在所述有源层13上制作第一绝缘层14；
S6、制作第一金属层15，在所述第一绝缘层14上制作第一金属层15并图案化处理，经图案化处理后的所述第一金属层15的形状具体请参阅图5所示；经图案化处理后的所述第一绝缘层14与所述第一金属层15的形状及尺寸相同，具体请参阅图6所示；
S7、形成薄膜晶体管单元10与换线单元20，通过依次蚀刻所述第一绝缘层14、所述缓冲层12和所述隔热层11以制作多个薄膜晶体管单元10和多个换线单元20，所述换线单元20与所述薄膜晶体管单元10相应间隔设置，具体请参阅图6所示；
S8、制作第一有机层21，在所述柔性基底1上沉积有机材料以形成第一有机层21，所述第一有机层21填充所述薄膜晶体管单元10与所述换线单元20的间隙并覆盖所述薄膜晶体管单元10与所述换线单元20；即所述隔热层11、所述缓冲层12、所述有源层13、所述第一绝缘层14和第一金属层15的层叠厚度小于等于所述第一有机层21的厚度；
S9、制作源漏极层3，在所述有机填充层2上制作源漏极层3并图案化处理；部分所述源漏极层3与所述有源层13电连接；部分所述源漏极层3与所述第一金属层15电连接；
S10、制作平坦层4，在所述源漏极层3上制作平坦层4；
S11、制作阳极层5，在所述平坦层4上制作阳极层5；以及
S12、制作像素定义层6，在所述阳极层5上制作像素定义层6。
请参阅图4所示，本实施例中，在所述制作有机填充层2步骤S8之后以及在所述制作源漏极层3步骤S9之前还包括：
S81、制作第二绝缘层16，在所述第一金属层15上制作第二绝缘层16并图案化处理；以及
S82、制作第二金属层17，在所述第二绝缘层16上制作第二金属层17并图案化处理。
本实施例中，在所述制作第二金属层17步骤S82之后以及在所述制作源漏极层3步骤S9之前还包括：
S83、制作第二有机层22，在所述第一有机层21上沉积有机材料以形成第二有机层22，所述第二有机层22覆盖所述第二金属层17和所述第二绝缘层16。所述第一有机层21和位于所述第一有机层21上的第二有机层22共同构成所述有机填充层2。所述有机填充层2填充所述薄膜晶体管单元10与所述换线单元20的间隙并覆盖所述薄膜晶体管单元10与所述换线单元20。
值得说明的是，在其他实施例中，以上所述制作第二绝缘层16步骤S81、所述制作第二金属层17步骤S82也可设置在所述制作第一金属层15步骤S6之后以及所述形成薄膜晶体管单元10与换线单元20步骤S7之前。此时，则只需制作一次所述有机填充层2（即所述第一有机层21），可以节省所述制作第二有机层22步骤S83。
因此，还应注意的是，在一些可替代的实现方式中，本文中所描述的所有方法的步骤可不按顺序发生。例如，示出为连续的两个步骤可实际上大致同时执行，或者这两个步骤可有时以相反的顺序执行。
本发明的有益效果在于，本发明提出一种阵列基板及制作方法，所述阵列基板的结构能够在保留薄膜晶体管功能的同时最大限度的将现有阵列基板的无机膜层替换为可弯折的柔性材料，从而从根本上解决了无机膜层中的应力释放较为困难的问题，减少了弯折过程中的断裂和裂纹，从而实现阵列基板动态可折叠，同时节省使用的光罩数量。
以上所述仅是本发明的优选实施方式，应当指出，对于本技术领域的普通技术人员，在不脱离本发明原理的前提下，还可以做出若干改进和润饰，这些改进和润饰也应视为本发明的保护范围。

Claims (11)

  1. 一种阵列基板，其包括：
    柔性基底；
    多个薄膜晶体管单元，设于所述柔性基底上；
    多个换线单元，设于所述柔性基底上，所述换线单元与所述薄膜晶体管单元相应间隔设置；
    有机填充层，设于所述柔性基底上，填充所述薄膜晶体管单元与所述换线单元之间的间隙并覆盖所述薄膜晶体管单元与所述换线单元；
    源漏极层，设于所述有机填充层上；
    平坦层，设于所述源漏极层上；
    阳极层，设于所述平坦层上；以及
    像素定义层，设于所述阳极层上。
  2. 根据权利要求1所述的阵列基板，其中，所述有机填充层的材料包括聚酰亚胺或亚克力。
  3. 根据权利要求1所述的阵列基板，其中，
    所述薄膜晶体管单元包括：
    隔热层，设于所述柔性基底上；
    缓冲层，设于所述隔热层上；
    有源层，设于所述缓冲层上；
    第一绝缘层，设于所述有源层上；以及
    第一金属层，设于所述第一绝缘层上；
    其中，所述源漏极层与所述有源层电连接。
  4. 根据权利要求3所述的阵列基板，其中，所述第一绝缘层与所述第一金属层的形状及尺寸相同。
  5. 根据权利要求3所述的阵列基板，其中，还包括
    第二绝缘层，设于所述第一金属层上；以及
    第二金属层，设于所述第二绝缘层上。
  6. 根据权利要求5所述的阵列基板，其中，在所述第一金属层和所述第二绝缘层之间还包括所述有机填充层。
  7. 根据权利要求1所述的阵列基板，其中，
    所述换线单元包括：
    隔热层，设于所述柔性基底上；
    缓冲层，设于所述隔热层上；
    第一绝缘层，设于所述缓冲层上；以及
    第一金属层，设于所述第一绝缘层上；
    其中，所述源漏极层与所述第一金属层电连接。
  8. 根据权利要求1所述的阵列基板，其中，所述有机填充层包括第一有机层和位于所述第一有机层上的第二有机层；
    所述第一有机层完全覆盖所述换线单元和所述薄膜晶体管单元；或
    所述第一有机层完全覆盖所述换线单元。
  9. 一种阵列基板的制作方法，其中，包括步骤：
    提供一柔性基底；
    制作隔热层，在所述柔性基底上制作隔热层；
    制作缓冲层，在所述隔热层上制作缓冲层；
    制作有源层，在所述缓冲层上制作有源层并图案化处理，并对所述有源层进行掺杂；
    制作第一绝缘层，在所述有源层上制作第一绝缘层；
    制作第一金属层，在所述第一绝缘层上制作第一金属层并图案化处理；
    形成薄膜晶体管单元与换线单元，通过依次蚀刻所述第一绝缘层、所述缓冲层和所述隔热层以制作多个薄膜晶体管单元和多个换线单元，所述换线单元与所述薄膜晶体管单元相应间隔设置；
    制作第一有机层，在所述柔性基底上沉积有机材料以形成第一有机层，所述第一有机层填充所述薄膜晶体管单元与所述换线单元的间隙并覆盖所述薄膜晶体管单元与所述换线单元；
    制作源漏极层，在所述有机填充层上制作源漏极层并图案化处理；部分所述源漏极层与所述有源层电连接；部分所述源漏极层与所述第一金属层电连接；
    制作平坦层，在所述源漏极层上制作平坦层；
    制作阳极层，在所述平坦层上制作阳极层；以及
    制作像素定义层，在所述阳极层上制作像素定义层。
  10. 根据权利要求9所述阵列基板的制作方法，其中，在所述制作有机填充层步骤之后以及在所述制作源漏极层步骤之前还包括：
    制作第二绝缘层，在所述第一金属层上制作第二绝缘层并图案化处理；以及
    制作第二金属层，在所述第二绝缘层上制作第二金属层并图案化处理。
  11. 根据权利要求10所述阵列基板的制作方法，其中，在所述制作第二金属层步骤之后以及在所述制作源漏极层步骤之前还包括：
    制作第二有机层，在所述第一有机层上沉积有机材料以形成第二有机层，所述第二有机层覆盖所述第二金属层和所述第二绝缘层。
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