WO2020230674A1 - 載置台及び載置台の作製方法 - Google Patents

載置台及び載置台の作製方法 Download PDF

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Publication number
WO2020230674A1
WO2020230674A1 PCT/JP2020/018444 JP2020018444W WO2020230674A1 WO 2020230674 A1 WO2020230674 A1 WO 2020230674A1 JP 2020018444 W JP2020018444 W JP 2020018444W WO 2020230674 A1 WO2020230674 A1 WO 2020230674A1
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WO
WIPO (PCT)
Prior art keywords
top plate
flow path
forming member
mounting table
stage
Prior art date
Application number
PCT/JP2020/018444
Other languages
English (en)
French (fr)
Japanese (ja)
Inventor
河西　繁
Original Assignee
東京エレクトロン株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 東京エレクトロン株式会社 filed Critical 東京エレクトロン株式会社
Priority to CN202080033045.2A priority Critical patent/CN113767461B/zh
Priority to KR1020217039218A priority patent/KR20220003599A/ko
Publication of WO2020230674A1 publication Critical patent/WO2020230674A1/ja

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    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2851—Testing of integrated circuits [IC]
    • G01R31/2855—Environmental, reliability or burn-in testing
    • G01R31/286—External aspects, e.g. related to chambers, contacting devices or handlers
    • G01R31/2865—Holding devices, e.g. chucks; Handlers or transport devices
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/26—Testing of individual semiconductor devices
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2851—Testing of integrated circuits [IC]
    • G01R31/2855—Environmental, reliability or burn-in testing
    • G01R31/2872—Environmental, reliability or burn-in testing related to electrical or environmental aspects, e.g. temperature, humidity, vibration, nuclear radiation
    • G01R31/2874—Environmental, reliability or burn-in testing related to electrical or environmental aspects, e.g. temperature, humidity, vibration, nuclear radiation related to temperature
    • G01R31/2875—Environmental, reliability or burn-in testing related to electrical or environmental aspects, e.g. temperature, humidity, vibration, nuclear radiation related to temperature related to heating
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2851—Testing of integrated circuits [IC]
    • G01R31/2855—Environmental, reliability or burn-in testing
    • G01R31/2872—Environmental, reliability or burn-in testing related to electrical or environmental aspects, e.g. temperature, humidity, vibration, nuclear radiation
    • G01R31/2874—Environmental, reliability or burn-in testing related to electrical or environmental aspects, e.g. temperature, humidity, vibration, nuclear radiation related to temperature
    • G01R31/2877—Environmental, reliability or burn-in testing related to electrical or environmental aspects, e.g. temperature, humidity, vibration, nuclear radiation related to temperature related to cooling
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/302—Contactless testing
    • G01R31/308—Contactless testing using non-ionising electromagnetic radiation, e.g. optical radiation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67098—Apparatus for thermal treatment
    • H01L21/67109—Apparatus for thermal treatment mainly by convection
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67098—Apparatus for thermal treatment
    • H01L21/67115—Apparatus for thermal treatment mainly by radiation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/687—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
    • H01L21/68714—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support
    • H01L21/68757—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support characterised by a coating or a hardness or a material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/687—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
    • H01L21/68714—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support
    • H01L21/68785—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support characterised by the mechanical construction of the susceptor, stage or support

Definitions

  • This disclosure relates to a mounting table and a method for manufacturing the mounting table.
  • Patent Document 1 discloses a stage on which a substrate on which an electronic device is formed is placed.
  • the stage disclosed in Patent Document 1 has a disk-shaped stage lid and a cooling unit having a refrigerant groove formed inside, and the stage lid comes into contact with the cooling unit via an O-ring, and the refrigerant
  • the groove is covered with a stage lid to form a refrigerant flow path, and an O-ring seals the refrigerant to the refrigerant flow path.
  • a light irradiation mechanism having a large number of LEDs is provided so as to face the wafer via the stage lid and the cooling unit, and since the cooling unit and the refrigerant can transmit light, the light from the LEDs can be transmitted. It passes through the cooling mechanism and reaches the stage lid.
  • the light irradiation mechanism can locally irradiate the stage lid with the light from the LED.
  • the stage disclosed in Patent Document 1 heats the stage lid by locally irradiating the stage lid with light while cooling the stage lid as a whole by a cooling mechanism, thereby raising the temperature of only the desired electronic device. Cool other electronic devices while controlling.
  • the technique according to the present disclosure is a mounting table that cools the inspection target body with the refrigerant flowing through the refrigerant flow path provided in the mounting table and heats the inspection target body with the light transmitted through the members constituting the refrigerant flow path and the refrigerant. Provided that is applicable over a wide temperature range.
  • One aspect of the present disclosure is a mounting table on which an inspection object is placed, which is attached to a top plate portion on which the inspection object is placed on the front surface and a back surface of the top plate portion, and the top plate is attached.
  • a flow path forming member that forms a flow path forming member through which a light-transmissible refrigerant flows between the portions and the inspection target body placed on the top plate portion so as to face each other via the flow path forming member. It has a light irradiation mechanism having a plurality of LEDs pointing to the inspection object, the flow path forming member is made of glass capable of transmitting light, and the top plate portion is made of silicon.
  • the inspection target is cooled by the refrigerant flowing through the refrigerant flow path provided in the mounting table, and the inspection target is heated by the light transmitted through the members constituting the refrigerant flow path and the refrigerant. It is possible to provide a product that can be applied in a wide temperature range.
  • FIG. 5 is a cross-sectional view schematically showing the configuration of another example of the top plate.
  • FIG. 5 is a cross-sectional view showing the top plate divided into layers in order to show each layer constituting the top plate of FIG. 7.
  • a large number of electronic devices having a predetermined circuit pattern are formed on a semiconductor wafer (hereinafter referred to as "wafer").
  • the formed electronic device is inspected for electrical characteristics and the like, and is classified into a non-defective product and a defective product.
  • the inspection of the electronic device is performed using an inspection device, for example, in the state of the wafer before each electronic device is divided.
  • An inspection device called a prober or the like includes a probe card having a large number of probes and a stage on which a wafer is placed.
  • a prober includes a probe card having a large number of probes and a stage on which a wafer is placed.
  • each probe of the probe card is in contact with each electrode of the electronic device, and in that state, an electric signal is supplied to the electronic device from the tester provided on the upper part of the probe card via each probe. To. Then, based on the electric signal received by the tester from the electronic device via each probe, it is selected whether or not the electronic device is defective.
  • a heater having a resistance heating element and a flow path through which a refrigerant flows are provided in the stage in order to reproduce the mounting environment of the electronic device. Controls the temperature of the stage and controls the temperature of the wafer.
  • Patent Document 1 discloses the following stages. As described above, the stage disclosed in Patent Document 1 has a disk-shaped stage lid and a cooling unit in which a refrigerant groove is formed, and the stage lid becomes a cooling unit via an O-ring. The refrigerant groove is covered with a stage lid to form a refrigerant flow path, and an O-ring seals the refrigerant to the refrigerant flow path.
  • a light irradiation mechanism having a large number of LEDs is provided so as to face the wafer via the stage lid and the cooling unit, and since the cooling unit and the refrigerant can transmit light, the light from the LEDs can be transmitted. It passes through the cooling mechanism and reaches the stage lid. Further, the light irradiation mechanism can locally irradiate the stage lid with the light from the LED. With these configurations, the stage disclosed in Patent Document 1 heats the stage lid by locally irradiating the stage lid with light while cooling the stage lid as a whole by a cooling mechanism, thereby raising the temperature of only the desired electronic device. Cool other electronic devices while controlling.
  • SiC having high thermal conductivity has been used as the material of the stage lid in consideration of the ease of heating by the light from the LED
  • glass which is an inexpensive transparent member
  • the coefficient of thermal expansion of SiC, which is the material of the stage lid, and the coefficient of thermal expansion of glass, which is the material of the cooling unit are preferably about the same in order to be applicable as a stage in a wide inspection temperature range.
  • the amount and type of additives to the glass are adjusted in order to make the coefficient of thermal expansion of the glass comparable to that of SiC, the glass becomes opaque to the light from the LED.
  • the thickness of the cooling unit made of glass for example, 30 mm or more so that the compressive force can be withstood.
  • the stage becomes large and heavy, which may interfere with the drive system of the stage, and the heating efficiency by the light from the LED may decrease. There is.
  • the O-ring in order to compress the O-ring with a strong force, it is necessary to fasten the stage and the cooling unit with a large number of holding screws, and the joints due to the screws are easily damaged. There is room for improvement in terms of aspects.
  • a method of joining the stage and the cooling unit with an epoxy resin can be considered.
  • SiC which is the material of the stage lid and the cooling unit, and glass
  • the bonding with the epoxy resin will be broken unless the temperature is within, for example, 35 ° C.
  • a certain reference temperature is the temperature of the epoxy when the epoxy resin is heated for bonding with the epoxy resin. Therefore, when there is a difference in expansion coefficient, this method using an epoxy resin cannot be applied to a prober that performs an electrical property inspection in a wide temperature range.
  • the technique according to the present disclosure is a stage in which the inspection target body is cooled by the refrigerant flowing through the refrigerant flow path provided in the stage, and the inspection target body is heated by the members constituting the refrigerant flow path and the light transmitted through the refrigerant. It provides a stage that can be applied over a wide temperature range.
  • FIG. 1 and 2 are perspective views and front views showing an outline of the configuration of a prober 1 having a stage as a mounting table according to the present embodiment, respectively.
  • FIG. 2 a part thereof is shown in a cross section in order to show the components contained in the storage chamber and the loader described later in the prober 1 of FIG.
  • the prober 1 of FIGS. 1 and 2 inspects the electrical characteristics of each of a plurality of electronic devices (see reference numeral D in FIG. 3 described later) formed on the wafer W as the inspection target.
  • the prober 1 includes a storage chamber 2 for accommodating a wafer W at the time of inspection, a loader 3 arranged adjacent to the accommodation chamber 2, and a tester 4 arranged so as to cover the accommodation chamber.
  • the accommodation chamber 2 has a hollow housing and has a stage 10 as a mounting table on which the wafer W is placed.
  • the stage 10 attracts and holds the wafer W so that the position of the wafer W with respect to the stage 10 does not shift.
  • the stage 10 is provided with a moving mechanism 11 for moving the stage 10 in the horizontal direction and the vertical direction.
  • the moving mechanism 11 has a base 11a made of a metal material such as stainless steel on which the stage 10 is arranged, and although not shown, a guide rail for moving the base 11a, a ball screw, etc. It has a motor and the like. With this moving mechanism 11, the relative positions of the probe card 12 and the wafer W, which will be described later, can be adjusted so that the electrodes on the surface of the wafer W come into contact with the probe 12a of the probe card 12.
  • a probe card 12 is arranged above the stage 10 in the accommodation chamber 2 so as to face the stage 10.
  • the probe card 12 is connected to the tester 4 via the interface 13.
  • Each probe 12a contacts the electrodes of each electronic device of the wafer W during the electrical characteristic inspection, supplies power from the tester 4 to the electronic device via the interface 13, and sends a signal from the electronic device through the interface 13. And transmit it to the tester 4.
  • the loader 3 takes out the wafer W housed in the FOUP (not shown), which is a transport container, and transports the wafer W to the stage 10 of the storage chamber 2. Further, the loader 3 receives the wafer W for which the inspection of the electrical characteristics of the electronic device has been completed from the stage 10 and accommodates the wafer W in the FOUP.
  • the loader 3 has a control unit 14 that performs various controls such as temperature control of the electronic device to be inspected.
  • the control unit 14, which is also called a base unit or the like, is composed of, for example, a computer equipped with a CPU, a memory, or the like, and has a program storage unit (not shown).
  • the program storage unit stores programs that control various processes in the prober 1.
  • the program may be recorded on a computer-readable storage medium and may be installed on the control unit 14 from the storage medium. Part or all of the program may be realized by dedicated hardware (circuit board).
  • the loader 3 has a potential difference measuring unit 15 for measuring the potential difference in the potential difference generation circuit (not shown) in each electronic device.
  • the potential difference generation circuit is, for example, a diode, a transistor or a resistor.
  • the potential difference measuring unit 15 is connected to the interface 13 via the wiring 16 to acquire the potential difference between the two probes 12a in contact with the two electrodes corresponding to the potential difference generation circuit, and transmits the acquired potential difference to the control unit 14. To do.
  • the connection structure of each probe 12a and the wiring 16 in the interface 13 will be described later.
  • the control unit 14 is connected to the stage 10 via the wiring 17 and controls a flow rate control valve that adjusts the flow rate of the refrigerant to the light irradiation mechanism 140 described later and the refrigerant flow path 131 described later.
  • the control unit 14 and the potentiometric titration unit 15 may be provided in the accommodation chamber 2, and the potentiometric titration measurement unit 15 may be provided in the probe card 12.
  • the tester 4 has a test board (not shown) that reproduces a part of the circuit configuration of the motherboard on which the electronic device is mounted.
  • the test board is connected to the tester computer 18 that determines the quality of the electronic device based on the signal from the electronic device.
  • the circuit configurations of a plurality of types of motherboards can be reproduced by replacing the test board.
  • the prober 1 includes a user interface unit 19 for displaying information for the user and for the user to input an instruction.
  • the user interface unit 19 includes, for example, an input unit such as a touch panel or a keyboard and a display unit such as a liquid crystal display.
  • the tester computer 18 transmits data to the test board connected to the electronic device via each probe 12a when inspecting the electrical characteristics of the electronic device. Then, the tester computer 18 determines whether or not the transmitted data has been correctly processed by the test board based on the electric signal from the test board.
  • FIG. 3 is a plan view schematically showing the configuration of the wafer W.
  • a plurality of electronic devices D are formed on the surface of the wafer W by subjecting a substantially disk-shaped silicon substrate to an etching process or a wiring process at predetermined intervals from each other. ..
  • An electrode E is formed on the surface of the electronic device D, that is, the wafer W, and the electrode E is electrically connected to a circuit element inside the electronic device D. By applying a voltage to the electrode E, a current can be passed through the circuit elements inside each electronic device D.
  • FIG. 4 is a cross-sectional view schematically showing the configuration of the stage 10
  • FIG. 5 is a plan view schematically showing the configuration of the light irradiation mechanism 140 described later.
  • the stage 10 is formed by stacking a plurality of functional portions including a top plate 120 as a top plate portion.
  • the stage 10 is placed on a moving mechanism 11 (see FIG. 2) that moves the stage 10 in the horizontal direction and the vertical direction via the heat insulating member 110.
  • the thermal insulation member 110 is for thermally insulating the stage 10 and the moving mechanism 11, and is made of, for example, a sintered body of cordierite having a low thermal conductivity and a coefficient of thermal expansion. Both the base 11a of the moving mechanism 11 and the heat insulating member 110 are medium entities.
  • the stage 10 has a top plate 120, a flow path forming member 130, and a light irradiation mechanism 140 in this order from above. Then, the stage 10 is supported by the moving mechanism 11 from below the light irradiation mechanism 140, in other words, from the back surface side of the light irradiation mechanism 140, via the heat insulating member 110.
  • the top plate 120 is a member on which a wafer is placed on its surface 120a.
  • the top plate 120 is a member whose surface 120a serves as a wafer mounting surface as a substrate mounting surface on which the wafer W is mounted.
  • the surface 120a of the top plate 120 which is also the upper surface of the stage 10, may be referred to as the wafer mounting surface 120a.
  • the top plate 120 is formed in a disk shape, for example.
  • the top plate 120 is formed of Si (silicon).
  • Si has a small specific heat and a high thermal conductivity. Therefore, by forming the top plate 120 with Si, the wafer W placed on the top plate 120 can be efficiently heated or cooled when the top plate 120 is heated or cooled. Moreover, the top plate 120, that is, the wafer W can be efficiently heated by the light from the light irradiation mechanism 140.
  • Si has a high Young's modulus of 300 GPa. Therefore, by forming the top plate 120 with Si, it is possible to prevent the top plate 120 from cracking or the like. Further, Si has substantially the same coefficient of thermal expansion as the glass used for the flow path forming member 130 as described later. This effect will be described later.
  • the top plate 120 is manufactured by processing a Si single crystal substrate.
  • a suction hole (not shown) for sucking the wafer W is formed on the surface 120a of the top plate 120. Further, a plurality of temperature sensors 121 are embedded in the top plate 120 at positions separated from each other in a plan view.
  • the flow path forming member 130 is a member attached to the back surface 120b of the top plate 120 to form a refrigerant flow path 131 in which the refrigerant flows between the flow path forming member 130 and the top plate 120, and has a disk shape having substantially the same diameter as the top plate 120. It is formed.
  • a groove is formed on the surface of the flow path forming member 130, and the groove is covered with the top plate 120 to form the refrigerant flow path 131.
  • the electronic device formed on the wafer W is cooled by cooling the wafer W placed on the stage 10 with the refrigerant flowing through the refrigerant flow path 131.
  • a supply port 132 and a discharge port 133 that communicate with the refrigerant flow path 131 are formed on the side portion of the flow path forming member 130.
  • a supply pipe 160 for supplying the refrigerant to the refrigerant flow path 131 is connected to the supply port 132, and a discharge pipe 161 for discharging the refrigerant from the refrigerant flow path 131 is connected to the discharge port 133.
  • the supply pipe 160 is provided with a flow rate control valve 162 that controls the flow rate of the refrigerant supplied to the refrigerant flow path 131.
  • a fluorine-based inert liquid (Fluorinert (registered trademark), Novec (registered trademark), etc.) capable of transmitting light
  • a pump provided outside the prober 1 ( It is supplied to the refrigerant flow path 131 via the supply pipe 160 (not shown).
  • the operation of the flow rate control valve 162 and the like for adjusting the flow rate of the refrigerant is controlled by the control unit 14.
  • glass that transmits light As the material of the flow path forming member 130 having the above-described configuration, glass that transmits light is used, and more specifically, glass that transmits light and has substantially the same coefficient of thermal expansion as Si, for example, silicon. Borosilicate glass, which has excellent adhesion to light, is used.
  • “having a coefficient of thermal expansion equivalent to Si” means that the difference from the coefficient of thermal expansion of Si is within a range of ⁇ 20% in the temperature range in which the electrical characteristic inspection is performed. Further, the "temperature range in which the electrical characteristic inspection is performed” is, for example, ⁇ 40 ° C. to 125 ° C.
  • anode joining is used as a method for joining the flow path forming member 130 and the top plate 120 so that the refrigerant can be sealed in the refrigerant flow path 131.
  • anode joining is used as a method for joining the flow path forming member 130 and the top plate 120 so that the refrigerant can be sealed in the refrigerant flow path 131.
  • the flow path forming member 130 and the top plate 120 may be joined with an epoxy resin.
  • the light irradiation mechanism 140 is arranged so as to face the wafer W placed on the surface 120a of the top plate 120 via the flow path forming member 130.
  • the light irradiation mechanism 140 has a plurality of LEDs 141 that direct the wafer W.
  • the light irradiation mechanism 140 has a plurality of LED units U in which a plurality of LEDs 141 are unitized, and also has a base 142 on which these LED units U are mounted on the surface.
  • the LED unit U in the light irradiation mechanism 140 is, for example, a plan-view square unit U1 similarly arranged in the same number as the electronic devices D (see FIG. 3) formed on the wafer W.
  • the light from the LED 141 of the LED unit U can irradiate at least the entire portion of the top plate 120 on which the wafer W is mounted.
  • Each LED 141 irradiates the wafer W with light.
  • each LED 141 emits near-infrared light.
  • the light emitted from the LED 141 (hereinafter, may be abbreviated as "LED light”) passes through the flow path forming member 130 of the stage 10 made of a light transmitting member.
  • the light that has passed through the flow path forming member 130 passes through the light-transmitting refrigerant that flows through the refrigerant flow path 131 of the stage 10 and is incident on the top plate 120.
  • the base 142 is formed in a disk shape having substantially the same diameter as the top plate 120, and a refrigerant flow path (not shown) through which a refrigerant for cooling the LED 141 flows is formed inside the base 142.
  • the base 142 is formed of a metal material such as Al.
  • the light irradiation mechanism 140 is joined to the back surface of the flow path forming member 130 via the spacer 143.
  • the peripheral edge of the front surface of the base 142 and the peripheral edge of the back surface of the flow path forming member 130 are joined via an annular spacer 143 in a plan view.
  • a space is formed between the base 142 and the flow path forming member 130 by the spacer 143 described above, and this space forms the LED mounting space S on which the LED 141 is mounted.
  • the LED mounting space S is filled with a material capable of transmitting LED light, such as a light transmitting resin 144. That is, the stage 10 is formed so that there is no hollow portion.
  • the LED light incident on the top plate 120 on which the wafer W is placed is controlled in units of the LED unit U. Therefore, the light irradiation mechanism 140 can irradiate the LED light only to an arbitrary portion on the top plate 120, and can make the intensity of the irradiated light different between the arbitrary portion and the other portion. Therefore, the light irradiation mechanism 140 can locally heat the wafer W placed on the top plate 120, or locally change the degree of heating in the wafer W.
  • the temperature of the electronic device D to be inspected formed on the wafer W on the stage 10 is made constant at the target temperature by the heating by the light from the light irradiation mechanism 140 and the endothermic heat by the refrigerant flowing through the refrigerant flow path 131. Control to be. For this temperature control, the prober 1 measures the temperature of the electronic device D.
  • FIG. 6 is a diagram schematically showing a configuration of a circuit for measuring the temperature of the electronic device D in the prober 1.
  • each probe 12a is connected to the tester 4 by a plurality of wires 20 arranged on the interface 13.
  • a relay 21 is provided in each of the two wirings 20 connecting the two probes 12a in contact with the two electrodes E of the potential difference generation circuit (for example, the diode) in the electronic device D and the tester 4. Be done.
  • Each relay 21 is configured to be able to transmit by switching the potential of each electrode E to either the tester 4 or the potentiometric titration unit 15. For example, when inspecting the electrical characteristics of the electronic device D, each relay 21 transfers the potential of each electrode E to the potential difference measuring unit 15 at a predetermined timing after the mounting voltage is applied to each electrode E. introduce.
  • the potential difference generated when a current is passed differs depending on the temperature. Therefore, the temperature of the electronic device D can be measured in real time during the inspection based on the potential difference of the potential difference generation circuit of the electronic device D, that is, the potential difference between the two electrodes E (probe 12a) of the potential difference generation circuit.
  • the potential difference measuring unit 15 acquires the potential difference of the potential difference generation circuit of the electronic device D based on the potential of each electrode E transmitted from each relay 21, and further transmits the acquired potential difference to the control unit 14.
  • the control unit 14 measures the temperature of the electronic device D based on the transmitted potential difference and the temperature characteristic of the potential difference of the potential difference generation circuit.
  • the method for measuring the temperature of the electronic device D is not limited to the above, and other methods may be used as long as the temperature of the electronic device D can be measured.
  • the wafer W is taken out from the FOUP of the loader 3, transported toward the stage 10, and placed on the wafer mounting surface 120a of the top plate 120.
  • the stage 10 is then moved to a predetermined position.
  • the stage 10 is moved, and the probe 12a provided above the stage 10 is brought into contact with the electrode E of the electronic device D to be inspected on the wafer W.
  • the potential difference measuring unit 15 acquires the potential difference of the above-mentioned potential difference generation circuit in the electronic device D to be inspected. Then, assuming that the temperature of the top plate 120 made uniform in the plane substantially matches the temperature of the electronic device D to be inspected, the potential difference is calibrated, that is, the information on the temperature characteristics of the potential difference is corrected. To.
  • a signal for inspection is input to the probe 12a.
  • the inspection of the electronic device D is started.
  • the LED corresponding to the device so that the temperature of the electronic device D becomes the test temperature or the target temperature.
  • the light output from the LED 141 of the unit U that is, the applied voltage of the LED 141 is controlled.
  • the temperature and flow rate of the refrigerant in the refrigerant flow path 131 are, for example, constant at a value corresponding to the test temperature or the target temperature of the electronic device D to be inspected.
  • the manufacturing method of the stage 10 includes a member manufacturing step of manufacturing the top plate 120, the flow path forming member 130, and the light irradiation mechanism 140, and a joining step of joining the adjacent members.
  • the member manufacturing process and the joining process will be specifically described.
  • the member manufacturing step includes (A1) a top plate manufacturing step, (A2) a flow path forming member manufacturing step, and (A3) a light irradiation mechanism manufacturing step.
  • (A1) Top plate manufacturing step In this step, a suction hole for adsorbing a wafer is formed on a Si single crystal substrate formed by cutting out a Si ingot, and a top plate 120 is manufactured.
  • a refrigerant groove serving as a refrigerant flow path 131 is formed on a flat plate of borosilicate glass having high heat resistance and a low coefficient of thermal expansion by machining or the like, and a supply port 132. And the discharge port 133 are formed by machining or the like, and the flow path forming member 130 is manufactured.
  • (A3) Light Irradiation Mechanism Manufacturing Step the LED unit U is manufactured and the LED unit U is mounted on the base 142 on which the flow path is formed in advance, and the light irradiation mechanism 140 is manufactured.
  • joining steps include (B1) a step of joining the top plate 120 and the flow path forming member 130, (B2) a step of joining the flow path forming member 130 and the light irradiation mechanism 140, and (B3) light irradiation.
  • the step of joining the mechanism 140 and the heat insulating member 110 is included.
  • Step B1 Step of joining the top plate 120 and the flow path forming member 130
  • the back surface 120b of the top plate 120 and the end portion of the front surface of the flow path forming member 130 are joined by anode joining.
  • the top plate 120 and the flow path forming member 130 are heated in an overlapping state, and a voltage is applied by using the Si top plate 120 as an anode and the glass flow path forming member 130 as a cathode. ..
  • the cations in the flow path forming member 130 are forcibly diffused toward the anode side, so that the glass and Si are chemically reacted and bonded.
  • (B2) Step of joining the flow path forming member 130 and the light irradiation mechanism 140 In this step, for example, joining the peripheral edge of the back surface of the flow path forming member 130 and the front surface of the annular spacer 143 in a plan view, and light irradiation. The peripheral edge of the front surface of the base 142 of the mechanism 140 and the back surface of the spacer 143 are joined. These joinings are performed using, for example, an ultraviolet curable resin or the like. Further, after the joining, for example, the LED mounting space S is filled with the light transmissive resin 144 through the through hole provided on the side portion of the spacer 143. After filling, the through holes of the spacer 143 are closed, if necessary.
  • the stage 10 is attached to the top plate 120 on which the wafer W is placed on the front surface and the back surface 120b of the top plate 120, and light can be transmitted between the top plate 120.
  • a plurality of flow path forming members 130 forming the refrigerant flow path 131 through which the refrigerant flows are arranged so as to face each other with the wafer W placed on the top plate 120 and the flow path forming member 130 interposed therebetween, and directing the wafer W. It has a light irradiation mechanism 140 having an LED 141.
  • the stage 10 locally irradiates the top plate 120 with LED light to heat the top plate 120 while cooling the entire top plate 120 with the refrigerant flowing through the refrigerant flow path 131, thereby controlling the temperature of only the desired electronic device D. While cooling other electronic devices.
  • the flow path forming member 130 is formed of glass
  • the top plate 120 is formed of silicon having a small difference in thermal expansion coefficient from glass. Therefore, the stress due to thermal expansion or contraction generated at the joint portion between the top plate 120 and the flow path forming member 130 is small. Therefore, the stage 10 can be used in a wide inspection temperature range.
  • the flow path forming member 130 is made of glass and the top plate 120 is made of Si, joining by anode joining can be used for joining the flow path forming member 130 and the top plate 120.
  • the joint portion formed by anode bonding has higher resistance to stress generated in the joint portion than the bonding portion made of epoxy resin or the like. Therefore, stage 10 can be applied up to a wider inspection temperature range. Moreover, since it is not necessary to use an O-ring for the joint portion, the reliability is high.
  • the top plate 120 using Si can be made thin. Therefore, the top plate 120 can be made thin to suppress the heat capacity of the top plate 120. Therefore, the temperature of the top plate 120 can be changed at high speed by heating the top plate 120 with LED light or cooling the top plate 120 with the refrigerant flowing through the refrigerant flow path 131. Furthermore, since Si has a low volume specific heat, the heat capacity of the top plate 120 can be suppressed by using Si for the top plate 120 in this respect as well.
  • the wafer W using the stage 10 can be heated and cooled uniformly and at high speed in the plane.
  • the top plate 120 is made of a Si single crystal substrate, the wafer mounting surface 120a can be flattened. Therefore, since the thermal resistance between the wafer W and the top plate 120 can be reduced, the wafer W can be cooled and heated at high speed using the stage 10.
  • the top plate 120 is formed of Si, when the wafer W is composed of a Si substrate, there is no difference in the coefficient of thermal expansion between the top plate 120 and the wafer W. Therefore, when the wafer W is thermally expanded or contracted during an electrical characteristic inspection or the like, the wafer W and the top plate 120 are not rubbed and scratched.
  • the LED mounting space is not filled with the light transmissive resin, and a cooling unit having a refrigerant groove is supported. Therefore, in the stage disclosed in Patent Document 1, the force for pressing the probe during inspection is received by the stage lid made of SiC and the cooling unit made of glass.
  • the LED mounting space S is filled with the light transmissive resin 144, and the stage 10 is supported from below the light irradiation mechanism 140. Therefore, in the stage 10, the force for pressing the probe 12a at the time of inspection is not received only by the top plate 120 and the flow path forming member 130, but is received by the entire stage. Therefore, even if Si having a Young's modulus lower than that of SiC is used as the material of the top plate 120 to make the top plate 120 thinner, the top plate 120 will not be deformed by the force of pressing the probe 12a.
  • FIG. 7 is a cross-sectional view schematically showing the configuration of another example of the top plate.
  • FIG. 8 is a cross-sectional view showing the top plate divided into layers in order to show each layer constituting the top plate of FIG. 7.
  • the top plate 200 of FIG. 7 is formed by laminating a ceiling layer 210 and an electromagnetic shield layer 220 in this order from above. Both the ceiling layer 210 and the electromagnetic shield layer are made of a Si single crystal substrate.
  • the ceiling layer 210 is a layer on which the wafer W is placed on the surface.
  • the ceiling layer 210 is made of a Si single crystal substrate, and as shown in FIG. 8, a Si oxide film 211 is formed on the back surface.
  • the electromagnetic shield layer 220 is provided on the back surface side of the ceiling layer 210, and blocks electromagnetic waves generated by the light irradiation mechanism 140 from the wafer placed on the ceiling layer 210. Specifically, the electromagnetic shield layer 220 blocks electromagnetic waves generated in the drive circuit for driving the LED 141 mounted near the LED 141 of the light irradiation mechanism 140 from the wafer W placed on the ceiling layer 210.
  • the electromagnetic shield layer 220 is made of a Si single crystal substrate to which impurities are added at a high concentration and has high conductivity, a Si oxide film 221 is formed on the surface thereof, and an electrode 222 is formed on a side surface thereof.
  • the electromagnetic shield layer 220 is connected to a ground potential or a potential having a low impedance via an electrode 222.
  • the production of the top plate 200 is performed as follows, for example.
  • the ceiling layer 210 and the electromagnetic shield layer 220 are produced.
  • the Si oxide film 211 is formed by thermal oxidation treatment on the surface of the Si single crystal substrate formed by cutting out the Si ingot, which corresponds to the back surface of the ceiling layer 210, to produce the ceiling layer 210.
  • a Si oxide film 221 is formed by thermal oxidation treatment on the surface of a Si single crystal substrate formed by cutting out a Si ingot to which impurities are added at a high concentration.
  • the electrode 222 is formed on the side surface of the Si single crystal substrate by the metallizing treatment. As a result, the electromagnetic shield layer 220 is produced.
  • the ceiling layer 210 and the electromagnetic shield layer 220 are joined to form a top plate 200.
  • the ceiling layer 210 and the electromagnetic shield layer 220 are joined via the Si oxide film 211 and the Si oxide film 221 to produce the top plate 200.
  • plasma activated low temperature bonding is used for bonding via the Si oxide films 211 and 221.
  • the bonding surfaces of the Si oxide films 211 and 221 are activated by plasma treatment at room temperature, and then the Si oxide films 211 and 221 are brought into close contact with each other. Then, by heat-treating at a low temperature of less than 1000 ° C.
  • the ceiling layer 210 and the electromagnetic shield layer 220 are joined via the Si oxide films 211 and 221.
  • room-temperature bonding may be performed by using an ion beam or the like to activate the bonding surface.
  • the joint surface of the Si oxide films 211 and 221 is flattened. May be done in advance. Since the Si oxide films 211 and 221 are formed by the thermal oxidation treatment used in the semiconductor manufacturing process as described above, they basically have high flatness.
  • the top plate 200 has an electromagnetic shield layer 220, electromagnetic waves generated by the light irradiation mechanism 140 pass through the ceiling layer 210, and the electrical device of the electronic device formed on the wafer W on the ceiling layer 210 is electrically operated. It can be prevented from affecting the characteristic inspection.
  • the electromagnetic shield layer 220 and the ceiling layer 210 are provided separately, but the ceiling layer 210 is composed of a Si single crystal substrate having a high concentration of impurities added and a high conductivity, and is a ceiling layer.
  • the 210 may also serve as the electromagnetic shield layer 220.
  • the heat capacity of the entire top plate can be suppressed while preventing the electromagnetic waves generated by the light irradiation mechanism 140 from being emitted from the wafer mounting surface 120a side of the stage 10.
  • a refrigerant groove is formed on the surface of the flow path forming member, and the refrigerant flow path is formed by covering the refrigerant groove with a top plate.
  • a refrigerant groove may be formed on the back surface of the top plate, and the refrigerant groove may be formed by covering the refrigerant groove with a flat plate-shaped flow path forming member.
  • the top plate is made of a Si single crystal substrate, but may be made of a Si polycrystalline substrate. Si single crystal substrates and Si polycrystalline substrates can be obtained at low cost due to the size of application fields in the semiconductor industry.
  • a mounting table on which the object to be inspected is placed.
  • the top plate on which the inspection object is placed on the surface A flow path forming member attached to the back surface of the top plate portion and forming a refrigerant flow path through which a refrigerant capable of transmitting light flows flows between the top plate portion and the top plate portion. It has a light irradiation mechanism which is arranged so as to face the inspection target body placed on the top plate portion via the flow path forming member and has a plurality of LEDs pointing to the inspection target body.
  • the flow path forming member is made of glass that can transmit light.
  • the top plate is a mounting table made of silicon.
  • the top plate portion while cooling the entire top plate portion by the refrigerant flowing through the refrigerant flow path, the top plate portion is locally irradiated with LED light to heat it, so that only the desired portion of the inspection object is heated. Other parts can be cooled while controlling the temperature.
  • the flow path forming member is formed of glass
  • the top plate portion is formed of silicon having a small difference in thermal expansion coefficient from glass. Therefore, the stress due to thermal expansion or contraction generated at the joint portion between the top plate portion and the flow path forming member is small. Therefore, the mounting table according to (1) can be used in a wide inspection temperature range.
  • the flow path forming member is made of glass and the top plate portion is made of silicon, joining by anode joining can be used for joining the flow path forming member and the top plate portion.
  • the joint portion formed by anode bonding has higher resistance to stress generated in the joint portion than the bonding portion made of epoxy resin or the like. Therefore, the mounting table according to (1) can be applied to a wider inspection temperature range.
  • the top plate is The ceiling layer on which the inspection object is placed on the surface, The above (1) to (5), further comprising an electromagnetic shield layer provided on the back surface side of the ceiling layer and blocking electromagnetic waves generated by the light irradiation mechanism from an inspection object placed on the ceiling layer.
  • the mounting table according to any one.
  • the above-mentioned stand has a top plate on which the inspection object is placed on the surface and a table.
  • a flow path forming member attached to the back surface of the top plate portion and forming a refrigerant flow path through which a refrigerant capable of transmitting light flows flows between the top plate portion and the top plate portion. It has a light irradiation mechanism which is arranged so as to face the inspection target body placed on the top plate portion via the flow path forming member and has a plurality of LEDs pointing to the inspection target body.
  • the manufacturing method is The step of forming the flow path forming member using glass capable of transmitting light, and The process of forming the top plate using silicon and A method for manufacturing a mounting table, which comprises a step of joining the flow path forming member and the top plate portion by anode joining.

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PCT/JP2020/018444 2019-05-10 2020-05-01 載置台及び載置台の作製方法 WO2020230674A1 (ja)

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