WO2018232698A1 - 阵列基板的制作设备及阵列基板的制作方法 - Google Patents

阵列基板的制作设备及阵列基板的制作方法 Download PDF

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Publication number
WO2018232698A1
WO2018232698A1 PCT/CN2017/089584 CN2017089584W WO2018232698A1 WO 2018232698 A1 WO2018232698 A1 WO 2018232698A1 CN 2017089584 W CN2017089584 W CN 2017089584W WO 2018232698 A1 WO2018232698 A1 WO 2018232698A1
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polysilicon
material layer
photoresist
layer
substrate
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PCT/CN2017/089584
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English (en)
French (fr)
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徐顺龙
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深圳市柔宇科技有限公司
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Priority to PCT/CN2017/089584 priority Critical patent/WO2018232698A1/zh
Priority to CN201780050103.0A priority patent/CN109643657B/zh
Publication of WO2018232698A1 publication Critical patent/WO2018232698A1/zh

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film

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  • the present invention relates to the field of display technologies, and in particular, to an apparatus for fabricating an array substrate and a method for fabricating the array substrate.
  • LTPS Low Temperature Poly-silicon
  • OLED Organic Light-Emitting Diode
  • the invention provides an apparatus for manufacturing an array substrate and a manufacturing method of the array substrate, which shortens the production cycle of the array substrate and reduces the cost of the product.
  • the fabrication device of the array substrate is used for converting an amorphous silicon material layer into a polysilicon material layer and a photoresist material layer laminated on the polysilicon material layer, comprising a photoresist coating device and being located at the photoresist coating A polysilicon conversion unit on one side of the device.
  • the amorphous silicon material layer is converted into a polysilicon material layer by the polysilicon conversion device, and the photoresist material layer laminated on the polysilicon layer is formed by the photoresist coating device.
  • the photoresist coating device includes a photoresist output port, and the polysilicon conversion device includes an emission port, and a distance between the photoresist output port and the emission port is smaller than a length of the substrate at the substrate.
  • the manufacturing method of the array substrate comprises the steps of:
  • the photoresist layer is peeled off.
  • the manufacturing apparatus of the array substrate provided by the present invention is disposed by placing a photoresist coating device and a polysilicon conversion device, and a distance between the photoresist output port and the emission port. Less than the length of the substrate at the substrate, such that the layer of the photoresist layer is laminated on the polysilicon material layer while the amorphous silicon material layer is converted into the polysilicon material layer, thereby shortening the substrate Production cycle, reducing the cost of the product.
  • FIG. 1 is a schematic structural view of an apparatus for fabricating an array substrate of the present invention
  • FIG. 2 is a flow chart showing a method of fabricating an array substrate according to an embodiment of the present invention
  • 3 and 5-8 are cross-sectional views of the array substrate in respective manufacturing processes of the array substrate according to an embodiment of the present invention.
  • FIG. 4 is a cross-sectional view of the array substrate during formation of a polysilicon material layer and a photoresist layer in the array substrate of FIG. 2.
  • an apparatus for fabricating an array substrate includes a polysilicon conversion device 10 and a photoresist coating device 20 .
  • the polysilicon conversion device 10 is disposed in close proximity to and against the photoresist coating device 20.
  • a substrate 30 is first provided, and an amorphous silicon material layer 31 is formed on the substrate 30.
  • the polysilicon conversion device 10 and the photoresist coating device 20 are disposed on one side of the amorphous silicon material layer 31 on the substrate 30.
  • the amorphous silicon is fabricated by the fabrication device of the array substrate
  • the material layer 31 is converted into a polysilicon material layer 32, and the polysilicon material layer 32 is patterned to obtain a patterned polysilicon layer 33.
  • the patterned polysilicon layer 33 is formed on the substrate 10, subsequent fabrication steps are performed.
  • the other manufacturing processes of the array substrate are the same as those of the prior art, and are not described herein again.
  • the polysilicon conversion device 10 is used to convert the amorphous silicon material layer 31 into a polysilicon material layer 32.
  • the polysilicon conversion device 10 is an excimer laser annealing device.
  • the polysilicon conversion device 10 emits laser pulses to the amorphous silicon material layer 31, and the amorphous silicon material layer 31 absorbs energy generated by the laser pulses to be converted into a polysilicon material layer 32.
  • the conversion of the amorphous silicon material layer 31 to the polysilicon material layer 32 is achieved at a lower temperature by excimer laser annealing, thereby reducing the requirement for high temperature resistance of the substrate.
  • the polysilicon conversion device 10 can also be a microwave emitter, and the microwave emitter emits microwaves to the amorphous silicon layer to realize the layer of the amorphous silicon material by microwave crystallization. 31 is converted to polysilicon material layer 32.
  • the polysilicon conversion device 10 may further be a pulse emitter, and the microwave emitter emits a pulse to the amorphous silicon material layer 31 to realize rapid thermal sintering of the amorphous silicon material layer 31, thereby realizing The amorphous silicon material layer 31 is converted into the polysilicon material layer 32.
  • the polysilicon conversion device 10 includes an emission port 11 located at a position on the polysilicon conversion device 10 near the substrate 30, and the laser, microwave, pulse, etc.
  • the emission port 11 is configured to emit laser light
  • the laser beam emitted from the emission port 11 is a linear laser
  • the linear laser beam is moved from one side of the amorphous silicon layer to the The other side of the amorphous silicon layer completes the gradual conversion of the amorphous silicon material layer 31 into the polysilicon material layer 32.
  • the photoresist coating device 20 is located on one side of the polysilicon conversion device 10 and disposed adjacent to the polysilicon conversion device 10.
  • the photoresist coating device 20 is configured to perform photoresist coating on the polysilicon material layer 32 to form a photoresist material layer 34 on the polysilicon material layer 32.
  • the photoresist material layer 34 is exposed and developed by a photomask having a certain hollow pattern, and the pattern on the photomask is transferred onto the photoresist material layer 34 to obtain a patterned photoresist layer.
  • the photoresist material of the photoresist material layer 34 is a negative photoresist, that is, the photoresist material layer 34 irradiated by the light is not dissolved, and the photoresist material layer 34 is not irradiated by the light. Dissolved. Therefore, the photoresist material layer 34 does not change with respect to the portion of the mask hollow pattern, and the photoresist material layer 34 is dissolved relative to the unmasked portion of the mask to expose the polysilicon material layer 32. Further, the polycrystalline The silicon material layer 32 is etched, and the polysilicon material layer 32 exposing the patterned photoresist layer is etched, and the polysilicon material layer 32 that is blocked by the patterned photoresist layer remains.
  • the patterned photoresist layer is stripped, that is, the patterned polysilicon layer 33 is obtained.
  • the photoresist material may also be a positive photoresist, that is, the photoresist material layer 34 irradiated by the light is dissolved, and the photoresist material layer 34 not irradiated by the light is not dissolved, and the same can be realized. Patterning of the photoresist layer 34.
  • the photoresist coating device 20 is a slit type photoresist coater.
  • the photoresist coating device 20 includes a photoresist output port 21 through which a photoresist is coated on the polysilicon layer 33 to form the photoresist material layer 34. Also, by controlling the size of the opening of the photoresist output port 21, the thickness of the photoresist layer 34 can be controlled.
  • the photoresist coating device 20 further includes a squeegee 22 on a side of the photoresist coating device 30 facing away from the polysilicon conversion device 10. Also, the distance between the squeegee 22 and the amorphous silicon layer 32 is the same as the thickness of the photoresist layer 34.
  • the photoresist output port 21 outputs the photoresist material on the amorphous silicon layer 32
  • the photoresist material is scraped by the squeegee 22 to uniformly planar the photoresist material layer 34. It is coated on the amorphous silicon material layer 31. Further, the thickness of the photoresist material layer 34 can be changed by adjusting the distance between the squeegee 22 and the amorphous silicon material layer 31.
  • the substrate 30 on which the amorphous silicon material layer 31 is formed is moved relative to the polysilicon conversion device 10 and the photoresist coating device 20, and the polysilicon conversion device A polysilicon material layer 32 is formed on the substrate 10, and the photoresist coating device 20 forms the photoresist material layer 34 on the formed polysilicon material layer 32.
  • the polysilicon conversion device 10 in the moving direction of the substrate 30, the polysilicon conversion device 10 is located in front of the photoresist coating device 20, that is, the substrate 30 passes through the polysilicon conversion device 10 and then passes through. The photoresist coating device 20.
  • a distance between the emission port 11 of the polysilicon conversion device 10 and the photoresist output port 21 of the photoresist coating device 20 is smaller than a length of the substrate in the moving direction of the substrate 30.
  • the substrate 30 is transported through a transport mechanism to achieve movement relative to the polysilicon conversion device 10 and the photoresist coating device 20.
  • the polysilicon conversion device 10 and the photoresist coating device 20 can also be disposed on the moving mechanism. After the substrate 30 is transferred to a fixed position, the polysilicon conversion device 10 and the photoresist are moved. The device 20 is applied to form a polysilicon material layer 32 and a photoresist material layer 34 on the substrate 30.
  • the A linear laser beam emitted from the emission port 11 of the polysilicon conversion device 10 converts the amorphous silicon material layer 31 into a polysilicon material layer 32, and as the substrate 30 moves relative to the polysilicon conversion device 10, The polysilicon material layer 32 is gradually formed from the end to the other end of the substrate 30; when the end of the substrate 30 passes through the photoresist coating device 20, the photoresist coating device 20 is formed by conversion. Photoresist coating is performed on the polysilicon material layer 32 to form the photoresist material layer 34.
  • the substrate 30 passes through at the same time.
  • the polysilicon conversion device 10 and the photoresist coating device 20 are such that the polysilicon material layer 32 and the photoresist material layer 34 are simultaneously formed.
  • the substrate 30 is first formed into the polysilicon material layer 32 through the polysilicon conversion device 10, and the substrate 30 on which the polysilicon material layer 32 is formed is moved to the photoresist coating device. 20 for the formation of the photoresist layer.
  • forming the photoresist material layer 34 while forming the polysilicon material layer 32 can shorten the production cycle of the substrate and reduce the cost of the product.
  • the present invention also provides a method for fabricating an array substrate, comprising forming a patterned polysilicon layer 33 on the substrate 30 .
  • the step of forming the patterned polysilicon layer 33 on the substrate 30 includes:
  • a substrate 30 formed with a layer 31 of amorphous silicon material is provided.
  • a substrate 30 is provided, and the amorphous silicon material layer 31 is formed on the substrate 30 by sputtering, low-pressure chemical vapor deposition, or the like, thereby obtaining the amorphous silicon material layer 31.
  • Substrate 30 is provided, and the amorphous silicon material layer 31 is formed on the substrate 30 by sputtering, low-pressure chemical vapor deposition, or the like, thereby obtaining the amorphous silicon material layer 31.
  • a photoresist material layer 34 is formed on the material layer 33.
  • the amorphous silicon material layer 31 is processed by the polysilicon conversion device 10, the amorphous silicon material layer 31 is converted into the polysilicon material layer 33, and the photoresist material layer is formed by coating by the photoresist coating device 20. 34.
  • the substrate 30 is moved relative to the polysilicon conversion device 10 and the photoresist coating device 20, and one end of the substrate 30 sequentially passes through the polysilicon conversion device 10 and the photoresist coating device. 20, to form the polysilicon material layer 32 and the photoresist material layer 34 on the substrate 30.
  • the photoresist coating device 20 is placed against the polysilicon conversion device 10.
  • the photoresist coating device 20 includes a photoresist output port 21, and the polysilicon conversion device 10 includes an emission port 11, and a distance between the photoresist output port 21 and the emission port 10 is smaller than a length of the substrate 30 in a moving direction of the substrate 30. That is, when the substrate 30 passes through the photoresist coating device 20, the substrate 30 is simultaneously located at one side of the polysilicon conversion device 10 and the photoresist coating device 20, so that the polysilicon conversion device 10 While the amorphous silicon material layer 31 is converted into the polysilicon material layer 32, the photoresist coating apparatus 20 forms a photoresist material layer 34 on the polysilicon material layer 32.
  • the substrate 30 is first formed into the polysilicon material layer 32 through the polysilicon conversion device 10, and the substrate 30 on which the polysilicon material layer 32 is formed is moved to the photoresist coating device. 20 for the formation of the photoresist layer.
  • forming the photoresist material layer 34 while forming the polysilicon material layer 32 can shorten the production cycle of the substrate and reduce the cost of the product.
  • the polysilicon conversion device 20 is an excimer laser annealing device.
  • the amorphous silicon material layer 31 is subjected to excimer laser annealing by the excimer laser annealing technique by the polysilicon conversion device 20 to convert the amorphous silicon material layer 31 into the polysilicon material layer 32.
  • the photoresist layer 34 is patterned to form a photoresist layer 35.
  • the photoresist layer 34 is patterned by exposure, development, and the like to obtain a photoresist layer 35.
  • the specific process of the steps of patterning the exposure, development, and the like of the photoresist layer 34 has been described in the above-mentioned fabrication apparatus of the array substrate, and details are not described herein.
  • the polysilicon material layer 32 is etched to obtain the patterned polysilicon layer 33 having the same pattern as the photoresist layer 35.
  • the polysilicon material layer 32 is etched by wet etching. The specific process has been disclosed in the prior art, and details are not described herein.
  • the photoresist layer 35 is peeled off.
  • the first insulating layer, the gate electrode, the second insulating layer, and the source and drain are sequentially formed on the polysilicon layer 33.
  • the poles, the common electrodes, and the like are formed in the same manner as in the prior art, and are not described herein again.
  • the distance between the photoresist output port 21 and the emission port 11 is smaller than the moving direction of the substrate 30.
  • the length of the substrate 30 is simultaneously passed through the polysilicon conversion device 10 and the photoresist coating device 20 such that the polysilicon material layer 32 and the photoresist material layer 34 are simultaneously formed.
  • the substrate 30 is first passed through the polysilicon conversion device 10 compared to the prior art.
  • the polysilicon material layer 32 is formed, and the substrate 30 on which the polysilicon material layer 32 is formed is moved to the photoresist coating device 20 to form a photoresist material layer.
  • the present invention forms the polysilicon material layer.
  • the formation of the photoresist layer 34 at the same time of 32 can shorten the production cycle of the substrate and reduce the cost of the product.

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Abstract

一种阵列基板的制作设备及阵列基板的制作方法，通过将光阻涂布装置（20）及多晶硅转化装置（10）紧邻并贴靠设置，并使光阻涂布装置（20）的光阻输出口（21）与多晶硅转化装置的发射口（11）之间的距离小于基板（30）移动方向的基板（30）的长度，使得基板（30）同时经过多晶硅转化装置（10）及光阻涂布装置（20），从而使得多晶硅材料层（32）与光阻材料层（34）同时形成，进而缩短基板的生产周期，降低产品的成本。

Description

阵列基板的制作设备及阵列基板的制作方法 技术领域
本发明涉及显示技术领域，尤其涉及一种阵列基板的制作设备及阵列基板的制作方法。
背景技术
在LTPS(Low Temperature Poly-silicon，低温多晶硅)显示基板制作或OLED(Organic Light-Emitting Diode，有机发光二极管)显示基板的制作过程中，需要先在基板上形成非晶硅材料层，再经由准分子镭射退火使该非晶硅材料层转化成多晶硅材料层。然后，再在所述多晶硅材料层上进行光阻涂布，之后通过曝光、显影及刻蚀等步骤将所述多晶硅材料层进行图案化。容易理解的是，制成所述LTPS显示基板或者所述OLED的显示基板的制程越多，制造单片所述LTPS显示基板或者所述OLED的显示基板的周期越长，进而会使产品的成本增加。
发明内容
本发明提供一种阵列基板的制作设备及一种阵列基板的制作方法，缩短所述阵列基板的生产周期，降低产品的成本。
所述阵列基板的制作设备用于将非晶硅材料层转化为多晶硅材料层及层叠于所述多晶硅材料层上的光阻材料层，其包括光阻涂布装置及位于所述光阻涂布装置一侧的多晶硅转化装置。通过所述多晶硅转化装置将非晶硅材料层转化为多晶硅材料层，通过所述光阻涂布装置形成层叠于所述多晶硅层上的光阻材料层。所述光阻涂布装置包括光阻输出口，所述多晶硅转化装置包括发射口，所述光阻输出口与所述发射口之间的距离小于所述基板在所述基板的长度。
所述阵列基板的制作方法包括步骤：
提供一形成有非晶硅材料层的基板；
将所述非晶硅材料层转化为多晶硅材料层，且在所述非晶硅材料层转化为所述多晶硅材料层的同时，在所述多晶硅材料层上形成光阻材料层；
图案化所述光阻材料层形成光阻层；
对所述多晶硅材料层进行蚀刻，得到与所述光阻层图案相同的多晶硅层；
剥离所述光阻层。
相对于现有技术，本发明提供的所述阵列基板的制作设备通过将光阻涂布装置及多晶硅转化装置贴靠设置，且所述所述光阻输出口与所述发射口之间的距离小于所述基板在所述基板的长度，使得在所述非晶硅材料层转化为所述多晶硅材料层的同时形成层叠于所述多晶硅材料层上的所述光阻材料层，从而缩短基板的生产周期，降低产品的成本。
附图说明
为了更清楚地说明本发明实施例中的技术方案，下面将对实施例中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本发明的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1是本发明的阵列基板的制作设备的结构示意图；
图2是本发明一实施例的阵列基板的制作方法的流程图；
图3及图5-8为本发明一实施例的阵列基板的各个制造流程中所述阵列基板的剖面图。
图4为图2所述阵列基板中多晶硅材料层及光阻材料层形成过程中的所述阵列基板的剖面图。
具体实施方式
下面将结合本发明实施方式中的附图，对本发明实施方式中的技术方案进行清楚、完整地描述。
请参阅图1，本发明所述阵列基板的制作设备，包括多晶硅转化装置10及光阻涂布装置20。所述多晶硅转化装置10紧邻并贴靠所述光阻涂布装置20设置。制作所述阵列基板时，先提供一基板30，并在所述基板30上形成非晶硅材料层31。将所述多晶硅转化装置10及光阻涂布装置20设于所述基板30上所述非晶硅材料层31的一侧。通过所述阵列基板的制作设备将所述非晶硅 材料层31转化为多晶硅材料层32，并将所述多晶硅材料层32进行图案化得到图案化的多晶硅层33。在所述基板10上形成所述图案化的多晶硅层33后再进行后续的其它制作工序。其中，所述阵列基板制作的所述其它制作工序与现有技术相同，在此不再进行赘述。
所述多晶硅转化装置10用于将非晶硅材料层31转化为多晶硅材料层32。本实施例中，所述多晶硅转化装置10为准分子激光退火器。所述多晶硅转化装置10通过向所述非晶硅材料层31发射激光脉冲，所述非晶硅材料层31吸收所述激光脉冲产生的能量，从而转化形成多晶硅材料层32。通过准分子激光退火的方式实现在较低的温度下实现所述非晶硅材料层31向多晶硅材料层32的转化，从而降低对基板耐高温性能的要求。可以理解的是，所述多晶硅转化装置10还可以为微波发射器，通过所述微波发射器向所述非晶硅层发射微波，实现通过微波有道晶化法促使所述非晶硅材料层31转化为多晶硅材料层32。或者，所述多晶硅转化装置10还可以为脉冲发射器，通过所述微波发射器向所述非晶硅材料层31发射脉冲，实现所述非晶硅材料层31的脉冲快速热烧结，进而实现所述非晶硅材料层31转化为所述多晶硅材料层32。本实施例中，所述多晶硅转化装置10包括发射口11，所述发射口11位于所述多晶硅转化装置10上靠近所述基板30的位置，通过所述发射口11发射激光、微波或脉冲等，从而实现将所述非晶硅材料层31转化为多晶硅材料层32。本实施例中，所述发射口11用于发射激光，且所述发射口11发射出的激光束为线性激光，线性的所述激光束从所述非晶硅层的一侧移动至所述非晶硅层的另一侧，从而完成所述非晶硅材料层31逐渐转化为所述多晶硅材料层32。
所述光阻涂布装置20位于所述多晶硅转化装置10的一侧并贴靠所述多晶硅转化装置10设置。所述光阻涂布装置20用于在所述多晶硅材料层32上进行光阻涂布，从而在所述多晶硅材料层32上形成光阻材料层34。通过具有一定镂空图案的光罩对所述光阻材料层34进行曝光显影，将所述光罩上的图案转移至所述光阻材料层34上，即得到图案化的光阻层。本实施例中，所述光阻材料层34的光阻材料为负光阻，即被光线照射到的所述光阻材料层34不溶解，没有被光线照射到的所述光阻材料层34溶解。因此，所述光阻材料层34相对所述光罩镂空图案的部分不发生变化，而相对所述光罩未镂空部分的所述光阻材料层34进行溶解，露出所述多晶硅材料层32。进一步的，对所述多晶 硅材料层32进行蚀刻，露出所述图案化的光阻层的所述多晶硅材料层32被蚀刻，被所述图案化的光阻层遮挡的所述多晶硅材料层32仍然保留。蚀刻完成后，将所述图案化的光阻层进行剥离，即得图案化的所述多晶硅层33。可以理解的是，所述光阻材料还可以为正光阻，即被光线照射到的所述光阻材料层34溶解，没有被光线照射到的所述光阻材料层34不溶解，同样可以实现所述光阻材料层34的图案化。
本实施例中，所述光阻涂布装置20为狭缝式的光阻涂布机。所述光阻涂布装置20包括光阻输出口21，通过所述光阻输出口21向所述多晶硅层33上涂布光阻形成所述光阻材料层34。并且，通过控制所述光阻输出口21的开口大小，可以控制所述光阻材料层34的厚度。进一步的，所述光阻涂布装置20还包括一刮板22，所述刮板22位于所述光阻涂布装置30上背离所述多晶硅转化装置10的一侧。并且，所述刮板22与所述非晶硅层32之间的距离与所述光阻材料层34的厚度相同。在所述光阻输出口21在所述非晶硅层32上输出光阻材料后，通过所述刮板22将所述光阻材料进行刮涂，从而将所述光阻材料层34均匀的涂覆与所述非晶硅材料层31上。进一步的，通过调整所述刮板22与所述非晶硅材料层31之间的距离可以改变所述光阻材料层34的厚度。
本发明中，在所述阵列基板的制作时，形成有所述非晶硅材料层31的所述基板30相对所述多晶硅转化装置10及光阻涂布装置20进行移动，所述多晶硅转化装置10在所述基板10上形成多晶硅材料层32，所述光阻涂布装置20在形成的所述多晶硅材料层32上形成所述光阻材料层34。进一步的，本发明中，在所述基板30的移动方向上，所述多晶硅转化装置10位于所述光阻涂布装置20的前方，即所述基板30先经过所述多晶硅转化装置10再经过所述光阻涂布装置20。并且，所述多晶硅转化装置10的发射口11与所述光阻涂布装置20的光阻输出口21之间的距离小于所述基板30移动方向的所述基板的长度。本实施例中，所述基板30通过一传输机构进行传输，以实现相对所述多晶硅转化装置10及光阻涂布装置20的移动。可以理解的是，还可以将所述多晶硅转化装置10及光阻涂布装置20设于以移动机构上，当所述基板30传输至一固定位置后，移动所述多晶硅转化装置10及光阻涂布装置20，从而在所述基板30上形成多晶硅材料层32及光阻材料层34。
本实施例中，所述基板30的一端移动至所述多晶硅转化装置10时，所述 多晶硅转化装置10的所述发射口11发射的线性的激光束将所述非晶硅材料层31转化为多晶硅材料层32，并随着所述基板30相对所述多晶硅转化装置10的移动，所述多晶硅材料层32从所述基板30的该端至另一端逐渐形成；当所述基板30的该端经过所述光阻涂布装置20时，所述光阻涂布装置20在转化形成的所述多晶硅材料层32上进行光阻涂布以形成所述光阻材料层34。由于所述多晶硅转化装置10的发射口11与所述光阻涂布装置20的光阻输出口21之间的距离小于所述基板30移动方向的所述基板的长度，所述基板30同时经过所述多晶硅转化装置10及光阻涂布装置20，从而使得所述多晶硅材料层32与所述光阻材料层34同时形成。相比于现有技术中将所述基板30先经过所述多晶硅转化装置10形成多晶硅材料层32，再将形成有所述多晶硅材料层32的所述基板30移动至所述光阻涂布装置20形成光阻层的方案来说。本实施例中，在形成所述多晶硅材料层32的同时形成所述光阻材料层34，可以缩短基板的生产周期，降低产品的成本。
请参阅图2，本发明还提供一种阵列基板的制作方法，包括在基板30上形成图案化的多晶硅层33。在所述基板30上形成所述图案化的多晶硅层33的步骤包括：
201、提供一形成有非晶硅材料层31的基板30。
请参阅图3，提供一所述基板30，通过溅镀、低压化学气相沉积等方式在所述基板30上形成所述非晶硅材料层31，即得到所述形成有非晶硅材料层31的基板30。
202、请参阅图4-5，将所述非晶硅材料层31转化为多晶硅材料层33，且在所述非晶硅材料层31转化为所述多晶硅材料层33的同时，在所述多晶硅材料层33上形成光阻材料层34。
通过多晶硅转化装置10处理所述非晶硅材料层31，使所述非晶硅材料层31转化为所述多晶硅材料层33，并通过光阻涂布装置20涂布形成所述光阻材料层34。本实施例中，所述基板30相对所述多晶硅转化装置10及所述光阻涂布装置20进行移动，所述基板30的一端依次经过所述多晶硅转化装置10及所述光阻涂布装置20，以在所述基板30上形成所述多晶硅材料层32及所述光阻材料层34。本发明中，所述光阻涂布装置20与所述多晶硅转化装置10贴靠在一起。所述光阻涂布装置20包括光阻输出口21，所述多晶硅转化装置 10包括发射口11，所述光阻输出口21与所述发射口10之间的距离小于所述基板30移动方向的所述基板30的长度。即所述基板30经过所述光阻涂布装置20时，所述基板30同时位于所述所述多晶硅转化装置10及光阻涂布装置20的一侧，使得所述所述多晶硅转化装置10将所述非晶硅材料层31转化为多晶硅材料层32的同时，所述光阻涂布设备20在所述多晶硅材料层32上形成光阻材料层34。相比于现有技术中将所述基板30先经过所述多晶硅转化装置10形成多晶硅材料层32，再将形成有所述多晶硅材料层32的所述基板30移动至所述光阻涂布装置20形成光阻层的方案来说。本实施例中，在形成所述多晶硅材料层32的同时形成所述光阻材料层34，可以缩短基板的生产周期，降低产品的成本。
本实施例中，所述多晶硅转化装置20为准分子激光退火器。通过所述多晶硅转化装置20实现以准分子激光退火技术对所述非晶硅材料层31进行准分子激光退火，使所述非晶硅材料层31转化为所述多晶硅材料层32。
203、请参阅图6，图案化所述光阻材料层34形成光阻层35。
通过曝光、显影等步骤对所述光阻材料层34进行图案化，得到光阻层35。对所述光阻材料层34进行图案化的曝光、显影等步骤的具体过程在上述阵列基板的制作设备中已经进行了描述，此处不再进行赘述。
204、请参阅图7，对所述多晶硅材料层32进行蚀刻，得到与所述光阻层35图案相同的所述图案化的多晶硅层33。
本实施例中，通过湿法蚀刻对所述多晶硅材料层32进行蚀刻，其具体过程现有技术已经进行了揭示，此处不再进行赘述。
205、请参阅图8，剥离所述光阻层35。
进一步的，在上述步骤中形成所述多晶硅层33并剥离所述光阻层35后，还需要在所述多晶硅层33进行上依次形成第一绝缘层、栅极、第二绝缘层、源漏极、公共电极等，其具体形成方式与现有技术相同，此处不再进行赘述。
本发明中，通过将所述光阻涂布装置20及多晶硅转化装置10紧邻并贴靠设置，使得所述光阻输出口21与所述发射口11之间的距离小于所述基板30移动方向的所述基板30的长度，所述基板30同时经过所述多晶硅转化装置10及光阻涂布装置20，从而使得所述多晶硅材料层32与所述光阻材料层34同时形成。相比于现有技术中将所述基板30先经过所述多晶硅转化装置10 形成多晶硅材料层32，再将形成有所述多晶硅材料层32的所述基板30移动至所述光阻涂布装置20形成光阻材料层的方案来说，本发明在形成所述多晶硅材料层32的同时形成所述光阻材料层34，可以缩短基板的生产周期，降低产品的成本。
以上所述是本发明的优选实施例，应当指出，对于本技术领域的普通技术人员来说，在不脱离本发明原理的前提下，还可以做出若干改进和润饰，这些改进和润饰也视为本发明的保护范围。

Claims (10)

  1. 一种阵列基板的制作设备，用于将非晶硅材料层转化为多晶硅材料层及在所述多晶硅材料层上形成光阻材料层，其特征在于，包括光阻涂布装置及贴靠于所述光阻涂布装置一侧的多晶硅转化装置；所述多晶硅转化装置将非晶硅材料层转化为多晶硅材料层，所述光阻涂布装置形成层叠于所述多晶硅层上的光阻材料层；所述光阻涂布装置包括光阻输出口，所述多晶硅转化装置包括发射口，所述光阻输出口与所述发射口之间的距离小于所述基板在所述基板的长度。
  2. 如权利要求1所述的阵列基板的制作设备，其特征在于，所述非晶硅材料层及所述光阻材料层依次形成于一基板上，所述基板相对所述多晶硅转化装置及所述光阻涂布装置沿一个方向进行移动，所述多晶硅转化装置及所述光阻涂布装置位于所述基板的移动方向上；且在所述基板的移动方向上，所述多晶硅转化装置位于所述光阻涂布装置前方。
  3. 如权利要求1所述的阵列基板的制作设备，其特征在于，所述多晶硅转化装置为准分子激光退火器。
  4. 如权利要求1所述的阵列基板的制作设备，其特征在于，所述光阻涂布装置包括一刮板，所述刮板位于所述光阻涂布装置上背离所述多晶硅转化装置的一侧，且所述刮板与所述非晶硅层之间的距离与所述光阻层的厚度相同。
  5. 一种阵列基板的制作方法，其特征在于，包括步骤：
    提供一形成有非晶硅材料层的基板；
    将所述非晶硅材料层转化为多晶硅材料层，且在所述非晶硅材料层转化为所述多晶硅材料层的同时，在所述多晶硅材料层上形成光阻材料层；
    图案化所述光阻材料层形成光阻层；
    对所述多晶硅材料层进行蚀刻，得到与所述光阻层图案相同的多晶硅层；
    剥离所述光阻层。
  6. 如权利要求5所述的阵列基板的制作方法，其特征在于，所述“将所述非晶硅材料层转化为多晶硅材料层”的步骤中，采用多晶硅转化装置处理所述非晶硅材料层，从而将所述非晶硅材料层转化为多晶硅材料层。
  7. 如权利要求6所述的阵列基板的制作方法，其特征在于，所述“在所 述非晶硅材料层转化为所述多晶硅材料层的同时，在多晶硅材料层上形成光阻材料层”的步骤中，采用光阻涂布装置在所述多晶硅材料层上形成所述光阻材料层。
  8. 如权利要求7所述的阵列基板的制作方法，其特征在于，在“将所述非晶硅材料层转化为多晶硅材料层，且在所述非晶硅材料层转化为所述多晶硅材料层的同时，在所述多晶硅材料层上形成光阻材料层”的步骤中，所述基板相对所述多晶硅转化装置及所述光阻涂布装置进行移动，所述基板的一端依次经过所述多晶硅转化装置及所述光阻涂布装置，以在所述基板上形成所述多晶硅层及所述光阻层。
  9. 如权利要求8所述的阵列基板的制作方法，其特征在于，在“将所述非晶硅材料层转化为多晶硅材料层，且在所述非晶硅材料层转化为所述多晶硅材料层的同时，在所述多晶硅材料层上形成光阻材料层”的步骤中，所述光阻涂布装置与所述多晶硅转化装置贴靠在一起，所述光阻涂布装置包括光阻输出口，所述多晶硅转化装置包括发射口，所述光阻输出口与所述发射口之间的距离小于所述基板在所述基板的移动方向上的长度。
  10. 如权利要求6所述的阵列基板的制作方法，其特征在于，通过准分子激光退火技术对所述非晶硅材料层进行准分子激光退火，使所述非晶硅材料层转化为所述多晶硅材料层。
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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6884672B1 (en) * 2003-11-04 2005-04-26 International Business Machines Corporation Method for forming an electronic device
CN103390592A (zh) * 2013-07-17 2013-11-13 京东方科技集团股份有限公司 阵列基板制备方法、阵列基板以及显示装置
CN103681244A (zh) * 2013-12-25 2014-03-26 深圳市华星光电技术有限公司 低温多晶硅薄膜的预清洗方法及其制备方法、制作系统
CN103839826A (zh) * 2014-02-24 2014-06-04 京东方科技集团股份有限公司 一种低温多晶硅薄膜晶体管、阵列基板及其制作方法

Family Cites Families (38)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2170121A1 (en) * 1972-03-24 1973-09-14 Sauvage Joseph Semiconductor device - with pn-junctions for fabricating eg transistor
JP2000133811A (ja) * 1998-10-28 2000-05-12 Sony Corp 薄膜トランジスタの製造方法
JP2001051301A (ja) * 1999-08-13 2001-02-23 Sony Corp 液晶表示パネルの製造方法
KR100935671B1 (ko) * 2003-03-13 2010-01-07 삼성전자주식회사 박막 트랜지스터 표시판 및 그의 제조 방법
US7364952B2 (en) * 2003-09-16 2008-04-29 The Trustees Of Columbia University In The City Of New York Systems and methods for processing thin films
KR100611764B1 (ko) * 2004-08-20 2006-08-10 삼성에스디아이 주식회사 박막트랜지스터의 제조 방법
JP4052295B2 (ja) * 2004-08-25 2008-02-27 セイコーエプソン株式会社 多層配線基板の製造方法、電子デバイス及び電子機器
CN1885164B (zh) * 2005-06-24 2010-04-07 友达光电股份有限公司 光阻涂布方法及其光阻涂布设备
CN100550400C (zh) * 2007-11-26 2009-10-14 友达光电股份有限公司 有源元件阵列基板及其制造方法
KR101134989B1 (ko) * 2009-05-15 2012-04-09 엘지디스플레이 주식회사 어레이 기판의 제조방법
EP2556539A4 (en) * 2010-04-06 2014-08-06 Kovio Inc EPITACTICAL STRUCTURES, METHOD FOR THEIR FORMING AND DEVICES THEREWITH
CN102543860B (zh) * 2010-12-29 2014-12-03 京东方科技集团股份有限公司 一种低温多晶硅tft阵列基板的制造方法
CN102709284A (zh) * 2011-05-27 2012-10-03 京东方科技集团股份有限公司 低温多晶硅薄膜晶体管阵列基板及其制作方法
EP2677187B1 (de) * 2012-06-18 2020-05-20 Oerlikon Friction Systems (Germany) GmbH Reibring, Synchronisierungseinheit, sowie ein Zahnräderwechselgetriebe für ein Fahrzeug
CN103594373B (zh) * 2012-08-17 2017-03-08 中国科学院微电子研究所 半导体器件制造方法
CN103887328B (zh) * 2012-12-21 2017-12-22 厦门天马微电子有限公司 薄膜晶体管阵列基板、液晶显示装置及制造方法
CN103172271B (zh) * 2013-03-15 2015-11-25 京东方科技集团股份有限公司 一种涂布方法
CN104508807A (zh) * 2013-03-22 2015-04-08 深圳市柔宇科技有限公司 薄膜晶体管及其像素单元的制造方法
CN103700709B (zh) * 2013-12-27 2016-10-05 京东方科技集团股份有限公司 一种薄膜晶体管及其制备方法、阵列基板和显示器
CN103745954B (zh) * 2014-01-03 2017-01-25 京东方科技集团股份有限公司 显示装置、阵列基板及其制造方法
CN103972050A (zh) * 2014-05-14 2014-08-06 京东方科技集团股份有限公司 多晶硅薄膜、多晶硅薄膜晶体管及阵列基板的制备方法
CN103985638A (zh) * 2014-05-27 2014-08-13 京东方科技集团股份有限公司 一种低温多晶硅薄膜晶体管及其制备方法和显示器件
CN104218041B (zh) * 2014-08-15 2017-12-08 京东方科技集团股份有限公司 阵列基板及制备方法和显示装置
CN104319285A (zh) * 2014-10-27 2015-01-28 京东方科技集团股份有限公司 一种薄膜晶体管及其制备方法、阵列基板
CN105765724A (zh) * 2014-11-14 2016-07-13 深圳市柔宇科技有限公司 一种基于oled的tft阵列基板结构
CN104505340B (zh) * 2014-11-28 2017-12-26 信利（惠州）智能显示有限公司 一种低温多晶硅薄膜的制备方法
CN104538352A (zh) * 2014-12-31 2015-04-22 京东方科技集团股份有限公司 阵列基板及其制造方法、显示装置
CN104701250B (zh) * 2015-03-03 2018-01-16 深圳市华星光电技术有限公司 一种阵列基板的制作方法及阵列基板
CN104659072B (zh) * 2015-03-16 2017-07-28 京东方科技集团股份有限公司 阵列基板和阵列基板制作方法
JP6133939B2 (ja) * 2015-07-23 2017-05-24 株式会社日立製作所 半導体装置およびその製造方法
US9470652B1 (en) * 2015-09-15 2016-10-18 Freescale Semiconductor, Inc. Sensing field effect transistor devices and method of their manufacture
CN106571058A (zh) * 2015-10-10 2017-04-19 上海久银车库工程有限公司 基于智能移动终端的停车方法及系统
CN105355592B (zh) * 2015-10-15 2019-03-08 武汉华星光电技术有限公司 阵列基板及其制作方法
CN105655352B (zh) * 2016-01-14 2018-08-14 武汉华星光电技术有限公司 低温多晶硅tft阵列基板的制作方法
CN105514123B (zh) * 2016-01-28 2018-03-30 武汉华星光电技术有限公司 Ltps阵列基板的制作方法
CN105551967B (zh) * 2016-02-14 2019-04-30 武汉华星光电技术有限公司 N型薄膜晶体管的制作方法
CN105607371A (zh) * 2016-03-25 2016-05-25 京东方科技集团股份有限公司 阵列基板及其制作方法、显示面板
CN106449518A (zh) * 2016-10-14 2017-02-22 武汉华星光电技术有限公司 Ltps阵列基板的制造方法及阵列基板

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6884672B1 (en) * 2003-11-04 2005-04-26 International Business Machines Corporation Method for forming an electronic device
CN103390592A (zh) * 2013-07-17 2013-11-13 京东方科技集团股份有限公司 阵列基板制备方法、阵列基板以及显示装置
CN103681244A (zh) * 2013-12-25 2014-03-26 深圳市华星光电技术有限公司 低温多晶硅薄膜的预清洗方法及其制备方法、制作系统
CN103839826A (zh) * 2014-02-24 2014-06-04 京东方科技集团股份有限公司 一种低温多晶硅薄膜晶体管、阵列基板及其制作方法

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