WO2018220674A1 - 半導体装置および半導体装置の製造方法 - Google Patents
半導体装置および半導体装置の製造方法 Download PDFInfo
- Publication number
- WO2018220674A1 WO2018220674A1 PCT/JP2017/019908 JP2017019908W WO2018220674A1 WO 2018220674 A1 WO2018220674 A1 WO 2018220674A1 JP 2017019908 W JP2017019908 W JP 2017019908W WO 2018220674 A1 WO2018220674 A1 WO 2018220674A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- waveguide
- layer
- substrate
- semiconductor device
- conductive layer
- Prior art date
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 120
- 238000004519 manufacturing process Methods 0.000 title claims description 20
- 239000000758 substrate Substances 0.000 claims abstract description 72
- 238000005530 etching Methods 0.000 claims description 53
- 238000000034 method Methods 0.000 claims description 35
- 239000004642 Polyimide Substances 0.000 claims description 10
- 229920001721 polyimide Polymers 0.000 claims description 10
- 230000001681 protective effect Effects 0.000 claims description 10
- 238000001039 wet etching Methods 0.000 claims description 3
- 230000003287 optical effect Effects 0.000 description 6
- 238000005229 chemical vapour deposition Methods 0.000 description 4
- 239000011248 coating agent Substances 0.000 description 4
- 238000000576 coating method Methods 0.000 description 4
- 230000008878 coupling Effects 0.000 description 4
- 238000010168 coupling process Methods 0.000 description 4
- 238000005859 coupling reaction Methods 0.000 description 4
- 238000005520 cutting process Methods 0.000 description 4
- 229920002120 photoresistant polymer Polymers 0.000 description 4
- UMIVXZPTRXBADB-UHFFFAOYSA-N benzocyclobutene Chemical compound C1=CC=C2CCC2=C1 UMIVXZPTRXBADB-UHFFFAOYSA-N 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- 229910000530 Gallium indium arsenide Inorganic materials 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/02—Structural details or components not essential to laser action
- H01S5/026—Monolithically integrated components, e.g. waveguides, monitoring photo-detectors, drivers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/20—Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers
- H01S5/2054—Methods of obtaining the confinement
- H01S5/2081—Methods of obtaining the confinement using special etching techniques
- H01S5/2086—Methods of obtaining the confinement using special etching techniques lateral etch control, e.g. mask induced
-
- G—PHYSICS
- G02—OPTICS
- G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
- G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
- G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
- G02B6/12—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
- G02B6/12004—Combinations of two or more optical elements
-
- G—PHYSICS
- G02—OPTICS
- G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
- G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
- G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
- G02B6/12—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
- G02B6/13—Integrated optical circuits characterised by the manufacturing method
- G02B6/132—Integrated optical circuits characterised by the manufacturing method by deposition of thin films
-
- G—PHYSICS
- G02—OPTICS
- G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
- G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
- G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
- G02B6/12—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
- G02B6/13—Integrated optical circuits characterised by the manufacturing method
- G02B6/136—Integrated optical circuits characterised by the manufacturing method by etching
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
- H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/30604—Chemical etching
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31105—Etching inorganic layers
- H01L21/31111—Etching inorganic layers by chemical means
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76835—Combinations of two or more different dielectric layers having a low dielectric constant
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/02—Structural details or components not essential to laser action
- H01S5/0206—Substrates, e.g. growth, shape, material, removal or bonding
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/04—Processes or apparatus for excitation, e.g. pumping, e.g. by electron beams
- H01S5/042—Electrical excitation ; Circuits therefor
- H01S5/0421—Electrical excitation ; Circuits therefor characterised by the semiconducting contacting layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/20—Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers
- H01S5/22—Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers having a ridge or stripe structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/30—Structure or shape of the active region; Materials used for the active region
- H01S5/32—Structure or shape of the active region; Materials used for the active region comprising PN junctions, e.g. hetero- or double- heterostructures
- H01S5/323—Structure or shape of the active region; Materials used for the active region comprising PN junctions, e.g. hetero- or double- heterostructures in AIIIBV compounds, e.g. AlGaAs-laser, InP-based laser
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/40—Arrangement of two or more semiconductor lasers, not provided for in groups H01S5/02 - H01S5/30
- H01S5/4012—Beam combining, e.g. by the use of fibres, gratings, polarisers, prisms
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/40—Arrangement of two or more semiconductor lasers, not provided for in groups H01S5/02 - H01S5/30
- H01S5/4025—Array arrangements, e.g. constituted by discrete laser diodes or laser bar
- H01S5/4087—Array arrangements, e.g. constituted by discrete laser diodes or laser bar emitting more than one wavelength
-
- G—PHYSICS
- G02—OPTICS
- G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
- G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
- G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
- G02B6/12—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
- G02B2006/12083—Constructional arrangements
- G02B2006/12121—Laser
-
- G—PHYSICS
- G02—OPTICS
- G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
- G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
- G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
- G02B6/12—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
- G02B2006/12166—Manufacturing methods
- G02B2006/12173—Masking
-
- G—PHYSICS
- G02—OPTICS
- G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
- G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
- G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
- G02B6/12—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
- G02B6/122—Basic optical elements, e.g. light-guiding paths
- G02B6/125—Bends, branchings or intersections
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S2301/00—Functional characteristics
- H01S2301/17—Semiconductor lasers comprising special layers
- H01S2301/176—Specific passivation layers on surfaces other than the emission facet
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/02—Structural details or components not essential to laser action
- H01S5/0206—Substrates, e.g. growth, shape, material, removal or bonding
- H01S5/0208—Semi-insulating substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/10—Construction or shape of the optical resonator, e.g. extended or external cavity, coupled cavities, bent-guide, varying width, thickness or composition of the active region
- H01S5/1003—Waveguide having a modified shape along the axis, e.g. branched, curved, tapered, voids
- H01S5/1017—Waveguide having a void for insertion of materials to change optical properties
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/20—Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers
- H01S5/2054—Methods of obtaining the confinement
- H01S5/2081—Methods of obtaining the confinement using special etching techniques
- H01S5/209—Methods of obtaining the confinement using special etching techniques special etch stop layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/40—Arrangement of two or more semiconductor lasers, not provided for in groups H01S5/02 - H01S5/30
- H01S5/4025—Array arrangements, e.g. constituted by discrete laser diodes or laser bar
- H01S5/4031—Edge-emitting structures
Definitions
- the present invention relates to a semiconductor device and a method for manufacturing the semiconductor device.
- Patent Document 1 discloses an optical semiconductor element.
- this optical semiconductor element a plurality of island-shaped semiconductor intermediate layers having a thermal conductivity lower than that of the semiconductor substrate are provided between the semiconductor substrate and the optical waveguide layer. Gaps are formed between the plurality of island-shaped semiconductor intermediate layers. In this structure, temperature control of the optical waveguide layer is suitably performed.
- a conductive layer is generally provided between a waveguide layer that guides laser light and a substrate. At this time, current may spread from the coupling portion between the semiconductor laser and the waveguide to the conductive layer when the semiconductor laser is driven. For this reason, the characteristics of the semiconductor laser may become unstable and power consumption may increase.
- the present invention has been made to solve the above-described problems, and an object of the present invention is to obtain a semiconductor device and a method for manufacturing the semiconductor device that can reduce power consumption.
- a semiconductor device includes a substrate, a semiconductor laser provided on an upper surface of the substrate and emitting laser light, a first conductive layer provided on the upper surface of the substrate, and a first conductive layer.
- the buried layer is divided in the waveguide direction of the waveguide on both sides of the end connected to the semiconductor laser, so that an exposed portion where the substrate is exposed from the buried layer is provided.
- the part is provided with a divided region in which the first conductive layer is divided in the waveguide direction.
- a method of manufacturing a semiconductor device includes a step of forming a semiconductor laser that emits laser light on an upper surface of a substrate, a first conductive layer provided on the upper surface of the substrate, and the first conductive layer. And a step of forming a waveguide layer provided on the substrate and guiding the laser light, and a step of forming a buried layer surrounding the semiconductor laser and the waveguide on the upper surface of the substrate.
- a part of the buried layer is removed on both sides of an end of the waveguide connected to the semiconductor laser so that the buried layer is divided in a waveguide direction of the waveguide, and the substrate is Forming an exposed portion exposed from the layer; covering the semiconductor laser, the waveguide, the buried layer, and the exposed portion with an insulating film; and providing a plurality of openings in the insulating film.
- wet etching is performed using an etchant having a higher etching rate than the waveguide layer, and the first conductive layer is formed at the end.
- an etching step in which a parting region in which the first conductive layer is parted in the waveguide direction is provided at the end part.
- the first conductive layer provided between the substrate and the waveguide layer is divided in the waveguide direction at the end of the waveguide on the semiconductor laser side. For this reason, it is possible to suppress leakage of current from the semiconductor laser to the waveguide side through the first conductive layer. Therefore, power consumption can be reduced.
- the first conductive layer provided between the substrate and the waveguide layer is divided in the waveguide direction at the end of the waveguide on the semiconductor laser side. For this reason, it is possible to suppress leakage of current from the semiconductor laser to the waveguide side through the first conductive layer. Therefore, power consumption can be reduced.
- FIG. 1 is a plan view of a semiconductor device according to a first embodiment.
- FIG. 2 is a cross-sectional view of a semiconductor device obtained by cutting FIG. 1 along a line II.
- FIG. 4 is a cross-sectional view of a semiconductor device obtained by cutting FIG. 1 along the line III-IV. It is sectional drawing of the edge part of the waveguide which shows the state from which some embedding layers were removed. It is sectional drawing which shows the state in which the insulating film was formed.
- FIG. 6 is a plan view for explaining an opening forming step according to the first embodiment.
- FIG. 5 is a cross-sectional view illustrating the opening forming step of the first embodiment. 5 is a cross-sectional view illustrating an etching process of the first embodiment.
- FIG. 10 is a cross-sectional view illustrating the method for manufacturing the semiconductor device of the second embodiment.
- FIG. 10 is a cross-sectional view illustrating an etching process according to the second embodiment.
- FIG. 10 is a cross-sectional view of the semiconductor device of the third embodiment.
- FIG. 10 is a cross-sectional view of the semiconductor device of the fourth embodiment.
- a semiconductor device and a method for manufacturing the semiconductor device according to an embodiment of the present invention will be described with reference to the drawings.
- the same or corresponding components are denoted by the same reference numerals, and repeated description may be omitted.
- FIG. 1 is a plan view of a semiconductor device 100 according to the first embodiment.
- the semiconductor device 100 includes a substrate 20.
- the substrate 20 is an insulating substrate.
- the substrate 20 is made of i-InP.
- the semiconductor device 100 includes a semiconductor laser 12 that is provided on the upper surface of the substrate 20 and emits laser light.
- the semiconductor device 100 also includes a waveguide 16 that guides laser light emitted from the semiconductor laser 12.
- the semiconductor device 100 is an optical semiconductor element.
- the semiconductor device 100 includes four semiconductor lasers 12.
- the waveguide 16 has four input ends and one output end. A plurality of input ends of the waveguide 16 are respectively connected to the plurality of semiconductor lasers 12.
- the waveguide 16 combines a plurality of laser beams emitted from the plurality of semiconductor lasers 12 into one and emits them from the output end.
- the plurality of semiconductor lasers 12 emit laser beams having different wavelengths.
- the semiconductor device 100 is a four-wavelength integrated element capable of high-speed optical communication.
- the number of semiconductor lasers 12 included in the semiconductor device 100 may be one or more.
- the semiconductor device 100 includes an embedded layer 14 provided on the upper surface of the substrate 20 and surrounding the semiconductor laser 12 and the waveguide 16.
- the side surface of the semiconductor laser 12 and the side surface of the waveguide 16 are embedded in the embedded layer 14.
- the buried layer 14 is a current block layer.
- Exposed portions 18 where the substrate 20 is exposed from the buried layer 14 are provided on both sides of the end portion 17 connected to the semiconductor laser 12 of the waveguide 16.
- the exposed portion 18 is formed by dividing the buried layer 14 in the waveguide direction of the waveguide 16.
- the waveguide direction is a direction in which laser light is emitted from the semiconductor laser 12.
- the buried layer 14 is dug down to the substrate 20.
- the exposed portion 18 exposes the side surface of the end portion 17 of the waveguide 16 from the buried layer 14.
- the plurality of laser beams pass through the region where the buried layer 14 has been removed and are combined into one.
- the substrate 20 is provided with a groove 22 directly below the end portion 17.
- the groove 22 is wider in the direction perpendicular to the waveguide direction than the width of the waveguide 16.
- the groove 22 passes under the end portion 17 and extends from one to the other of the exposed portions 18 on both sides of the waveguide 16.
- FIG. 2 is a cross-sectional view of the semiconductor device 100 obtained by cutting FIG. 1 along the line I-II.
- a first conductive layer 24 is provided on the upper surface of the substrate 20.
- the first conductive layer 24 is an epitaxial growth layer.
- the first conductive layer 24 is made of n-InP.
- a light emitting layer 26 is provided on the first conductive layer 24.
- the light emitting layer 26 emits laser light.
- the light emitting layer 26 is made of AlGaInAs.
- a waveguide layer 32 is provided on the first conductive layer 24 adjacent to the light emitting layer 26.
- the waveguide layer 32 guides the laser light emitted from the light emitting layer 26.
- the waveguide layer 32 is made of InGaAsP.
- a second conductive layer 28 is provided on the light emitting layer 26 and the waveguide layer 32.
- the second conductive layer 28 is an epitaxial growth layer.
- the second conductive layer 28 is made of p-InP.
- an electrode forming epilayer 30 is provided on the light emitting layer 26.
- the electrode forming epitaxial layer 30 is an epitaxially grown layer.
- the electrode forming epi layer 30 is made of P-InGaAs.
- the first conductive layer 24, the light emitting layer 26, the second conductive layer 28, and the electrode forming epilayer 30 constitute the semiconductor laser 12.
- the first conductive layer 24, the waveguide layer 32, and the second conductive layer 28 constitute the waveguide 16.
- a dividing region 23 is provided in the end portion 17 connected to the semiconductor laser 12 of the waveguide 16.
- the first conductive layer 24 is divided in the waveguide direction.
- the first conductive layer 24 is removed.
- the groove 22 is provided immediately below the dividing region 23.
- a cavity 25 is formed between the waveguide layer 32 and the substrate 20.
- FIG. 3 is a cross-sectional view of the semiconductor device 100 obtained by cutting FIG. 1 along the line III-IV.
- the first conductive layer 24 is removed.
- a groove 22 is formed on the upper surface of the substrate 20 immediately below the dividing region 23. For this reason, a structure in which the waveguide 16 floats above the substrate 20 in a sectional view is formed in the dividing region 23.
- the removed portions of the first conductive layer 24 and the substrate 20 are indicated by broken lines.
- the semiconductor laser 12 is formed on the upper surface of the substrate 20.
- the waveguide 16 is formed on the upper surface of the substrate 20.
- the buried layer 14 surrounding the semiconductor laser 12 and the waveguide 16 is formed on the upper surface of the substrate 20.
- FIG. 4 is a cross-sectional view of the end portion 17 of the waveguide 16 showing a state in which a part of the buried layer 14 is removed.
- a part of the buried layer 14 is removed so that the buried layer 14 is divided in the waveguide direction of the waveguide 16.
- the substrate 20 is exposed from the buried layer 14.
- a portion where the substrate 20 is exposed from the buried layer 14 is an exposed portion 18.
- a part of the buried layer 14 is removed so that the side surface of the waveguide 16 is exposed.
- the buried layer 14 is removed, so that the conductive layer other than the semiconductor laser 12 and the waveguide 16 is removed.
- FIG. 5 is a cross-sectional view showing a state in which the insulating film 34 is formed.
- the insulating film 34 is formed by a sputtering method or a P-CVD (Plasma Chemical Vapor Deposition) method with good coverage.
- P-CVD Pullasma Chemical Vapor Deposition
- FIG. 6 is a plan view for explaining the opening forming step of the first embodiment.
- FIG. 7 is a cross-sectional view illustrating the opening forming step of the first embodiment.
- a photoresist is formed on the insulating film 34.
- the photoresist is patterned. At this time, for example, openings are provided in the photoresist on both sides of the end portion 17.
- the insulating film is etched using the photoresist as a mask. Thereby, a plurality of openings 36 are provided in the insulating film 34.
- the plurality of openings 36 are respectively provided on both sides of the end portion 17 of the waveguide 16.
- the exposed portion 18 is exposed from the opening 36.
- FIG. 8 is a cross-sectional view illustrating the etching process of the first embodiment.
- wet etching is performed using the insulating film 34 as a mask.
- an etching solution having a higher etching rate than the waveguide layer 32 is used for the first conductive layer 24.
- the etching solution has a higher etching rate with respect to the substrate 20 than the waveguide layer 32.
- an HBr-based or HCl-based etchant can be used.
- the substrate 20 is immersed in an etching solution. Thereby, isotropic etching is performed.
- the etching solution erodes the substrate 20 from the opening 36 and reaches the first conductive layer 24.
- the etching solution erodes the first conductive layer 24 and reaches the waveguide layer 32. Etching stops at the waveguide layer 32.
- the cavity 25 is formed between the waveguide 16 and the substrate 20 at the end portion 17.
- a portion removed by etching is indicated by a broken line.
- the etching of the InP layer out of the InP layer and the InGaAsP layer can be selectively promoted by using an HBr-based or HCl-based etching solution.
- a part of the first conductive layer 24 is removed at the end portion 17, and a dividing region 23 is provided in the end portion 17. Further, the substrate 20 is provided with a groove 22 immediately below the dividing region 23. The groove 22 passes directly under the dividing region 23 and extends from one to the other of the exposed portions 18 on both sides of the waveguide 16. In the dividing region 23, the waveguide 16 becomes a hollow waveguide.
- the buried layer 14 is removed on both sides of the end portion 17 of the waveguide 16, and the buried layer 14 is divided in the waveguide direction.
- the first conductive layer 24 is divided in the waveguide direction at the end 17 of the waveguide 16. Therefore, it is possible to suppress current leakage from the coupling portion between the semiconductor laser 12 and the waveguide 16 to the waveguide 16 side of the first conductive layer 24. As described above, in this embodiment, the characteristics of the semiconductor device 100 can be stabilized. In addition, power consumption of the semiconductor device 100 can be reduced.
- the semiconductor device 100 is a four-wavelength integrated element.
- the present embodiment is not limited to this, and can be applied to any structure in which a semiconductor laser and a waveguide are connected. This modification can be appropriately applied to the semiconductor device and the method for manufacturing the semiconductor device according to the following embodiments. Note that the semiconductor device and the method for manufacturing the semiconductor device according to the following embodiment have much in common with the first embodiment, and therefore, differences from the first embodiment will be mainly described.
- FIG. FIG. 9 is a cross-sectional view for explaining the method for manufacturing the semiconductor device 200 of the second embodiment.
- the structure of the substrate 220 is different from that of the first embodiment.
- An etching stop layer 238 is provided on the upper surface side of the substrate 220.
- the first conductive layer 24 is provided on the etching stop layer 238.
- the etching stop layer 238 is an insulating epitaxial growth layer.
- the etching stop layer 238 is made of i-InGaAsP. Further, the etching stop layer 238 is exposed from the buried layer 14 at the exposed portion 218.
- an opening forming step is performed.
- a plurality of openings 236 are provided in the insulating film 34 on both sides of the end portion 17 of the waveguide 16.
- the plurality of openings 236 are provided so as to expose the etching stop layer 238 and the first conductive layer 24.
- the first conductive layer 24 is exposed by removing the portion of the insulating film 34 covering the side surface of the first conductive layer 24.
- FIG. 10 is a cross-sectional view illustrating the etching process of the second embodiment.
- an etchant having an etching rate larger than that of the etching stop layer 238 relative to the first conductive layer 24 is used.
- the etching solution has a higher etching rate with respect to the first conductive layer 24 than the waveguide layer 32.
- an HBr-based etchant can be used.
- the etching stop layer 238 is provided on the substrate 220, so that the etching solution does not erode the substrate 220 and erodes the first conductive layer 24 from the opening 236. As in the first embodiment, when the etching solution reaches the waveguide layer 32, the etching stops.
- the divided region 23 in which the first conductive layer 24 is divided in the waveguide direction is formed at the end portion 17 of the waveguide 16.
- a cavity 225 is formed between the substrate 220 and the waveguide 16 immediately below the dividing region 23.
- the portion removed by etching is indicated by a broken line.
- the first conductive layer 24 can be removed in the etching process. Since the substrate 220 is not eroded, the uniformity of the coating film can be improved as compared with the first embodiment when a coating film is provided on the semiconductor device 200 in a later step. In addition, the strength of the semiconductor device 200 against external force can be improved as compared with the first embodiment.
- FIG. 11 is a cross-sectional view of the semiconductor device 300 according to the third embodiment.
- the waveguide 16 is surrounded by the protective insulating film 340 in a cross-sectional view.
- the protective insulating film 340 is formed on the end portion 17 of the waveguide 16 by a CVD (Chemical Vapor Deposition) film forming method.
- the waveguide 16 is surrounded by the protective insulating film 340 in the divided region 23 by using a CVD film forming method with good coverage.
- a structure in which the side surface and the back surface of the waveguide 16 are also covered with the protective insulating film 340 is obtained.
- the back surface of the waveguide 16 is a surface facing the substrate 20 of the waveguide 16.
- the end portion 17 of the waveguide 16 that is a hollow waveguide can be covered with the protective insulating film 340 by using a film formation method with good coverage.
- medical agent in a later process can be improved.
- the strength of the semiconductor device 300 with respect to the external force can be improved.
- the waveguide characteristics of the laser light can be stabilized.
- FIG. 12 is a cross-sectional view of the semiconductor device 400 according to the fourth embodiment.
- the semiconductor device 400 includes a polyimide 442 that fills the gap between the waveguide layer 32 and the substrate 20 in the dividing region 23.
- the polyimide 442 is provided so as to cover the semiconductor laser 12, the waveguide 16, the buried layer 14, and the exposed portion 18.
- the method for manufacturing the semiconductor device 400 according to the present embodiment includes a step of applying polyimide 442 to the semiconductor laser 12, the waveguide 16, the buried layer 14, and the exposed portion 18. Since the polyimide 442 is a coating film, the gap between the waveguide layer 32 and the substrate 20 is filled with the polyimide 442 in the dividing region 23.
- the gap between the waveguide layer 32 and the substrate 20 is filled with the coating film, chemical resistance in a later process can be improved.
- the strength of the semiconductor device 400 against an external force can be improved as compared with the first embodiment.
- the characteristics of laser light guiding can be stabilized.
- BCB Benzocyclobutene
- the technical features described in each embodiment may be used in appropriate combination.
Landscapes
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Optics & Photonics (AREA)
- Engineering & Computer Science (AREA)
- Electromagnetism (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- General Chemical & Material Sciences (AREA)
- Geometry (AREA)
- Inorganic Chemistry (AREA)
- Semiconductor Lasers (AREA)
Abstract
Description
本願の発明に係る半導体装置の製造方法では、導波路の半導体レーザー側の端部で、基板と導波路層との間に設けられる第1導電性層が導波方向に分断される。このため、第1導電性層を通って半導体レーザーから導波路側に電流が漏れることを抑制できる。従って、消費電力を低減できる。
図1は、実施の形態1に係る半導体装置100の平面図である。半導体装置100は基板20を備える。基板20は、絶縁性基板である。基板20は、i-InPから形成される。半導体装置100は、基板20の上面に設けられ、レーザー光を発する半導体レーザー12を備える。また、半導体装置100は、半導体レーザー12が発するレーザー光を導波させる導波路16を備える。半導体装置100は光半導体素子である。
図9は、実施の形態2の半導体装置200の製造方法を説明する断面図である。実施の形態では、基板220の構造が実施の形態1と異なる。基板220の上面側には、エッチングストップ層238が設けられる。第1導電性層24は、エッチングストップ層238の上に設けられる。エッチングストップ層238は絶縁性のエピタキシャル成長層である。エッチングストップ層238は、i-InGaAsPから形成される。また、露出部218ではエッチングストップ層238が埋め込み層14から露出している。
図11は、実施の形態3の半導体装置300の断面図である。半導体装置300の分断領域23では、導波路16は断面視において保護絶縁膜340に取り囲まれる。本実施の形態に係る半導体装置300の製造方法では、分断領域23を形成した後に、CVD(Chemical Vapor Deposition)成膜法で導波路16の端部17に保護絶縁膜340を形成する。本実施の形態では、被覆性の良いCVD成膜法を用いることで、分断領域23で導波路16が保護絶縁膜340で取り囲まれる。このとき、導波路16の側面および裏面も保護絶縁膜340で覆われた構造が得られる。導波路16の裏面は導波路16の基板20と対向する面である。
図12は、実施の形態4の半導体装置400の断面図である。半導体装置400は、分断領域23で導波路層32と基板20との間を埋めるポリイミド442を備える。ポリイミド442は、半導体レーザー12、導波路16、埋め込み層14および露出部18を覆うように設けられる。本実施の形態に係る半導体装置400の製造方法は、半導体レーザー12、導波路16、埋め込み層14および露出部18にポリイミド442を塗布する工程を備える。ポリイミド442は塗布膜であるため、分断領域23において導波路層32と基板20との間はポリイミド442で埋められる。
Claims (10)
- 基板と、
前記基板の上面に設けられ、レーザー光を発する半導体レーザーと、
前記基板の上面に設けられた第1導電性層と、前記第1導電性層の上に設けられ前記レーザー光を導波させる導波路層と、を有する導波路と、
前記基板の上面に設けられ、前記半導体レーザーと前記導波路とを取り囲む埋め込み層と、
を備え、
前記導波路の前記半導体レーザーと接続される端部の両側には、前記埋め込み層が前記導波路の導波方向に分断されることで、前記基板が前記埋め込み層から露出した露出部が設けられ、
前記端部には、前記第1導電性層が前記導波方向に分断されている分断領域が設けられることを特徴とする半導体装置。 - 前記基板には、前記導波方向と垂直な方向の幅が前記導波路の幅よりも広い溝が、前記分断領域の直下に設けられることを特徴とする請求項1に記載の半導体装置。
- 前記基板の上面側には、エッチングストップ層が設けられ、
前記露出部では、前記エッチングストップ層が前記埋め込み層から露出していることを特徴とする請求項1に記載の半導体装置。 - 前記分断領域で、前記導波路は断面視において保護絶縁膜に取り囲まれることを特徴とする請求項1~3の何れか1項に記載の半導体装置。
- 前記分断領域で、前記導波路層と前記基板との間を埋めるポリイミドを備えることを特徴とする請求項1~3の何れか1項に記載の半導体装置。
- 基板の上面に、レーザー光を発する半導体レーザーを形成する工程と、
前記基板の上面に設けられた第1導電性層と、前記第1導電性層の上に設けられ前記レーザー光を導波させる導波路層と、を有する導波路を形成する工程と、
前記基板の上面に、前記半導体レーザーと前記導波路とを取り囲む埋め込み層を形成する工程と、
前記埋め込み層が前記導波路の導波方向に分断されるように、前記導波路の前記半導体レーザーと接続される端部の両側で前記埋め込み層の一部を除去し、前記基板が前記埋め込み層から露出した露出部を形成する工程と、
前記半導体レーザーと、前記導波路と、前記埋め込み層と、前記露出部と、を絶縁膜で覆う工程と、
前記絶縁膜に複数の開口を前記導波路の両側にそれぞれ設け、前記露出部を露出させる開口形成工程と、
前記絶縁膜をマスクとして、前記導波路層よりも前記第1導電性層に対してエッチングレートが大きいエッチング液を用いてウェットエッチングを行い、前記端部で前記第1導電性層の一部を除去し、前記第1導電性層が前記導波方向に分断された分断領域を前記端部に設けるエッチング工程と、
を備えることを特徴とする半導体装置の製造方法。 - 前記エッチング液は、前記導波路層よりも前記基板に対してエッチングレートが大きく、
前記エッチング工程では、前記導波方向と垂直な方向の幅が前記導波路の幅よりも広い溝が、前記基板の前記分断領域の直下に設けられることを特徴とする請求項6に記載の半導体装置の製造方法。 - 前記基板の上面側には、エッチングストップ層が設けられ、
前記開口形成工程では、前記エッチングストップ層と、前記第1導電性層と、を露出させるように前記複数の開口が設けられ、
前記エッチング液は、前記エッチングストップ層よりも前記第1導電性層に対してエッチングレートが大きいことを特徴とする請求項6に記載の半導体装置の製造方法。 - 前記分断領域で、前記導波路が断面視において保護絶縁膜で取り囲まれるように、CVD成膜法で前記保護絶縁膜を形成する工程を備えることを特徴とする請求項6~8の何れか1項に記載の半導体装置の製造方法。
- 前記分断領域で、前記導波路層と前記基板との間をポリイミドで埋める工程を備えることを特徴とする請求項6~8の何れか1項に記載の半導体装置の製造方法。
Priority Applications (6)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
PCT/JP2017/019908 WO2018220674A1 (ja) | 2017-05-29 | 2017-05-29 | 半導体装置および半導体装置の製造方法 |
CN201780091123.2A CN110731035B (zh) | 2017-05-29 | 2017-05-29 | 半导体装置及半导体装置的制造方法 |
DE112017007590.4T DE112017007590B4 (de) | 2017-05-29 | 2017-05-29 | Halbleitervorrichtung und Verfahren zum Herstellen einer Halbleitervorrichtung |
US16/485,425 US10784648B2 (en) | 2017-05-29 | 2017-05-29 | Semiconductor laser with waveguide flanked by conductive layers |
JP2019521539A JP6753526B2 (ja) | 2017-05-29 | 2017-05-29 | 半導体装置および半導体装置の製造方法 |
KR1020197034561A KR102177895B1 (ko) | 2017-05-29 | 2017-05-29 | 반도체 장치 및 반도체 장치의 제조 방법 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
PCT/JP2017/019908 WO2018220674A1 (ja) | 2017-05-29 | 2017-05-29 | 半導体装置および半導体装置の製造方法 |
Publications (1)
Publication Number | Publication Date |
---|---|
WO2018220674A1 true WO2018220674A1 (ja) | 2018-12-06 |
Family
ID=64455255
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/JP2017/019908 WO2018220674A1 (ja) | 2017-05-29 | 2017-05-29 | 半導体装置および半導体装置の製造方法 |
Country Status (6)
Country | Link |
---|---|
US (1) | US10784648B2 (ja) |
JP (1) | JP6753526B2 (ja) |
KR (1) | KR102177895B1 (ja) |
CN (1) | CN110731035B (ja) |
DE (1) | DE112017007590B4 (ja) |
WO (1) | WO2018220674A1 (ja) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE112017007590B4 (de) * | 2017-05-29 | 2023-05-04 | Mitsubishi Electric Corporation | Halbleitervorrichtung und Verfahren zum Herstellen einer Halbleitervorrichtung |
US11054574B2 (en) * | 2019-05-16 | 2021-07-06 | Corning Research & Development Corporation | Methods of singulating optical waveguide sheets to form optical waveguide substrates |
Citations (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS62213288A (ja) * | 1986-03-14 | 1987-09-19 | Oki Electric Ind Co Ltd | 半導体レ−ザ装置 |
JPH08186330A (ja) * | 1994-12-28 | 1996-07-16 | Nec Corp | 光増幅装置及びそれを用いた半導体レーザ装置,並びにそれらの駆動方法 |
US20030214991A1 (en) * | 2002-05-15 | 2003-11-20 | Joerg Wiedmann | Photonic integrated circuit |
JP2004235600A (ja) * | 2002-10-22 | 2004-08-19 | Fujitsu Ltd | 光半導体装置、その製造方法及びその駆動方法 |
JP2005266657A (ja) * | 2004-03-22 | 2005-09-29 | Sony Corp | 光導波路、光導波路装置及び光情報処理装置 |
JP2007243072A (ja) * | 2006-03-10 | 2007-09-20 | Toyota Central Res & Dev Lab Inc | 半導体光増幅器複合半導体レーザー装置 |
JP2008147209A (ja) * | 2006-12-06 | 2008-06-26 | Hitachi Ltd | 光半導体装置および光導波路装置 |
JP2009004488A (ja) * | 2007-06-20 | 2009-01-08 | Opnext Japan Inc | 光集積素子、及びその製造方法 |
Family Cites Families (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH067618B2 (ja) * | 1983-12-26 | 1994-01-26 | 株式会社東芝 | 半導体レ−ザ装置 |
US6052399A (en) * | 1997-08-29 | 2000-04-18 | Xerox Corporation | Independently addressable laser array with native oxide for optical confinement and electrical isolation |
JP2000312054A (ja) | 1998-04-28 | 2000-11-07 | Sharp Corp | 半導体素子の製造方法、及び半導体素子 |
JP2001053384A (ja) * | 1999-08-05 | 2001-02-23 | Fuji Photo Film Co Ltd | 半導体レーザ装置およびその製造方法 |
JP2002368334A (ja) * | 2001-03-26 | 2002-12-20 | Seiko Epson Corp | 面発光レーザ、フォトダイオード、それらの製造方法及びそれらを用いた光電気混載回路 |
JP4634047B2 (ja) * | 2004-01-23 | 2011-02-16 | パイオニア株式会社 | 集積型半導体発光素子及びその製造方法 |
KR100637929B1 (ko) * | 2004-11-03 | 2006-10-24 | 한국전자통신연구원 | 하이브리드형 광소자 |
JP2007048813A (ja) * | 2005-08-08 | 2007-02-22 | Mitsubishi Electric Corp | 半導体レーザ装置およびその製造方法 |
JP4272239B2 (ja) * | 2007-03-29 | 2009-06-03 | 三菱電機株式会社 | 半導体光素子の製造方法 |
JP2015170750A (ja) | 2014-03-07 | 2015-09-28 | 住友電気工業株式会社 | 光半導体素子及び光半導体素子の製造方法 |
KR102530560B1 (ko) * | 2016-08-26 | 2023-05-09 | 삼성전자주식회사 | 레이저빔 스티어링 소자 및 이를 포함하는 시스템 |
DE112017007590B4 (de) * | 2017-05-29 | 2023-05-04 | Mitsubishi Electric Corporation | Halbleitervorrichtung und Verfahren zum Herstellen einer Halbleitervorrichtung |
-
2017
- 2017-05-29 DE DE112017007590.4T patent/DE112017007590B4/de active Active
- 2017-05-29 US US16/485,425 patent/US10784648B2/en active Active
- 2017-05-29 WO PCT/JP2017/019908 patent/WO2018220674A1/ja active Application Filing
- 2017-05-29 KR KR1020197034561A patent/KR102177895B1/ko active IP Right Grant
- 2017-05-29 JP JP2019521539A patent/JP6753526B2/ja active Active
- 2017-05-29 CN CN201780091123.2A patent/CN110731035B/zh active Active
Patent Citations (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS62213288A (ja) * | 1986-03-14 | 1987-09-19 | Oki Electric Ind Co Ltd | 半導体レ−ザ装置 |
JPH08186330A (ja) * | 1994-12-28 | 1996-07-16 | Nec Corp | 光増幅装置及びそれを用いた半導体レーザ装置,並びにそれらの駆動方法 |
US20030214991A1 (en) * | 2002-05-15 | 2003-11-20 | Joerg Wiedmann | Photonic integrated circuit |
JP2004235600A (ja) * | 2002-10-22 | 2004-08-19 | Fujitsu Ltd | 光半導体装置、その製造方法及びその駆動方法 |
JP2005266657A (ja) * | 2004-03-22 | 2005-09-29 | Sony Corp | 光導波路、光導波路装置及び光情報処理装置 |
JP2007243072A (ja) * | 2006-03-10 | 2007-09-20 | Toyota Central Res & Dev Lab Inc | 半導体光増幅器複合半導体レーザー装置 |
JP2008147209A (ja) * | 2006-12-06 | 2008-06-26 | Hitachi Ltd | 光半導体装置および光導波路装置 |
JP2009004488A (ja) * | 2007-06-20 | 2009-01-08 | Opnext Japan Inc | 光集積素子、及びその製造方法 |
Also Published As
Publication number | Publication date |
---|---|
CN110731035B (zh) | 2021-07-09 |
JPWO2018220674A1 (ja) | 2019-11-21 |
KR102177895B1 (ko) | 2020-11-12 |
CN110731035A (zh) | 2020-01-24 |
JP6753526B2 (ja) | 2020-09-09 |
DE112017007590T5 (de) | 2020-02-20 |
US20200091675A1 (en) | 2020-03-19 |
US10784648B2 (en) | 2020-09-22 |
DE112017007590B4 (de) | 2023-05-04 |
KR20190141728A (ko) | 2019-12-24 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US20200335940A1 (en) | High-order bragg grating single-mode laser array | |
JP2008113041A (ja) | 導波管 | |
JP6206247B2 (ja) | 半導体装置の製造方法 | |
WO2018220674A1 (ja) | 半導体装置および半導体装置の製造方法 | |
JPH04100291A (ja) | 半導体装置の製造方法および、光半導体装置の製造方法 | |
US11886055B2 (en) | Low voltage modulator | |
JP2007109896A (ja) | 集積型光半導体装置とその製造方法 | |
US10063031B2 (en) | Method for manufacturing optical device | |
JP4147858B2 (ja) | 光デバイスおよびその製造方法 | |
JP5257281B2 (ja) | 半導体装置及びその製造方法 | |
CN111937259B (zh) | 半导体光元件、半导体光集成元件、及半导体光元件的制造方法 | |
KR19980058397A (ko) | Rwg 레이저 다이오드 및 그 제조 방법 | |
US6643315B2 (en) | Distributed feedback semiconductor laser device and multi-wavelength laser array | |
US20230102522A1 (en) | Semiconductor optical integrated element | |
US5949808A (en) | Semiconductor laser and method for producing the same | |
WO2019155679A1 (ja) | 光半導体素子およびその製造方法 | |
WO2024084708A1 (ja) | 半導体光導波路及びその製造方法 | |
JP7248152B2 (ja) | 半導体装置および半導体装置の製造方法 | |
US20050152418A1 (en) | Semiconductor laser device and method of fabricating the same | |
US20200326476A1 (en) | Semiconductor integrated optical device, and method of fabricating semiconductor integrated optical device | |
CN111971861B (zh) | 一种光学集成芯片 | |
JP2006134943A (ja) | 半導体レーザ素子及びその製造方法 | |
WO2018198193A1 (ja) | 半導体装置および半導体装置の製造方法 | |
JP2022101420A (ja) | 半導体光素子およびその製造方法 | |
JP2016092124A (ja) | 光変調器集積半導体レーザ |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
121 | Ep: the epo has been informed by wipo that ep was designated in this application |
Ref document number: 17911714 Country of ref document: EP Kind code of ref document: A1 |
|
ENP | Entry into the national phase |
Ref document number: 2019521539 Country of ref document: JP Kind code of ref document: A |
|
ENP | Entry into the national phase |
Ref document number: 20197034561 Country of ref document: KR Kind code of ref document: A |
|
122 | Ep: pct application non-entry in european phase |
Ref document number: 17911714 Country of ref document: EP Kind code of ref document: A1 |