WO2018205303A1 - 显示面板和显示装置 - Google Patents

显示面板和显示装置 Download PDF

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WO2018205303A1
WO2018205303A1 PCT/CN2017/085263 CN2017085263W WO2018205303A1 WO 2018205303 A1 WO2018205303 A1 WO 2018205303A1 CN 2017085263 W CN2017085263 W CN 2017085263W WO 2018205303 A1 WO2018205303 A1 WO 2018205303A1
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layer
semiconductor
compound
disposed
oxygen
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PCT/CN2017/085263
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English (en)
French (fr)
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卓恩宗
田轶群
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惠科股份有限公司
重庆惠科金渝光电科技有限公司
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Priority to US16/612,341 priority Critical patent/US11092864B2/en
Publication of WO2018205303A1 publication Critical patent/WO2018205303A1/zh

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    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136277—Active matrix addressed cells formed on a semiconductor substrate, e.g. of silicon
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
    • H01L29/4908—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET for thin film semiconductor, e.g. gate of TFT
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/133345—Insulating layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1222—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66742—Thin film unipolar transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66969—Multistep manufacturing processes of devices having semiconductor bodies not comprising group 14 or group 13/15 materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78684—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising semiconductor materials of Group IV not being silicon, or alloys including an element of the group IV, e.g. Ge, SiN alloys, SiC alloys
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/7869—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays

Definitions

  • the present application relates to the field of display technologies, and in particular, to a display panel, a process for displaying a display panel, and a display device.
  • the liquid crystal display has many advantages such as thin body, power saving, no radiation, and has been widely used.
  • Most of the liquid crystal displays on the market are backlight type liquid crystal displays, which include a liquid crystal panel and a backlight module.
  • the working principle of the liquid crystal panel is to place liquid crystal molecules in two parallel glass substrates, and apply a driving voltage on the two glass substrates to control the rotation direction of the liquid crystal molecules to refract the light of the backlight module to generate a picture.
  • a thin film transistor liquid crystal display includes a liquid crystal panel including a color filter substrate (CF Substrate, also referred to as a color filter substrate) and a thin film transistor array substrate (Thin Film Transistor Substrate, TFT Substrate).
  • CF Substrate also referred to as a color filter substrate
  • TFT Substrate Thin Film Transistor Substrate
  • a transparent electrode is present on the opposite inner side of the substrate.
  • a layer of liquid crystal molecules (LC) is sandwiched between the two substrates.
  • the liquid crystal panel controls the orientation of the liquid crystal molecules by an electric field, changes the polarization state of the light, and realizes the purpose of display by the penetration and blocking of the optical path by the polarizing plate.
  • OLED Organic Light-Emitting Diode
  • display adopts self-illumination of the light-emitting diode to display, and has the advantages of self-luminous, wide viewing angle, almost infinite contrast, low power consumption and high reaction speed.
  • OLED displays also need to be controlled by thin film transistors, but the thin film transistors of conventional amorphous silicon structures have low mobility and cannot be applied to OLED displays.
  • Another object of the present application is to provide a display device that improves semiconductor layer mobility.
  • the display panel includes:
  • a display panel comprising:
  • a substrate having a plurality of pixel regions
  • a second metal layer disposed on the semiconductor layer
  • the mobility of the semiconductor compound is greater than that of amorphous silicon.
  • the semiconductor compound of the semiconductor layer is an oxygen-rich cerium compound.
  • the semiconductor compound of the semiconductor layer is an oxygen-rich germanium silicon compound.
  • the semiconductor layer includes:
  • An active layer disposed on the insulating layer
  • An N-type doped layer disposed on the active layer
  • the active layer includes a base metal doped semiconductor compound.
  • the semiconductor compound of the active layer is an oxygen-rich cerium compound.
  • the semiconductor compound of the active layer is an oxygen-rich germanium silicon compound.
  • the N-type doped layer comprises an oxygen-rich cerium compound or an oxygen-rich cerium-silicon compound.
  • the insulating layer comprises an oxygen-rich germanium silicon compound.
  • the semiconductor layer includes an active layer disposed on the insulating layer, an N-type doped layer disposed on the active layer, and the second metal layer is covered with a passivation layer; the second metal layer a source metal layer and a drain metal layer disposed on the N-type doped layer; a channel further disposed above the active layer, the channel blocking the source metal layer and the drain metal layer and the N-type doping Miscellaneous layer
  • the insulating layer includes an oxygen-rich germanium silicon compound; both the active layer and the N-type doped layer include a germanium-doped semiconductor compound.
  • Germanium (Ge) is a gray-white metal that is shiny and hard. It belongs to the carbon family and has chemical properties similar to those of the same family of tin and silicon. In nature, there are five isotopes in the ⁇ , with atomic weights between 70 and 76. It can form many different organometallic compounds.
  • the conductive ability of germanium is superior to that of general non-metals, inferior to general metals, and has a melt density of 5.32 g/cm. It has good semiconductor properties such as electron mobility and hole mobility. Doping the germanium into the semiconductor layer of the thin film transistor can effectively improve the mobility and meet the requirements of the OLED display.
  • FIG. 1 is a schematic structural view of a display panel according to an embodiment of the present application.
  • FIG. 2 is a schematic structural view of a display panel according to another embodiment of the present application.
  • FIG. 3 is a schematic structural view of a display panel according to another embodiment of the present application.
  • FIG. 4 is a schematic diagram of electron/hole flow of a TFT of a display panel according to an embodiment of the present application.
  • FIG. 5 is a schematic diagram of TFT dual analysis of a display panel according to an embodiment of the present application.
  • FIG. 6 is a schematic flow chart of a method for manufacturing a display panel according to an embodiment of the present application.
  • FIG. 7 is a schematic structural diagram of a method of manufacturing a display panel according to an embodiment of the present application.
  • first and second may include one or more of the features either explicitly or implicitly.
  • a plurality means two or more unless otherwise stated.
  • the term “comprises” and its variations are intended to cover a non-exclusive inclusion.
  • connection In the description of the present application, it should be noted that the terms “installation”, “connected”, and “connected” are to be understood broadly, and may be fixed or detachable, for example, unless otherwise specifically defined and defined. Connected, or integrally connected; can be mechanical or electrical; can be directly connected, or indirectly connected through an intermediate medium, can be the internal communication of the two components.
  • Connected, or integrally connected can be mechanical or electrical; can be directly connected, or indirectly connected through an intermediate medium, can be the internal communication of the two components.
  • the specific meanings of the above terms in the present application can be understood in the specific circumstances for those skilled in the art.
  • the display panel disclosed in this embodiment includes a substrate 10, a first metal layer 11 disposed on the substrate 10, an insulating layer 30 disposed on the first metal layer 11, and a semiconductor layer 40 disposed on the insulating layer 30.
  • a semiconductor compound doped with a base metal a second metal layer 12; a second metal layer 12 disposed on the semiconductor layer 40; the semiconductor compound having a mobility greater than that of amorphous silicon.
  • amorphous silicon thin film transistors a-Si TFTs
  • the use of a semiconductor compound doped with a ruthenium metal may have a mobility of more than 1 cm 2 /Vs or even more than 2 cm 2 /Vs.
  • Germanium (Ge) is a gray-white metal that is shiny and hard. It belongs to the carbon family and has chemical properties similar to those of the same family of tin and silicon. In nature, there are five isotopes in the ⁇ , with atomic weights between 70 and 76. It can form many different organometallic compounds.
  • germanium is superior to that of general non-metals, inferior to general metals, and has a melt density of 5.32 g/cm. It has good semiconductor properties such as electron mobility and hole mobility. Doping the germanium into the semiconductor layer 40 of the thin film transistor can effectively improve the mobility and meet the requirements of the OLED display.
  • the display panel disclosed in this embodiment includes a substrate 10, a first metal layer 11 disposed on the substrate 10, an insulating layer 30 disposed on the first metal layer 11, and a semiconductor layer 40 disposed on the insulating layer 30.
  • a semiconductor compound doped with a base metal a second metal layer 12; a second metal layer 12 disposed on the semiconductor layer 40; the semiconductor compound having a mobility greater than that of amorphous silicon.
  • the semiconductor compound of the semiconductor layer 40 is an oxygen-rich germanium compound or an oxygen-rich germanium silicon compound, and the annealing temperature (Depo. Temp) of these compounds is generally between 170 ° C and 370 ° C. among them,
  • Oxygen-rich cerium compounds include, but are not limited to, GeOx; GeNx; GeOxNy; GeCx; GeOxCy; GeOxNyCz.
  • the oxygen-rich silicon compound includes, but is not limited to, SiGeOx; SiGeOxNy; SiGeNx; SiGeOxCy; SiGeCx; GeOxNyCz.
  • the display panel disclosed in this embodiment includes a substrate 10, a first metal layer 11 disposed on the substrate 10, an insulating layer 30 disposed on the first metal layer 11, and a semiconductor layer 40 disposed on the insulating layer 30.
  • a semiconductor compound doped with a base metal a second metal layer 12; a second metal layer 12 disposed on the semiconductor layer 40; the semiconductor compound having a mobility greater than that of amorphous silicon.
  • the semiconductor layer 40 includes an active layer 41 disposed on the insulating layer 30, and an N-type doped layer 42 disposed on the active layer 41; the active layer 41 includes a base metal doped semiconductor compound.
  • the semiconductor compound of the active layer 41 is an oxygen-rich cerium compound or an oxy-rich cerium compound, and the annealing temperature (Depo. Temp) of these compounds is generally between 170 ° C and 370 ° C. among them,
  • Oxygen-rich cerium compounds include, but are not limited to, GeOx; GeNx; GeOxNy; GeCx; GeOxCy; GeOxNyCz.
  • the oxygen-rich silicon compound includes, but is not limited to, SiGeOx; SiGeOxNy; SiGeNx; SiGeOxCy; SiGeCx; GeOxNyCz.
  • the display panel disclosed in this embodiment includes a substrate 10, a first metal layer 11 disposed on the substrate 10, an insulating layer 30 disposed on the first metal layer 11, and a semiconductor layer 40 disposed on the insulating layer 30.
  • a semiconductor compound doped with a base metal a second metal layer 12; a second metal layer 12 disposed on the semiconductor layer 40; the semiconductor compound having a mobility greater than that of amorphous silicon.
  • the semiconductor layer 40 includes an active layer 41 disposed on the insulating layer 30, and an N-type doping layer 42 disposed on the active layer 41; the active layer 41 and the N-type doping layer 42 include doping A semiconductor compound of a base metal.
  • the semiconductor compound of the active layer 41 and the N-type doped layer 42 is an oxygen-rich cerium compound or an oxy-rich cerium compound.
  • the annealing temperature (Depo. Temp) of these compounds is generally between 170 ° C and 370 ° C. among them,
  • Oxygen-rich cerium compounds include, but are not limited to, GeOx; GeNx; GeOxNy; GeCx; GeOxCy; GeOxNyCz.
  • the oxygen-rich silicon compound includes, but is not limited to, SiGeOx; SiGeOxNy; SiGeNx; SiGeOxCy; SiGeCx; GeOxNyCz.
  • the display panel disclosed in this embodiment includes a substrate 10, a first metal layer 11 disposed on the substrate 10, an insulating layer 30 disposed on the first metal layer 11, and a semiconductor disposed on the insulating layer 30.
  • the layer 40 includes a semiconductor compound doped with a base metal; a second metal layer 12; a second metal layer 12 disposed on the semiconductor layer 40; the mobility of the semiconductor compound is greater than that of amorphous silicon.
  • the semiconductor layer 40 includes an active layer 41 disposed on the insulating layer 30, and an N-type doped layer 42 disposed on the active layer 41; the active layer 41 and the N-type doped layer 42 include oxygen enrichment An antimony compound or an oxygen-rich germanium silicon compound; the insulating layer 30 includes an oxygen-rich germanium silicon compound.
  • the annealing temperature (Depo. Temp) of these compounds is generally between 170 ° C and 370 ° C. among them,
  • Oxygen-rich cerium compounds include, but are not limited to, GeOx; GeNx; GeOxNy; GeCx; GeOxCy; GeOxNyCz.
  • the oxygen-rich silicon compound includes, but is not limited to, SiGeOx; SiGeOxNy; SiGeNx; SiGeOxCy; SiGeCx; GeOxNyCz.
  • the display panel disclosed in this embodiment includes a substrate 10, a first metal layer disposed on the substrate 10, an insulating layer 30 disposed on the first metal layer, and a semiconductor layer 40 disposed on the insulating layer 30.
  • a semiconductor compound doped with a ruthenium metal a second metal layer; a second metal layer disposed on the semiconductor layer 40; the mobility of the semiconductor compound is greater than that of amorphous silicon.
  • the semiconductor layer 40 includes an active layer 41 disposed on the insulating layer 30, an N-type doped layer 42 disposed on the active layer 41, and the second metal layer is covered with a passivation layer 60; The layer 60 is covered with a display electrode 80.
  • the first metal layer is a gate metal layer 20; the second metal layer includes a source metal layer 51 and a drain metal layer 52 disposed on the N-type doping layer 42; A channel 70 is provided which blocks the source metal layer 51 and the drain metal layer 52 and the N-type doping layer 42.
  • the display electrode 80 overlying the drain metal layer 52 partially penetrates the passivation layer 60 and is electrically connected to the source metal layer 51.
  • the insulating layer 30 includes an oxygen-rich germanium silicon compound; both the active layer 41 and the N-type doped layer 42 include an oxygen-rich germanium compound or an oxygen-rich germanium silicon compound.
  • the annealing temperature (Depo. Temp) of these compounds is generally between 170 ° C and 370 ° C.
  • Oxygen-rich cerium compounds include, but are not limited to, GeOx; GeNx; GeOxNy; GeCx; GeOxCy; GeOxNyCz.
  • the oxygen-rich silicon compound includes, but is not limited to, SiGeOx; SiGeOxNy; SiGeNx; SiGeOxCy; SiGeCx; GeOxNyCz.
  • Figure 4 shows the flow direction of electrons and holes in an energized state, reflecting the high mobility of the TFT of the present application.
  • FIG. 5 a schematic diagram of a four-dimensional engineering design control of a TFT, showing a semiconductor (Semiconductor)
  • the duality between the (left side) and the dielectric (dielectrics) (right side) illustrates the necessity of applying a cerium-rich compound to the TFT, particularly the active layer 41 of the TFT.
  • the left side of the block diagram represents the dual-rich TFT [Duality Ge-rich TFT (G-TFT)], and the right side represents the nano-germanium (Ge-Nanomaterials) compound, with GeOx:Hy as an example.
  • A is a nano ⁇ [Nano-Ge (conc.)]
  • B is a GeOx matrix
  • C is an interface (Interfacial), such as a nano-Ge or a GeOx matrix of the active layer 41 / insulating layer 30.
  • D represents H2(conc)
  • T1 represents GeH4/N2O
  • T2 and T3 represent TFT reliability
  • T4 represents H2/GeH4.
  • the display panel disclosed in this embodiment includes a substrate 10, a first metal layer disposed on the substrate 10, an insulating layer 30 disposed on the first metal layer, and a semiconductor layer 40 disposed on the insulating layer 30.
  • a semiconductor compound doped with a ruthenium metal a second metal layer; a second metal layer disposed on the semiconductor layer 40; the mobility of the semiconductor compound is greater than that of amorphous silicon.
  • the semiconductor layer 40 includes an active layer 41 disposed on the insulating layer 30, an N-type doped layer 42 disposed on the active layer 41, and the second metal layer is covered with a passivation layer 60; The layer 60 is covered with a display electrode 80.
  • the first metal layer is a gate metal layer 20; the second metal layer includes a source metal layer 51 and a drain metal layer 52 disposed on the N-type doping layer 42; A channel 70 is provided which blocks the source metal layer 51 and the drain metal layer 52 and the N-type doping layer 42.
  • the display electrode 80 overlying the drain metal layer 52 partially penetrates the passivation layer 60 and is electrically connected to the source metal layer 51.
  • the insulating layer 30, the active layer 41 and the N-type doped layer 42 each comprise a GeOxNy compound; the annealing temperature is controlled between 170 ° C and 370 ° C.
  • the use of the same bismuth compound simplifies the process and reduces production costs.
  • Figure 4 shows the flow direction of electrons and holes in an energized state, reflecting the high mobility of the TFT of the present application.
  • FIG. 5 a schematic diagram of a four-dimensional engineering design control of a TFT, showing the duality between a semiconductor (left side) and a dielectric (dielectrics) (right side), illustrating a compound rich in antimony
  • the necessity of applying to the active layer 41 of a TFT, particularly a TFT is the dual-rich TFT [Duality Ge-rich TFT (G-TFT)], and the right side represents the nano-germanium (Ge-Nanomaterials) compound, with GeOx:Hy as an example.
  • A is a nano ⁇ [Nano-Ge (conc.)]
  • B is a GeOx matrix
  • C is an interface (Interfacial), such as a nano-Ge or a GeOx matrix of the active layer 41 / insulating layer 30.
  • D represents H2(conc)
  • T1 represents GeH4/N2O
  • T2 and T3 represent TFT reliability
  • T4 represents H2/GeH4.
  • the display panel of the embodiment of the present application may be any of the following: Twisted Nematic (TN) or Super Twisted Nematic (STN) type, In-Plane Switching (IPS) type, vertical Vertical Alignment (VA) type and curved panel.
  • TN Twisted Nematic
  • STN Super Twisted Nematic
  • IPS In-Plane Switching
  • VA vertical Vertical Alignment
  • the display panel in the embodiment of the present application can be used in a display device.
  • the display device in the embodiment of the present application includes the display panel described above.
  • the display panel is taken as an example for detailed description. It should be noted that the above display panel structure The description is equally applicable to the display device of the embodiment of the present application.
  • the display device of the embodiment of the present application may be a liquid crystal display or an OLED (Organic Light-Emitting Diode) display.
  • the liquid crystal display includes a backlight module, and the backlight module can be used as a light source for supplying sufficient light source with uniform brightness and distribution.
  • the backlight module of the embodiment can be For the front light type, it may also be a backlight type. It should be noted that the backlight module of the embodiment is not limited thereto.
  • the embodiment further discloses a method for manufacturing a display panel, including the steps of:
  • the insulating layer 30 includes an oxygen-rich germanium silicon compound; both the active layer 41 and the N-type doped layer 42 include an oxygen-rich germanium compound or an oxygen-rich germanium silicon compound.
  • Annealing temperature of these compounds (Depo. Temp) is generally between 170 ° C and 370 ° C.
  • Oxygen-rich cerium compounds include, but are not limited to, GeOx; GeNx; GeOxNy; GeCx; GeOxCy; GeOxNyCz.
  • the oxygen-rich silicon compound includes, but is not limited to, SiGeOx; SiGeOxNy; SiGeNx; SiGeOxCy; SiGeCx; GeOxNyCz.
  • the insulating layer 30, the active layer 41, and the N-type doped layer 42 are all made of GeOxNy compound, so as to simplify the process and reduce the production cost.

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Abstract

一种显示面板和显示装置。所述显示面板包括基板(10)，设置在基板(10)上的第一金属层(11)；设置在第一金属层(11)上的绝缘层(30)，设置在绝缘层(30)上的半导体层(40)，包括掺杂锗金属的半导体化合物；设置在半导体层(40)上的第二金属层(12)；所述半导体化合物的迁移率大于非晶硅。

Description

显示面板和显示装置 【技术领域】
本申请涉及显示技术领域，尤其涉及一种显示面板、显示面板的制程和显示装置。
【背景技术】
液晶显示器具有机身薄、省电、无辐射等众多优点，得到了广泛的应用。现有市场上的液晶显示器大部分为背光型液晶显示器，其包括液晶面板及背光模组(Backlight Module)。液晶面板的工作原理是在两片平行的玻璃基板当中放置液晶分子，并在两片玻璃基板上施加驱动电压来控制液晶分子的旋转方向，以将背光模组的光线折射出来产生画面。
其中，薄膜晶体管液晶显示器(Thin Film Transistor-Liquid Crystal Display，TFT-LCD)由于具有低的功耗、优异的画面品质以及较高的生产良率等性能，目前已经逐渐占据了显示领域的主导地位。同样，薄膜晶体管液晶显示器包含液晶面板和背光模组，液晶面板包括彩膜基板(Color Filter Substrate，CF Substrate，也称彩色滤光片基板)和薄膜晶体管阵列基板(Thin Film Transistor Substrate，TFT Substrate)，上述基板的相对内侧存在透明电极。两片基板之间夹一层液晶分子(Liquid Crystal，LC)。液晶面板是通过电场对液晶分子取向的控制，改变光的偏振状态，并藉由偏光板实现光路的穿透与阻挡，实现显示的目的。
另有一种OLED(Organic Light-Emitting Diode)显示器，采用机发光二极管自发光来进行显示，具有自发光、广视角、几乎无穷高的对比度、较低耗电、极高反应速度等优点。
OLED显示器也需要采用薄膜晶体管进行控制，但传统非晶硅结构的薄膜晶体管迁移率(mobility)较低，无法适用于OLED显示器。
【发明内容】
本申请的一个目的在于提供一种提高半导体层迁移率的显示面板。
本申请的另一个目的在于提供一种显示装置，其提高了半导体层迁移率。
为解决上述问题，本申请的实施例提供了显示面板包括：
一种显示面板，所述显示面板包括：
基板,具有多个像素区；
第一金属层，设置在基板上；
绝缘层，设置在第一金属层上，
半导体层，设置在绝缘层上，包括掺杂锗金属的半导体化合物；
第二金属层；设置在半导体层上；
所述半导体化合物的迁移率大于非晶硅。
进一步的，所述半导体层的半导体化合物为富氧锗化合物。
进一步的，所述半导体层的半导体化合物为富氧锗硅化合物。
进一步的，所述半导体层包括：
有源层，设置在绝缘层上；
N型掺杂层，设置在有源层上；
所述有源层包括掺杂锗金属的半导体化合物。
进一步的，所述有源层的半导体化合物为富氧锗化合物。
进一步的，所述有源层的半导体化合物为富氧锗硅化合物。
进一步的，所述N型掺杂层包括富氧锗化合物或富氧锗硅化合物。
进一步的，所述绝缘层包括富氧锗硅化合物。
进一步的，所述半导体层包括设置在绝缘层上的有源层，设置在有源层上的N型掺杂层，所述第二金属层上覆盖有钝化层；所述第二金属层包括设置在N型掺杂层上的源极金属层和漏极金属层；所述有源层上方还设有沟道，所述沟道隔断源极金属层和漏极金属层以及N型掺杂层；
所述绝缘层包括富氧锗硅化合物；所述有源层和N型掺杂层都包括掺杂锗金属的半导体化合物。
锗(Ge)是一种灰白色类金属，有光泽，质硬，属于碳族，化学性质与同族的锡与硅相近。在自然中，锗共有五种同位素，原子量在70至76之间。它能形成许多不同的有机金属化合物。锗的导电的本领优于一般非金属，劣于一般金属，熔密度为5.32克/cm，有着良好的半导体性质，如电子迁移率、空穴迁移率。将锗掺杂到薄膜晶体管的半导体层内，能有效提高迁移率，满足OLED显示的要求。
【附图说明】
所包括的附图用来提供对本申请实施例的进一步的理解，其构成了说明书的一部分，用于例示本申请的实施方式，并与文字描述一起来阐释本申请的原理。显而易见地，下面描述中的附图仅仅是本申请的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动性的前提下，还可以根据这些附图获得其他的附图。在附图中：
图1是本申请一个实施例显示面板的的结构示意图；
图2是本申请另一个实施例显示面板的结构示意图；
图3是本申请另一个实施例显示面板的结构示意图；
图4是本申请实施例显示面板的TFT的电子/空穴流动示意图；
图5是本申请实施例显示面板的TFT对偶分析示意图；
图6是本申请一个实施例显示面板的制造方法流程示意图
图7是本申请一个实施例显示面板的制造方法的过程结构示意图。
【具体实施方式】
这里所公开的具体结构和功能细节仅仅是代表性的，并且是用于描述本申请的示例性实施例的目的。但是本申请可以通过许多替换形式来具体实现，并且不应当被解释成仅仅受限于这里所阐述的实施例。
在本申请的描述中，需要理解的是，术语“中心”、“横向”、“上”、“下”、 “左”、“右”、“竖直”、“水平”、“顶”、“底”、“内”、“外”等指示的方位或位置关系为基于附图所示的方位或位置关系，仅是为了便于描述本申请和简化描述，而不是指示或暗示所指的装置或元件必须具有特定的方位、以特定的方位构造和操作，因此不能理解为对本申请的限制。此外，术语“第一”、“第二”仅用于描述目的，而不能理解为指示或暗示相对重要性或者隐含指明所指示的技术特征的数量。由此，限定有“第一”、“第二”的特征可以明示或者隐含地包括一个或者更多个该特征。在本申请的描述中，除非另有说明，“多个”的含义是两个或两个以上。另外，术语“包括”及其任何变形，意图在于覆盖不排他的包含。
在本申请的描述中，需要说明的是，除非另有明确的规定和限定，术语“安装”、“相连”、“连接”应做广义理解，例如，可以是固定连接，也可以是可拆卸连接，或一体地连接；可以是机械连接，也可以是电连接；可以是直接相连，也可以通过中间媒介间接相连，可以是两个元件内部的连通。对于本领域的普通技术人员而言，可以具体情况理解上述术语在本申请中的具体含义。
这里所使用的术语仅仅是为了描述具体实施例而不意图限制示例性实施例。除非上下文明确地另有所指，否则这里所使用的单数形式“一个”、“一项”还意图包括复数。还应当理解的是，这里所使用的术语“包括”和/或“包含”规定所陈述的特征、整数、步骤、操作、单元和/或组件的存在，而不排除存在或添加一个或更多其他特征、整数、步骤、操作、单元、组件和/或其组合。
在图中，结构相似的单元是以相同标号表示。
下面参考附图1至图7和较佳的实施例进一步详细描述本申请的显示面板和显示装置。
参考图1，本实施例公开的显示面板包括基板10，设置在基板10上的第一金属层11；设置在第一金属层11上的绝缘层30，设置在绝缘层30上的半导体层40，包括掺杂锗金属的半导体化合物；第二金属层12；设置在半导体层40上的第二金属层12；所述半导体化合物的迁移率大于非晶硅。
一般非晶硅薄膜晶体管(a-Si TFT)的迁移率都较低，小于1cm2/V-s。而采用掺杂锗金属的半导体化合物，其迁移率可以超过1cm2/V-s，甚至于超过2cm2/V-s。锗(Ge)是一种灰白色类金属，有光泽，质硬，属于碳族，化学性质与同族的锡与硅相近。在自然中，锗共有五种同位素，原子量在70至76之间。它能形成许多不同的有机金属化合物。锗的导电的本领优于一般非金属，劣于一般金属，熔密度为5.32克/cm，有着良好的半导体性质，如电子迁移率、空穴迁移率。将锗掺杂到薄膜晶体管的半导体层40内，能有效提高迁移率，满足OLED显示的要求。
参考图1，本实施例公开的显示面板包括基板10，设置在基板10上的第一金属层11；设置在第一金属层11上的绝缘层30，设置在绝缘层30上的半导体层40，包括掺杂锗金属的半导体化合物；第二金属层12；设置在半导体层40上的第二金属层12；所述半导体化合物的迁移率大于非晶硅。
所述半导体层40的半导体化合物为富氧锗化合物或者富氧锗硅化合物，这些化合物的退火温度(Depo.Temp)一般都在170℃～370℃之间。其中，
富氧锗化合物包括但不限于GeOx；GeNx；GeOxNy；GeCx；GeOxCy；GeOxNyCz。
富氧锗硅化合物包括但不局限于：SiGeOx；SiGeOxNy；SiGeNx；SiGeOxCy；SiGeCx；GeOxNyCz。
参考图2，本实施例公开的显示面板包括基板10，设置在基板10上的第一金属层11；设置在第一金属层11上的绝缘层30，设置在绝缘层30上的半导体层40，包括掺杂锗金属的半导体化合物；第二金属层12；设置在半导体层40上的第二金属层12；所述半导体化合物的迁移率大于非晶硅。
所述半导体层40包括设置在绝缘层30上的有源层41，以及设置在有源层41上的N型掺杂层42；所述有源层41包括掺杂锗金属的半导体化合物。
所述有源层41的半导体化合物为富氧锗化合物或者富氧锗硅化合物，这些化合物的退火温度(Depo.Temp)一般都在170℃～370℃之间。其中，
富氧锗化合物包括但不限于GeOx；GeNx；GeOxNy；GeCx；GeOxCy；GeOxNyCz。
富氧锗硅化合物包括但不局限于：SiGeOx；SiGeOxNy；SiGeNx；SiGeOxCy；SiGeCx；GeOxNyCz。
参考图2，本实施例公开的显示面板包括基板10，设置在基板10上的第一金属层11；设置在第一金属层11上的绝缘层30，设置在绝缘层30上的半导体层40，包括掺杂锗金属的半导体化合物；第二金属层12；设置在半导体层40上的第二金属层12；所述半导体化合物的迁移率大于非晶硅。
所述半导体层40包括设置在绝缘层30上的有源层41，以及设置在有源层41上的N型掺杂层42；所述有源层41和N型掺杂层42包括掺杂锗金属的半导体化合物。
所述有源层41和N型掺杂层42的半导体化合物为富氧锗化合物或者富氧锗硅化合物，这些化合物的退火温度(Depo.Temp)一般都在170℃～370℃之间。其中，
富氧锗化合物包括但不限于GeOx；GeNx；GeOxNy；GeCx；GeOxCy；GeOxNyCz。
富氧锗硅化合物包括但不局限于：SiGeOx；SiGeOxNy；SiGeNx；SiGeOxCy；SiGeCx；GeOxNyCz。
参考图1-2，本实施例公开的显示面板包括基板10，设置在基板10上的第一金属层11；设置在第一金属层11上的绝缘层30，设置在绝缘层30上的半导体层40，包括掺杂锗金属的半导体化合物；第二金属层12；设置在半导体层40上的第二金属层12；所述半导体化合物的迁移率大于非晶硅。
所述半导体层40包括设置在绝缘层30上的有源层41，以及设置在有源层41上的N型掺杂层42；所述有源层41和N型掺杂层42包括富氧锗化合物或者富氧锗硅化合物；所述绝缘层30包括富氧锗硅化合物。这些化合物的退火温度(Depo.Temp)一般都在170℃～370℃之间。其中，
富氧锗化合物包括但不限于GeOx；GeNx；GeOxNy；GeCx；GeOxCy；GeOxNyCz。
富氧锗硅化合物包括但不局限于：SiGeOx；SiGeOxNy；SiGeNx；SiGeOxCy；SiGeCx；GeOxNyCz。
参考图3-5，本实施例公开的显示面板包括基板10，设置在基板10上的第一金属层；设置在第一金属层上的绝缘层30，设置在绝缘层30上的半导体层40，包括掺杂锗金属的半导体化合物；第二金属层；设置在半导体层40上的第二金属层；所述半导体化合物的迁移率大于非晶硅。
所述半导体层40包括设置在绝缘层30上的有源层41，设置在有源层41上的N型掺杂层42，所述第二金属层上覆盖有钝化层60；所述钝化层60上覆盖有显示电极80。
所述第一金属层为栅极金属层20；所述第二金属层包括设置在N型掺杂层42上的源极金属层51和漏极金属层52；所述有源层41上方还设有沟道70，所述沟道70隔断源极金属层51和漏极金属层52以及N型掺杂层42。所述覆盖在漏极金属层52上方的显示电极80部分贯穿钝化层60，与源极金属层51电连接。
所述绝缘层30包括富氧锗硅化合物；所述有源层41和N型掺杂层42都包括富氧锗化合物或者富氧锗硅化合物。这些化合物的退火温度(Depo.Temp)一般都在170℃～370℃之间。
富氧锗化合物包括但不限于GeOx；GeNx；GeOxNy；GeCx；GeOxCy；GeOxNyCz。
富氧锗硅化合物包括但不局限于SiGeOx；SiGeOxNy；SiGeNx；SiGeOxCy；SiGeCx；GeOxNyCz。
图4展示了在通电状态下电子和空穴的流动方向，体现了本申请TFT的高迁移率。
参考图5为TFT的四维工程设计控制示意图，展示了半导体(Semiconductor) (左侧)与电介质(Dielectrics)之间(右侧)的对偶性，说明将富含锗的化合物应用于TFT，特别是TFT的有源层41的必要性。框图左侧代表对偶的富锗的TFT[Duality Ge-rich TFT(G-TFT)]，右侧代表纳米锗(Ge-Nanomaterials)化合物，以GeOx：Hy为例说明。其中A为纳米锗[Nano-Ge(conc.)]，B为GeOx矩阵(matrix)，C为界面(Interfacial)，例如有源层41/绝缘层30的纳米锗(Nano-Ge)或GeOx矩阵，D代表H2(conc)，T1代表GeH4/N2O；T2和T3代表TFT可靠性(Reliability)；T4代表H2/GeH4。
参考图3-5，本实施例公开的显示面板包括基板10，设置在基板10上的第一金属层；设置在第一金属层上的绝缘层30，设置在绝缘层30上的半导体层40，包括掺杂锗金属的半导体化合物；第二金属层；设置在半导体层40上的第二金属层；所述半导体化合物的迁移率大于非晶硅。
所述半导体层40包括设置在绝缘层30上的有源层41，设置在有源层41上的N型掺杂层42，所述第二金属层上覆盖有钝化层60；所述钝化层60上覆盖有显示电极80。
所述第一金属层为栅极金属层20；所述第二金属层包括设置在N型掺杂层42上的源极金属层51和漏极金属层52；所述有源层41上方还设有沟道70，所述沟道70隔断源极金属层51和漏极金属层52以及N型掺杂层42。所述覆盖在漏极金属层52上方的显示电极80部分贯穿钝化层60，与源极金属层51电连接。
所述绝缘层30、有源层41和N型掺杂层42均包括GeOxNy化合物；其退火温度控制在170℃～370℃之间。采用同一种锗化合物可以简化制程，降低生产成本。
图4展示了在通电状态下电子和空穴的流动方向，体现了本申请TFT的高迁移率。
参考图5为TFT的四维工程设计控制示意图，展示了半导体(Semiconductor)(左侧)与电介质(Dielectrics)之间(右侧)的对偶性，说明将富含锗的化合物 应用于TFT，特别是TFT的有源层41的必要性。框图左侧代表对偶的富锗的TFT[Duality Ge-rich TFT(G-TFT)]，右侧代表纳米锗(Ge-Nanomaterials)化合物，以GeOx：Hy为例说明。其中A为纳米锗[Nano-Ge(conc.)]，B为GeOx矩阵(matrix)，C为界面(Interfacial)，例如有源层41/绝缘层30的纳米锗(Nano-Ge)或GeOx矩阵，D代表H2(conc)，T1代表GeH4/N2O；T2和T3代表TFT可靠性(Reliability)；T4代表H2/GeH4。
本申请实施例的显示面板可以为以下任一种：扭曲向列(Twisted Nematic，TN)或超扭曲向列(Super Twisted Nematic，STN)型，平面转换(In-Plane Switching，IPS)型、垂直配向(Vertical Alignment，VA)型、及曲面型面板。
本申请实施例中的显示面板可以用于显示装置中，本申请实施例的显示装置包括以上所述的显示面板，以上以显示面板为例进行详细说明，需要说明的是，以上对显示面板结构的描述同样适用于本申请实施例的显示装置中。
本申请实施例的显示装置可以为液晶显示器，也可以为OLED(Organic Light-Emitting Diode)显示器。其中，当本申请实施例的显示装置为液晶显示器时，液晶显示器包括有背光模组，背光模组可作为光源，用于供应充足的亮度与分布均匀的光源，本实施例的背光模组可以为前光式，也可以为背光式，需要说明的是，本实施例的背光模组并不限于此。
如图6-7所示，本实施方式还公开一种显示面板的制作方法，包括步骤：
S61、在基板10上形成栅极金属层20；
S62、在栅极金属层20上方铺设富含锗金属的三层复合材料；
S63、通过光罩制程形成绝缘层30、有源层41、N型掺杂层42和沟道70；
S64、在N型掺杂层42上方形成源极金属层51和漏极金属层52；
S65、在源极金属层51和漏极金属层52上方形成钝化层60；
S66、在钝化层60上方形成与漏极金属层52电连接的显示电极80。
其中，所述绝缘层30包括富氧锗硅化合物；所述有源层41和N型掺杂层42都包括富氧锗化合物或者富氧锗硅化合物。这些化合物的退火温度(Depo. Temp)一般都在170℃～370℃之间。
富氧锗化合物包括但不限于GeOx；GeNx；GeOxNy；GeCx；GeOxCy；GeOxNyCz。
富氧锗硅化合物包括但不局限于SiGeOx；SiGeOxNy；SiGeNx；SiGeOxCy；SiGeCx；GeOxNyCz。
可选的，绝缘层30、有源层41、N型掺杂层42均采用GeOxNy化合物，以便简化制程，降低生产成本。
以上内容是结合具体的优选实施方式对本申请所作的进一步详细说明，不能认定本申请的具体实施只局限于这些说明。对于本申请所属技术领域的普通技术人员来说，在不脱离本申请构思的前提下，还可以做出若干简单推演或替换，都应当视为属于本申请的保护范围。

Claims (20)

  1. 一种显示面板，包括：
    基板,具有多个像素区；
    第一金属层，设置在基板上；
    绝缘层，设置在第一金属层上，
    半导体层，设置在绝缘层上，包括富氧锗硅化合物；
    第二金属层；设置在半导体层上；
    所述半导体化合物的迁移率大于非晶硅；
    所述半导体层包括设置在绝缘层上的有源层，设置在有源层上的N型掺杂层，所述第二金属层上覆盖有钝化层；所述第二金属层包括设置在N型掺杂层上的源极金属层和漏极金属层；所述有源层上方还设有沟道，所述沟道隔断源极金属层和漏极金属层以及N型掺杂层；
    所述绝缘层包括富氧锗硅化合物；所述有源层和N型掺杂层都包括掺杂锗金属的半导体化合物。
  2. 一种显示面板，包括：
    基板,具有多个像素区；
    第一金属层，设置在基板上；
    绝缘层，设置在第一金属层上，
    半导体层，设置在绝缘层上，包括掺杂锗金属的半导体化合物；
    第二金属层；设置在半导体层上；
    所述半导体化合物的迁移率大于非晶硅。
  3. 如权利要去2所述的显示面板，其中，所述半导体层的半导体化合物为富氧锗化合物。
  4. 如权利要去3所述的显示面板，其中，所述半导体层包括：
    有源层，设置在绝缘层上；
    N型掺杂层，设置在有源层上；
    所述有源层包括掺杂锗金属的半导体化合物。
  5. 如权利要去2所述的显示面板，其中，所述半导体层的半导体化合物为富氧锗硅化合物。
  6. 如权利要去2所述的显示面板，其中，所述半导体层包括：
    有源层，设置在绝缘层上；
    N型掺杂层，设置在有源层上；
    所述有源层包括掺杂锗金属的半导体化合物。
  7. 如权利要去6所述的显示面板，其中，所述有源层的半导体化合物为富氧锗化合物。
  8. 如权利要去6所述的显示面板，其中，所述有源层的半导体化合物为富氧锗硅化合物。
  9. 如权利要去6所述的显示面板，其中，所述N型掺杂层包括富氧锗化合物或富氧锗硅化合物。
  10. 如权利要去2所述的显示面板，其中，所述绝缘层包括富氧锗硅化合物。
  11. 如权利要去5所述的显示面板，其中，
    有源层，设置在绝缘层上；
    N型掺杂层，设置在有源层上；
    所述有源层包括掺杂锗金属的半导体化合物。
  12. 一种显示装置，包括显示面板；其中所述显示面板包括：
    基板,具有多个像素区；
    第一金属层，设置在基板上；
    绝缘层，设置在第一金属层上，
    半导体层，设置在绝缘层上，包括掺杂锗金属的半导体化合物；
    第二金属层；设置在半导体层上；
    所述半导体化合物的迁移率大于非晶硅。
  13. 如权利要去12所述的显示装置，其中，所述半导体层的半导体化合物为富氧锗化合物。
  14. 如权利要去12所述的显示装置，其中，所述半导体层的半导体化合物为富氧锗硅化合物。
  15. 如权利要去12所述的显示装置，其中，所述半导体层包括：
    有源层，设置在绝缘层上；
    N型掺杂层，设置在有源层上；
    所述有源层包括掺杂锗金属的半导体化合物。
  16. 如权利要去15所述的显示装置，其中，所述有源层的半导体化合物为富氧锗化合物。
  17. 如权利要去15所述的显示装置，其中，所述有源层的半导体化合物为富氧锗硅化合物。
  18. 如权利要去15所述的显示装置，其中，所述N型掺杂层包括富氧锗化合物或富氧锗硅化合物。
  19. 如权利要去12所述的显示装置，其中，所述绝缘层包括富氧锗硅化合物。
  20. 如权利要去12所述的显示装置，其中，所述半导体层包括设置在绝缘层上的有源层，设置在有源层上的N型掺杂层，所述第二金属层上覆盖有钝化层；所述第二金属层包括设置在N型掺杂层上的源极金属层和漏极金属层；所述有源层上方还设有沟道，所述沟道隔断源极金属层和漏极金属层以及N型掺杂层；
    所述绝缘层包括富氧锗硅化合物；所述有源层和N型掺杂层都包括掺杂锗金属的半导体化合物。
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