WO2017152442A1 - 薄膜晶体管、液晶显示面板及薄膜晶体管的制备方法 - Google Patents

薄膜晶体管、液晶显示面板及薄膜晶体管的制备方法 Download PDF

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WO2017152442A1
WO2017152442A1 PCT/CN2016/077952 CN2016077952W WO2017152442A1 WO 2017152442 A1 WO2017152442 A1 WO 2017152442A1 CN 2016077952 W CN2016077952 W CN 2016077952W WO 2017152442 A1 WO2017152442 A1 WO 2017152442A1
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胡小波
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深圳市华星光电技术有限公司
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Abstract

一种薄膜晶体管(10)、液晶显示面板及薄膜晶体管(10)的制备方法。薄膜晶体管(10)包括:基板(110)及设置在基板(110)同侧的栅极(120)、栅极绝缘层(130)、源极(140)、漏极(150)、沟道层(160)、第一、第二欧姆接触层(170a、170b)、钝化层(180)及像素电极(190),栅极(120)设置在基板(110)的表面,栅极绝缘层(130)覆盖栅极(120),源极(140)、漏极(150)、沟道层(160)、第一及第二欧姆接触层(170a、170b)设置在栅极绝缘层(130)上,源极(140)与漏极(150)间隔设置,沟道层(160)设置在源极(140)与漏极(150)之间且沟道层(160)对应栅极(120)设置,第一欧姆接触层(170a)设置在源极(140)与沟道层(160)之间且第一欧姆接触层(170a)相对的两端分别与源极(140)及沟道层(160)接触,第二欧姆接触层(170b)设置在漏极(150)与沟道层(160)之间且第二欧姆接触层(170b)相对的两端分别与漏极(150)及沟道层(160)接触,第一欧姆接触层(170a)、第二欧姆接触层(170b)及沟道层(160)位于同一层,其中,沟道层(160)为金属氧化物层。

Description

薄膜晶体管、液晶显示面板及薄膜晶体管的制备方法
本发明要求2016年3月11日递交的发明名称为“薄膜晶体管、液晶显示面板及薄膜晶体管的制备方法”的申请号201610141481.7的在先申请优先权,上述在先申请的内容以引入的方式并入本文本中。
技术领域
本发明涉及显示领域,尤其涉及一种薄膜晶体管、液晶显示面板及薄膜晶体管的制备方法。
背景技术
液晶显示装置,比如,液晶显示器(Liquid Crystal Display,LCD)是一种常用的电子设备,由于其具有功耗低、体积小、重量轻等特点,因此备受用户的青睐。液晶显示器中通常包括阵列基板,阵列基板包括呈陈列状分布的多个薄膜晶体管,薄膜晶体管的质量好坏直接影响到液晶显示面板的质量。现有的薄膜晶体管中的沟道层一般直接与源极以及漏极接触,从而导致沟道层与源极之间的接触电阻较大且沟道层与漏极之间的接触电阻较大,进而导致液晶显示器的驱动电压较大,功耗较高。
发明内容
本发明提供一种薄膜晶体管,所述薄膜晶体管包括:基板及设置在所述基板同侧的栅极、栅极绝缘层、源极、漏极、沟道层、第一欧姆接触层、第二欧姆接触层、钝化层及像素电极,所述栅极设置在所述基板的表面上,所述栅极绝缘层覆盖所述栅极,所述源极、所述漏极、所述沟道层、所述第一欧姆接触层及所述第二欧姆接触层设置在所述栅极绝缘层上,所述源极与所述漏极之间间隔设置,所述沟道层设置在所述源极与所述漏极之间且所述沟道层对应所述栅极设置,所述第一欧姆接触层设置在源极与所述沟道层之间,且所述第一欧姆接触层相对的两端分别与所述源极面向所述沟道层的一端及所述沟道层面向所述源极的一端接触,所述第一欧姆接触层用于减小所述源极与所述沟道层 之间的接触电阻,所述第二欧姆接触层设置在所述漏极与所述沟道层之间,且所述第二欧姆接触层相对的两端分别与所述漏极面向所述沟道层的一端及所述沟道层面向所述漏极的一端接触,所述第二欧姆接触层用于减小所述漏极与所述沟道层之间的接触电阻,所述第一欧姆接触层、所述第二欧姆接触层及所述沟道层位于同一层,其中,所述沟道层为金属氧化物层,所述钝化层覆盖所述沟道层、所述源极、所述漏极、所述第一欧姆接触层及所述第二欧姆接触层,所述钝化层开设有对应所述漏极的贯孔,所述像素电极设置在所述钝化层上且通过所述贯孔与所述漏极相连。
其中,所述栅极包括相对设置的第一侧面及第二侧面,所述第一侧面及所述第二侧面分别与所述基板相交,所述第一侧面相较于所述第二侧面邻近所述源极设置,所述第一侧面与所述沟道层面向所述源极的端面共面,所述第二侧面与所述沟道层面向所述漏极的端面共面。
其中,所述沟道层为IGZO。
其中,所述栅极绝缘层包括第一子绝缘层及第二子绝缘层,所述第一子绝缘层覆盖所述栅极,所述第二子绝缘层覆盖所述第一子绝缘层,其中,所述第一子绝缘层包括氮化硅材料,所述第二子绝缘层包括氧化硅材料。
本发明的薄膜晶体管在所述源极与所述沟道层之间设置第一欧姆接触层,从而减小了所述源极与所述沟道层之间的接触电阻。相应地,本发明的薄膜晶体管在所述漏极与所述沟道层之间设置第二欧姆接触层,从而减小了所述漏极与所述沟道层之间的接触电阻。因此,本发明的薄膜晶体管的功耗较小。
本发明还提供了一种液晶显示面板,所述液晶显示面板包括如前述任意实施方式所述的薄膜晶体管。
本发明还提供了一种薄膜晶体管的制备方法,所述薄膜晶体管的制备方法包括:
提供基板,其中,所述基板包括相对设置的第一表面及第二表面;
在所述第一表面形成栅极,所述栅极包括相对设置的第一侧面及第二侧面,所述第一侧面及所述第二侧面分别与所述基板相交;
形成覆盖所述栅极的栅极绝缘层;
形成设置在所述栅极绝缘层上的源极及漏极,所述源极与所述漏极之间形 成有间隙,所述源极面向所述漏极的端面到所述第二侧面的距离大于所述第一侧面到所述第二侧面的距离,所述漏极面向所述源极的端面到所述第一侧面的距离大于所述第二侧面到所述第一侧面的距离;
形成设置在所述间隙的且位于同一层的第一欧姆接触层、第二欧姆接触层及沟道层,其中,所述第一欧姆接触层设置在所述源极与所述沟道层之间,所述第一欧姆接触层相对的两端分别与所述源极及所述沟道层面向所述源极的一端接触,所述第二欧姆接触层设置在所述漏极与所述沟道层之间,且所述第二欧姆接触层相对的两端分别与所述漏极及所述沟道层面向所述漏极的一端接触,其中,所述沟道层为金属氧化物层;
形成覆盖所述沟道层、所述源极、所述漏极、所述第一欧姆接触层及所述第二欧姆接触层的钝化层;
在所述钝化层对应所述漏极开设贯孔;
形成设置在所述钝化层且通过所述贯孔与所述漏极相连的像素电极。
其中,形成设置在所述间隙的且位于同一层的第一欧姆接触层、第二欧姆接触层及沟道层包括:
形成设置在所述间隙内且与所述源极面向所述漏极的端面及所述漏极面向所述源极的端面分别接触的金属氧化物材料层;
自所述第二表面采用紫外光照射预设时间,其中,与所述源极接触且被所述紫外光照射的金属氧化物材料层的部分形成所述第一欧姆接触层,与所述漏极接触且被所述紫外光照射的金属氧化物材料层的部分形成所述第二欧姆接触层,未被所述紫外光照射的金属氧化物材料层的部分形成所述沟道层。
其中,所述紫外光的波长为150~300nm,所述预设时间为2小时~4小时。
其中,当所述第二表面采用紫外光照射时,所述紫外光垂直照射所述第二表面。
其中,所述步骤“形成覆盖所述栅极的栅极绝缘层”包括:
形成覆盖所述栅极的第一子绝缘层,其中,所述第一子绝缘层包括氮化硅材料;
形成覆盖所述第一子绝缘层的第二子绝缘层,其中,所述第二子绝缘层包括氧化硅材料。
附图说明
为了更清楚地说明本发明实施例或现有技术中的技术方案,下面将对实施例或现有技术描述中所需要使用的附图作简单地介绍,显而易见地,下面描述中的附图仅仅是本发明的一些实施例,对于本领域普通技术人员来讲,在不付出创造性劳动的前提下,还可以根据这些附图获得其他的附图。
图1为本发明一较佳实施方式的薄膜晶体管的剖面结构示意图。
图2为本发明一较佳实施方式的液晶显示面板的结构示意图。
图3为本发明一较佳实施方式的薄膜晶体管的制备方法的流程图。
具体实施方式
下面将结合本发明实施例中的附图,对本发明实施例中的技术方案进行清楚、完整地描述,显然,所描述的实施例仅仅是本发明一部分实施例,而不是全部的实施例。基于本发明中的实施例,本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例,都属于本发明保护的范围。
请参阅图1,图1为本发明一较佳实施方式的薄膜晶体管的剖面结构示意图。所述薄膜晶体管10包括基板110及设置在所述基板110同侧的栅极120、栅极绝缘层130、源极140、漏极150、沟道层160、第一欧姆接触层170a、第二欧姆接触层170b、钝化层180及像素电极190。所述栅极120设置在所述基板110的表面上,所述栅极绝缘层130覆盖所述栅极120。所述源极140、所述漏极150、所述沟道层160、所述第一欧姆接触层170a及所述第二欧姆接触层170b设置在所述栅极绝缘层130上。所述源极140与所述漏极150之间间隔设置,所述沟道层160设置在所述源极140与所述漏极150之间且所述沟道层160对应所述栅极120设置。所述第一欧姆接触层170a设置在所述源极140与所述沟道层160之间,且所述第一欧姆接触层170a相对的两端分别与所述源极140面向所述沟道层160的一端以及所述沟道层160面向所述源极140的一端接触,所述第一欧姆接触层170a年关于减小所述源极140与所述沟道层160之间的接触电阻。所述第二欧姆接触层170b设置在所述漏极150与所述沟道层160之间,且所述第二欧姆接触层170b相对的两端分别与所述 漏极150面向所述沟道层160的一端及所述沟道层160面向所述漏极150的一端接触,所述第二欧姆接触层170b用于减小所述漏极150与所述沟道层160之间的接触电阻。所述第一欧姆接触层170a、所述第二欧姆接触层170b及所述沟道层160位于同一层。其中,所述沟道层160为金属氧化物层。所述钝化层180覆盖所述沟道层160、所述源极140、所述漏极150、所述第一欧姆接触层170a、所述第二欧姆接触层170b,所述钝化层180开设有对应所述漏极150的贯孔181。所述像素电极190设置在所述钝化层180上且通过所述贯孔181与所述漏极150相连。
所述栅极120包括相对设置的第一侧面121及第二侧面122,所述第一侧面121及所述第二侧面122分别与所述基板110相交,所述第一侧面121相较于所述第二侧面122邻近所述源极140设置,所述第一侧面121与所述沟道层160面向所述源极140的端面共面,所述第二侧面122与所述沟道层160面向所述漏极150的端面共面。
由于所述栅极120的第一侧面121与所述沟道层160面向所述源极140的端面共面,所述栅极120的第二侧面122与所述沟道层160面向所述漏极140的端面共面,因此,所述栅极120与所述源极140之间不存在绝缘介质侧墙且所述栅极120与所述漏极150之间不存在绝缘介质侧墙,从而抑制了所述薄膜晶体管10中沟道层160可能存在的寄生电阻效应。进一步地,由于所述栅极120的第一侧面121与所述沟道层160面向所述源极140的端面共面,所述栅极120的第二侧面122与所述沟道层160面向所述漏极140的端面共面,所述栅极120与所述源极140之间没有交叠,所述栅极120与所述漏极150之间没有交叠,因此,所述栅极120与所述源极140之间的寄生电容较小,所述栅极120与所述漏极150之间的寄生电容较小。
更进一步地,本发明的薄膜晶体管10中的所述栅极120、所述源极140及所述漏极150可以做得较厚,而不会明显增加所述栅极120与所述源极140之间的寄生电容以及所述栅极120与所述漏极150之间的寄生电容。且较厚的栅极120、较厚的源极140及较厚的漏极150能够减小这些电极自身的电阻,也能抑制这些电极产生的寄生电阻。优选地,所述栅极120的厚度为1500~6000埃,所述源极140的厚度为2000~5000埃,所述漏极150的厚度为2000~5000 埃。
在本实施方式中,所述基板110为对紫外光的透光率超过预设透光率的绝缘衬底。所述预设透光率可以为但不仅限于为90%。所述基板110的材料包括石英、云母、氧化铝或者透明塑料等电绝缘材料中的任意一种或者多种。所述基板110为绝缘层衬底能够减小所述基板110的高频损耗。
所述栅极120可以对穿过所述基板110的紫外光进行遮挡,从而使得穿过所述基板110的紫外光无法穿过所述栅极120。可以理解地,当穿过所述基板110的紫外光穿过所述栅极120的透光率小于一预设阈值(比如,为5%)时,则也可以认为穿过所述基板110的紫外光无法穿过所述栅极120。所述栅极120的材料包括但不仅限于钼(Mo)、铝/铜(Al/Cu)复合金属材料等。所述栅极120的厚度为1500~6000埃。
在本实施方式中,所述栅极绝缘层130包括第一子绝缘层131及第二子绝缘层132。所述第一子绝缘层131覆盖所述栅极120,所述第二子绝缘层132覆盖所述第一子绝缘层131,其中,所述第一子绝缘层131包括氮化硅(SiNx)材料,所述第二子绝缘层包括氧化硅(SiOx)材料。所述第一子绝缘层131采用氮化硅材料,在制备氮化硅材料的时候能够产生氢元素(H)用来修补所述沟道层160,用于提供所述沟道层160的电性能。所述第二子绝缘层132可以改善设置所述沟道层160、所述源极140、所述漏极150、所述第一欧姆接触层170a及所述第二欧姆接触层170b的应力,防止所述沟道层160、所述源极140、所述漏极150、所述第一欧姆接触层170a及所述第二欧姆接触层170b脱落。所述栅极绝缘层130的厚度为1500~4000埃。
所述源极140及所述漏极150的材料包括但不仅限于为铝/钼(Al/Mo)复合材料。所述源极140及所述漏极150的厚度为2000~5000埃。
在一实施方式中,所述沟道层160的厚度为300~1000埃。所述沟道层160可以为但不仅限于为铟镓锌氧化物(Indium Gallium Zinc Oxide,IGZO)。
所述钝化层180的厚度为1500~4000埃。所述钝化层180可以为但不仅限于为氮化硅(SiNx)材料、氧化硅(SiOx)材料、或者氧化硅材料与氮化硅材料的复合层。当所述钝化层180为氧化硅材料与氮化硅材料形成的复合层时,为了方便描述,所述氧化硅材料层命名为第一子钝化层,所述氮化硅材料层命 名为第二子钝化层。所述第一子钝化层覆盖所述源极140、漏极150、沟道层160、第一欧姆接触层170a及第二欧姆接触层170b,所述第二子钝化层覆盖所述第一子钝化层。
所述像素电极190的厚度为300~1000埃。所述像素电极190可以为但不仅限于为氧化铟锡(Indium Tin Oxide,ITO)。
相较于现有技术,本发明的薄膜晶体管10在所述源极140与所述沟道层160之间设置第一欧姆接触层170a,从而减小了所述源极140与所述沟道层160之间的接触电阻。相应地,本发明的薄膜晶体管10在所述漏极150与所述沟道层160之间设置第二欧姆接触层170b,从而减小了所述漏极150与所述沟道层160之间的接触电阻。因此,本发明的薄膜晶体管10的功耗较小。
本发明还提供了一种液晶显示面板,请参阅图2,图2为本发明一较佳实施方式的液晶显示面板的结构示意图。本发明的液晶显示面板1包括阵列基板2、彩膜基板3及液晶层4。所述阵列基板2与所述彩膜基板3相对且间隔设置,所述液晶层4夹设在所述阵列基板2与所述彩膜基板3之间。所述阵列基板2包括呈阵列状分布的多个薄膜晶体管10,所述薄膜晶体管10请参阅前述描述,在此不再赘述。
下面结合图1及对图1的描述对本发明的薄膜晶体管的制备方法进行介绍。请一并参阅图3,图3为本发明一较佳实施方式的薄膜晶体管的制备方法的流程图。所述薄膜晶体管的制备方法包括但不仅限于以下步骤。
步骤S110,提供基板110,其中,所述基板110包括相对设置的第一表面111及第二表面112。
步骤S120,在所述第一表面111形成栅极120,所述栅极120包括相对设置的第一侧面121及第二侧面122,所述第一侧面121及所述第二侧面122分别与所述基板110相交。具体地,所述栅极120可以通过如下方式形成。首先,在所述基板110的第一表面111设置整层的第一金属层。所述第一金属层包括但不仅限于钼(Mo)、铝/铜(Al/Cu)复合金属材料等。所述第一金属层可以通过物理气相沉积(Physical Vapor Deposition,PVD)的方式形成,所述栅极120的厚度为1500~6000埃。接着,图案化所述第一金属层以形成所述栅极120。所述第一金属层的图案化可以通过掩膜板进行曝光、显影、蚀刻及剥离 的方式进行。
步骤S130,形成覆盖所述栅极120的栅极绝缘层130。所述栅极绝缘层130可以通过离子体增强化学气相沉积法(Plasma Enhanced Chemical Vapor Deposition,PECVD)沉积一层膜厚为1500~4000埃的绝缘材料来形成。
优选地,所述步骤S130包括以下步骤。
步骤S131,形成覆盖所述栅极120的第一子绝缘层131,其中,所述第一子绝缘层131包括氮化硅材料。
步骤S132,形成覆盖所述第一子绝缘层131的第二子绝缘层132,其中,所述第二子绝缘层132包括氧化硅材料。
步骤S140,形成设置在所述栅极绝缘层130上的源极140及漏极150,所述源极140及所述漏极150之间形成有间隙,所述源极140面向所述漏极150的端面到所述第二侧面122的距离大于所述第一侧面121到所述第二侧面122的距离,所述漏极150面向所述源极140的端面到所述第一侧面121的距离大于所述第二侧面122到所述第一侧面121的距离。
所述源极140及所述漏极150可以通过如下方式形成。在栅极绝缘层130上形成整层的第二金属层,所述第二金属层包括但不仅限于为铝/钼(Al/Mo)复合材料。所述第二金属层可以通过PVD的方式形成,所述第二金属层的的厚度为2000~5000埃。接着,图案化所述第二金属层以形成所述源极140及所述漏区150。所述第二金属层的图案化可以通过掩膜板进行曝光、显影、蚀刻及剥离的方式进行。
步骤S150,形成设置在所述间隙的且位于同一层的第一欧姆接触层170a、第二欧姆接触层170b及沟道层160,其中,所述第一欧姆接触层170a设置在所述源极140与所述沟道层160之间,所述第一欧姆接触层170a相对的两端分别与所述源极140及所述沟道层160面向所述源极140的一端接触,所述第二欧姆接触层170b设置在所述漏极150与所述沟道层160之间,且所述第二欧姆接触层170b相对的两端分别与所述漏极150及所述沟道层160面向所述漏极150的一端接触,其中,所述沟道层160为金属氧化物层。
具体地,所述步骤S150包括如下步骤。
步骤S151,形式设置在所述间隙内且与所述源极140面向所述漏极150 的端面及所述漏极150面向所述源极140的端面分别接触的金属氧化物材料层。
步骤S152,自所述第二表面112采用紫外光照射预设时间,其中,与所述源极140接触且被所述紫外光照射的金属氧化层的部分形成所述第一欧姆接触层170a,与所述漏极150接触且被所述紫外光照射的金属氧化物材料层的部分形成第二欧姆接触层170b,未被所述紫外光照射的金属氧化物材料层的部分形成所述沟道层160。优选地,所述紫外光的波长为150~300nm,所述预设时间为2小时~4小时。优选地,当所述第二表面112采用紫外光照射时,所述紫外光垂直照射所述第二表面112。
经过测试表明,金属氧化物材料层通过不同时间的紫外光照射,其导电性能会发生明显变化,迁移率和载流子的浓度随着紫外光照射时间的延长而增加。以所述金属氧化物材料层的材料为IGZO为例,经过测试表明,经过紫外光照射4个小时,经过照射的金属氧化物材料层的部分的电阻率(resistivity)为4.6*10-3,迁移率(hall mobility)为14.6cm2/V,载流子浓度(carrier concentration)为1.6*1012cm2,且经过一段时间(本测试采用4周)的老化测试,被紫外线照射的金属氧化物材料层的导电性能、迁移率及载流子的浓度几乎没有发生变化。
步骤S160,形成覆盖所述沟道层160、所述源极140、所述漏极150、所述第一欧姆接触层170a及所述第二欧姆接触层170b的钝化层180。具体地,所述钝化层180可以通过PECVD的方式沉积一层膜厚为1500~4000埃的绝缘材料来形成。所述绝缘材料可以为但不仅限于为氮化硅(SiNx)材料、氧化硅(SiOx)材料、或者氧化硅材料与氮化硅材料的复合层。
步骤S170,在所述钝化层180对应所述漏极150开设贯孔181。所述贯孔181可以利用黄光工艺和蚀刻工艺来形成。
步骤S180,形成设置在所述钝化层180且通过所述贯孔181与所述漏极150的像素电极190。具体地,所述像素电极190可以通过PVD的方式沉积一层透明电极材料,所述透明电极材料的厚度为300~1000埃,接着,利用黄光工艺和蚀刻工艺得到所述像素电极190。
相较于现有技术,本发明的薄膜晶体管的制备方法在所述源极140与所述 沟道层160之间形成第一欧姆接触层170a,从而减小了所述源极140与所述沟道层160之间的接触电阻。相应地,本发明的薄膜晶体管的制备方法在所述漏极150与所述沟道层160之间设置第二欧姆接触层170b,从而减小了所述漏极150与所述沟道层160之间的接触电阻。因此,本发明的薄膜晶体管制备方法制备出的薄膜晶体管10的功耗较小。
进一步地,由于金属氧化物材料层对酸非常敏感,即便是弱酸也能快速腐蚀金属氧化物材料层。而在源极140和漏极150的制作时会用到酸(金属蚀刻液),因此,在本发明的薄膜晶体管的制备方法中,在所述栅极绝缘层130上先形成源极140和漏极150,再在源极140和漏极150之间的间隙设置用于形成第一欧姆接触层170a、第二欧姆接触层170b及沟道层160的金属氧化物材料层,可以避免制作源极140和漏极150的金属蚀刻液对金属氧化物材料层的影响。
以上所揭露的仅为本发明一种较佳实施例而已,当然不能以此来限定本发明之权利范围,本领域普通技术人员可以理解实现上述实施例的全部或部分流程,并依本发明权利要求所作的等同变化,仍属于发明所涵盖的范围。

Claims (10)

  1. 一种薄膜晶体管,其中,所述薄膜晶体管包括:基板及设置在所述基板同侧的栅极、栅极绝缘层、源极、漏极、沟道层、第一欧姆接触层、第二欧姆接触层、钝化层及像素电极,所述栅极设置在所述基板的表面上,所述栅极绝缘层覆盖所述栅极,所述源极、所述漏极、所述沟道层、所述第一欧姆接触层及所述第二欧姆接触层设置在所述栅极绝缘层上,所述源极与所述漏极之间间隔设置,所述沟道层设置在所述源极与所述漏极之间且所述沟道层对应所述栅极设置,所述第一欧姆接触层设置在源极与所述沟道层之间,且所述第一欧姆接触层相对的两端分别与所述源极面向所述沟道层的一端及所述沟道层面向所述源极的一端接触,所述第一欧姆接触层用于减小所述源极与所述沟道层之间的接触电阻,所述第二欧姆接触层设置在所述漏极与所述沟道层之间,且所述第二欧姆接触层相对的两端分别与所述漏极面向所述沟道层的一端及所述沟道层面向所述漏极的一端接触,所述第二欧姆接触层用于减小所述漏极与所述沟道层之间的接触电阻,所述第一欧姆接触层、所述第二欧姆接触层及所述沟道层位于同一层,其中,所述沟道层为金属氧化物层,所述钝化层覆盖所述沟道层、所述源极、所述漏极、所述第一欧姆接触层及所述第二欧姆接触层,所述钝化层开设有对应所述漏极的贯孔,所述像素电极设置在所述钝化层上且通过所述贯孔与所述漏极相连。
  2. 如权利要求1所述的薄膜晶体管,其中,所述栅极包括相对设置的第一侧面及第二侧面,所述第一侧面及所述第二侧面分别与所述基板相交,所述第一侧面相较于所述第二侧面邻近所述源极设置,所述第一侧面与所述沟道层面向所述源极的端面共面,所述第二侧面与所述沟道层面向所述漏极的端面共面。
  3. 如权利要求1所述的薄膜晶体管,其中,所述沟道层为IGZO。
  4. 如权利要求1所述的薄膜晶体管,其中,所述栅极绝缘层包括第一子绝 缘层及第二子绝缘层,所述第一子绝缘层覆盖所述栅极,所述第二子绝缘层覆盖所述第一子绝缘层,其中,所述第一子绝缘层包括氮化硅材料,所述第二子绝缘层包括氧化硅材料。
  5. 一种液晶显示面板,其中,所述液晶显示面板包括如权利要求1~4任意一项所述的薄膜晶体管。
  6. 一种薄膜晶体管的制备方法,其中,所述薄膜晶体管的制备方法包括:
    提供基板,其中,所述基板包括相对设置的第一表面及第二表面;
    在所述第一表面形成栅极,所述栅极包括相对设置的第一侧面及第二侧面,所述第一侧面及所述第二侧面分别与所述基板相交;
    形成覆盖所述栅极的栅极绝缘层;
    形成设置在所述栅极绝缘层上的源极及漏极,所述源极与所述漏极之间形成有间隙,所述源极面向所述漏极的端面到所述第二侧面的距离大于所述第一侧面到所述第二侧面的距离,所述漏极面向所述源极的端面到所述第一侧面的距离大于所述第二侧面到所述第一侧面的距离;
    形成设置在所述间隙的且位于同一层的第一欧姆接触层、第二欧姆接触层及沟道层,其中,所述第一欧姆接触层设置在所述源极与所述沟道层之间,所述第一欧姆接触层相对的两端分别与所述源极及所述沟道层面向所述源极的一端接触,所述第二欧姆接触层设置在所述漏极与所述沟道层之间,且所述第二欧姆接触层相对的两端分别与所述漏极及所述沟道层面向所述漏极的一端接触,其中,所述沟道层为金属氧化物层;
    形成覆盖所述沟道层、所述源极、所述漏极、所述第一欧姆接触层及所述第二欧姆接触层的钝化层;
    在所述钝化层对应所述漏极开设贯孔;
    形成设置在所述钝化层且通过所述贯孔与所述漏极相连的像素电极。
  7. 如权利要求6所述的薄膜晶体管的制备方法,其中,形成设置在所述间隙的且位于同一层的第一欧姆接触层、第二欧姆接触层及沟道层包括:
    形成设置在所述间隙内且与所述源极面向所述漏极的端面及所述漏极面向所述源极的端面分别接触的金属氧化物材料层;
    自所述第二表面采用紫外光照射预设时间,其中,与所述源极接触且被所述紫外光照射的金属氧化物材料层的部分形成所述第一欧姆接触层,与所述漏极接触且被所述紫外光照射的金属氧化物材料层的部分形成所述第二欧姆接触层,未被所述紫外光照射的金属氧化物材料层的部分形成所述沟道层。
  8. 如权利要求7所述的薄膜晶体管的制备方法,其中,所述紫外光的波长为150~300nm,所述预设时间为2小时~4小时。
  9. 如权利要求7所述的薄膜晶体管的制备方法,其中,当所述第二表面采用紫外光照射时,所述紫外光垂直照射所述第二表面。
  10. 如权利要求6所述的薄膜晶体管的制备方法,其中,所述步骤“形成覆盖所述栅极的栅极绝缘层”包括:
    形成覆盖所述栅极的第一子绝缘层,其中,所述第一子绝缘层包括氮化硅材料;
    形成覆盖所述第一子绝缘层的第二子绝缘层,其中,所述第二子绝缘层包括氧化硅材料。
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