WO2016181710A1 - Dispositif à film mince - Google Patents

Dispositif à film mince Download PDF

Info

Publication number
WO2016181710A1
WO2016181710A1 PCT/JP2016/059103 JP2016059103W WO2016181710A1 WO 2016181710 A1 WO2016181710 A1 WO 2016181710A1 JP 2016059103 W JP2016059103 W JP 2016059103W WO 2016181710 A1 WO2016181710 A1 WO 2016181710A1
Authority
WO
WIPO (PCT)
Prior art keywords
thin film
resin layer
resistive
reinforcing
substrate
Prior art date
Application number
PCT/JP2016/059103
Other languages
English (en)
Japanese (ja)
Inventor
智行 芦峰
智 進藤
竹島　裕
Original Assignee
株式会社村田製作所
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 株式会社村田製作所 filed Critical 株式会社村田製作所
Priority to JP2017515872A priority Critical patent/JP6191804B2/ja
Priority to CN201690000755.4U priority patent/CN207572353U/zh
Publication of WO2016181710A1 publication Critical patent/WO2016181710A1/fr

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body

Definitions

  • the present invention relates to a thin film device including a thin film resistance element.
  • a conventional thin film device 500 shown in FIG. 6 is provided between an integrated circuit 502 formed on a semiconductor substrate 501, a plurality of electrode pads 503 arranged on the integrated circuit 502, and each electrode pad 503. And a resin layer 505 formed on the passivation film 504.
  • the resin layer 505 is formed of polyimide resin, epoxy resin, or the like, and a through hole is provided at a position overlapping the electrode pad 503 of the resin layer 505.
  • a rewiring 507 connected to the electrode pad 503 through the barrier metal layer 506 in the through hole is formed on the resin layer 505.
  • a thin film resistance element 508 is provided at a position between the rewiring 507 on the resin layer 505.
  • the thin film resistance element 508 includes a barrier metal layer 506 and a seed layer 509 stacked on the barrier metal layer 506.
  • the barrier metal layer 506 is formed of Ti, TiN, Ni, or the like, and is provided to improve the adhesion between the electrode pad 503 and the rewiring 507.
  • the seed layer 509 functions as an electrode when the rewiring 507 is formed by a plating method, and is formed of Cu, Al, or the like.
  • the resistance value of the thin film resistive element 508 is adjusted by adjusting the film thicknesses of the barrier metal layer 506 and the seed layer 509 as appropriate.
  • JP 2009-267248 A (paragraphs 0012, 0016, 0017, FIG. 1, etc.)
  • the thin film device 500 shown in FIG. 6 when the thin film device 500 shown in FIG. 6 is heated in a thermal cycle when mounted on another substrate or the like, a bending stress is applied to the thin film resistance element 508 due to expansion of the resin layer 505, etc.
  • the thin film resistance element 508 may be damaged.
  • the present invention has been made in view of the above-described problems, and can prevent a thin film resistive element from being damaged by a stress or the like caused by expansion of a resin layer, thereby obtaining a highly reliable thin film device.
  • the purpose is to provide technology.
  • a thin film device of the present invention includes a substrate and a plurality of resin layers laminated on one main surface side of the substrate, and the plurality of resin layers includes one thin film resistor element.
  • the thin film resistor element includes a resistive thin film and a first reinforcing thin film formed on the resistive thin film, and the first reinforcing thin film overlaps the first metal thin film in plan view. It is characterized by being placed in the part that should not be.
  • the first resin layer on which the thin film resistance element is formed has a coefficient of thermal expansion. Attempts to expand toward the opposite side of the small substrate.
  • the first metal thin film is formed on the second resin layer disposed on the side opposite to the substrate of the first resin layer, the first metal thin film among the resistance thin films included in the thin film resistance element In a portion overlapping in plan view, the resistive thin film is pressed against the substrate by the first metal thin film. Therefore, the bending stress applied to the resistance thin film can be relaxed by the expansion of the resin layer in a high temperature state.
  • the first reinforcing thin film is formed, so that the thin film resistance element is damaged by the stress generated by the expansion of the resin layer. Can be prevented.
  • the thin film resistance element may further include a connection electrode formed on the resistance thin film, and the first reinforcing thin film and the connection electrode may be simultaneously formed by the same process.
  • connection electrode for reducing the contact resistance with the extraction electrode connected to the thin film resistance element and the first reinforcing thin film are simultaneously formed on the resistance thin film using the same material by the same process.
  • the process for forming the first reinforcing thin film can be simplified. Therefore, it is possible to provide a highly reliable thin film device in which cracks and disconnections of the thin film resistor element are prevented using a conventional manufacturing process without increasing the manufacturing process. In addition, the manufacturing cost of the thin film device can be reduced.
  • the resistive thin film may contain Si.
  • the resistivity of the resistive thin film may be larger than the resistivity of the first reinforcing thin film.
  • the resistance value depends on the resistivity of the 1st thin film for reinforcing, arbitrary on the resistive thin film
  • the plurality of resin layers further include a third resin layer provided on one main surface with a second metal thin film disposed on the substrate side of the first resin layer, and the thin film resistor element includes: It is preferable to further include a second reinforcing thin film formed on the resistive thin film, and the second reinforcing thin film is disposed in a portion not overlapping the second metal thin film in plan view.
  • the other end of each of the first and second thin film resistor elements may be connected to both ends of the thin film capacitor element.
  • the capacitance of the thin film capacitor element is adjusted by adjusting the voltage between the third and fourth external electrodes and arbitrarily adjusting the voltage applied to both ends of the thin film capacitor element via the first and second thin film resistor elements. Can be adjusted.
  • an ESD protection element that forms a current path that does not pass through the first and second thin film resistor elements and the thin film capacitor element when an electrostatic discharge of a predetermined voltage or higher occurs may be further provided.
  • the resistance thin film in the portion of the resistance thin film that overlaps the first metal thin film in plan view, the resistance thin film is pressed against the substrate by the first metal thin film, so that the resin layer expands at a high temperature.
  • the bending stress applied to the thin film resistance element can be relaxed, and the first reinforcing thin film is formed in the portion of the resistance thin film that does not overlap the first metal thin film in plan view.
  • the thin film resistance element can be prevented from being damaged by a stress or the like generated by the expansion of the resin layer, and a highly reliable thin film device with a thin film resistance element can be obtained.
  • FIG. 1 It is sectional drawing of the thin film device concerning 1st Embodiment of this invention. It is a top view which shows the principal part of the thin film device of FIG. 1, Comprising: It is a top view for demonstrating the arrangement position of the thin film for reinforcement which a thin film resistive element has. It is a figure which shows the electric circuit with which the thin film device of FIG. 1 is provided. It is sectional drawing of the thin film device concerning 2nd Embodiment of this invention. It is sectional drawing of the thin film device concerning 3rd Embodiment of this invention. It is a principal part enlarged view which shows the conventional thin film device, Comprising: The upper drawing is a schematic sectional drawing of a principal part, and the lower drawing is a figure which shows the schematic upper surface perspective view of a principal part.
  • FIG. 1 and FIG. 2 only the main configuration according to the present invention is shown for simplicity of explanation. 4 and 5 to be referred to in the following description, only the main components are shown as in FIGS. 1 and 2, but the description thereof is omitted in the following description.
  • the thin film device 100 includes a substrate 1 such as a glass substrate, a ceramic substrate, a resin substrate, a Si substrate (Si linear expansion coefficient: 3.4 ⁇ 10 ⁇ 6 / K), a GaAs substrate, and the one main surface 1a side of the substrate 1.
  • the thin film capacitor element C includes a capacitor electrode layer 5 formed of a Pt thin film in a predetermined region on one main surface 1a of the substrate 1, a (Ba, Sr) TiO 3 (hereinafter referred to as “BST”) dielectric layer 6 and And a capacitor electrode layer 7 formed of a Pt thin film on the BST dielectric layer 6.
  • the thin film capacitor element C is covered with a protective layer 8 formed of a SiO 2 moisture-resistant protective film, and the resin layer 2 is laminated on the protective layer 8.
  • a capacitor electrode on the upper side of the thin film capacitor element C is formed through a protective layer 8 and a through hole formed in the resin layer 2.
  • Cu / Ti lead electrode 10 connected to capacitor electrode layer 5 on the lower side of thin film capacitor element C, and second metal thin films 11a and 11b are formed. ing.
  • the second metal thin films 11a and 11b are formed simultaneously with the extraction electrodes 9 and 10 using the same material by the same thin film formation process.
  • the resin layer 3 is laminated on the resin layer 2 so as to cover the extraction electrodes 9 and 10 and the second metal thin films 11a and 11b.
  • the second metal thin films 11a and 11b and the extraction electrodes 9 and 10 are integrally formed.
  • the second metal thin films 11a and 11b and the extraction electrodes 9 and 10 are formed separately.
  • the second metal thin films 11a and 11b may be formed integrally with the other extraction electrode formed on the one main surface 2a of the resin layer 2.
  • Each of the thin film resistance elements R1 and R2 is one main layer of the resin layer 3 (corresponding to the “first resin layer” of the present invention) (linear expansion coefficient of the resin layer 3: 54.0 ⁇ 10 ⁇ 6 / K).
  • the first and second reinforcing thin films 12a and 12b and the connection electrodes 12c and 12d are formed in the state of being separated and arranged by the same thin film forming process using the same material containing Ni as a main component and Cr. Has been.
  • the resistive thin film 12 is formed of a material whose resistivity is higher than that of the first and second reinforcing thin films 12a and 12b.
  • each thin film resistive element R1, R2 may each be disperse
  • Each thin film resistance element R1, R2 (resistance thin film 12) is covered with a resin layer 4 laminated on one main surface 3a of the resin layer 3.
  • the one main surface 4a of the resin layer 4 (corresponding to the “second resin layer” of the present invention) (linear expansion coefficient of the resin layer 4: 54.0 ⁇ 10 ⁇ 6 / K) is not shown in detail.
  • Cu / Ti extraction electrodes 13 electrically connected to the extraction electrodes 9 and 10 and the connection electrodes 12c and 12d of the thin film resistance elements R1 to R13 through the through holes formed in the resin layers 3 and 4, respectively.
  • first metal thin films 15a, 15b, and 15c are formed.
  • Each of the first metal thin films 15a to 15c is formed simultaneously with the extraction electrodes 13 and 14 by using the same material by the same thin film forming process.
  • the first metal thin film 15c is formed separately from the first metal thin films 15a and 15b integrally formed with the extraction electrodes 13 and 14, respectively.
  • the first metal thin film 15c may be integrally formed with the first metal thin films 15a and 15b and other extraction electrodes.
  • the first reinforcing thin film 12a is disposed on the portion of the resistive thin film 12 that does not overlap with the second metal thin films 11a and 11b of the resin layer 2 disposed on the substrate 1 side of the resin layer 3 in plan view.
  • the second reinforcing thin film 12b is disposed.
  • first and second reinforcing thin films 12a and 12b are arranged so as to overlap the boundary portions of the first and second metal thin films 11a, 11b, 15a to 15c and the resistive thin film 12 in plan view. It is good to. Furthermore, since stress tends to concentrate on the boundary portion, bending stress applied to the thin film resistance element can be suitably reduced by arranging the reinforcing thin films 12a and 12b so as to overlap the boundary portion.
  • a plurality of Au / Ni external electrodes 16 are formed on the first metal thin films 15a and 15b connected to the extraction electrodes 13 and 14, and the extraction electrodes 13 and 14 and the first metal thin films 15a and 15b, A protective layer 17 formed of resin so as to cover the edge portions of each external electrode 16 is laminated on one main surface 4 a of the resin layer 4.
  • Each of the ESD protection elements D1, D2 is formed of a bidirectional Zener diode as shown in FIG.
  • the method of forming the bidirectional Zener diode is not particularly limited and is not shown in the figure.
  • the first semiconductor thin film of one of the p-type and n-type conductivity and the other conductivity type may be used.
  • a semiconductor film formed by n-type a-Si on a substrate 1 made of pn junction with a second semiconductor thin film or, for example, B-doped Si-formed p-type Thus, the ESD protection elements D1 and D2 can be formed.
  • the thin film device 100 configured as described above includes first to fourth external electrodes P1 to P4 each formed by an external electrode 16, and includes first and second external electrodes P1, Ten thin film capacitor elements C are connected in series between P2.
  • the other end of one of the plurality of first thin film resistance elements R1 having one end connected to the third external electrode P3 and the second thin film resistance element R2 having one end connected to the fourth external electrode P4.
  • the other end of each of the first thin film resistor elements R1 and each of the second thin films so that any one of the plurality of thin film capacitor elements C is inserted between the other end of each of the first thin film resistor elements C1.
  • the other end of each resistance element R2 is connected to both ends of each thin film capacitor element C.
  • ESD electrostatic discharge
  • the lower Pt capacitor electrode layer 5 is formed by sputtering in a predetermined region on the substrate 1 made of, for example, Si, the BST dielectric layer 6 is formed by MOD, and the upper Pt capacitor electrode layer 7 is formed by sputtering.
  • a plurality of thin film capacitor elements C are formed by patterning by RIE (reactive ion etching).
  • RIE reactive ion etching
  • a SiO 2 protective layer 8 covering each thin film capacitor element C is formed, and a resin layer 2 made of a phenol-based photosensitive resin insulating film in which through holes are formed by photolithography is formed, and the resin layer is cured. The heat treatment is performed.
  • the resin layer 2 may be formed so as to cover each thin film capacitor element C without providing the protective layer 8.
  • the SiO 2 moisture-resistant protective film in the through holes of the resin layer 2 is removed by dry etching, and the extraction electrodes 9 and 10 and the second metal thin films 11a and 11b are formed by using a sputtering method which is a thin film formation process.
  • a Ti film is formed, and a Cu film is formed.
  • a pattern is formed by etching by photolithography to form the extraction electrodes 9 and 10 and the second metal thin films 11a and 11b.
  • a resin layer 3 made of a phenol-based photosensitive resin insulating film having through holes formed by photolithography is formed, and a heat treatment for curing the resin layer is performed.
  • a lift-off resist is formed, and a resistance thin film 12 is formed by vapor deposition by a lift-off method using a vapor deposition material made of a mixture mainly composed of Ni, Cr, and Si.
  • a lift-off resist is formed, and the first and second reinforcing thin films 12a and 12b and the connection electrodes 12c and 12d are formed into a resistance thin film by a lift-off method using a vapor deposition material made of a mixture containing Ni and Cr as main components. 12 is formed by vapor deposition.
  • the first and second reinforcing thin films 12a and 12b are, when viewed in plan, the second metal thin films 11a and 11b on the resin layer 2 and the first metal on the resin layer 4 described later.
  • the thin films 15a to 15c are disposed so as to overlap with a portion where both of the thin films 15a to 15c cannot be formed or a portion where they are not formed.
  • a resin layer 4 made of a phenol-based photosensitive resin insulating film having through holes formed by photolithography is formed, and a heat treatment for curing the resin layer is performed.
  • a Ti film for forming the extraction electrodes 13 and 14 and the first metal thin films 15a to 15c is formed using a sputtering method which is a thin film formation process, and a Cu film is formed.
  • a resist with an opening provided at a predetermined position is formed on the formed Cu / Ti film, and the external electrodes 16 constituting the first to fourth external electrodes P1 to P4 are formed by Cu / Ti film by plating. It is formed at a predetermined position above. Then, after the resist is removed, the Cu / Ti film is patterned by photolithography etching to form the extraction electrodes 13 and 14 and the first metal thin films 15a to 15c.
  • a protective layer 17 made of a phenol-based photosensitive resin insulating film having an external electrode exposed portion formed by photolithography is formed, and after heat treatment for curing the resin layer, each thin film device 100 is subjected to dicing.
  • the thin film device 100 is completed by being separated into pieces.
  • the thin film device 100 configured as described above is mounted on another wiring board or the like using solder, wire bonding, or the like, so that the variable capacitance element having the first and second external electrodes P1 and P2 as input / output terminals is provided. Used as. That is, by adjusting the voltage between the third and fourth external electrodes P3 and P4, the voltage applied to both ends of each thin film capacitor element C through the first and second thin film resistance elements R1 and R2 can be arbitrarily set. By adjusting, the capacitance of each thin film capacitor element C can be adjusted.
  • the electrical circuit shown in FIG. 3 is an example, and the number of thin film capacitor elements C, the number of first and second thin film resistance elements R1 and R2, and the number of ESD protection elements D1 and D2 are examples shown in FIG. It is not limited to.
  • the resin layer 3 on which the thin film resistor elements R1 and R2 are formed is heated. It tries to expand toward the opposite side of the substrate 1 having a small expansion coefficient.
  • the first metal thin films 15a to 15c are formed on the resin layer 4 arranged on the opposite side of the resin layer 3 from the substrate 1, the first of the resistance thin films 12 of the thin film resistance elements R1 and R2 is included. In a portion overlapping the first metal thin film 15a to 15c in plan view, the resistance thin film 12 is pressed against the substrate 1 by the first metal thin film 15a to 15c.
  • the bending stress applied to the resistance thin film 12 by the expansion of the resin layer 3 in a high temperature state can be relaxed.
  • the first reinforcing thin film 12a is also formed in the portion of the resistance thin film 12 that does not overlap with the first metal thin films 15a to 15c in plan view, the stress generated by the expansion of the resin layer 3 This can prevent the thin film resistor elements R1, R2 from being damaged.
  • the high temperature state is maintained.
  • the resin layer 3 expands, the bending stress applied to the thin film resistor elements R1, R2 can be further relaxed.
  • the second reinforcing thin film 12b is also formed in the portion of the resistance thin film 12 that does not overlap with the second metal thin films 11a and 11b in plan view, the stress generated by the expansion of the resin layer 3 This can more reliably prevent the thin film resistor elements R1 and R2 from being damaged.
  • connection electrodes 12c and 12d for reducing the contact resistance with the extraction electrodes 13 and 14 connected to the thin film resistance elements R1 and R2 and the first and second reinforcing thin films 12a and 12b are made the same thin film.
  • the process for forming the first and second reinforcing thin films 12a and 12b can be simplified. Therefore, it is possible to provide a highly reliable thin film device 100 in which cracks and disconnections of the thin film resistor elements R1 and R2 are prevented using a conventional manufacturing process without increasing the manufacturing process. Moreover, the manufacturing cost of the thin film device 100 can be reduced.
  • the resistivity of the resistive thin film 12 is larger than the resistivity of the first and second reinforcing thin films 12a and 12b, the first and second reinforcing thin films 12a of the resistive thin film 12 are configured. , 12b, the resistance value depends on the resistivity of the first and second reinforcing thin films 12a, 12b. Therefore, by forming the first and second reinforcing thin films 12a and 12b in any shape and size on the resistive thin film 12, the resistance value design of the thin film resistive elements R1 and R2 can be easily performed.
  • the first metal thin films 15 a to 15 c may be formed to extend to the edge of the resin layer 4 so as to be exposed on the side surface of the thin film device 100. In this way, the stress absorbed by the first metal thin films 15 a to 15 c can be effectively released to the side surface of the thin film device 100. Further, since the first metal thin film 15 c and the extraction electrodes 13 and 14 are formed separately, it is possible to suppress the stress absorbed by the first metal thin film 15 c from being applied to the extraction electrodes 13 and 14. it can. Moreover, the same effect can be produced by forming the second metal thin film 11a and the extraction electrode 9 separately.
  • This embodiment is different from the first embodiment described above in that the second metal thin films 11a and 11b are not provided as shown in FIG.
  • differences from the above-described first embodiment will be mainly described, and other configurations are the same as those of the above-described first embodiment. Therefore, the same reference numerals are used to describe the configuration. Is omitted.
  • the thin film device 100 a includes a substrate 1, a plurality of resin layers 3 and 4 stacked on the one main surface 1 a side of the substrate 1, and a thin film resistance element R.
  • the thin film resistance element R includes a resistance thin film 12 mainly composed of Ni, Cr, and Si formed by a thin film formation process in a predetermined region of the one main surface 3a of the resin layer 3 laminated on the one main surface 1a of the substrate 1.
  • the first reinforcing thin film 12a and the connection electrodes 12c and 12d respectively formed on the resistive thin film 12 are provided.
  • the first and second reinforcing thin films 12a and 12b and the connection electrodes 12c and 12d are formed in the state of being separated and arranged by the same thin film forming process using the same material containing Ni as a main component and Cr. Has been.
  • the thin film resistive element R (resistive thin film 12) is covered with a resin layer 4 laminated on one main surface 3a of the resin layer 3. Further, on one main surface 4a of the resin layer 4, Cu / Ti lead electrodes 13, 14 electrically connected to the thin film resistance element R through through holes (not shown) formed in the resin layer 4, First metal thin films 15a to 15c are formed. As in the first embodiment described above, the first reinforcing thin film 12a is disposed in a portion of the resistive thin film 12 that does not overlap the first metal thin films 15a to 15c in plan view.
  • a plurality of Au / Ni external electrodes 16 are formed on the extraction electrodes 13 and 14 to cover the extraction electrodes 13 and 14 and the first metal thin films 15a and 15b and the edge portions of the respective external electrodes 16.
  • the protective layer 17 formed of resin is laminated on the one main surface 4 a of the resin layer 4.
  • a resin layer 3 made of a phenol-based photosensitive resin insulating film is formed on a substrate 1 made of, for example, Si, and heat treatment for curing the resin layer is performed.
  • a lift-off resist is formed, and the resistive thin film 12 is formed by vapor deposition by a lift-off method using a vapor deposition material made of a mixture containing Ni, Cr, and Si as main components.
  • a lift-off resist is formed, and the first reinforcing thin film 12a and the connection electrodes 12c and 12d are vapor-deposited on the resistance thin film 12 by a lift-off method using a vapor deposition material composed of a mixture containing Ni and Cr as main components. Is done.
  • the first reinforcing thin film 12a is disposed so as to overlap a portion where the first metal thin films 15a to 15c on the resin layer 4 to be described later cannot be formed or a portion where the first metal thin film 15a is not formed when viewed in plan. Is done.
  • a resin layer 4 made of a phenol-based photosensitive resin insulating film having through holes (not shown) formed by photolithography is formed, and heat treatment for curing the resin layer is performed.
  • a Ti film for forming the extraction electrodes 13 and 14 and the first metal thin films 15a to 15c is formed using a sputtering method which is a thin film formation process, and a Cu film is formed.
  • a resist having an opening at a predetermined position is patterned on the formed Cu / Ti film, and the external electrode 16 is formed at a predetermined position on the Cu / Ti film by plating. Then, after the resist is removed, the Cu / Ti film is patterned by photolithography etching to form the extraction electrodes 13 and 14 and the first metal thin films 15a to 15c.
  • a protective layer 17 made of a phenol-based photosensitive resin insulating film having external electrode exposed portions formed by photolithography is formed, and after heat treatment for curing the resin layer, dicing is performed for each thin film device 100a.
  • the thin film device 100a is completed by being separated into pieces.
  • the first reinforcing thin film 12a is formed in a portion of the resistance thin film 12 that does not overlap the first metal thin films 15a to 15c in plan view. Therefore, even if the resin layer 3 expands in a high temperature state, for example, it is possible to prevent the thin film resistance element R from being damaged by the stress generated by the expansion of the resin layers 3 and 4.
  • connection electrodes 12c and 12d are not formed on the resistive thin film 12, as shown in FIG. Since other configurations are the same as those in the first embodiment, description of the configurations is omitted by citing the same reference numerals.
  • connection electrodes 12c and 12d are not formed on the resistance thin film 12
  • the first and second thin film resistance elements R are formed by the first reinforcing thin film 12a as in the second embodiment.
  • a highly reliable thin film device 100 that is prevented from being damaged can be provided.
  • the present invention is not limited to the above-described embodiment, and various modifications other than those described above can be made without departing from the spirit of the present invention. They may be combined.
  • the material of the thin film resistance elements R, R1, R2 (resistance thin film 12) is not limited to the above-described example, and the thin film resistance elements R, R1, R2 may be formed of, for example, a CrSi alloy.
  • the thin film resistor elements R, R1, and R2 may be formed of a conductive material such as Pt.
  • the first and second metal thin films 11a, 11b, 15a to 15c described above may form a signal line through which a high-frequency signal passes, or form a power supply line connected to a power source. It may be a dummy electrode.
  • a thin film device in which various circuits including the thin film resistor element are configured by appropriately combining thin film circuit elements such as a thin film capacitor element, a thin film inductor element, and a thin film thermistor element is provided.
  • the thin film capacitor element, the thin film inductor element, and the thin film thermistor element may have a general thin film circuit element structure.
  • a device for adjusting antenna sensitivity of a short-range communication device or a noise filter device for photodiodes can be constituted by the thin film device of the present invention.
  • the dielectric material for forming the dielectric layer is not limited to the above example.
  • the dielectric layer may be formed of a dielectric material such as BaTiO 3 , SrTiO 3 , or PbTiO 3 .
  • the present invention can be widely applied to a thin film device including a thin film resistance element.

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Apparatuses And Processes For Manufacturing Resistors (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Ceramic Capacitors (AREA)

Abstract

L'objectif de la présente invention est de fournir une caractéristique permettant d'empêcher un élément de résistance à film mince de se rompre en raison de la contrainte engendrée par l'expansion d'une couche de résine, et d'obtenir un dispositif à film mince hautement fiable. Dans des parties d'un film mince résistif 12 chevauchant des premiers films minces métalliques 15a-15c dans une vue en plan, le film mince résistif 12 est maintenu contre un substrat 1 par les premiers films minces métalliques 15a-15c, rendant possible l'atténuation de la contrainte de flexion, etc., appliquée aux éléments de résistance à film mince R1, R2 par expansion d'une couche de résine 3 dans un état à haute température. Dans des parties d'un film mince résistif 12 qui ne chevauchent pas des premiers films minces métalliques 15a-15c dans une vue en plan, un premier film mince de renfort 12 est formé, permettant ainsi d'empêcher que les éléments de résistance à film mince R1, R2 ne se rompent en raison de la contrainte, etc., engendrée par l'expansion de la couche de résine 3. Il est ainsi possible d'obtenir un dispositif à film mince 100 ayant des éléments de résistance à film mince R1, R2 très fiables.
PCT/JP2016/059103 2015-05-13 2016-03-23 Dispositif à film mince WO2016181710A1 (fr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2017515872A JP6191804B2 (ja) 2015-05-13 2016-03-23 薄膜デバイス
CN201690000755.4U CN207572353U (zh) 2015-05-13 2016-03-23 薄膜器件

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2015098307 2015-05-13
JP2015-098307 2015-05-13

Publications (1)

Publication Number Publication Date
WO2016181710A1 true WO2016181710A1 (fr) 2016-11-17

Family

ID=57247903

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2016/059103 WO2016181710A1 (fr) 2015-05-13 2016-03-23 Dispositif à film mince

Country Status (3)

Country Link
JP (1) JP6191804B2 (fr)
CN (1) CN207572353U (fr)
WO (1) WO2016181710A1 (fr)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10978249B2 (en) 2017-02-17 2021-04-13 Murata Manufacturing Co, Ltd. Thin-film device and method of manufacturing thin-film device
WO2022149371A1 (fr) * 2021-01-08 2022-07-14 ローム株式会社 Composant électronique
WO2023112551A1 (fr) * 2021-12-17 2023-06-22 ローム株式会社 Dispositif à semi-conducteurs et son procédé de fabrication

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03225950A (ja) * 1990-01-31 1991-10-04 Sony Corp 半導体装置の製造方法
US20060228879A1 (en) * 2005-04-08 2006-10-12 Texas Instruments Incorporated Thin film resistor head structure and method for reducing head resistivity variance
JP2006332428A (ja) * 2005-05-27 2006-12-07 Seiko Instruments Inc 半導体集積回路装置
JP2015088585A (ja) * 2013-10-30 2015-05-07 ルネサスエレクトロニクス株式会社 半導体装置

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03225950A (ja) * 1990-01-31 1991-10-04 Sony Corp 半導体装置の製造方法
US20060228879A1 (en) * 2005-04-08 2006-10-12 Texas Instruments Incorporated Thin film resistor head structure and method for reducing head resistivity variance
JP2006332428A (ja) * 2005-05-27 2006-12-07 Seiko Instruments Inc 半導体集積回路装置
JP2015088585A (ja) * 2013-10-30 2015-05-07 ルネサスエレクトロニクス株式会社 半導体装置

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10978249B2 (en) 2017-02-17 2021-04-13 Murata Manufacturing Co, Ltd. Thin-film device and method of manufacturing thin-film device
WO2022149371A1 (fr) * 2021-01-08 2022-07-14 ローム株式会社 Composant électronique
WO2023112551A1 (fr) * 2021-12-17 2023-06-22 ローム株式会社 Dispositif à semi-conducteurs et son procédé de fabrication

Also Published As

Publication number Publication date
JP6191804B2 (ja) 2017-09-06
CN207572353U (zh) 2018-07-03
JPWO2016181710A1 (ja) 2017-08-10

Similar Documents

Publication Publication Date Title
US10593480B2 (en) Chip capacitor, circuit assembly, and electronic device
JP4674606B2 (ja) 薄膜キャパシタ
US10424440B2 (en) Capacitor having an auxiliary electrode
JP2004079579A (ja) 半導体装置
US20090283914A1 (en) Silicon interposer and method for manufacturing the same
JP6222365B2 (ja) Ｅｓｄ保護機能付複合電子部品
TWI503856B (zh) 金屬薄膜表面安裝保險絲
US10770451B2 (en) Thin-film ESD protection device
JP6269639B2 (ja) Ｅｓｄ保護デバイス
JP6191804B2 (ja) 薄膜デバイス
JPWO2017057422A1 (ja) 薄膜型ｌｃ部品およびその実装構造
JP6319467B2 (ja) 薄膜デバイス
US8664744B2 (en) Anti-fuse element without defective opens
US11469593B2 (en) Thin-film ESD protection device with compact size
US10410772B2 (en) Chip resistor
US20150162327A1 (en) Semiconductor module
KR20130128403A (ko) 세라믹 다층 소자 및 세라믹 다층 소자의 제조 방법
JP6819894B2 (ja) 電子部品
US9698092B2 (en) Electronic device
US20160064614A1 (en) Light emitting diode package and manufacturing method thereof
TWI490890B (zh) 過電流保護元件
JP2018078259A (ja) 薄膜デバイス
KR20020073821A (ko) 서지 보호 회로부를 포함하는 반도체 소자 및 그 제조방법

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 16792435

Country of ref document: EP

Kind code of ref document: A1

ENP Entry into the national phase

Ref document number: 2017515872

Country of ref document: JP

Kind code of ref document: A

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 16792435

Country of ref document: EP

Kind code of ref document: A1