WO2016181710A1 - Thin film device - Google Patents

Thin film device Download PDF

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Publication number
WO2016181710A1
WO2016181710A1 PCT/JP2016/059103 JP2016059103W WO2016181710A1 WO 2016181710 A1 WO2016181710 A1 WO 2016181710A1 JP 2016059103 W JP2016059103 W JP 2016059103W WO 2016181710 A1 WO2016181710 A1 WO 2016181710A1
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WO
WIPO (PCT)
Prior art keywords
thin film
resin layer
resistive
reinforcing
substrate
Prior art date
Application number
PCT/JP2016/059103
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French (fr)
Japanese (ja)
Inventor
智行 芦峰
智 進藤
竹島　裕
Original Assignee
株式会社村田製作所
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Application filed by 株式会社村田製作所 filed Critical 株式会社村田製作所
Priority to JP2017515872A priority Critical patent/JP6191804B2/en
Priority to CN201690000755.4U priority patent/CN207572353U/en
Publication of WO2016181710A1 publication Critical patent/WO2016181710A1/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body

Definitions

  • the present invention relates to a thin film device including a thin film resistance element.
  • a conventional thin film device 500 shown in FIG. 6 is provided between an integrated circuit 502 formed on a semiconductor substrate 501, a plurality of electrode pads 503 arranged on the integrated circuit 502, and each electrode pad 503. And a resin layer 505 formed on the passivation film 504.
  • the resin layer 505 is formed of polyimide resin, epoxy resin, or the like, and a through hole is provided at a position overlapping the electrode pad 503 of the resin layer 505.
  • a rewiring 507 connected to the electrode pad 503 through the barrier metal layer 506 in the through hole is formed on the resin layer 505.
  • a thin film resistance element 508 is provided at a position between the rewiring 507 on the resin layer 505.
  • the thin film resistance element 508 includes a barrier metal layer 506 and a seed layer 509 stacked on the barrier metal layer 506.
  • the barrier metal layer 506 is formed of Ti, TiN, Ni, or the like, and is provided to improve the adhesion between the electrode pad 503 and the rewiring 507.
  • the seed layer 509 functions as an electrode when the rewiring 507 is formed by a plating method, and is formed of Cu, Al, or the like.
  • the resistance value of the thin film resistive element 508 is adjusted by adjusting the film thicknesses of the barrier metal layer 506 and the seed layer 509 as appropriate.
  • JP 2009-267248 A (paragraphs 0012, 0016, 0017, FIG. 1, etc.)
  • the thin film device 500 shown in FIG. 6 when the thin film device 500 shown in FIG. 6 is heated in a thermal cycle when mounted on another substrate or the like, a bending stress is applied to the thin film resistance element 508 due to expansion of the resin layer 505, etc.
  • the thin film resistance element 508 may be damaged.
  • the present invention has been made in view of the above-described problems, and can prevent a thin film resistive element from being damaged by a stress or the like caused by expansion of a resin layer, thereby obtaining a highly reliable thin film device.
  • the purpose is to provide technology.
  • a thin film device of the present invention includes a substrate and a plurality of resin layers laminated on one main surface side of the substrate, and the plurality of resin layers includes one thin film resistor element.
  • the thin film resistor element includes a resistive thin film and a first reinforcing thin film formed on the resistive thin film, and the first reinforcing thin film overlaps the first metal thin film in plan view. It is characterized by being placed in the part that should not be.
  • the first resin layer on which the thin film resistance element is formed has a coefficient of thermal expansion. Attempts to expand toward the opposite side of the small substrate.
  • the first metal thin film is formed on the second resin layer disposed on the side opposite to the substrate of the first resin layer, the first metal thin film among the resistance thin films included in the thin film resistance element In a portion overlapping in plan view, the resistive thin film is pressed against the substrate by the first metal thin film. Therefore, the bending stress applied to the resistance thin film can be relaxed by the expansion of the resin layer in a high temperature state.
  • the first reinforcing thin film is formed, so that the thin film resistance element is damaged by the stress generated by the expansion of the resin layer. Can be prevented.
  • the thin film resistance element may further include a connection electrode formed on the resistance thin film, and the first reinforcing thin film and the connection electrode may be simultaneously formed by the same process.
  • connection electrode for reducing the contact resistance with the extraction electrode connected to the thin film resistance element and the first reinforcing thin film are simultaneously formed on the resistance thin film using the same material by the same process.
  • the process for forming the first reinforcing thin film can be simplified. Therefore, it is possible to provide a highly reliable thin film device in which cracks and disconnections of the thin film resistor element are prevented using a conventional manufacturing process without increasing the manufacturing process. In addition, the manufacturing cost of the thin film device can be reduced.
  • the resistive thin film may contain Si.
  • the resistivity of the resistive thin film may be larger than the resistivity of the first reinforcing thin film.
  • the resistance value depends on the resistivity of the 1st thin film for reinforcing, arbitrary on the resistive thin film
  • the plurality of resin layers further include a third resin layer provided on one main surface with a second metal thin film disposed on the substrate side of the first resin layer, and the thin film resistor element includes: It is preferable to further include a second reinforcing thin film formed on the resistive thin film, and the second reinforcing thin film is disposed in a portion not overlapping the second metal thin film in plan view.
  • the other end of each of the first and second thin film resistor elements may be connected to both ends of the thin film capacitor element.
  • the capacitance of the thin film capacitor element is adjusted by adjusting the voltage between the third and fourth external electrodes and arbitrarily adjusting the voltage applied to both ends of the thin film capacitor element via the first and second thin film resistor elements. Can be adjusted.
  • an ESD protection element that forms a current path that does not pass through the first and second thin film resistor elements and the thin film capacitor element when an electrostatic discharge of a predetermined voltage or higher occurs may be further provided.
  • the resistance thin film in the portion of the resistance thin film that overlaps the first metal thin film in plan view, the resistance thin film is pressed against the substrate by the first metal thin film, so that the resin layer expands at a high temperature.
  • the bending stress applied to the thin film resistance element can be relaxed, and the first reinforcing thin film is formed in the portion of the resistance thin film that does not overlap the first metal thin film in plan view.
  • the thin film resistance element can be prevented from being damaged by a stress or the like generated by the expansion of the resin layer, and a highly reliable thin film device with a thin film resistance element can be obtained.
  • FIG. 1 It is sectional drawing of the thin film device concerning 1st Embodiment of this invention. It is a top view which shows the principal part of the thin film device of FIG. 1, Comprising: It is a top view for demonstrating the arrangement position of the thin film for reinforcement which a thin film resistive element has. It is a figure which shows the electric circuit with which the thin film device of FIG. 1 is provided. It is sectional drawing of the thin film device concerning 2nd Embodiment of this invention. It is sectional drawing of the thin film device concerning 3rd Embodiment of this invention. It is a principal part enlarged view which shows the conventional thin film device, Comprising: The upper drawing is a schematic sectional drawing of a principal part, and the lower drawing is a figure which shows the schematic upper surface perspective view of a principal part.
  • FIG. 1 and FIG. 2 only the main configuration according to the present invention is shown for simplicity of explanation. 4 and 5 to be referred to in the following description, only the main components are shown as in FIGS. 1 and 2, but the description thereof is omitted in the following description.
  • the thin film device 100 includes a substrate 1 such as a glass substrate, a ceramic substrate, a resin substrate, a Si substrate (Si linear expansion coefficient: 3.4 ⁇ 10 ⁇ 6 / K), a GaAs substrate, and the one main surface 1a side of the substrate 1.
  • the thin film capacitor element C includes a capacitor electrode layer 5 formed of a Pt thin film in a predetermined region on one main surface 1a of the substrate 1, a (Ba, Sr) TiO 3 (hereinafter referred to as “BST”) dielectric layer 6 and And a capacitor electrode layer 7 formed of a Pt thin film on the BST dielectric layer 6.
  • the thin film capacitor element C is covered with a protective layer 8 formed of a SiO 2 moisture-resistant protective film, and the resin layer 2 is laminated on the protective layer 8.
  • a capacitor electrode on the upper side of the thin film capacitor element C is formed through a protective layer 8 and a through hole formed in the resin layer 2.
  • Cu / Ti lead electrode 10 connected to capacitor electrode layer 5 on the lower side of thin film capacitor element C, and second metal thin films 11a and 11b are formed. ing.
  • the second metal thin films 11a and 11b are formed simultaneously with the extraction electrodes 9 and 10 using the same material by the same thin film formation process.
  • the resin layer 3 is laminated on the resin layer 2 so as to cover the extraction electrodes 9 and 10 and the second metal thin films 11a and 11b.
  • the second metal thin films 11a and 11b and the extraction electrodes 9 and 10 are integrally formed.
  • the second metal thin films 11a and 11b and the extraction electrodes 9 and 10 are formed separately.
  • the second metal thin films 11a and 11b may be formed integrally with the other extraction electrode formed on the one main surface 2a of the resin layer 2.
  • Each of the thin film resistance elements R1 and R2 is one main layer of the resin layer 3 (corresponding to the “first resin layer” of the present invention) (linear expansion coefficient of the resin layer 3: 54.0 ⁇ 10 ⁇ 6 / K).
  • the first and second reinforcing thin films 12a and 12b and the connection electrodes 12c and 12d are formed in the state of being separated and arranged by the same thin film forming process using the same material containing Ni as a main component and Cr. Has been.
  • the resistive thin film 12 is formed of a material whose resistivity is higher than that of the first and second reinforcing thin films 12a and 12b.
  • each thin film resistive element R1, R2 may each be disperse
  • Each thin film resistance element R1, R2 (resistance thin film 12) is covered with a resin layer 4 laminated on one main surface 3a of the resin layer 3.
  • the one main surface 4a of the resin layer 4 (corresponding to the “second resin layer” of the present invention) (linear expansion coefficient of the resin layer 4: 54.0 ⁇ 10 ⁇ 6 / K) is not shown in detail.
  • Cu / Ti extraction electrodes 13 electrically connected to the extraction electrodes 9 and 10 and the connection electrodes 12c and 12d of the thin film resistance elements R1 to R13 through the through holes formed in the resin layers 3 and 4, respectively.
  • first metal thin films 15a, 15b, and 15c are formed.
  • Each of the first metal thin films 15a to 15c is formed simultaneously with the extraction electrodes 13 and 14 by using the same material by the same thin film forming process.
  • the first metal thin film 15c is formed separately from the first metal thin films 15a and 15b integrally formed with the extraction electrodes 13 and 14, respectively.
  • the first metal thin film 15c may be integrally formed with the first metal thin films 15a and 15b and other extraction electrodes.
  • the first reinforcing thin film 12a is disposed on the portion of the resistive thin film 12 that does not overlap with the second metal thin films 11a and 11b of the resin layer 2 disposed on the substrate 1 side of the resin layer 3 in plan view.
  • the second reinforcing thin film 12b is disposed.
  • first and second reinforcing thin films 12a and 12b are arranged so as to overlap the boundary portions of the first and second metal thin films 11a, 11b, 15a to 15c and the resistive thin film 12 in plan view. It is good to. Furthermore, since stress tends to concentrate on the boundary portion, bending stress applied to the thin film resistance element can be suitably reduced by arranging the reinforcing thin films 12a and 12b so as to overlap the boundary portion.
  • a plurality of Au / Ni external electrodes 16 are formed on the first metal thin films 15a and 15b connected to the extraction electrodes 13 and 14, and the extraction electrodes 13 and 14 and the first metal thin films 15a and 15b, A protective layer 17 formed of resin so as to cover the edge portions of each external electrode 16 is laminated on one main surface 4 a of the resin layer 4.
  • Each of the ESD protection elements D1, D2 is formed of a bidirectional Zener diode as shown in FIG.
  • the method of forming the bidirectional Zener diode is not particularly limited and is not shown in the figure.
  • the first semiconductor thin film of one of the p-type and n-type conductivity and the other conductivity type may be used.
  • a semiconductor film formed by n-type a-Si on a substrate 1 made of pn junction with a second semiconductor thin film or, for example, B-doped Si-formed p-type Thus, the ESD protection elements D1 and D2 can be formed.
  • the thin film device 100 configured as described above includes first to fourth external electrodes P1 to P4 each formed by an external electrode 16, and includes first and second external electrodes P1, Ten thin film capacitor elements C are connected in series between P2.
  • the other end of one of the plurality of first thin film resistance elements R1 having one end connected to the third external electrode P3 and the second thin film resistance element R2 having one end connected to the fourth external electrode P4.
  • the other end of each of the first thin film resistor elements R1 and each of the second thin films so that any one of the plurality of thin film capacitor elements C is inserted between the other end of each of the first thin film resistor elements C1.
  • the other end of each resistance element R2 is connected to both ends of each thin film capacitor element C.
  • ESD electrostatic discharge
  • the lower Pt capacitor electrode layer 5 is formed by sputtering in a predetermined region on the substrate 1 made of, for example, Si, the BST dielectric layer 6 is formed by MOD, and the upper Pt capacitor electrode layer 7 is formed by sputtering.
  • a plurality of thin film capacitor elements C are formed by patterning by RIE (reactive ion etching).
  • RIE reactive ion etching
  • a SiO 2 protective layer 8 covering each thin film capacitor element C is formed, and a resin layer 2 made of a phenol-based photosensitive resin insulating film in which through holes are formed by photolithography is formed, and the resin layer is cured. The heat treatment is performed.
  • the resin layer 2 may be formed so as to cover each thin film capacitor element C without providing the protective layer 8.
  • the SiO 2 moisture-resistant protective film in the through holes of the resin layer 2 is removed by dry etching, and the extraction electrodes 9 and 10 and the second metal thin films 11a and 11b are formed by using a sputtering method which is a thin film formation process.
  • a Ti film is formed, and a Cu film is formed.
  • a pattern is formed by etching by photolithography to form the extraction electrodes 9 and 10 and the second metal thin films 11a and 11b.
  • a resin layer 3 made of a phenol-based photosensitive resin insulating film having through holes formed by photolithography is formed, and a heat treatment for curing the resin layer is performed.
  • a lift-off resist is formed, and a resistance thin film 12 is formed by vapor deposition by a lift-off method using a vapor deposition material made of a mixture mainly composed of Ni, Cr, and Si.
  • a lift-off resist is formed, and the first and second reinforcing thin films 12a and 12b and the connection electrodes 12c and 12d are formed into a resistance thin film by a lift-off method using a vapor deposition material made of a mixture containing Ni and Cr as main components. 12 is formed by vapor deposition.
  • the first and second reinforcing thin films 12a and 12b are, when viewed in plan, the second metal thin films 11a and 11b on the resin layer 2 and the first metal on the resin layer 4 described later.
  • the thin films 15a to 15c are disposed so as to overlap with a portion where both of the thin films 15a to 15c cannot be formed or a portion where they are not formed.
  • a resin layer 4 made of a phenol-based photosensitive resin insulating film having through holes formed by photolithography is formed, and a heat treatment for curing the resin layer is performed.
  • a Ti film for forming the extraction electrodes 13 and 14 and the first metal thin films 15a to 15c is formed using a sputtering method which is a thin film formation process, and a Cu film is formed.
  • a resist with an opening provided at a predetermined position is formed on the formed Cu / Ti film, and the external electrodes 16 constituting the first to fourth external electrodes P1 to P4 are formed by Cu / Ti film by plating. It is formed at a predetermined position above. Then, after the resist is removed, the Cu / Ti film is patterned by photolithography etching to form the extraction electrodes 13 and 14 and the first metal thin films 15a to 15c.
  • a protective layer 17 made of a phenol-based photosensitive resin insulating film having an external electrode exposed portion formed by photolithography is formed, and after heat treatment for curing the resin layer, each thin film device 100 is subjected to dicing.
  • the thin film device 100 is completed by being separated into pieces.
  • the thin film device 100 configured as described above is mounted on another wiring board or the like using solder, wire bonding, or the like, so that the variable capacitance element having the first and second external electrodes P1 and P2 as input / output terminals is provided. Used as. That is, by adjusting the voltage between the third and fourth external electrodes P3 and P4, the voltage applied to both ends of each thin film capacitor element C through the first and second thin film resistance elements R1 and R2 can be arbitrarily set. By adjusting, the capacitance of each thin film capacitor element C can be adjusted.
  • the electrical circuit shown in FIG. 3 is an example, and the number of thin film capacitor elements C, the number of first and second thin film resistance elements R1 and R2, and the number of ESD protection elements D1 and D2 are examples shown in FIG. It is not limited to.
  • the resin layer 3 on which the thin film resistor elements R1 and R2 are formed is heated. It tries to expand toward the opposite side of the substrate 1 having a small expansion coefficient.
  • the first metal thin films 15a to 15c are formed on the resin layer 4 arranged on the opposite side of the resin layer 3 from the substrate 1, the first of the resistance thin films 12 of the thin film resistance elements R1 and R2 is included. In a portion overlapping the first metal thin film 15a to 15c in plan view, the resistance thin film 12 is pressed against the substrate 1 by the first metal thin film 15a to 15c.
  • the bending stress applied to the resistance thin film 12 by the expansion of the resin layer 3 in a high temperature state can be relaxed.
  • the first reinforcing thin film 12a is also formed in the portion of the resistance thin film 12 that does not overlap with the first metal thin films 15a to 15c in plan view, the stress generated by the expansion of the resin layer 3 This can prevent the thin film resistor elements R1, R2 from being damaged.
  • the high temperature state is maintained.
  • the resin layer 3 expands, the bending stress applied to the thin film resistor elements R1, R2 can be further relaxed.
  • the second reinforcing thin film 12b is also formed in the portion of the resistance thin film 12 that does not overlap with the second metal thin films 11a and 11b in plan view, the stress generated by the expansion of the resin layer 3 This can more reliably prevent the thin film resistor elements R1 and R2 from being damaged.
  • connection electrodes 12c and 12d for reducing the contact resistance with the extraction electrodes 13 and 14 connected to the thin film resistance elements R1 and R2 and the first and second reinforcing thin films 12a and 12b are made the same thin film.
  • the process for forming the first and second reinforcing thin films 12a and 12b can be simplified. Therefore, it is possible to provide a highly reliable thin film device 100 in which cracks and disconnections of the thin film resistor elements R1 and R2 are prevented using a conventional manufacturing process without increasing the manufacturing process. Moreover, the manufacturing cost of the thin film device 100 can be reduced.
  • the resistivity of the resistive thin film 12 is larger than the resistivity of the first and second reinforcing thin films 12a and 12b, the first and second reinforcing thin films 12a of the resistive thin film 12 are configured. , 12b, the resistance value depends on the resistivity of the first and second reinforcing thin films 12a, 12b. Therefore, by forming the first and second reinforcing thin films 12a and 12b in any shape and size on the resistive thin film 12, the resistance value design of the thin film resistive elements R1 and R2 can be easily performed.
  • the first metal thin films 15 a to 15 c may be formed to extend to the edge of the resin layer 4 so as to be exposed on the side surface of the thin film device 100. In this way, the stress absorbed by the first metal thin films 15 a to 15 c can be effectively released to the side surface of the thin film device 100. Further, since the first metal thin film 15 c and the extraction electrodes 13 and 14 are formed separately, it is possible to suppress the stress absorbed by the first metal thin film 15 c from being applied to the extraction electrodes 13 and 14. it can. Moreover, the same effect can be produced by forming the second metal thin film 11a and the extraction electrode 9 separately.
  • This embodiment is different from the first embodiment described above in that the second metal thin films 11a and 11b are not provided as shown in FIG.
  • differences from the above-described first embodiment will be mainly described, and other configurations are the same as those of the above-described first embodiment. Therefore, the same reference numerals are used to describe the configuration. Is omitted.
  • the thin film device 100 a includes a substrate 1, a plurality of resin layers 3 and 4 stacked on the one main surface 1 a side of the substrate 1, and a thin film resistance element R.
  • the thin film resistance element R includes a resistance thin film 12 mainly composed of Ni, Cr, and Si formed by a thin film formation process in a predetermined region of the one main surface 3a of the resin layer 3 laminated on the one main surface 1a of the substrate 1.
  • the first reinforcing thin film 12a and the connection electrodes 12c and 12d respectively formed on the resistive thin film 12 are provided.
  • the first and second reinforcing thin films 12a and 12b and the connection electrodes 12c and 12d are formed in the state of being separated and arranged by the same thin film forming process using the same material containing Ni as a main component and Cr. Has been.
  • the thin film resistive element R (resistive thin film 12) is covered with a resin layer 4 laminated on one main surface 3a of the resin layer 3. Further, on one main surface 4a of the resin layer 4, Cu / Ti lead electrodes 13, 14 electrically connected to the thin film resistance element R through through holes (not shown) formed in the resin layer 4, First metal thin films 15a to 15c are formed. As in the first embodiment described above, the first reinforcing thin film 12a is disposed in a portion of the resistive thin film 12 that does not overlap the first metal thin films 15a to 15c in plan view.
  • a plurality of Au / Ni external electrodes 16 are formed on the extraction electrodes 13 and 14 to cover the extraction electrodes 13 and 14 and the first metal thin films 15a and 15b and the edge portions of the respective external electrodes 16.
  • the protective layer 17 formed of resin is laminated on the one main surface 4 a of the resin layer 4.
  • a resin layer 3 made of a phenol-based photosensitive resin insulating film is formed on a substrate 1 made of, for example, Si, and heat treatment for curing the resin layer is performed.
  • a lift-off resist is formed, and the resistive thin film 12 is formed by vapor deposition by a lift-off method using a vapor deposition material made of a mixture containing Ni, Cr, and Si as main components.
  • a lift-off resist is formed, and the first reinforcing thin film 12a and the connection electrodes 12c and 12d are vapor-deposited on the resistance thin film 12 by a lift-off method using a vapor deposition material composed of a mixture containing Ni and Cr as main components. Is done.
  • the first reinforcing thin film 12a is disposed so as to overlap a portion where the first metal thin films 15a to 15c on the resin layer 4 to be described later cannot be formed or a portion where the first metal thin film 15a is not formed when viewed in plan. Is done.
  • a resin layer 4 made of a phenol-based photosensitive resin insulating film having through holes (not shown) formed by photolithography is formed, and heat treatment for curing the resin layer is performed.
  • a Ti film for forming the extraction electrodes 13 and 14 and the first metal thin films 15a to 15c is formed using a sputtering method which is a thin film formation process, and a Cu film is formed.
  • a resist having an opening at a predetermined position is patterned on the formed Cu / Ti film, and the external electrode 16 is formed at a predetermined position on the Cu / Ti film by plating. Then, after the resist is removed, the Cu / Ti film is patterned by photolithography etching to form the extraction electrodes 13 and 14 and the first metal thin films 15a to 15c.
  • a protective layer 17 made of a phenol-based photosensitive resin insulating film having external electrode exposed portions formed by photolithography is formed, and after heat treatment for curing the resin layer, dicing is performed for each thin film device 100a.
  • the thin film device 100a is completed by being separated into pieces.
  • the first reinforcing thin film 12a is formed in a portion of the resistance thin film 12 that does not overlap the first metal thin films 15a to 15c in plan view. Therefore, even if the resin layer 3 expands in a high temperature state, for example, it is possible to prevent the thin film resistance element R from being damaged by the stress generated by the expansion of the resin layers 3 and 4.
  • connection electrodes 12c and 12d are not formed on the resistive thin film 12, as shown in FIG. Since other configurations are the same as those in the first embodiment, description of the configurations is omitted by citing the same reference numerals.
  • connection electrodes 12c and 12d are not formed on the resistance thin film 12
  • the first and second thin film resistance elements R are formed by the first reinforcing thin film 12a as in the second embodiment.
  • a highly reliable thin film device 100 that is prevented from being damaged can be provided.
  • the present invention is not limited to the above-described embodiment, and various modifications other than those described above can be made without departing from the spirit of the present invention. They may be combined.
  • the material of the thin film resistance elements R, R1, R2 (resistance thin film 12) is not limited to the above-described example, and the thin film resistance elements R, R1, R2 may be formed of, for example, a CrSi alloy.
  • the thin film resistor elements R, R1, and R2 may be formed of a conductive material such as Pt.
  • the first and second metal thin films 11a, 11b, 15a to 15c described above may form a signal line through which a high-frequency signal passes, or form a power supply line connected to a power source. It may be a dummy electrode.
  • a thin film device in which various circuits including the thin film resistor element are configured by appropriately combining thin film circuit elements such as a thin film capacitor element, a thin film inductor element, and a thin film thermistor element is provided.
  • the thin film capacitor element, the thin film inductor element, and the thin film thermistor element may have a general thin film circuit element structure.
  • a device for adjusting antenna sensitivity of a short-range communication device or a noise filter device for photodiodes can be constituted by the thin film device of the present invention.
  • the dielectric material for forming the dielectric layer is not limited to the above example.
  • the dielectric layer may be formed of a dielectric material such as BaTiO 3 , SrTiO 3 , or PbTiO 3 .
  • the present invention can be widely applied to a thin film device including a thin film resistance element.

Abstract

The purpose of the present invention is to provide a feature making it possible to prevent a thin film resistance element from breaking due to stress caused by resin layer expansion, and obtain a highly reliable thin film device. In portions of a resistive thin film 12 overlapping with first metal thin films 15a-15c in plan view, the resistive thin film 12 is held against a substrate 1 by the first metal thin films 15a-15c, making it possible to mitigate flexural stress, etc., applied to thin film resistance elements R1, R2 by expansion of a resin layer 3 in a high-temperature state. In portions of a resistive thin film 12 that do not overlap with the first metal thin films 15a-15c in plan view, a first reinforcement thin film 12 is formed, making it possible to prevent the thin film resistance elements R1, R2 from breaking due to stress, etc., caused by the expansion of the resin layer 3. It is thus possible to obtain a thin film device 100 having highly reliable thin film resistance elements R1, R2.

Description

薄膜デバイスThin film device
　本発明は、薄膜抵抗素子を備える薄膜デバイスに関する。 The present invention relates to a thin film device including a thin film resistance element.
　従来、薄膜抵抗素子を備える種々の薄膜デバイスが提供されている（例えば特許文献１参照）。例えば、図６に示す従来の薄膜デバイス５００は、半導体基板５０１上に形成された集積回路５０２と、集積回路５０２上に配置された複数の電極パッド５０３と、各電極パッド５０３間に設けられたパッシベーション膜５０４上に形成された樹脂層５０５とを備えている。樹脂層５０５はポリイミド樹脂やエポキシ樹脂等により形成され、樹脂層５０５の電極パッド５０３に重なる位置に貫通孔が設けられている。また、貫通孔内においてバリアメタル層５０６を介して電極パッド５０３に接続される再配線５０７が樹脂層５０５上に形成されている。そして、樹脂層５０５上の再配線５０７に挟まれた位置に薄膜抵抗素子５０８が設けられている。 Conventionally, various thin film devices including a thin film resistance element have been provided (see, for example, Patent Document 1). For example, a conventional thin film device 500 shown in FIG. 6 is provided between an integrated circuit 502 formed on a semiconductor substrate 501, a plurality of electrode pads 503 arranged on the integrated circuit 502, and each electrode pad 503. And a resin layer 505 formed on the passivation film 504. The resin layer 505 is formed of polyimide resin, epoxy resin, or the like, and a through hole is provided at a position overlapping the electrode pad 503 of the resin layer 505. A rewiring 507 connected to the electrode pad 503 through the barrier metal layer 506 in the through hole is formed on the resin layer 505. A thin film resistance element 508 is provided at a position between the rewiring 507 on the resin layer 505.
　図６に示す薄膜デバイス５００では、薄膜抵抗素子５０８は、バリアメタル層５０６と、バリアメタル層５０６上に積層されたシード層５０９とを備えている。バリアメタル層５０６は、Ｔｉ、ＴｉＮ、Ｎｉ等により形成され、電極パッド５０３と再配線５０７との密着性を向上させるために設けられている。また、シード層５０９は、再配線５０７をめっき法により形成する際の電極として機能するものであり、Ｃｕ、Ａｌ等により形成されている。そして、バリアメタル層５０６およびシード層５０９それぞれの膜厚が適宜調整されることにより、薄膜抵抗素子５０８の抵抗値が調整されている。 In the thin film device 500 shown in FIG. 6, the thin film resistance element 508 includes a barrier metal layer 506 and a seed layer 509 stacked on the barrier metal layer 506. The barrier metal layer 506 is formed of Ti, TiN, Ni, or the like, and is provided to improve the adhesion between the electrode pad 503 and the rewiring 507. The seed layer 509 functions as an electrode when the rewiring 507 is formed by a plating method, and is formed of Cu, Al, or the like. And the resistance value of the thin film resistive element 508 is adjusted by adjusting the film thicknesses of the barrier metal layer 506 and the seed layer 509 as appropriate.
特開２００９－２６７２４８号公報（段落００１２，００１６，００１７、図１など）JP 2009-267248 A (paragraphs 0012, 0016, 0017, FIG. 1, etc.)
　ところで、図６に示す薄膜デバイス５００が、他の基板などに実装等される際の熱サイクルにおいて加熱された場合に、樹脂層５０５が膨張すること等により薄膜抵抗素子５０８に曲げ応力が加わり、薄膜抵抗素子５０８が破損するおそれがある。 By the way, when the thin film device 500 shown in FIG. 6 is heated in a thermal cycle when mounted on another substrate or the like, a bending stress is applied to the thin film resistance element 508 due to expansion of the resin layer 505, etc. The thin film resistance element 508 may be damaged.
　この発明は、上記した課題に鑑みてなされたものであり、樹脂層が膨張することにより生じる応力等により薄膜抵抗素子が破損するのを防止して、信頼性の高い薄膜デバイスを得ることができる技術を提供することを目的とする。 The present invention has been made in view of the above-described problems, and can prevent a thin film resistive element from being damaged by a stress or the like caused by expansion of a resin layer, thereby obtaining a highly reliable thin film device. The purpose is to provide technology.
　上記した目的を達成するために、本発明の薄膜デバイスは、基板と、前記基板の一方主面側に積層された複数の樹脂層とを備え、前記複数の樹脂層は、薄膜抵抗素子が一方主面に設けられた第１の樹脂層と、前記第１の樹脂層の前記基板と反対側に配置された第１の金属薄膜が一方主面に設けられた第２の樹脂層とを含み、前記薄膜抵抗素子は、抵抗薄膜と、前記抵抗薄膜上に形成された第１の補強用薄膜とを有し、前記第１の補強用薄膜が、前記第１の金属薄膜と平面視で重ならない部分に配置されていることを特徴としている。 In order to achieve the above-described object, a thin film device of the present invention includes a substrate and a plurality of resin layers laminated on one main surface side of the substrate, and the plurality of resin layers includes one thin film resistor element. A first resin layer provided on a main surface; and a second resin layer provided on one main surface with a first metal thin film disposed on the opposite side of the first resin layer from the substrate. The thin film resistor element includes a resistive thin film and a first reinforcing thin film formed on the resistive thin film, and the first reinforcing thin film overlaps the first metal thin film in plan view. It is characterized by being placed in the part that should not be.
　このように構成された発明では、他の基板などに実装等される際の熱サイクルにおいて薄膜デバイスが加熱された場合に、薄膜抵抗素子が形成された第１の樹脂層は、熱膨張率が小さい基板と反対側に向って膨張しようとする。このとき、第１の樹脂層の基板と反対側に配置された第２の樹脂層に第１の金属薄膜が形成されているため、薄膜抵抗素子が有する抵抗薄膜のうちの第１の金属薄膜と平面視で重なる部分においては、抵抗薄膜が第１の金属薄膜により基板に対して押さえ込まれた状態になる。そのため、高温状態において樹脂層が膨張することにより抵抗薄膜に加わる曲げ応力を緩和することができる。一方、抵抗薄膜のうちの第１の金属薄膜と平面視で重ならない部分においても、第１の補強用薄膜が形成されているので、樹脂層が膨張することにより生じる応力により薄膜抵抗素子が破損するのを防止することができる。 In the invention configured as described above, when the thin film device is heated in a thermal cycle when mounted on another substrate or the like, the first resin layer on which the thin film resistance element is formed has a coefficient of thermal expansion. Attempts to expand toward the opposite side of the small substrate. At this time, since the first metal thin film is formed on the second resin layer disposed on the side opposite to the substrate of the first resin layer, the first metal thin film among the resistance thin films included in the thin film resistance element In a portion overlapping in plan view, the resistive thin film is pressed against the substrate by the first metal thin film. Therefore, the bending stress applied to the resistance thin film can be relaxed by the expansion of the resin layer in a high temperature state. On the other hand, even in the portion of the resistance thin film that does not overlap with the first metal thin film in plan view, the first reinforcing thin film is formed, so that the thin film resistance element is damaged by the stress generated by the expansion of the resin layer. Can be prevented.
　また、前記薄膜抵抗素子は、前記抵抗薄膜上に形成された接続電極をさらに有し、前記第１の補強用薄膜と前記接続電極とが同一のプロセスにより同時に形成されていてもよい。 The thin film resistance element may further include a connection electrode formed on the resistance thin film, and the first reinforcing thin film and the connection electrode may be simultaneously formed by the same process.
　このように構成すると、薄膜抵抗素子に接続される引出電極との接触抵抗を低減するための接続電極と、第１の補強用薄膜とを同一のプロセスにより同一の材料を用いて同時に抵抗薄膜上に形成することにより、第１の補強用薄膜を形成するための工程を簡略化することができる。したがって、製造工程を増大させることなく従来の製造工程を用いて、薄膜抵抗素子のクラックや断線が防止された信頼性の高い薄膜デバイスを提供することができる。また、薄膜デバイスの製造コストの低減を図ることができる。 With this configuration, the connection electrode for reducing the contact resistance with the extraction electrode connected to the thin film resistance element and the first reinforcing thin film are simultaneously formed on the resistance thin film using the same material by the same process. By forming the first thin film, the process for forming the first reinforcing thin film can be simplified. Therefore, it is possible to provide a highly reliable thin film device in which cracks and disconnections of the thin film resistor element are prevented using a conventional manufacturing process without increasing the manufacturing process. In addition, the manufacturing cost of the thin film device can be reduced.
　また、前記抵抗薄膜は、Ｓｉを含有するとよい。 The resistive thin film may contain Si.
　このようにしても、Ｓｉを含有することにより脆くなった薄膜抵抗素子の破損を防止した信頼性の高い薄膜デバイスを提供することができる。 Even in this case, it is possible to provide a highly reliable thin film device that prevents damage to the thin film resistance element that has become brittle by containing Si.
　また、前記抵抗薄膜の抵抗率が、前記第１の補強用薄膜の抵抗率よりも大きいとよい。 Also, the resistivity of the resistive thin film may be larger than the resistivity of the first reinforcing thin film.
　このようにすると、抵抗薄膜のうちの第１の補強用薄膜が形成された部分においては、抵抗値が第１の補強用薄膜の抵抗率に依存することを利用して、抵抗薄膜上に任意の形状および大きさで第１の補強用薄膜を形成することにより、薄膜抵抗素子の抵抗値設計を容易に行うことができる。 If it does in this way, in the part in which the 1st thin film for reinforcement of the resistive thin film was formed, using that the resistance value depends on the resistivity of the 1st thin film for reinforcing, arbitrary on the resistive thin film By forming the first reinforcing thin film with the shape and size, it is possible to easily design the resistance value of the thin film resistance element.
　また、前記複数の樹脂層は、前記第１の樹脂層の前記基板側に配置された第２の金属薄膜が一方主面に設けられた第３の樹脂層をさらに含み、前記薄膜抵抗素子は、前記抵抗薄膜上に形成された第２の補強用薄膜をさらに有し、前記第２の補強用薄膜が、前記第２の金属薄膜と平面視で重ならない部分に配置されているとよい。 The plurality of resin layers further include a third resin layer provided on one main surface with a second metal thin film disposed on the substrate side of the first resin layer, and the thin film resistor element includes: It is preferable to further include a second reinforcing thin film formed on the resistive thin film, and the second reinforcing thin film is disposed in a portion not overlapping the second metal thin film in plan view.
　このように構成すると、抵抗薄膜のうちの第２の樹脂層の第１の金属薄膜と第３の樹脂層の第２の金属薄膜との間に挟み込まれた状態になる部分においては、高温状態において樹脂層が膨張することにより薄膜抵抗素子に加わる曲げ応力をさらに緩和することができる。また、抵抗薄膜のうちの第２の金属薄膜と平面視で重ならない部分においても、第２の補強用薄膜が形成されているので、樹脂層が膨張することにより生じる応力により薄膜抵抗素子が破損するのをさらに確実に防止することができる。 If comprised in this way, in the part used as the state pinched | interposed between the 1st metal thin film of the 2nd resin layer of the resistance thin film, and the 2nd metal thin film of the 3rd resin layer, it is a high temperature state The bending stress applied to the thin film resistor element due to the expansion of the resin layer can be further relaxed. In addition, since the second reinforcing thin film is formed in a portion of the resistive thin film that does not overlap with the second metal thin film in plan view, the thin film resistive element is damaged by the stress generated by the expansion of the resin layer. This can be prevented more reliably.
　また、第１～第４外部電極と、前記第１、第２外部電極間に直列接続された可変容量型の薄膜キャパシタ素子と、一端が前記第３外部電極に接続された第１の前記薄膜抵抗素子と、一端が前記第４外部電極に接続された第２の前記薄膜抵抗素子とを備え、前記第１、第２の薄膜抵抗素子の他端間に前記薄膜キャパシタ素子が挿入されるように、前記第１、第２の薄膜抵抗素子それぞれの他端が前記薄膜キャパシタ素子両端のそれぞれに接続されているとよい。 In addition, the first to fourth external electrodes, the variable capacitance type thin film capacitor element connected in series between the first and second external electrodes, and the first thin film having one end connected to the third external electrode A resistor element; and a second thin film resistor element having one end connected to the fourth external electrode, wherein the thin film capacitor element is inserted between the other ends of the first and second thin film resistor elements. In addition, the other end of each of the first and second thin film resistor elements may be connected to both ends of the thin film capacitor element.
　このように構成すると、第１、第２外部電極を入出力端子とする可変容量型の薄膜キャパシタ素子を備える薄膜デバイスを提供することができる。すなわち、第３、第４外部電極間の電圧を調整して第１、第２の薄膜抵抗素子を介して薄膜キャパシタ素子の両端に印加される電圧を任意に調整することにより薄膜キャパシタ素子の容量を調整することができる。 With this configuration, it is possible to provide a thin film device including a variable capacitance type thin film capacitor element having the first and second external electrodes as input / output terminals. That is, the capacitance of the thin film capacitor element is adjusted by adjusting the voltage between the third and fourth external electrodes and arbitrarily adjusting the voltage applied to both ends of the thin film capacitor element via the first and second thin film resistor elements. Can be adjusted.
　また、所定電圧以上の静電気放電が生じた場合に前記第１、第２の薄膜抵抗素子および前記薄膜キャパシタ素子を経由しない電流パスを形成するＥＳＤ保護素子をさらに備えていてもよい。 Further, an ESD protection element that forms a current path that does not pass through the first and second thin film resistor elements and the thin film capacitor element when an electrostatic discharge of a predetermined voltage or higher occurs may be further provided.
　このように構成すると、所定電圧以上の静電気放電（ＥＳＤ：Ｅｌｅｃｔｒｏ－Ｓｔａｔｉｃ　Ｄｉｓｃｈａｒｇｅ）に起因する過電圧が生じると、第１、第２の薄膜抵抗素子および薄膜キャパシタ素子を経由しない電流パスがＥＳＤ保護素子により形成されるので、第１、第２の薄膜抵抗素子および薄膜キャパシタ素子を過電圧から保護することができる。 With this configuration, when an overvoltage caused by electrostatic discharge (ESD) of a predetermined voltage or higher occurs, a current path that does not pass through the first and second thin film resistor elements and the thin film capacitor element is formed as an ESD protection element. Thus, the first and second thin film resistor elements and the thin film capacitor element can be protected from overvoltage.
　本発明によれば、抵抗薄膜のうちの第１の金属薄膜と平面視で重なる部分においては、第１の金属薄膜により抵抗薄膜が基板に対して押さえこまれるので、高温状態において樹脂層が膨張することにより薄膜抵抗素子に加わる曲げ応力等を緩和することができ、抵抗薄膜のうちの第１の金属薄膜と平面視で重ならない部分には第１の補強用薄膜が形成されているので、樹脂層が膨張することにより生じる応力等によって薄膜抵抗素子が破損するのを防止することができ、信頼性の高い薄膜抵抗素子付きの薄膜デバイスを得ることができる。 According to the present invention, in the portion of the resistance thin film that overlaps the first metal thin film in plan view, the resistance thin film is pressed against the substrate by the first metal thin film, so that the resin layer expands at a high temperature. As a result, the bending stress applied to the thin film resistance element can be relaxed, and the first reinforcing thin film is formed in the portion of the resistance thin film that does not overlap the first metal thin film in plan view. The thin film resistance element can be prevented from being damaged by a stress or the like generated by the expansion of the resin layer, and a highly reliable thin film device with a thin film resistance element can be obtained.
本発明の第１実施形態にかかる薄膜デバイスの断面図である。It is sectional drawing of the thin film device concerning 1st Embodiment of this invention. 図１の薄膜デバイスの要部を示す平面図であって、薄膜抵抗素子が有する補強用薄膜の配置位置を説明するための平面図である。It is a top view which shows the principal part of the thin film device of FIG. 1, Comprising: It is a top view for demonstrating the arrangement position of the thin film for reinforcement which a thin film resistive element has. 図１の薄膜デバイスが備える電気回路を示す図である。It is a figure which shows the electric circuit with which the thin film device of FIG. 1 is provided. 本発明の第２実施形態にかかる薄膜デバイスの断面図である。It is sectional drawing of the thin film device concerning 2nd Embodiment of this invention. 本発明の第３実施形態にかかる薄膜デバイスの断面図である。It is sectional drawing of the thin film device concerning 3rd Embodiment of this invention. 従来の薄膜デバイスを示す要部拡大図であって、上側の図面は要部の概略断面図であり、下側の図面は要部の概略上面透視図を示す図である。It is a principal part enlarged view which shows the conventional thin film device, Comprising: The upper drawing is a schematic sectional drawing of a principal part, and the lower drawing is a figure which shows the schematic upper surface perspective view of a principal part.
　＜第１実施形態＞
　本発明の第１実施形態について図１～図３を参照して説明する。なお、図１および図２では、説明を簡易なものとするために本発明にかかる主要な構成のみが図示されている。また、後の説明で参照する図４および図５についても、図１および図２と同様に主要な構成のみが図示されているが、以下の説明においてはその説明は省略する。 <First Embodiment>
A first embodiment of the present invention will be described with reference to FIGS. In FIG. 1 and FIG. 2, only the main configuration according to the present invention is shown for simplicity of explanation. 4 and 5 to be referred to in the following description, only the main components are shown as in FIGS. 1 and 2, but the description thereof is omitted in the following description.
　（構成）
　薄膜デバイス１００の概略構成について説明する。 (Constitution)
A schematic configuration of the thin film device 100 will be described.
　薄膜デバイス１００は、ガラス基板やセラミック基板、樹脂基板、Ｓｉ基板（Ｓｉの線膨張係数：３．４×１０－６／Ｋ）、ＧａＡｓ基板などの基板１と、基板１の一方主面１ａ側に積層された複数の樹脂層２，３，４と、基板１の一方主面１ａ上に設けられた可変容量型の複数（この実施形態では１０個）の薄膜キャパシタ素子Ｃと、複数（この実施形態では７個）の第１の薄膜抵抗素子Ｒ１（本発明の「薄膜抵抗素子」に相当）と、複数（この実施形態では６個）の第２の薄膜抵抗素子Ｒ２（本発明の「薄膜抵抗素子」に相当）と、複数（この実施形態では２個）のＥＳＤ保護素子Ｄ１，Ｄ２とを備えている。 The thin film device 100 includes a substrate 1 such as a glass substrate, a ceramic substrate, a resin substrate, a Si substrate (Si linear expansion coefficient: 3.4 × 10 −6 / K), a GaAs substrate, and the one main surface 1a side of the substrate 1. A plurality of resin layers 2, 3, 4 stacked on one side, a plurality of (10 in this embodiment) thin film capacitor elements C provided on one main surface 1 a of the substrate 1, and a plurality (this In the embodiment, there are seven first thin film resistor elements R1 (corresponding to “thin film resistor elements” of the present invention) and a plurality (six in this embodiment) of second thin film resistor elements R2 (“ And a plurality (two in this embodiment) of ESD protection elements D1 and D2.
　薄膜キャパシタ素子Ｃは、基板１の一方主面１ａ上の所定領域にＰｔ薄膜により形成されたキャパシタ電極層５と、（Ｂａ，Ｓｒ）ＴｉＯ３（以下「ＢＳＴ」と称する）誘電体層６と、ＢＳＴ誘電体層６上にＰｔ薄膜により形成されたキャパシタ電極層７とにより形成される。 The thin film capacitor element C includes a capacitor electrode layer 5 formed of a Pt thin film in a predetermined region on one main surface 1a of the substrate 1, a (Ba, Sr) TiO 3 (hereinafter referred to as “BST”) dielectric layer 6 and And a capacitor electrode layer 7 formed of a Pt thin film on the BST dielectric layer 6.
　また、薄膜キャパシタ素子Ｃは、ＳｉＯ２耐湿保護膜により形成された保護層８により被覆され、保護層８上に樹脂層２が積層されている。樹脂層２（本発明の「第３の樹脂層」に相当）の一方主面２ａには、保護層８および樹脂層２に形成された透孔を介して薄膜キャパシタ素子Ｃの上側のキャパシタ電極層７に接続されたＣｕ／Ｔｉ引出電極９と、薄膜キャパシタ素子Ｃの下側のキャパシタ電極層５に接続されたＣｕ／Ｔｉ引出電極１０と、第２の金属薄膜１１ａ，１１ｂとが形成されている。 The thin film capacitor element C is covered with a protective layer 8 formed of a SiO 2 moisture-resistant protective film, and the resin layer 2 is laminated on the protective layer 8. On one main surface 2a of the resin layer 2 (corresponding to the “third resin layer” of the present invention), a capacitor electrode on the upper side of the thin film capacitor element C is formed through a protective layer 8 and a through hole formed in the resin layer 2. Cu / Ti lead electrode 9 connected to layer 7, Cu / Ti lead electrode 10 connected to capacitor electrode layer 5 on the lower side of thin film capacitor element C, and second metal thin films 11a and 11b are formed. ing.
　第２の金属薄膜１１ａ，１１ｂは、それぞれ、同一の薄膜形成プロセスにより同一の材料を用いて引出電極９，１０と同時に形成されている。また、樹脂層２に、引出電極９，１０および第２の金属薄膜１１ａ，１１ｂを被覆して樹脂層３が積層されている。なお、この実施形態では、第２の金属薄膜１１ａ，１１ｂと引出電極９，１０とが一体形成されているが、第２の金属薄膜１１ａ，１１ｂと引出電極９，１０とが分離して形成されていてもよいし、第２の金属薄膜１１ａ，１１ｂが樹脂層２の一方主面２ａに形成された他の引出電極と一体形成されていてもよい。 The second metal thin films 11a and 11b are formed simultaneously with the extraction electrodes 9 and 10 using the same material by the same thin film formation process. The resin layer 3 is laminated on the resin layer 2 so as to cover the extraction electrodes 9 and 10 and the second metal thin films 11a and 11b. In this embodiment, the second metal thin films 11a and 11b and the extraction electrodes 9 and 10 are integrally formed. However, the second metal thin films 11a and 11b and the extraction electrodes 9 and 10 are formed separately. Alternatively, the second metal thin films 11a and 11b may be formed integrally with the other extraction electrode formed on the one main surface 2a of the resin layer 2.
　各薄膜抵抗素子Ｒ１，Ｒ２は、それぞれ、樹脂層３（本発明の「第１の樹脂層」に相当）（樹脂層３の線膨張係数：５４．０×１０－６／Ｋ）の一方主面３ａの所定領域に薄膜形成プロセスにより形成されたＮｉ、Ｃｒ、Ｓｉを主成分とする抵抗薄膜１２と、それぞれ抵抗薄膜１２上に形成された第１、第２の補強用薄膜１２ａ，１２ｂおよび接続電極１２ｃ，１２ｄとを備えている。第１、第２の補強用薄膜１２ａ，１２ｂおよび接続電極１２ｃ，１２ｄは、それぞれ、Ｎｉを主成分としてＣｒを含む同一の材料を用いて同一の薄膜形成プロセスにより、分離配置された状態で形成されている。 Each of the thin film resistance elements R1 and R2 is one main layer of the resin layer 3 (corresponding to the “first resin layer” of the present invention) (linear expansion coefficient of the resin layer 3: 54.0 × 10 −6 / K). A resistive thin film 12 mainly composed of Ni, Cr, and Si formed in a predetermined region of the surface 3a, and first and second reinforcing thin films 12a and 12b formed on the resistive thin film 12, respectively; Connection electrodes 12c and 12d are provided. The first and second reinforcing thin films 12a and 12b and the connection electrodes 12c and 12d are formed in the state of being separated and arranged by the same thin film forming process using the same material containing Ni as a main component and Cr. Has been.
　ここで、抵抗薄膜１２は、その抵抗率が第１、第２の補強用薄膜１２ａ，１２ｂの抵抗率よりも大きい材料により形成されている。なお、各薄膜抵抗素子Ｒ１，Ｒ２の全てが樹脂層３上に形成されているが、各薄膜抵抗素子Ｒ１，Ｒ２が、それぞれ、異なる樹脂層上に分散して配置されていてもよい。 Here, the resistive thin film 12 is formed of a material whose resistivity is higher than that of the first and second reinforcing thin films 12a and 12b. In addition, although all of each thin film resistive element R1, R2 is formed on the resin layer 3, each thin film resistive element R1, R2 may each be disperse | distributed and arrange | positioned on a different resin layer.
　また、各薄膜抵抗素子Ｒ１，Ｒ２（抵抗薄膜１２）は、樹脂層３の一方主面３ａ上に積層された樹脂層４により被覆されている。樹脂層４（本発明の「第２の樹脂層」に相当）（樹脂層４の線膨張係数：５４．０×１０－６／Ｋ）の一方主面４ａには、詳細には図示省略されているが、樹脂層３，４に形成された透孔を介して引出電極９，１０や薄膜抵抗素子Ｒ１～Ｒ１３の接続電極１２ｃ，１２ｄに電気的に接続されたＣｕ／Ｔｉ引出電極１３，１４（Ｃｕの線膨張係数：１６．５×１０－６／Ｋ、Ｔｉの線膨張係数：８．６×１０－６／Ｋ）と、第１の金属薄膜１５ａ，１５ｂ，１５ｃとが形成されている。第１の金属薄膜１５ａ～１５ｃそれぞれは、同一の薄膜形成プロセスにより同一の材料を用いて引出電極１３，１４と同時に形成されている。なお、図１および図２に示すように、第１の金属薄膜１５ｃが、それぞれ引出電極１３，１４と一体形成された第１の金属薄膜１５ａ，１５ｂと分離した状態で形成されているが、第１の金属薄膜１５ｃが、第１の金属薄膜１５ａ，１５ｂや他の引出電極と一体形成されていてもよい。 Each thin film resistance element R1, R2 (resistance thin film 12) is covered with a resin layer 4 laminated on one main surface 3a of the resin layer 3. The one main surface 4a of the resin layer 4 (corresponding to the “second resin layer” of the present invention) (linear expansion coefficient of the resin layer 4: 54.0 × 10 −6 / K) is not shown in detail. However, Cu / Ti extraction electrodes 13 electrically connected to the extraction electrodes 9 and 10 and the connection electrodes 12c and 12d of the thin film resistance elements R1 to R13 through the through holes formed in the resin layers 3 and 4, respectively. 14 (Cu linear expansion coefficient: 16.5 × 10 −6 / K, Ti linear expansion coefficient: 8.6 × 10 −6 / K) and the first metal thin films 15a, 15b, and 15c are formed. ing. Each of the first metal thin films 15a to 15c is formed simultaneously with the extraction electrodes 13 and 14 by using the same material by the same thin film forming process. As shown in FIGS. 1 and 2, the first metal thin film 15c is formed separately from the first metal thin films 15a and 15b integrally formed with the extraction electrodes 13 and 14, respectively. The first metal thin film 15c may be integrally formed with the first metal thin films 15a and 15b and other extraction electrodes.
　また、図１および図２に示すように、抵抗薄膜１２のうち、樹脂層３の基板１と反対側に配置された樹脂層４の第１の金属薄膜１５ａ～１５ｃと平面視で重ならない部分に、第１の補強用薄膜１２ａが配置され、抵抗薄膜１２のうち、樹脂層３の基板１側に配置された樹脂層２の第２の金属薄膜１１ａ，１１ｂと平面視で重ならない部分に、第２の補強用薄膜１２ｂが配置されている。なお、第１、第２の金属薄膜１１ａ，１１ｂ，１５ａ～１５ｃと抵抗薄膜１２との平面視における境界部分に重なるように、第１、第２の補強用薄膜１２ａ，１２ｂが配置されるようにするとよい。さらに、境界部分には応力が集中しやすいため、補強用薄膜１２ａ，１２ｂが境界部分に重なるように配置されることで、薄膜抵抗素子に加わる曲げ応力等を好適に緩和できる。 Also, as shown in FIGS. 1 and 2, a portion of the resistive thin film 12 that does not overlap with the first metal thin films 15a to 15c of the resin layer 4 disposed on the opposite side of the resin layer 3 from the substrate 1 in plan view. The first reinforcing thin film 12a is disposed on the portion of the resistive thin film 12 that does not overlap with the second metal thin films 11a and 11b of the resin layer 2 disposed on the substrate 1 side of the resin layer 3 in plan view. The second reinforcing thin film 12b is disposed. It should be noted that the first and second reinforcing thin films 12a and 12b are arranged so as to overlap the boundary portions of the first and second metal thin films 11a, 11b, 15a to 15c and the resistive thin film 12 in plan view. It is good to. Furthermore, since stress tends to concentrate on the boundary portion, bending stress applied to the thin film resistance element can be suitably reduced by arranging the reinforcing thin films 12a and 12b so as to overlap the boundary portion.
　また、引出電極１３，１４に接続された第１の金属薄膜１５ａ，１５ｂ上に複数のＡｕ／Ｎｉ外部電極１６が形成され、引出電極１３，１４および第１の金属薄膜１５ａ，１５ｂと、各外部電極１６それぞれの端縁部分とを被覆するように樹脂により形成された保護層１７が樹脂層４の一方主面４ａ上に積層されている。 Also, a plurality of Au / Ni external electrodes 16 are formed on the first metal thin films 15a and 15b connected to the extraction electrodes 13 and 14, and the extraction electrodes 13 and 14 and the first metal thin films 15a and 15b, A protective layer 17 formed of resin so as to cover the edge portions of each external electrode 16 is laminated on one main surface 4 a of the resin layer 4.
　ＥＳＤ保護素子Ｄ１，Ｄ２それぞれは、図３に示すように、双方向ツェナーダイオードにより形成されている。双方向ツェナーダイオードの形成方法については特に限定されるものではなく、図示省略されているが、例えば、ｐ型およびｎ型のいずれか一方の導電型の第１の半導体薄膜と他方の導電型の第２の半導体薄膜とがｐｎ接合されて形成されたものや、例えば、Ｂドープされてｐ型に形成されたＳｉから成る基板１上にｎ型ａ－Ｓｉにより半導体膜が成膜されて形成されたものにより、ＥＳＤ保護素子Ｄ１，Ｄ２を形成することができる。 Each of the ESD protection elements D1, D2 is formed of a bidirectional Zener diode as shown in FIG. The method of forming the bidirectional Zener diode is not particularly limited and is not shown in the figure. For example, the first semiconductor thin film of one of the p-type and n-type conductivity and the other conductivity type may be used. A semiconductor film formed by n-type a-Si on a substrate 1 made of pn junction with a second semiconductor thin film or, for example, B-doped Si-formed p-type Thus, the ESD protection elements D1 and D2 can be formed.
　以上のように構成された薄膜デバイス１００は、図３に示すように、それぞれ外部電極１６により形成された第１～第４外部電極Ｐ１～Ｐ４を有し、第１、第２外部電極Ｐ１，Ｐ２間に１０個の薄膜キャパシタ素子Ｃが直列接続されている。また、一端が第３外部電極Ｐ３に接続された複数の第１の薄膜抵抗素子Ｒ１のうちのいずれかの他端と、一端が第４外部電極Ｐ４に接続された第２の薄膜抵抗素子Ｒ２のうちのいずれかの他端との間に複数の薄膜キャパシタ素子Ｃのうちのいずれか１個が挿入されるように、各第１の薄膜抵抗素子Ｒ１それぞれの他端および各第２の薄膜抵抗素子Ｒ２それぞれの他端が各薄膜キャパシタ素子Ｃそれぞれの両端に接続されている。 As shown in FIG. 3, the thin film device 100 configured as described above includes first to fourth external electrodes P1 to P4 each formed by an external electrode 16, and includes first and second external electrodes P1, Ten thin film capacitor elements C are connected in series between P2. The other end of one of the plurality of first thin film resistance elements R1 having one end connected to the third external electrode P3 and the second thin film resistance element R2 having one end connected to the fourth external electrode P4. The other end of each of the first thin film resistor elements R1 and each of the second thin films so that any one of the plurality of thin film capacitor elements C is inserted between the other end of each of the first thin film resistor elements C1. The other end of each resistance element R2 is connected to both ends of each thin film capacitor element C.
　また、所定電圧以上の静電気放電（ＥＳＤ：Ｅｌｅｃｔｒｏ－Ｓｔａｔｉｃ　Ｄｉｓｃｈａｒｇｅ）が生じた場合に、第１、第２の薄膜抵抗素子Ｒ１，Ｒ２および薄膜キャパシタ素子Ｃを経由しない電流パスＷ１，Ｗ２が形成されるように、第１、第３外部電極Ｐ１，Ｐ３間にＥＳＤ保護素子Ｄ１が直列接続され、第２、第３外部電極Ｐ２，Ｐ３間にＥＳＤ保護素子Ｄ２が直列接続されている。 Further, when electrostatic discharge (ESD) exceeding a predetermined voltage occurs, current paths W1 and W2 that do not pass through the first and second thin film resistance elements R1 and R2 and the thin film capacitor element C are formed. As shown, the ESD protection element D1 is connected in series between the first and third external electrodes P1 and P3, and the ESD protection element D2 is connected in series between the second and third external electrodes P2 and P3.
　したがって、所定電圧以上の静電気放電に起因する過電圧が生じると、第１、第２の薄膜抵抗素子Ｒ１，Ｒ２および薄膜キャパシタ素子Ｃを経由しない電流パスＷ１，Ｗ２がＥＳＤ保護素子Ｄ１，Ｄ２により形成されるので、第１、第２の薄膜抵抗素子Ｒ１，Ｒ２および薄膜キャパシタ素子Ｃを過電圧から保護することができる。 Therefore, when an overvoltage caused by electrostatic discharge of a predetermined voltage or higher occurs, current paths W1 and W2 that do not pass through the first and second thin film resistance elements R1 and R2 and the thin film capacitor element C are formed by the ESD protection elements D1 and D2. Therefore, the first and second thin film resistor elements R1, R2 and the thin film capacitor element C can be protected from overvoltage.
　（製造方法）
　薄膜デバイス１００の製造方法の一例について説明する。なお、この実施形態では、大面積の基板１が用いられて複数の薄膜デバイス１００の集合体が形成された後に個片化されることにより、複数の薄膜デバイス１００が同時に形成される。なお、以下の説明においては、ＥＳＤ保護素子Ｄ１，Ｄ２の形成方法の説明は省略する。 (Production method)
An example of a method for manufacturing the thin film device 100 will be described. In this embodiment, a plurality of thin film devices 100 are formed at the same time by using a large-area substrate 1 to form an aggregate of a plurality of thin film devices 100 and then separating them. In the following description, a description of the method of forming the ESD protection elements D1, D2 is omitted.
　まず、例えばＳｉにより形成された基板１上の所定領域にスパッタにより下側のＰｔキャパシタ電極層５が形成され、ＭＯＤ法によりＢＳＴ誘電体層６が形成され、スパッタにより上側のＰｔキャパシタ電極層７が形成された後に、ＲＩＥ（反応性イオンエッチング）によりパターニングされることにより、複数の薄膜キャパシタ素子Ｃが形成される。次に、各薄膜キャパシタ素子Ｃを被覆するＳｉＯ２保護層８が形成され、フォトリソグラフィによって透孔が形成されたフェノール系感光性樹脂絶縁膜から成る樹脂層２が形成され、樹脂層硬化のための熱処理が行われる。なお、保護層８を設けずに、各薄膜キャパシタ素子Ｃを被覆するように樹脂層２が形成されてもよい。 First, the lower Pt capacitor electrode layer 5 is formed by sputtering in a predetermined region on the substrate 1 made of, for example, Si, the BST dielectric layer 6 is formed by MOD, and the upper Pt capacitor electrode layer 7 is formed by sputtering. After forming, a plurality of thin film capacitor elements C are formed by patterning by RIE (reactive ion etching). Next, a SiO 2 protective layer 8 covering each thin film capacitor element C is formed, and a resin layer 2 made of a phenol-based photosensitive resin insulating film in which through holes are formed by photolithography is formed, and the resin layer is cured. The heat treatment is performed. The resin layer 2 may be formed so as to cover each thin film capacitor element C without providing the protective layer 8.
　続いて、樹脂層２の透孔内のＳｉＯ２耐湿保護膜をドライエッチングにより除去し、薄膜形成プロセスであるスパッタ法を用いて、引出電極９，１０および第２の金属薄膜１１ａ，１１ｂを形成するＴｉ膜が成膜され、Ｃｕ膜が成膜される。そして、フォトリソグラフィによるエッチングによりパターン形成されて、引出電極９，１０および第２の金属薄膜１１ａ，１１ｂが形成される。次に、フォトリソグラフィによって透孔が形成されたフェノール系感光性樹脂絶縁膜から成る樹脂層３が形成され、樹脂層硬化のための熱処理が行われる。 Subsequently, the SiO 2 moisture-resistant protective film in the through holes of the resin layer 2 is removed by dry etching, and the extraction electrodes 9 and 10 and the second metal thin films 11a and 11b are formed by using a sputtering method which is a thin film formation process. A Ti film is formed, and a Cu film is formed. Then, a pattern is formed by etching by photolithography to form the extraction electrodes 9 and 10 and the second metal thin films 11a and 11b. Next, a resin layer 3 made of a phenol-based photosensitive resin insulating film having through holes formed by photolithography is formed, and a heat treatment for curing the resin layer is performed.
　次に、リフトオフレジストが形成され、Ｎｉ、Ｃｒ、Ｓｉを主成分とする混合物から成る蒸着材料を用いて、リフトオフ法により抵抗薄膜１２が蒸着形成される。続いて、リフトオフレジストが形成され、Ｎｉ、Ｃｒを主成分とする混合物から成る蒸着材料を用いて、リフトオフ法により第１、第２の補強用薄膜１２ａ，１２ｂおよび接続電極１２ｃ，１２ｄが抵抗薄膜１２上に蒸着形成される。このとき、第１、第２の補強用薄膜１２ａ，１２ｂは、それぞれ、平面視したときに、樹脂層２上の第２の金属薄膜１１ａ，１１ｂおよび後述する樹脂層４上の第１の金属薄膜１５ａ～１５ｃの両方を形成することができない部分、または形成しない部分に重なるように配置される。 Next, a lift-off resist is formed, and a resistance thin film 12 is formed by vapor deposition by a lift-off method using a vapor deposition material made of a mixture mainly composed of Ni, Cr, and Si. Subsequently, a lift-off resist is formed, and the first and second reinforcing thin films 12a and 12b and the connection electrodes 12c and 12d are formed into a resistance thin film by a lift-off method using a vapor deposition material made of a mixture containing Ni and Cr as main components. 12 is formed by vapor deposition. At this time, the first and second reinforcing thin films 12a and 12b are, when viewed in plan, the second metal thin films 11a and 11b on the resin layer 2 and the first metal on the resin layer 4 described later. The thin films 15a to 15c are disposed so as to overlap with a portion where both of the thin films 15a to 15c cannot be formed or a portion where they are not formed.
　続いて、フォトリソグラフィによって透孔が形成されたフェノール系感光性樹脂絶縁膜から成る樹脂層４が形成され、樹脂層硬化のための熱処理が行われる。そして、薄膜形成プロセスであるスパッタ法を用いて、引出電極１３，１４および第１の金属薄膜１５ａ～１５ｃを形成するＴｉ膜が成膜され、Ｃｕ膜が成膜される。 Subsequently, a resin layer 4 made of a phenol-based photosensitive resin insulating film having through holes formed by photolithography is formed, and a heat treatment for curing the resin layer is performed. Then, a Ti film for forming the extraction electrodes 13 and 14 and the first metal thin films 15a to 15c is formed using a sputtering method which is a thin film formation process, and a Cu film is formed.
　次に、形成されたＣｕ／Ｔｉ膜上に所定位置に開口が設けられたレジストがパターン形成されて、めっき法により第１～第４外部電極Ｐ１～Ｐ４を成す外部電極１６がＣｕ／Ｔｉ膜上の所定位置に形成される。そして、レジストが除去された後に、フォトリソグラフィによるエッチングによりＣｕ／Ｔｉ膜がパターン形成されて、引出電極１３，１４および第１の金属薄膜１５ａ～１５ｃが形成される。 Next, a resist with an opening provided at a predetermined position is formed on the formed Cu / Ti film, and the external electrodes 16 constituting the first to fourth external electrodes P1 to P4 are formed by Cu / Ti film by plating. It is formed at a predetermined position above. Then, after the resist is removed, the Cu / Ti film is patterned by photolithography etching to form the extraction electrodes 13 and 14 and the first metal thin films 15a to 15c.
　そして、フォトリソグラフィによって外部電極露出部が形成されたフェノール系感光性樹脂絶縁膜からなる保護層１７が形成され、樹脂層硬化のための熱処理が行われた後に、ダイシングにより各薄膜デバイス１００ごとに個片化されることによって、薄膜デバイス１００が完成する。 Then, a protective layer 17 made of a phenol-based photosensitive resin insulating film having an external electrode exposed portion formed by photolithography is formed, and after heat treatment for curing the resin layer, each thin film device 100 is subjected to dicing. The thin film device 100 is completed by being separated into pieces.
　このように構成された薄膜デバイス１００は、他の配線基板等にはんだやワイヤボンディング等を用いて実装されることにより、第１、第２外部電極Ｐ１，Ｐ２を入出力端子とする可変容量素子として使用される。すなわち、第３、第４外部電極Ｐ３，Ｐ４間の電圧を調整して第１、第２の薄膜抵抗素子Ｒ１，Ｒ２を介して各薄膜キャパシタ素子Ｃそれぞれの両端に印加される電圧を任意に調整することにより各薄膜キャパシタ素子Ｃそれぞれの容量を調整することができる。なお、図３に示す電気回路は一例であって、薄膜キャパシタ素子Ｃの数や第１、第２の薄膜抵抗素子Ｒ１，Ｒ２の数、ＥＳＤ保護素子Ｄ１，Ｄ２の数は図３に示す例に限定されるものではない。 The thin film device 100 configured as described above is mounted on another wiring board or the like using solder, wire bonding, or the like, so that the variable capacitance element having the first and second external electrodes P1 and P2 as input / output terminals is provided. Used as. That is, by adjusting the voltage between the third and fourth external electrodes P3 and P4, the voltage applied to both ends of each thin film capacitor element C through the first and second thin film resistance elements R1 and R2 can be arbitrarily set. By adjusting, the capacitance of each thin film capacitor element C can be adjusted. The electrical circuit shown in FIG. 3 is an example, and the number of thin film capacitor elements C, the number of first and second thin film resistance elements R1 and R2, and the number of ESD protection elements D1 and D2 are examples shown in FIG. It is not limited to.
　以上のように、この実施形態では、他の基板などに実装等される際の熱サイクルにおいて薄膜デバイス１００が加熱された場合に、薄膜抵抗素子Ｒ１，Ｒ２が形成された樹脂層３は、熱膨張率が小さい基板１と反対側に向って膨張しようとする。このとき、樹脂層３の基板１と反対側に配置された樹脂層４に第１の金属薄膜１５ａ～１５ｃが形成されているため、薄膜抵抗素子Ｒ１，Ｒ２が有する抵抗薄膜１２のうちの第１の金属薄膜１５ａ～１５ｃと平面視で重なる部分においては、抵抗薄膜１２が第１の金属薄膜１５ａ～１５ｃにより基板１に対して押さえ込まれた状態になる。そのため、高温状態において樹脂層３が膨張することにより抵抗薄膜１２に加わる曲げ応力を緩和することができる。一方、抵抗薄膜１２のうちの第１の金属薄膜１５ａ～１５ｃと平面視で重ならない部分においても、第１の補強用薄膜１２ａが形成されているので、樹脂層３が膨張することにより生じる応力により薄膜抵抗素子Ｒ１，Ｒ２が破損するのを防止することができる。 As described above, in this embodiment, when the thin film device 100 is heated in a thermal cycle when mounted on another substrate or the like, the resin layer 3 on which the thin film resistor elements R1 and R2 are formed is heated. It tries to expand toward the opposite side of the substrate 1 having a small expansion coefficient. At this time, since the first metal thin films 15a to 15c are formed on the resin layer 4 arranged on the opposite side of the resin layer 3 from the substrate 1, the first of the resistance thin films 12 of the thin film resistance elements R1 and R2 is included. In a portion overlapping the first metal thin film 15a to 15c in plan view, the resistance thin film 12 is pressed against the substrate 1 by the first metal thin film 15a to 15c. Therefore, the bending stress applied to the resistance thin film 12 by the expansion of the resin layer 3 in a high temperature state can be relaxed. On the other hand, since the first reinforcing thin film 12a is also formed in the portion of the resistance thin film 12 that does not overlap with the first metal thin films 15a to 15c in plan view, the stress generated by the expansion of the resin layer 3 This can prevent the thin film resistor elements R1, R2 from being damaged.
　また、抵抗薄膜１２のうちの樹脂層４の第１の金属薄膜１５ａ～１５ｃと樹脂層２の第２の金属薄膜１１ａ，１１ｂとの間に挟み込まれた状態になる部分においては、高温状態において樹脂層３が膨張することにより薄膜抵抗素子Ｒ１，Ｒ２に加わる曲げ応力をさらに緩和することができる。また、抵抗薄膜１２のうちの第２の金属薄膜１１ａ，１１ｂと平面視で重ならない部分においても、第２の補強用薄膜１２ｂが形成されているので、樹脂層３が膨張することにより生じる応力により薄膜抵抗素子Ｒ１，Ｒ２が破損するのをさらに確実に防止することができる。 Further, in the portion of the resistance thin film 12 that is sandwiched between the first metal thin films 15a to 15c of the resin layer 4 and the second metal thin films 11a and 11b of the resin layer 2, the high temperature state is maintained. When the resin layer 3 expands, the bending stress applied to the thin film resistor elements R1, R2 can be further relaxed. Further, since the second reinforcing thin film 12b is also formed in the portion of the resistance thin film 12 that does not overlap with the second metal thin films 11a and 11b in plan view, the stress generated by the expansion of the resin layer 3 This can more reliably prevent the thin film resistor elements R1 and R2 from being damaged.
　また、薄膜抵抗素子Ｒ１，Ｒ２に接続される引出電極１３，１４との接触抵抗を低減するための接続電極１２ｃ，１２ｄと、第１、第２の補強用薄膜１２ａ，１２ｂとを同一の薄膜形成プロセスにより同一の材料を用いて同時に抵抗薄膜１２上に形成することにより、第１、第２の補強用薄膜１２ａ，１２ｂを形成するための工程を簡略化することができる。したがって、製造工程を増大させることなく従来の製造工程を用いて、薄膜抵抗素子Ｒ１，Ｒ２のクラックや断線が防止された信頼性の高い薄膜デバイス１００を提供することができる。また、薄膜デバイス１００の製造コストの低減を図ることができる。 Further, the connection electrodes 12c and 12d for reducing the contact resistance with the extraction electrodes 13 and 14 connected to the thin film resistance elements R1 and R2 and the first and second reinforcing thin films 12a and 12b are made the same thin film. By forming simultaneously on the resistive thin film 12 using the same material by the formation process, the process for forming the first and second reinforcing thin films 12a and 12b can be simplified. Therefore, it is possible to provide a highly reliable thin film device 100 in which cracks and disconnections of the thin film resistor elements R1 and R2 are prevented using a conventional manufacturing process without increasing the manufacturing process. Moreover, the manufacturing cost of the thin film device 100 can be reduced.
　また、抵抗薄膜１２の抵抗率が、第１、第２の補強用薄膜１２ａ，１２ｂの抵抗率よりも大きく構成されているので、抵抗薄膜１２のうちの第１、第２の補強用薄膜１２ａ，１２ｂが形成された部分においては、抵抗値が第１、第２の補強用薄膜１２ａ，１２ｂの抵抗率に依存する。したがって、抵抗薄膜１２上に任意の形状および大きさで第１、第２の補強用薄膜１２ａ、１２ｂを形成することにより、薄膜抵抗素子Ｒ１，Ｒ２の抵抗値設計を容易に行うことができる。 Further, since the resistivity of the resistive thin film 12 is larger than the resistivity of the first and second reinforcing thin films 12a and 12b, the first and second reinforcing thin films 12a of the resistive thin film 12 are configured. , 12b, the resistance value depends on the resistivity of the first and second reinforcing thin films 12a, 12b. Therefore, by forming the first and second reinforcing thin films 12a and 12b in any shape and size on the resistive thin film 12, the resistance value design of the thin film resistive elements R1 and R2 can be easily performed.
　また、上記した構成とすることにより、Ｓｉを含有することにより脆くなった各薄膜抵抗素子Ｒ１，Ｒ２の破損を防止した信頼性の高い薄膜デバイス１００を提供することができる。 In addition, with the above-described configuration, it is possible to provide a highly reliable thin film device 100 in which the thin film resistance elements R1 and R2 that have become brittle by containing Si are prevented from being damaged.
　なお、第１の金属薄膜１５ａ～１５ｃを、薄膜デバイス１００の側面に露出するように、樹脂層４の端縁部まで引き伸ばして形成してもよい。このようにすると、第１の金属薄膜１５ａ～１５ｃにより吸収した応力を薄膜デバイス１００の側面に効果的に逃がすことができる。また、第１の金属薄膜１５ｃと引出電極１３，１４とが分離して形成されているので、第１の金属薄膜１５ｃにより吸収された応力が引出電極１３，１４に加わるのを抑制することができる。また、第２の金属薄膜１１ａと引出電極９とを分離して形成することにより、同様の効果を奏することができる。 Note that the first metal thin films 15 a to 15 c may be formed to extend to the edge of the resin layer 4 so as to be exposed on the side surface of the thin film device 100. In this way, the stress absorbed by the first metal thin films 15 a to 15 c can be effectively released to the side surface of the thin film device 100. Further, since the first metal thin film 15 c and the extraction electrodes 13 and 14 are formed separately, it is possible to suppress the stress absorbed by the first metal thin film 15 c from being applied to the extraction electrodes 13 and 14. it can. Moreover, the same effect can be produced by forming the second metal thin film 11a and the extraction electrode 9 separately.
　＜第２実施形態＞
　本発明の第２の実施形態について図４を参照して説明する。 Second Embodiment
A second embodiment of the present invention will be described with reference to FIG.
　この実施形態が上記した第１実施形態と異なるのは、図４に示すように、第２の金属薄膜１１ａ，１１ｂが設けられていない点である。以下の説明においては、上記した第１実施形態と異なる点を中心に説明し、その他の構成は上記した第１実施形態と同様の構成であるため、同一符号を引用することによりその構成の説明は省略する。 This embodiment is different from the first embodiment described above in that the second metal thin films 11a and 11b are not provided as shown in FIG. In the following description, differences from the above-described first embodiment will be mainly described, and other configurations are the same as those of the above-described first embodiment. Therefore, the same reference numerals are used to describe the configuration. Is omitted.
　（構成）
　薄膜デバイス１００ａの概略構成について説明する。 (Constitution)
A schematic configuration of the thin film device 100a will be described.
　薄膜デバイス１００ａは、基板１と、基板１の一方主面１ａ側に積層された複数の樹脂層３，４と、薄膜抵抗素子Ｒとを備えている。 The thin film device 100 a includes a substrate 1, a plurality of resin layers 3 and 4 stacked on the one main surface 1 a side of the substrate 1, and a thin film resistance element R.
　薄膜抵抗素子Ｒは、基板１の一方主面１ａに積層された樹脂層３の一方主面３ａの所定領域に薄膜形成プロセスにより形成されたＮｉ、Ｃｒ、Ｓｉを主成分とする抵抗薄膜１２と、それぞれ抵抗薄膜１２上に形成された第１の補強用薄膜１２ａおよび接続電極１２ｃ，１２ｄとを備えている。第１、第２の補強用薄膜１２ａ，１２ｂおよび接続電極１２ｃ，１２ｄは、それぞれ、Ｎｉを主成分としてＣｒを含む同一の材料を用いて同一の薄膜形成プロセスにより、分離配置された状態で形成されている。そして、薄膜抵抗素子Ｒ（抵抗薄膜１２）は、樹脂層３の一方主面３ａ上に積層された樹脂層４により被覆されている。また、樹脂層４の一方主面４ａには、樹脂層４に形成された透孔（図示省略）を介して薄膜抵抗素子Ｒに電気的に接続されたＣｕ／Ｔｉ引出電極１３，１４と、第１の金属薄膜１５ａ～１５ｃとが形成されている。なお、上記した第１実施形態と同様に、第１の補強用薄膜１２ａは、抵抗薄膜１２のうちの第１の金属薄膜１５ａ～１５ｃと平面視で重ならない部分に配置されている。 The thin film resistance element R includes a resistance thin film 12 mainly composed of Ni, Cr, and Si formed by a thin film formation process in a predetermined region of the one main surface 3a of the resin layer 3 laminated on the one main surface 1a of the substrate 1. The first reinforcing thin film 12a and the connection electrodes 12c and 12d respectively formed on the resistive thin film 12 are provided. The first and second reinforcing thin films 12a and 12b and the connection electrodes 12c and 12d are formed in the state of being separated and arranged by the same thin film forming process using the same material containing Ni as a main component and Cr. Has been. The thin film resistive element R (resistive thin film 12) is covered with a resin layer 4 laminated on one main surface 3a of the resin layer 3. Further, on one main surface 4a of the resin layer 4, Cu / Ti lead electrodes 13, 14 electrically connected to the thin film resistance element R through through holes (not shown) formed in the resin layer 4, First metal thin films 15a to 15c are formed. As in the first embodiment described above, the first reinforcing thin film 12a is disposed in a portion of the resistive thin film 12 that does not overlap the first metal thin films 15a to 15c in plan view.
　また、引出電極１３，１４上に複数のＡｕ／Ｎｉ外部電極１６が形成され、引出電極１３，１４および第１の金属薄膜１５ａ，１５ｂと、各外部電極１６それぞれの端縁部分とを被覆するように樹脂により形成された保護層１７が樹脂層４の一方主面４ａ上に積層されている。 Also, a plurality of Au / Ni external electrodes 16 are formed on the extraction electrodes 13 and 14 to cover the extraction electrodes 13 and 14 and the first metal thin films 15a and 15b and the edge portions of the respective external electrodes 16. Thus, the protective layer 17 formed of resin is laminated on the one main surface 4 a of the resin layer 4.
　（製造方法）
　薄膜デバイス１００ａの製造方法の一例について説明する。なお、上記した第１実施形態と同様に、大面積の基板１が用いられて複数の薄膜デバイス１００ａの集合体が形成された後に個片化されることにより、複数の薄膜デバイス１００ａが同時に形成される。 (Production method)
An example of a method for manufacturing the thin film device 100a will be described. As in the first embodiment described above, a plurality of thin film devices 100a are simultaneously formed by using a large-area substrate 1 to form an aggregate of a plurality of thin film devices 100a and then separating them into individual pieces. Is done.
　まず、例えばＳｉにより形成された基板１上にフェノール系感光性樹脂絶縁膜から成る樹脂層３が形成され、樹脂層硬化のための熱処理が行われる。次に、リフトオフレジストが形成され、Ｎｉ、Ｃｒ、Ｓｉを主成分とする混合物から成る蒸着材料を用いて、リフトオフ法により抵抗薄膜１２が蒸着形成される。続いて、リフトオフレジストが形成され、Ｎｉ、Ｃｒを主成分とする混合物から成る蒸着材料を用いて、リフトオフ法により第１の補強用薄膜１２ａおよび接続電極１２ｃ，１２ｄが抵抗薄膜１２上に蒸着形成される。このとき、第１の補強用薄膜１２ａは、平面視したときに、後述する樹脂層４上の第１の金属薄膜１５ａ～１５ｃを形成することができない部分、または形成しない部分に重なるように配置される。 First, a resin layer 3 made of a phenol-based photosensitive resin insulating film is formed on a substrate 1 made of, for example, Si, and heat treatment for curing the resin layer is performed. Next, a lift-off resist is formed, and the resistive thin film 12 is formed by vapor deposition by a lift-off method using a vapor deposition material made of a mixture containing Ni, Cr, and Si as main components. Subsequently, a lift-off resist is formed, and the first reinforcing thin film 12a and the connection electrodes 12c and 12d are vapor-deposited on the resistance thin film 12 by a lift-off method using a vapor deposition material composed of a mixture containing Ni and Cr as main components. Is done. At this time, the first reinforcing thin film 12a is disposed so as to overlap a portion where the first metal thin films 15a to 15c on the resin layer 4 to be described later cannot be formed or a portion where the first metal thin film 15a is not formed when viewed in plan. Is done.
　次に、フォトリソグラフィによって透孔（図示省略）が形成されたフェノール系感光性樹脂絶縁膜から成る樹脂層４が形成され、樹脂層硬化のための熱処理が行われる。そして、薄膜形成プロセスであるスパッタ法を用いて、引出電極１３，１４および第１の金属薄膜１５ａ～１５ｃを形成するＴｉ膜が成膜され、Ｃｕ膜が成膜される。 Next, a resin layer 4 made of a phenol-based photosensitive resin insulating film having through holes (not shown) formed by photolithography is formed, and heat treatment for curing the resin layer is performed. Then, a Ti film for forming the extraction electrodes 13 and 14 and the first metal thin films 15a to 15c is formed using a sputtering method which is a thin film formation process, and a Cu film is formed.
　次に、形成されたＣｕ／Ｔｉ膜上に所定位置に開口が設けられたレジストがパターン形成されて、めっき法により外部電極１６がＣｕ／Ｔｉ膜上の所定位置に形成される。そして、レジストが除去された後に、フォトリソグラフィによるエッチングによりＣｕ／Ｔｉ膜がパターン形成されて、引出電極１３，１４および第１の金属薄膜１５ａ～１５ｃが形成される。 Next, a resist having an opening at a predetermined position is patterned on the formed Cu / Ti film, and the external electrode 16 is formed at a predetermined position on the Cu / Ti film by plating. Then, after the resist is removed, the Cu / Ti film is patterned by photolithography etching to form the extraction electrodes 13 and 14 and the first metal thin films 15a to 15c.
　そして、フォトリソグラフィによって外部電極露出部が形成されたフェノール系感光性樹脂絶縁膜からなる保護層１７が形成され、樹脂層硬化のための熱処理が行われた後に、ダイシングにより各薄膜デバイス１００ａごとに個片化されることによって、薄膜デバイス１００ａが完成する。 Then, a protective layer 17 made of a phenol-based photosensitive resin insulating film having external electrode exposed portions formed by photolithography is formed, and after heat treatment for curing the resin layer, dicing is performed for each thin film device 100a. The thin film device 100a is completed by being separated into pieces.
　以上のように、この実施形態では、上記した第１実施形態と同様に、抵抗薄膜１２のうちの第１の金属薄膜１５ａ～１５ｃと平面視で重ならない部分に第１の補強用薄膜１２ａが形成されているので、例えば高温状態において樹脂層３が膨張しても、各樹脂層３，４が膨張することにより生じる応力により薄膜抵抗素子Ｒが破損するのを防止することができる。 As described above, in this embodiment, as in the first embodiment, the first reinforcing thin film 12a is formed in a portion of the resistance thin film 12 that does not overlap the first metal thin films 15a to 15c in plan view. Therefore, even if the resin layer 3 expands in a high temperature state, for example, it is possible to prevent the thin film resistance element R from being damaged by the stress generated by the expansion of the resin layers 3 and 4.
　＜第３実施形態＞
　本発明の第３の実施形態について図５を参照して説明する。 <Third Embodiment>
A third embodiment of the present invention will be described with reference to FIG.
　この実施形態が上記した第２実施形態と異なるのは、図５に示すように、抵抗薄膜１２上に接続電極１２ｃ，１２ｄが形成されていない点ある。その他の構成は上記した第１実施形態と同様の構成であるため、同一符号を引用することによりその構成の説明は省略する。 This embodiment is different from the second embodiment described above in that connection electrodes 12c and 12d are not formed on the resistive thin film 12, as shown in FIG. Since other configurations are the same as those in the first embodiment, description of the configurations is omitted by citing the same reference numerals.
　このように、抵抗薄膜１２上に接続電極１２ｃ，１２ｄが形成されていなくとも、上記した第２実施形態と同様に、第１の補強用薄膜１２ａにより第１、第２の薄膜抵抗素子Ｒが破損するのが防止された信頼性の高い薄膜デバイス１００を提供することができる。 Thus, even if the connection electrodes 12c and 12d are not formed on the resistance thin film 12, the first and second thin film resistance elements R are formed by the first reinforcing thin film 12a as in the second embodiment. A highly reliable thin film device 100 that is prevented from being damaged can be provided.
　なお、本発明は上記した実施形態に限定されるものではなく、その趣旨を逸脱しない限りにおいて、上記したもの以外に種々の変更を行なうことが可能であり、上記した各実施形態がどのように組み合わされてもよい。例えば、薄膜抵抗素子Ｒ，Ｒ１，Ｒ２（抵抗薄膜１２）の材料は上記した例に限定されるものではなく、例えばＣｒＳｉ合金により薄膜抵抗素子Ｒ，Ｒ１，Ｒ２が形成されてもよいし、例えば図６に示す従来の薄膜デバイス５００のように、Ｐｔ等の導電材料により薄膜抵抗素子Ｒ，Ｒ１，Ｒ２が形成されてもよい。 It should be noted that the present invention is not limited to the above-described embodiment, and various modifications other than those described above can be made without departing from the spirit of the present invention. They may be combined. For example, the material of the thin film resistance elements R, R1, R2 (resistance thin film 12) is not limited to the above-described example, and the thin film resistance elements R, R1, R2 may be formed of, for example, a CrSi alloy. As in the conventional thin film device 500 shown in FIG. 6, the thin film resistor elements R, R1, and R2 may be formed of a conductive material such as Pt.
　また、上記した第１、第２の金属薄膜１１ａ，１１ｂ，１５ａ～１５ｃは、それぞれ、高周波信号が通過する信号線を形成してもよいし、電源に接続された電源ラインを形成するものであってもよいし、ダミー電極であってもよい。 The first and second metal thin films 11a, 11b, 15a to 15c described above may form a signal line through which a high-frequency signal passes, or form a power supply line connected to a power source. It may be a dummy electrode.
　また、薄膜抵抗素子に追加して、薄膜キャパシタ素子や薄膜インダクタ素子、薄膜サーミスタ素子等の薄膜回路素子が適宜組み合わされることにより、薄膜抵抗素子を備える各種の回路が構成された薄膜デバイスを提供することができる。この場合には、薄膜キャパシタ素子、薄膜インダクタ素子、薄膜サーミスタ素子の構成は、一般的な薄膜回路素子の構成を有していればよい。具体的には、例えば、近距離通信装置のアンテナ感度調整用のデバイスや、フォトダイオード用ノイズフィルタデバイスを本発明の薄膜デバイスにより構成することができる。 Further, in addition to the thin film resistor element, a thin film device in which various circuits including the thin film resistor element are configured by appropriately combining thin film circuit elements such as a thin film capacitor element, a thin film inductor element, and a thin film thermistor element is provided. be able to. In this case, the thin film capacitor element, the thin film inductor element, and the thin film thermistor element may have a general thin film circuit element structure. Specifically, for example, a device for adjusting antenna sensitivity of a short-range communication device or a noise filter device for photodiodes can be constituted by the thin film device of the present invention.
　また、誘電体層を形成する誘電体材料は上記した例に限定されるものではない。たとえば、ＢａＴｉＯ３、ＳｒＴｉＯ３、ＰｂＴｉＯ３などの誘電体材料により誘電体層が形成されていてもよい。 Further, the dielectric material for forming the dielectric layer is not limited to the above example. For example, the dielectric layer may be formed of a dielectric material such as BaTiO 3 , SrTiO 3 , or PbTiO 3 .
　また、第１の金属薄膜１５ａ～１５ｃ、第２の金属薄膜１１ａ，１１ｂを形成するための薄膜形成プロセスは、上記したスパッタ法に限定されるものではなく、ＣＶＤ法等であってもよい。 Further, the thin film formation process for forming the first metal thin films 15a to 15c and the second metal thin films 11a and 11b is not limited to the above sputtering method, and may be a CVD method or the like.
　本発明は、薄膜抵抗素子を備える薄膜デバイスに広く適用することができる。 The present invention can be widely applied to a thin film device including a thin film resistance element.
　１　　基板
　２，３，４　　樹脂層
　１ａ，２ａ，３ａ，４ａ　　一方主面
　１１ａ，１１ｂ　　第２の金属薄膜
　１２　　抵抗薄膜
　１２ａ　　第１の補強用薄膜
　１２ｂ　　第２の補強用薄膜
　１２ｃ，１２ｄ　　接続電極
　１５ａ～１５ｃ　　第１の金属薄膜
　１００，１００ａ　　薄膜デバイス
　Ｃ　　薄膜キャパシタ素子
　Ｄ１，Ｄ２　　ＥＳＤ保護素子
　Ｐ１　　第１外部電極
　Ｐ２　　第２外部電極
　Ｐ３　　第３外部電極
　Ｐ４　　第４外部電極
　Ｒ　　薄膜抵抗素子
　Ｒ１　　第１の薄膜抵抗素子（薄膜抵抗素子）
　Ｒ２　　第２の薄膜抵抗素子（薄膜抵抗素子）
　Ｗ１，Ｗ２　　電流パス DESCRIPTION OF SYMBOLS 1 Substrate 2,3,4 Resin layer 1a, 2a, 3a, 4a One main surface 11a, 11b Second metal thin film 12 Resistive thin film 12a First reinforcing thin film 12b Second reinforcing thin film 12c, 12d Connection electrode 15a 15c First metal thin film 100, 100a Thin film device C Thin film capacitor element D1, D2 ESD protection element P1 First external electrode P2 Second external electrode P3 Third external electrode P4 Fourth external electrode R Thin film resistance element R1 First Thin film resistance element (thin film resistance element)
R2 Second thin film resistance element (thin film resistance element)
W1, W2 Current path

Claims (7)

  1. 　基板と、
    　前記基板の一方主面側に積層された複数の樹脂層とを備え、
    　前記複数の樹脂層は、
    　薄膜抵抗素子が一方主面に設けられた第１の樹脂層と、
    　前記第１の樹脂層の前記基板と反対側に配置された第１の金属薄膜が一方主面に設けられた第２の樹脂層とを含み、
    　前記薄膜抵抗素子は、
    　抵抗薄膜と、前記抵抗薄膜上に形成された第１の補強用薄膜とを有し、
    　前記第１の補強用薄膜が、前記第１の金属薄膜と平面視で重ならない部分に配置されている
    　ことを特徴とする薄膜デバイス。     A substrate,
    A plurality of resin layers laminated on one main surface side of the substrate,
    The plurality of resin layers are:
    A first resin layer provided with a thin film resistance element on one main surface;
    A first metal thin film disposed on the opposite side of the first resin layer from the substrate includes a second resin layer provided on one main surface;
    The thin film resistance element is
    A resistive thin film, and a first reinforcing thin film formed on the resistive thin film,
    The first reinforcing thin film is disposed in a portion that does not overlap the first metal thin film in plan view.
  2. 　前記薄膜抵抗素子は、
    　前記抵抗薄膜上に形成された接続電極をさらに有し、
    　前記第１の補強用薄膜と前記接続電極とが同一のプロセスにより同時に形成されていることを特徴とする請求項１に記載の薄膜デバイス。     The thin film resistance element is
    A connection electrode formed on the resistive thin film;
    2. The thin film device according to claim 1, wherein the first reinforcing thin film and the connection electrode are simultaneously formed by the same process.
  3. 　前記抵抗薄膜は、Ｓｉを含有することを特徴とする請求項１または２に記載の薄膜デバイス。 3. The thin film device according to claim 1, wherein the resistive thin film contains Si.
  4. 　前記抵抗薄膜の抵抗率が、前記第１の補強用薄膜の抵抗率よりも大きいことを特徴とする請求項１ないし３のいずれかに記載の薄膜デバイス。 The thin film device according to any one of claims 1 to 3, wherein a resistivity of the resistive thin film is larger than a resistivity of the first reinforcing thin film.
  5. 　前記複数の樹脂層は、
    　前記第１の樹脂層の前記基板側に配置された第２の金属薄膜が一方主面に設けられた第３の樹脂層をさらに含み、
    　前記薄膜抵抗素子は、
    　前記抵抗薄膜上に形成された第２の補強用薄膜をさらに有し、
    　前記第２の補強用薄膜が、前記第２の金属薄膜と平面視で重ならない部分に配置されている
    　ことを特徴とする請求項１ないし４のいずれかに記載の薄膜デバイス。     The plurality of resin layers are:
    The second resin thin film disposed on the substrate side of the first resin layer further includes a third resin layer provided on one main surface;
    The thin film resistance element is
    A second reinforcing thin film formed on the resistive thin film;
    The thin film device according to any one of claims 1 to 4, wherein the second reinforcing thin film is disposed in a portion that does not overlap the second metal thin film in plan view.
  6. 　第１～第４外部電極と、
    　前記第１、第２外部電極間に直列接続された可変容量型の薄膜キャパシタ素子と、
    　一端が前記第３外部電極に接続された第１の前記薄膜抵抗素子と、
    　一端が前記第４外部電極に接続された第２の前記薄膜抵抗素子とを備え、
    　前記第１、第２の薄膜抵抗素子の他端間に前記薄膜キャパシタ素子が挿入されるように、前記第１、第２の薄膜抵抗素子それぞれの他端が前記薄膜キャパシタ素子両端のそれぞれに接続されていることを特徴とする請求項１ないし５いずれかに記載の薄膜デバイス。     First to fourth external electrodes;
    A variable capacitance type thin film capacitor element connected in series between the first and second external electrodes;
    A first thin film resistor element having one end connected to the third external electrode;
    A second thin film resistor element having one end connected to the fourth external electrode;
    The other ends of the first and second thin film resistor elements are connected to both ends of the thin film capacitor element so that the thin film capacitor element is inserted between the other ends of the first and second thin film resistor elements. The thin film device according to claim 1, wherein the thin film device is formed.
  7. 　所定電圧以上の静電気放電が生じた場合に前記第１、第２の薄膜抵抗素子および前記薄膜キャパシタ素子を経由しない電流パスを形成するＥＳＤ保護素子をさらに備えることを特徴とする請求項６に記載の薄膜デバイス。 The ESD protection element according to claim 6, further comprising an ESD protection element that forms a current path that does not pass through the first and second thin film resistor elements and the thin film capacitor element when electrostatic discharge of a predetermined voltage or more occurs. Thin film device.
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WO2022149371A1 (en) * 2021-01-08 2022-07-14 ローム株式会社 Electronic component
WO2023112551A1 (en) * 2021-12-17 2023-06-22 ローム株式会社 Semiconductor device and method for manufacturing same

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US10978249B2 (en) 2017-02-17 2021-04-13 Murata Manufacturing Co, Ltd. Thin-film device and method of manufacturing thin-film device
WO2022149371A1 (en) * 2021-01-08 2022-07-14 ローム株式会社 Electronic component
WO2023112551A1 (en) * 2021-12-17 2023-06-22 ローム株式会社 Semiconductor device and method for manufacturing same

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