WO2016082234A1 - 薄膜晶体管、显示装置及薄膜晶体管的制造方法 - Google Patents

薄膜晶体管、显示装置及薄膜晶体管的制造方法 Download PDF

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WO2016082234A1
WO2016082234A1 PCT/CN2014/092829 CN2014092829W WO2016082234A1 WO 2016082234 A1 WO2016082234 A1 WO 2016082234A1 CN 2014092829 W CN2014092829 W CN 2014092829W WO 2016082234 A1 WO2016082234 A1 WO 2016082234A1
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layer
light shielding
thin film
film transistor
shielding layer
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PCT/CN2014/092829
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English (en)
French (fr)
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黄秋平
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深圳市华星光电技术有限公司
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Priority to US14/426,425 priority Critical patent/US10084013B2/en
Publication of WO2016082234A1 publication Critical patent/WO2016082234A1/zh

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B63/00—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices
    • H10B63/20—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices comprising selection components having two electrodes, e.g. diodes
    • H10B63/22—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices comprising selection components having two electrodes, e.g. diodes of the metal-insulator-metal type
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/7869—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136209—Light shielding layers, e.g. black matrix, incorporated in the active matrix substrate, e.g. structurally associated with the switching element
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136286—Wiring, e.g. gate line, drain line
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
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    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
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    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1248—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition or shape of the interlayer dielectric specially adapted to the circuit arrangement
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1259—Multistep manufacturing methods
    • H01L27/1288—Multistep manufacturing methods employing particular masking sequences or specially adapted masks, e.g. half-tone mask
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    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
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    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66742—Thin film unipolar transistors
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    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
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    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
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    • H01L29/78606—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
    • H01L29/78633—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device with a light shield
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78651—Silicon transistors
    • H01L29/7866—Non-monocrystalline silicon transistors
    • H01L29/78663—Amorphous silicon transistors
    • H01L29/78669—Amorphous silicon transistors with inverted-type structure, e.g. with bottom gate
    • H—ELECTRICITY
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    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
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    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
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    • H01L29/7866—Non-monocrystalline silicon transistors
    • H01L29/78672—Polycrystalline or microcrystalline silicon transistor
    • H01L29/78678—Polycrystalline or microcrystalline silicon transistor with inverted-type structure, e.g. with bottom gate

Definitions

  • the present invention relates to the field of liquid crystal display technology, and in particular, to a thin film transistor, a display device, and a method of manufacturing the thin film transistor.
  • the application of an oxide semiconductor as a semiconductor layer of a thin film transistor is a relatively advanced technology. Since the oxide semiconductor thin film transistor has high mobility and high visible light transmittance, the device is being widely applied to a liquid crystal display device.
  • the thin film transistor of the prior art has a problem that the threshold of the thin film transistor fluctuates due to light illuminating the semiconductor layer of the thin film transistor.
  • the absorption of the incident light causes the conductivity to fluctuate, and the threshold value of the thin film transistor fluctuates, resulting in a decrease in the reliability of the liquid crystal display panel.
  • the invention provides a thin film transistor, a display device and a method for manufacturing the thin film transistor, which can realize the shading protection of the thin film transistor and save the process steps.
  • the present invention provides a thin film transistor including a substrate, a gate electrode disposed on a surface of the substrate, a gate protection layer and a semiconductor layer stacked on the gate electrode, and an etch stop disposed on a surface of the semiconductor layer a layer, a source metal, and a drain metal, the source metal and the drain metal being located on opposite sides of the etch stop layer, the thin film transistor further comprising a light shielding layer, an insulating dielectric layer, and a pixel electrode, a light shielding layer is disposed over the etch stop layer to prevent light from being irradiated to the semiconductor layer, the insulating dielectric layer covering the source metal, the drain metal, and the light shielding layer, the pixel electrode Provided on the surface of the insulating dielectric layer and electrically connected to the drain metal.
  • the light shielding layer is made of organic black material, and has the characteristics of being opaque and non-conductive.
  • the light shielding layer is a black negative photoresist.
  • the material of the light shielding layer is a BM material.
  • the present invention also provides a display device comprising the thin film transistor according to any one of the above.
  • the present invention also provides a method of fabricating a thin film transistor, the method of manufacturing the thin film transistor comprising:
  • Source metal and the drain metal are located on a surface of the semiconductor layer, and are respectively located on both sides of the etch stop layer;
  • a pixel electrode is formed, the pixel electrode being disposed on a surface of the insulating dielectric layer and electrically connected to the drain metal.
  • the light shielding layer is made of organic black material, and has the characteristics of being opaque and non-conductive.
  • the light shielding layer is a black negative photoresist
  • the etching prevention layer pattern and the light shielding layer pattern are formed in a co-lithography process by performing a photolithography process on the light shielding layer.
  • the step of “making a light shielding layer on the surface of the etch stop layer” includes:
  • a lithographic pattern is formed by a photolithography process to form the light shielding layer pattern and the etch stop layer pattern.
  • the photolithography process is a mask design of a halftone or grayscale photolithography process, and the thickness of the light shielding layer can be adjusted.
  • the invention provides a light shielding layer on the surface of the etch stop layer, so that the conductive region of the thin film transistor of the invention is covered by a light-shielding layer which is opaque, and the light shielding layer can protect the transistor semiconductor layer from being irradiated with light, thereby avoiding
  • the threshold value of the thin film transistor fluctuates due to illumination, which improves the reliability of the display device.
  • FIG. 1 is a schematic view of a thin film transistor in an embodiment of the present invention.
  • FIG. 2 is a schematic view showing deposition of a gate electrode, a gate protective layer, and a semiconductor layer on a substrate in the process of manufacturing the thin film transistor illustrated in FIG. 1.
  • FIG. 3 is a schematic view showing deposition of an etch stop layer on the basis of FIG. 2 in the process of manufacturing the thin film transistor shown in FIG.
  • FIG. 4 is a schematic view showing a process of applying a photoresist on the basis of FIG. 3 and performing a photolithography process in the process of manufacturing the thin film transistor shown in FIG. 1.
  • FIG. 5 is a schematic view showing the formation of a light shielding layer pattern after the photolithography process on the basis of FIG. 4.
  • FIG. 5 is a schematic view showing the formation of a light shielding layer pattern after the photolithography process on the basis of FIG. 4.
  • Fig. 6 is a view showing a pattern in which an etch stop layer is etched on the basis of Fig. 5.
  • the thin film transistor includes a substrate 1, a gate electrode 2 disposed on a surface of the substrate 1, a gate protection layer 3 laminated on the gate electrode 2, and a semiconductor layer 4 (ie, a channel layer), an etch stop layer 6 provided on a surface of the semiconductor layer 4, and a source metal 5a and a drain metal 5b, the source metal 5a and the drain metal 5b are located on both sides of the etch stop layer 6.
  • the substrate 1 is a transparent glass substrate.
  • the gate electrode 2 is formed by depositing a metal layer on the substrate 1, and the material thereof is selected from one of copper, tungsten, chromium, aluminum, and a combination thereof.
  • the etch stop layer is SiO2 for protecting the semiconductor layer 4.
  • the thin film transistor further includes a light shielding layer 7, an insulating dielectric layer 8, and a pixel electrode 9.
  • the light shielding layer 7 is laminated over the etch stop layer 6 to prevent light from being incident on the semiconductor layer 4.
  • the insulating dielectric layer 8 covers the source metal 5a, the drain metal 5b, and the light shielding layer 7.
  • the pixel electrode 9 is disposed on the surface of the insulating dielectric layer 8 and electrically connected to the drain Metal 5b.
  • a through hole is formed in the insulating dielectric layer 8, and the pixel electrode 9 partially protrudes into the through hole to electrically connect the pixel electrode 9 to the drain metal 5b.
  • the light shielding layer 7 is made of an organic black material and has a property of being opaque and non-conductive.
  • the light shielding layer 7 is preferably a black negative photoresist.
  • the material of the light shielding layer 7 is a BM material.
  • the present invention also provides a display device including the thin film transistor.
  • the conductive region of the thin film transistor of the present invention is covered by a light-shielding layer 7 which is opaque, and the light shielding layer 7 can protect the transistor semiconductor layer 4 from light. Irradiation, thereby avoiding the fluctuation of the threshold value of the thin film transistor due to illumination, and improving the reliability of the display device.
  • the present invention also provides a method of fabricating a thin film transistor, the method of manufacturing the thin film transistor comprising the following steps:
  • a substrate 1 is provided.
  • the substrate 1 is a transparent glass substrate.
  • a gate electrode 2 is deposited on the substrate 1. As shown in FIG. 2, the gate electrode 2 is formed at an intermediate position of one surface of the substrate 1.
  • the material of the gate electrode 2 is selected from the group consisting of copper, tungsten, chromium, aluminum and One of the combinations.
  • a gate protective layer 3 is deposited on a surface of the substrate 1 on which the gate electrode 2 is provided.
  • a semiconductor layer 4 is formed on the surface of the gate protection layer 3, and the semiconductor layer 4 is located directly above the gate electrode 2.
  • an etch stop layer 6 is deposited on the surface of the semiconductor layer 4.
  • a light shielding layer 7 is formed on the surface of the etch stop layer 6.
  • a source metal 5a and a drain metal 5b are deposited, and the source metal 5a and the drain metal 5b are located on the surface of the semiconductor layer 4 and are respectively located on both sides of the etch stop layer 6.
  • Deposition source metal The method of 5a and drain metal 5b is the same as that of the prior art and will not be described in detail.
  • an insulating dielectric layer 8 is deposited, which covers the source metal 5a, the drain metal 5b, and the light shielding layer 7.
  • a pixel electrode 9 is formed, which is provided on the surface of the insulating dielectric layer 8 and electrically connected to the drain metal 5b.
  • a via hole is formed on the insulating dielectric layer 8, and then the pixel electrode 9 layer is deposited so that the pixel electrode 9 layer enters the via hole and is electrically connected to the drain metal 5b.
  • the light shielding layer 7 is made of an organic black material and has a property of being opaque and non-conductive.
  • the light shielding layer 7 is a black negative photoresist.
  • the etch stop layer 6 pattern and the light shielding layer 7 pattern are formed in the same photolithography process by performing a photolithography process on the light shielding layer 7. In this way, a separate photolithography process for the semiconductor layer 4 can be omitted while achieving shading and protection of the device.
  • the step of “making a light shielding layer 7 on the surface of the etch stop layer 6” includes: coating a surface of the deposited etch stop layer 6 with a layer of light.
  • the photoresist is a negative photoresist, has a light-shielding feature, and has a light-shielding property similar to BM (black light-shielding layer 7).
  • a lithographic pattern is formed by a photolithography process in conjunction with the reticle design to form the opaque layer 7 pattern and the etch stop layer 6 pattern.
  • the photolithography process is a mask design of a half tone or gray tone lithography process, and the thickness of the light shielding layer 7 can be adjusted to obtain a light shielding layer 7 of a suitable thickness.

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  • Microelectronics & Electronic Packaging (AREA)
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  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Computer Hardware Design (AREA)
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  • Crystallography & Structural Chemistry (AREA)
  • Chemical & Material Sciences (AREA)
  • Mathematical Physics (AREA)
  • Optics & Photonics (AREA)
  • Manufacturing & Machinery (AREA)
  • Thin Film Transistor (AREA)
  • Liquid Crystal (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)

Abstract

本发明公开一种薄膜晶体管，包括基板、设于基板表面的栅极电极、层叠设置在所述栅极电极上的栅极保护层和半导体层、设于所述半导体层表面的刻蚀阻止层、源极金属和漏极金属，所述源极金属和所述漏极金属位于所述刻蚀阻止层的两侧。所述薄膜晶体管还包括遮光层、绝缘介质层和像素电极，所述遮光层层叠设于所述刻蚀阻止层上方，以防止光照射至所述半导体层，所述绝缘介质层覆盖所述源极金属、所述漏极金属及所述遮光层，像素电极设于绝缘介质层表面，且电连接至漏极金属。本发明能够避免光照射至半导体层，从而避免了由于光照的原因导致薄膜晶体管阀值波动，提高液晶面板的可靠性。本发明还提供一种显示装置和一种薄膜晶体管的制造方法。

Description

薄膜晶体管、显示装置及薄膜晶体管的制造方法
本发明要求2014年11月24日递交的发明名称为“薄膜晶体管、显示装置及薄膜晶体管的制造方法”的申请号201410682972.3的在先申请优先权，上述在先申请的内容以引入的方式并入本文本中。
技术领域
本发明涉及液晶显示技术领域，特别涉及一种薄膜晶体管、显示装置及薄膜晶体管的制造方法。
背景技术
目前，应用氧化物半导体作为薄膜晶体管的半导体层属于比较前沿的技术。由于氧化物半导体薄膜晶体管具有较高的迁移率和高的可见光透过性，该器件正被大量的应用于液晶显示装置。
现有技术中的薄膜晶体管存在由于光照射薄膜晶体管的半导体层而导致该薄膜晶体管的阀值发生波动的问题。由于对入射光的吸收，而导致电导率发生变动，薄膜晶体管的阀值变动，从而导致液晶显示面板可靠性降低。
发明内容
本发明提供一种薄膜晶体管、显示装置及薄膜晶体管的制造方法，能够实现对薄膜晶体管的遮光保护，又能够节省工艺步骤。
为了实现上述目的，本发明实施方式提供如下技术方案：
本发明供了一种薄膜晶体管，包括基板、设于基板表面的栅极电极、层叠设置在所述栅极电极上的栅极保护层和半导体层、设于所述半导体层表面的刻蚀阻止层、源极金属和漏极金属，所述源极金属和所述漏极金属位于所述刻蚀阻止层的两侧，所述薄膜晶体管还包括遮光层、绝缘介质层和像素电极，所述 遮光层层叠设于所述刻蚀阻止层上方，以防止光照射至所述半导体层，所述绝缘介质层覆盖所述源极金属、所述漏极金属及所述遮光层，所述像素电极设于所述绝缘介质层表面，且电连接至所述漏极金属。
其中，所述遮光层为有机黑色材质，具有不透光不导电的特性。
其中，所述遮光层为黑色负性光阻。
其中，所述遮光层的材料为BM材料。
本发明还提供一种显示装置，所述显示装置包括上述任意一项所述的薄膜晶体管。
本发明还提供一种薄膜晶体管的制造方法，所述薄膜晶体管的制造方法包括：
提供基板，并在所述基板上沉积栅极电极；
在所述基板的设有所述栅极电极的表面沉积栅极保护层；
在所述栅极保护层表面制作半导体层；
在所述半导体层表面沉积刻蚀阻止层；
在所述刻蚀阻止层表面制作遮光层；
沉积源极金属和漏极金属，所述源极金属和所述漏极金属位于所述半导体层表面，且分别位于所述刻蚀阻止层的两侧；
沉积绝缘介质层，所述绝缘介质层覆盖所述源极金属、所述漏极金属及所述遮光层；及
制作像素电极，所述像素电极设于所述绝缘介质层表面，且电连接至所述漏极金属。
其中，所述遮光层为有机黑色材质，具有不透光不导电的特性。
其中，所述遮光层为黑色负性光阻，通过对所述遮光层进行光刻工艺，在同道光刻工艺制程中实现所述刻蚀阻止层图形和所述遮光层图形的制作。
其中，“在所述刻蚀阻止层表面制作遮光层”的步骤包括：
在沉积好的所述刻蚀阻止层表面涂覆一层光刻胶，所述光刻胶为负性光刻胶，具遮光特征；及
配合光罩设计，通过光刻工艺，制作光刻图形，以形成所述遮光层图形和所述刻蚀阻止层图形。
其中，所述光刻工艺为半色调或灰度的光刻工艺的掩膜设计，能够调整所述遮光层的厚度。
本发明通过在刻蚀阻止层表面设一层遮光层，使得本发明薄膜晶体管导电区域被一层不透光的遮光层所覆盖，遮光层能够保护晶体管半导体层不被光所照射，从而避免了由于光照的原因导致薄膜晶体管阀值波动，提高显示装置的可靠性。
附图说明
为了更清楚地说明本发明的技术方案，下面将对实施方式中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本发明的一些实施方式，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以如这些附图获得其他的附图。
图1是本发明一种实施方式中的薄膜晶体管示意图。
图2是制造图1所示的薄膜晶体管过程中，在基板上沉积栅极电极、栅极保护层及半导体层的示意图。
图3是制造图1所示的薄膜晶体管过程中，在图2的基础上沉积刻蚀阻止层的示意图。
图4是制造图1所示的薄膜晶体管过程中，在图3的基础上涂覆一层光刻胶，且进行光刻工艺的示意图。
图5是在图4的基础上，光刻工艺后形成遮光层图形的示意图。
图6是在图5的基础上，刻蚀出刻蚀阻止层的图形的示意图。
具体实施方式
下面将结合本发明实施方式中的附图，对本发明实施方式中的技术方案进行清楚、完整地描述。
图1所示为本发明供的一种薄膜晶体管，所述薄膜晶体管包括基板1、设于基板1表面的栅极电极2、层叠设置在所述栅极电极2上的栅极保护层3和半导体层4(即沟道层)、设于所述半导体层4表面的刻蚀阻止层6、源极金属 5a和漏极金属5b，所述源极金属5a和所述漏极金属5b位于所述刻蚀阻止层6的两侧。在本实施方式中，所述基板1为透明玻璃基板。所述栅极电极2通过在基板1上沉积金属层形成，其材质选自铜、钨、铬、铝及其组合的其中之一。一种实施方式中，刻蚀阻挡层为SiO2，用于保护半导体层4。
所述薄膜晶体管还包括遮光层7、绝缘介质层8和像素电极9。所述遮光层7层叠设于所述刻蚀阻止层6上方，以防止光照射至所述半导体层4。所述绝缘介质层8覆盖所述源极金属5a、所述漏极金属5b及所述遮光层7，所述像素电极9设于所述绝缘介质层8表面，且电连接至所述漏极金属5b。绝缘介质层8上设有通孔，像素电极9部分伸入通孔，以实现将像素电极9电连接至所述漏极金属5b。
具体而言，所述遮光层7为有机黑色材质，具有不透光不导电的特性。
所述遮光层7优选为黑色负性光阻。一种实施方式中，所述遮光层7的材料为BM材料。
本发明还提供一种显示装置，所述显示装置包括所述的薄膜晶体管。
本发明通过在刻蚀阻止层6表面设一层遮光层7，使得本发明薄膜晶体管导电区域被一层不透光的遮光层7所覆盖，遮光层7能够保护晶体管半导体层4不被光所照射，从而避免了由于光照的原因导致薄膜晶体管阀值波动，提高显示装置的可靠性。
本发明还提供一种薄膜晶体管的制造方法，所述薄膜晶体管的制造方法包括如下步骤：
请参阅图2，提供基板1，本实施方式中，所述基板1为透明玻璃基板。在所述基板1上沉积栅极电极2，图2所示，栅极电极2形成在基板1的一个表面的中间位置处，栅极电极2的材质选自铜、钨、铬、铝及其组合的其中之一。在所述基板1的设有所述栅极电极2的表面沉积栅极保护层3。在所述栅极保护层3表面制作半导体层4，半导体层4位于栅极电极2的正上方。
请参阅图3，在所述半导体层4表面沉积刻蚀阻止层6。
请参阅图4、图5和图6，在所述刻蚀阻止层6表面制作遮光层7。
沉积源极金属5a和漏极金属5b，所述源极金属5a和所述漏极金属5b位于所述半导体层4表面，且分别位于所述刻蚀阻止层6的两侧。沉积源极金属 5a和漏极金属5b的方法同现有技术的作法，不再详述。然后，沉积绝缘介质层8，所述绝缘介质层8覆盖所述源极金属5a、所述漏极金属5b及所述遮光层7。最后，制作像素电极9，所述像素电极9设于所述绝缘介质层8表面，且电连接至所述漏极金属5b。制作像素电极9前，先在绝缘介质层8上设通孔，然后再沉积像素电极9层，使得像素电极9层进入通孔内与漏极金属5b电连接。
具体而言，所述遮光层7为有机黑色材质，具有不透光不导电的特性。所述遮光层7为黑色负性光阻，通过对所述遮光层7进行光刻工艺，在同道光刻工艺制程中实现所述刻蚀阻止层6图形和所述遮光层7图形的制作。这样，可以省去一道对半导体层4的单独光刻工艺，同时实现对器件的遮光和保护。
一种实施方式中，请参阅图4-图6，“在所述刻蚀阻止层6表面制作遮光层7”的步骤包括：在沉积好的所述刻蚀阻止层6表面涂覆一层光刻胶，所述光刻胶为负性光刻胶，具遮光特征，具有类似BM(黑色遮光层7)的遮光特性。配合光罩设计，通过光刻工艺，制作光刻图形，以形成所述遮光层7图形和所述刻蚀阻止层6图形。
所述光刻工艺为半色调(half tone)或灰度(gray tone)的光刻工艺的掩膜(Mask)设计，能够调整所述遮光层7的厚度，从而得到合适厚度的遮光层7。
以上所述是本发明的优选实施方式，应当指出，对于本技术领域的普通技术人员来说，在不脱离本发明原理的前提下，还可以做出若干改进和润饰，这些改进和润饰也视为本发明的保护范围。

Claims (13)

  1. 一种薄膜晶体管，包括基板、设于基板表面的栅极电极、层叠设置在所述栅极电极上的栅极保护层和半导体层、设于所述半导体层表面的刻蚀阻止层、源极金属和漏极金属，所述源极金属和所述漏极金属位于所述刻蚀阻止层的两侧，其特征在于，所述薄膜晶体管还包括遮光层、绝缘介质层和像素电极，所述遮光层层叠设于所述刻蚀阻止层上方，以防止光照射至所述半导体层，所述绝缘介质层覆盖所述源极金属、所述漏极金属及所述遮光层，所述像素电极设于所述绝缘介质层表面，且电连接至所述漏极金属。
  2. 如权利要求1所述的薄膜晶体管，其特征在于，所述遮光层为有机黑色材质，具有不透光不导电的特性。
  3. 如权利要求2所述的薄膜晶体管，其特征在于，所述遮光层为黑色负性光阻。
  4. 如权利要求3所述的薄膜晶体管，其特征在于，所述遮光层的材料为BM材料。
  5. 一种显示装置，包括薄膜晶体管，其特征在于，所述薄膜晶体管包括基板、设于基板表面的栅极电极、层叠设置在所述栅极电极上的栅极保护层和半导体层、设于所述半导体层表面的刻蚀阻止层、源极金属和漏极金属，所述源极金属和所述漏极金属位于所述刻蚀阻止层的两侧，所述薄膜晶体管还包括遮光层、绝缘介质层和像素电极，所述遮光层层叠设于所述刻蚀阻止层上方，以防止光照射至所述半导体层，所述绝缘介质层覆盖所述源极金属、所述漏极金属及所述遮光层，所述像素电极设于所述绝缘介质层表面，且电连接至所述漏极金属。
  6. 如权利要求5所述的显示装置，其特征在于，所述遮光层为有机黑色材质，具有不透光不导电的特性。
  7. 如权利要求6所述的显示装置，其特征在于，所述遮光层为黑色负性光阻。
  8. 如权利要求7所述的显示装置，其特征在于，所述遮光层的材料为BM材料。
  9. 一种薄膜晶体管的制造方法，其特征在于，所述薄膜晶体管的制造方法包括：
    提供基板，并在所述基板上沉积栅极电极；
    在所述基板的设有所述栅极电极的表面沉积栅极保护层；
    在所述栅极保护层表面制作半导体层；
    在所述半导体层表面沉积刻蚀阻止层；
    在所述刻蚀阻止层表面制作遮光层；
    沉积源极金属和漏极金属，所述源极金属和所述漏极金属位于所述半导体层表面，且分别位于所述刻蚀阻止层的两侧；
    沉积绝缘介质层，所述绝缘介质层覆盖所述源极金属、所述漏极金属及所述遮光层；及
    制作像素电极，所述像素电极设于所述绝缘介质层表面，且电连接至所述漏极金属。
  10. 如权利要求9所述的薄膜晶体管的制造方法，其特征在于，所述遮光层为有机黑色材质，具有不透光不导电的特性。
  11. 如权利要求10所述的薄膜晶体管的制造方法，其特征在于，所述遮光层为黑色负性光阻，通过对所述遮光层进行光刻工艺，在同道光刻工艺制程中实现所述刻蚀阻止层图形和所述遮光层图形的制作。
  12. 如权利要求11所述的薄膜晶体管的制造方法，其特征在于，“在所述刻蚀阻止层表面制作遮光层”的步骤包括：
    在沉积好的所述刻蚀阻止层表面涂覆一层光刻胶，所述光刻胶为负性光刻胶，具遮光特征；及
    配合光罩设计，通过光刻工艺，制作光刻图形，以形成所述遮光层图形和所述刻蚀阻止层图形。
  13. 如权利要求12所述的薄膜晶体管的制造方法，其特征在于，所述光刻工艺为半色调或灰度的光刻工艺的掩膜设计，能够调整所述遮光层的厚度。
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CN105652541B (zh) * 2016-01-20 2018-11-23 深圳市华星光电技术有限公司 阵列基板的制作方法及液晶显示面板
CN106449656A (zh) * 2016-10-26 2017-02-22 京东方科技集团股份有限公司 阵列基板及其制作方法、显示面板和显示装置
KR102599536B1 (ko) * 2017-01-26 2023-11-08 삼성전자 주식회사 생체 센서를 갖는 전자 장치
CN106684103B (zh) * 2017-02-28 2020-04-03 厦门天马微电子有限公司 阵列基板、显示面板及显示装置
CN106981478A (zh) * 2017-04-07 2017-07-25 京东方科技集团股份有限公司 顶栅型薄膜晶体管及其制作方法、阵列基板、显示面板
CN111208687A (zh) * 2020-01-13 2020-05-29 深圳市华星光电半导体显示技术有限公司 显示面板及显示装置
CN112002733B (zh) 2020-08-06 2023-12-01 武汉华星光电半导体显示技术有限公司 Oled显示装置及制备方法
CN112820779B (zh) * 2020-12-31 2022-12-16 上海应用技术大学 一种薄膜晶体管及其制备方法
CN113594022A (zh) * 2021-07-26 2021-11-02 杭州美迪凯光电科技股份有限公司 一种光学镀膜半导体晶圆嫁接方法及光学镀膜半导体

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6278504B1 (en) * 1996-01-25 2001-08-21 Lg. Philips Lcd Co., Ltd. Thin film transistor for liquid crystal display device having a semiconductor layer's width smaller than a width of the gate, drain and source electrodes
CN103268855A (zh) * 2012-12-19 2013-08-28 上海天马微电子有限公司 多晶硅形成方法、tft阵列基板制造方法及显示装置
CN103681693A (zh) * 2013-12-05 2014-03-26 京东方科技集团股份有限公司 一种阵列基板及其制作方法、显示装置

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5414276A (en) * 1993-10-18 1995-05-09 The Regents Of The University Of California Transistors using crystalline silicon devices on glass
JPH09199728A (ja) * 1996-01-18 1997-07-31 Toshiba Corp 薄膜トランジスタおよび液晶表示装置
JP2003188183A (ja) * 2001-12-20 2003-07-04 Fujitsu Display Technologies Corp 薄膜トランジスタ装置、その製造方法及び液晶表示装置
JP5037808B2 (ja) * 2005-10-20 2012-10-03 キヤノン株式会社 アモルファス酸化物を用いた電界効果型トランジスタ、及び該トランジスタを用いた表示装置
KR101417913B1 (ko) * 2007-12-05 2014-07-09 엘지디스플레이 주식회사 다중시각 표시장치
KR101602635B1 (ko) * 2009-11-30 2016-03-22 삼성디스플레이 주식회사 표시 장치, 박막 트랜지스터 기판 및 이의 제조 방법
JP5357342B2 (ja) * 2011-01-13 2013-12-04 シャープ株式会社 薄膜トランジスタ基板及び製造方法
TW201338171A (zh) * 2012-03-15 2013-09-16 Wintek Corp 薄膜電晶體、其製作方法及應用其之主動矩陣顯示面板
US10199507B2 (en) * 2012-12-03 2019-02-05 Lg Display Co., Ltd. Thin film transistor, display device and method of manufacturing the same

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6278504B1 (en) * 1996-01-25 2001-08-21 Lg. Philips Lcd Co., Ltd. Thin film transistor for liquid crystal display device having a semiconductor layer's width smaller than a width of the gate, drain and source electrodes
CN103268855A (zh) * 2012-12-19 2013-08-28 上海天马微电子有限公司 多晶硅形成方法、tft阵列基板制造方法及显示装置
CN103681693A (zh) * 2013-12-05 2014-03-26 京东方科技集团股份有限公司 一种阵列基板及其制作方法、显示装置

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