WO2016015415A1 - 阵列基板及其制备方法、显示装置 - Google Patents
阵列基板及其制备方法、显示装置 Download PDFInfo
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- 239000000758 substrate Substances 0.000 title claims abstract description 81
- 238000004519 manufacturing process Methods 0.000 title abstract description 5
- 238000000034 method Methods 0.000 claims abstract description 60
- 229910044991 metal oxide Inorganic materials 0.000 claims abstract description 45
- 239000004065 semiconductor Substances 0.000 claims abstract description 45
- 150000004706 metal oxides Chemical class 0.000 claims abstract description 44
- 238000005530 etching Methods 0.000 claims abstract description 18
- 229920002120 photoresistant polymer Polymers 0.000 claims description 156
- 230000004888 barrier function Effects 0.000 claims description 59
- 230000008569 process Effects 0.000 claims description 34
- 239000000463 material Substances 0.000 claims description 16
- 238000002161 passivation Methods 0.000 claims description 8
- 238000000059 patterning Methods 0.000 claims description 8
- 238000001039 wet etching Methods 0.000 claims description 6
- 239000011149 active material Substances 0.000 abstract description 2
- 238000007254 oxidation reaction Methods 0.000 abstract 1
- 239000010410 layer Substances 0.000 description 158
- 239000010949 copper Substances 0.000 description 14
- 239000010408 film Substances 0.000 description 12
- 239000002184 metal Substances 0.000 description 11
- 229910052751 metal Inorganic materials 0.000 description 11
- 238000002360 preparation method Methods 0.000 description 5
- 230000015572 biosynthetic process Effects 0.000 description 4
- 230000000694 effects Effects 0.000 description 4
- 239000003292 glue Substances 0.000 description 4
- 239000004973 liquid crystal related substance Substances 0.000 description 4
- 238000002834 transmittance Methods 0.000 description 4
- XLOMVQKBTHCTTD-UHFFFAOYSA-N Zinc monoxide Chemical compound [Zn]=O XLOMVQKBTHCTTD-UHFFFAOYSA-N 0.000 description 3
- 230000004075 alteration Effects 0.000 description 3
- 238000006243 chemical reaction Methods 0.000 description 3
- 239000007788 liquid Substances 0.000 description 3
- 238000001459 lithography Methods 0.000 description 3
- 230000000717 retained effect Effects 0.000 description 3
- 239000010409 thin film Substances 0.000 description 3
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 3
- 230000008859 change Effects 0.000 description 2
- 239000004020 conductor Substances 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 239000000499 gel Substances 0.000 description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- 238000012876 topography Methods 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 description 1
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 238000004380 ashing Methods 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 229910052733 gallium Inorganic materials 0.000 description 1
- 229910052738 indium Inorganic materials 0.000 description 1
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 1
- 229910003437 indium oxide Inorganic materials 0.000 description 1
- PJXISJQVUVHSOJ-UHFFFAOYSA-N indium(iii) oxide Chemical compound [O-2].[O-2].[O-2].[In+3].[In+3] PJXISJQVUVHSOJ-UHFFFAOYSA-N 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 239000011241 protective layer Substances 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
- 230000009466 transformation Effects 0.000 description 1
- TYHJXGDMRRJCRY-UHFFFAOYSA-N zinc indium(3+) oxygen(2-) tin(4+) Chemical compound [O-2].[Zn+2].[Sn+4].[In+3] TYHJXGDMRRJCRY-UHFFFAOYSA-N 0.000 description 1
- 239000011787 zinc oxide Substances 0.000 description 1
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- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
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- H01L29/42312—Gate electrodes for field effect devices
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- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
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- H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
- H01L29/4908—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET for thin film semiconductor, e.g. gate of TFT
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Abstract
Description
Claims (16)
- 一种阵列基板的制备方法,包括:在衬底基板上形成栅极图案、栅绝缘层图案、金属氧化物半导体有源层图案;形成刻蚀阻挡层;先形成像素电极图案,再形成源极图案和漏极图案;其中,所述像素电极图案通过所述源极图案或者漏极图案与所述金属氧化物半导体有源层图案连接。
- 根据权利要求1所述的方法,其中在形成所述刻蚀阻挡层之后并且形成所述像素电极图案之前,所述方法还包括:对所述刻蚀阻挡层进行一次构图工艺处理,形成包括第一过孔和第二过孔的刻蚀阻挡层图案,并形成位于除像素区域外且至少覆盖所述第一过孔和所述第二过孔的光刻胶层图案。
- 根据权利要求2所述的方法,其中所述先形成像素电极图案,再形成源极图案和漏极图案,包括:在形成有所述光刻胶层图案的基板上,形成位于所述像素区域的所述像素电极图案;并去除所述光刻胶层图案,露出所述第一过孔和所述第二过孔;在形成有所述像素电极图案的基板上形成所述源极图案和所述漏极图案;所述源极图案通过所述第一过孔与所述金属氧化物半导体有源层图案相连,所述漏极图案通过所述第二过孔与所述金属氧化物半导体有源层图案相连,所述源极图案或所述漏极图案与所述像素电极图案相连。
- 根据权利要求1所述的方法,其中在形成所述像素电极图案之后并且形成所述源极图案和所述漏极图案之前,所述方法还包括:对所述刻蚀阻挡层进行一次构图工艺,形成包括所述第一过孔和所述第二过孔的刻蚀阻挡层图案。
- 根据权利要求1所述的方法,其中所述形成源极图案和漏极图案包括:在形成有所述像素电极图案的基板上形成所述源极图案和所述漏极图案;所述源极图案通过所述第一过孔与所述金属氧化物半导体有源层图案相连,所述漏极图案通过所述第二过孔与所述金属氧化物半导体有源层图案相 连,所述源极图案或所述漏极图案与所述像素电极图案相连。
- 根据权利要求2所述的方法,其中所述对所述刻蚀阻挡层进行一次构图工艺处理,形成包括第一过孔和第二过孔的刻蚀阻挡层图案,并形成位于除像素区域外且至少覆盖所述第一过孔和所述第二过孔的光刻胶层图案,包括:在所述刻蚀阻挡层上形成第一光刻胶层;采用掩模板对形成有所述第一光刻胶层的基板进行曝光、显影后,形成第一光刻胶完全保留部分和第一光刻胶完全去除部分;其中,所述第一光刻胶完全去除部分至少对应像素区域以及所述第一过孔和所述第二过孔的区域,所述第一光刻胶完全保留部分对应剩余区域;采用刻蚀工艺去除所述第一光刻胶完全去除部分的刻蚀阻挡层薄膜,形成所述刻蚀阻挡层图案;对所述第一光刻胶完全保留部分的光刻胶进行固化处理,以使所述第一光刻胶完全保留部分的光刻胶填充在所述第一过孔和所述第二过孔中,形成位于除像素区域外且至少覆盖所述第一过孔和所述第二过孔的所述光刻胶层图案。
- 根据权利要求5所述的方法,其中所述采用刻蚀工艺去除所述第一光刻胶完全去除部分的刻蚀阻挡层薄膜,包括:采用湿法刻蚀工艺去除所述第一光刻胶完全去除部分的所述刻蚀阻挡层薄膜,使所述第一过孔的直径大于与所述第一过孔对应的所述第一光刻胶完全保留部分之间的间隙,使所述第二过孔的直径大于与所述第二过孔对应的所述第一光刻胶完全保留部分之间的间隙。
- 根据权利要求5所述的方法,其中所述对所述第一光刻胶完全保留部分的光刻胶进行固化处理,以使所述第一光刻胶完全保留部分的光刻胶填充在所述第一过孔和所述第二过孔中,形成位于除像素区域外且至少覆盖所述第一过孔和所述第二过孔的所述光刻胶层图案,包括:在150-180℃的温度下,对所述第一光刻胶完全保留部分的光刻胶进行130-200秒的处理,以使所述第一光刻胶完全保留部分的光刻胶填充在所述第一过孔和所述第二过孔中,形成位于除像素区域外且至少覆盖所述第一过孔和所述第二过孔的所述光刻胶层图案。
- 根据权利要求3所述的方法,其中所述在形成有所述光刻胶层图案的基板上,形成位于所述像素区域的所述像素电极图案,并去除所述光刻胶层图案,露出所述第一过孔和所述第二过孔,包括:在形成有所述光刻胶层图案的基板上依次形成透明导电层和第二光刻胶层;采用掩模板对形成有所述第二光刻胶层的基板进行曝光、显影后,形成第二光刻胶完全保留部分和第二光刻胶完全去除部分;其中,所述第二光刻胶完全保留部分对应所述像素区域,所述第二光刻胶完全去除部分对应剩余区域;采用刻蚀工艺去除所述第二光刻胶完全去除部分的透明导电层薄膜,形成所述像素电极图案,并露出所述光刻胶层图案;采用剥离工艺去除所述光刻胶层图案和所述第二光刻胶完全保留部分的光刻胶,露出所述第一过孔和所述第二过孔。
- 根据权利要求1至9任一项所述的方法,还包括:形成钝化层图案和公共电极图案。
- 根据权利要求1至9任一项所述的方法,其中所述栅极图案、所述源极图案和所述漏极图案的材质均为Cu。
- 一种阵列基板,包括:衬底基板、依次设置在所述衬底基板上的栅极图案、栅绝缘层图案、金属氧化物半导体有源层图案、刻蚀阻挡层图案、像素电极图案、以及源极图案和漏极图案;其中,所述刻蚀阻挡层图案包括第一过孔和第二过孔,所述第一过孔和所述第二过孔构造为分别使所述源极图案和所述漏极图案与所述金属氧化物半导体有源层图案相连;所述像素电极图案和所述源极图案或所述漏极图案相连,且与所述像素电极图案相连的所述源极图案或所述漏极图案的部分覆盖在所述像素电极图案上方。
- 根据权利要求12所述的阵列基板,其中在所述像素电极图案下方不包括所述刻蚀阻挡层图案。
- 根据权利要求12所述的阵列基板,还包括位于所述源极图案和所述漏极图案上方的钝化层图案和公共电极图案。
- 根据权利要求12至14任一项所述的阵列基板,其中所述栅极图案、所述源极图案和所述漏极图案的材质均为Cu。
- 一种显示装置,包括权利要求12至15任一项所述的阵列基板。
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