WO2015137198A1 - 多層膜の製造方法および多層膜 - Google Patents
多層膜の製造方法および多層膜 Download PDFInfo
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- WO2015137198A1 WO2015137198A1 PCT/JP2015/056238 JP2015056238W WO2015137198A1 WO 2015137198 A1 WO2015137198 A1 WO 2015137198A1 JP 2015056238 W JP2015056238 W JP 2015056238W WO 2015137198 A1 WO2015137198 A1 WO 2015137198A1
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- multilayer film
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- 238000004519 manufacturing process Methods 0.000 title claims abstract description 36
- 238000000034 method Methods 0.000 title abstract description 23
- 239000000758 substrate Substances 0.000 claims abstract description 83
- 238000004544 sputter deposition Methods 0.000 claims description 30
- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Chemical compound [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 claims description 27
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 claims description 25
- 229910052746 lanthanum Inorganic materials 0.000 claims description 9
- 229910052759 nickel Inorganic materials 0.000 claims description 9
- 229910052760 oxygen Inorganic materials 0.000 claims description 9
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims description 8
- FZLIPJUXYLNCLC-UHFFFAOYSA-N lanthanum atom Chemical compound [La] FZLIPJUXYLNCLC-UHFFFAOYSA-N 0.000 claims description 8
- 239000001301 oxygen Substances 0.000 claims description 8
- 229910052697 platinum Inorganic materials 0.000 claims description 5
- 229910052710 silicon Inorganic materials 0.000 claims description 5
- 239000010703 silicon Substances 0.000 claims description 5
- 239000010408 film Substances 0.000 description 223
- 229910052451 lead zirconate titanate Inorganic materials 0.000 description 103
- 230000015572 biosynthetic process Effects 0.000 description 43
- 238000000151 deposition Methods 0.000 description 22
- 230000008021 deposition Effects 0.000 description 22
- 241000877463 Lanio Species 0.000 description 19
- 239000007789 gas Substances 0.000 description 17
- 229910004121 SrRuO Inorganic materials 0.000 description 10
- 230000003746 surface roughness Effects 0.000 description 9
- 239000010409 thin film Substances 0.000 description 8
- 239000013078 crystal Substances 0.000 description 7
- 238000010438 heat treatment Methods 0.000 description 7
- 239000012528 membrane Substances 0.000 description 7
- 238000010586 diagram Methods 0.000 description 6
- 238000001816 cooling Methods 0.000 description 5
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 4
- 238000005192 partition Methods 0.000 description 4
- 238000012546 transfer Methods 0.000 description 4
- HFGPZNIAWCZYJU-UHFFFAOYSA-N lead zirconate titanate Chemical compound [O-2].[O-2].[O-2].[O-2].[O-2].[Ti+4].[Zr+4].[Pb+2] HFGPZNIAWCZYJU-UHFFFAOYSA-N 0.000 description 3
- 239000000463 material Substances 0.000 description 3
- 239000002245 particle Substances 0.000 description 3
- MYMOFIZGZYHOMD-UHFFFAOYSA-N Dioxygen Chemical compound O=O MYMOFIZGZYHOMD-UHFFFAOYSA-N 0.000 description 2
- 239000002253 acid Substances 0.000 description 2
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 2
- 239000000919 ceramic Substances 0.000 description 2
- 239000002826 coolant Substances 0.000 description 2
- 230000007423 decrease Effects 0.000 description 2
- 229910001882 dioxygen Inorganic materials 0.000 description 2
- 238000004090 dissolution Methods 0.000 description 2
- 238000011156 evaluation Methods 0.000 description 2
- 238000002474 experimental method Methods 0.000 description 2
- 238000005259 measurement Methods 0.000 description 2
- 230000002265 prevention Effects 0.000 description 2
- 239000010453 quartz Substances 0.000 description 2
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- 229910052726 zirconium Inorganic materials 0.000 description 2
- 229910004298 SiO 2 Inorganic materials 0.000 description 1
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 1
- 238000002441 X-ray diffraction Methods 0.000 description 1
- 230000001133 acceleration Effects 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 238000007599 discharging Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000010030 laminating Methods 0.000 description 1
- 230000008520 organization Effects 0.000 description 1
- 230000001681 protective effect Effects 0.000 description 1
- 229910010271 silicon carbide Inorganic materials 0.000 description 1
- 238000001179 sorption measurement Methods 0.000 description 1
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- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
- C23C14/06—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the coating material
- C23C14/08—Oxides
- C23C14/083—Oxides of refractory metals or yttrium
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
- C23C14/06—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the coating material
- C23C14/08—Oxides
- C23C14/088—Oxides of the type ABO3 with A representing alkali, alkaline earth metal or Pb and B representing a refractory or rare earth metal
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
- C23C14/06—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the coating material
- C23C14/14—Metallic material, boron or silicon
- C23C14/18—Metallic material, boron or silicon on other inorganic substrates
- C23C14/185—Metallic material, boron or silicon on other inorganic substrates by cathodic sputtering
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
- C23C14/22—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the process of coating
- C23C14/34—Sputtering
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02172—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
- H01L21/02197—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides the material having a perovskite structure, e.g. BaTiO3
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
- H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
- H01L21/02266—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by physical ablation of a target, e.g. sputtering, reactive sputtering, physical vapour deposition or pulsed laser deposition
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N30/00—Piezoelectric or electrostrictive devices
- H10N30/01—Manufacture or treatment
- H10N30/07—Forming of piezoelectric or electrostrictive parts or bodies on an electrical element or another base
- H10N30/074—Forming of piezoelectric or electrostrictive parts or bodies on an electrical element or another base by depositing piezoelectric or electrostrictive layers, e.g. aerosol or screen printing
- H10N30/076—Forming of piezoelectric or electrostrictive parts or bodies on an electrical element or another base by depositing piezoelectric or electrostrictive layers, e.g. aerosol or screen printing by vapour phase deposition
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N30/00—Piezoelectric or electrostrictive devices
- H10N30/01—Manufacture or treatment
- H10N30/07—Forming of piezoelectric or electrostrictive parts or bodies on an electrical element or another base
- H10N30/074—Forming of piezoelectric or electrostrictive parts or bodies on an electrical element or another base by depositing piezoelectric or electrostrictive layers, e.g. aerosol or screen printing
- H10N30/079—Forming of piezoelectric or electrostrictive parts or bodies on an electrical element or another base by depositing piezoelectric or electrostrictive layers, e.g. aerosol or screen printing using intermediate layers, e.g. for growth control
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N30/00—Piezoelectric or electrostrictive devices
- H10N30/80—Constructional details
- H10N30/85—Piezoelectric or electrostrictive active materials
- H10N30/853—Ceramic compositions
- H10N30/8548—Lead-based oxides
- H10N30/8554—Lead-zirconium titanate [PZT] based
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
- C23C14/22—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the process of coating
- C23C14/34—Sputtering
- C23C14/35—Sputtering by application of a magnetic field, e.g. magnetron sputtering
Definitions
- the present invention relates to a method for producing a multilayer film and a multilayer film.
- This application claims priority based on Japanese Patent Application No. 2014-046814 for which it applied to Japan on March 10, 2014, and uses the content here.
- the present invention has been made in view of such conventional circumstances, and a first object thereof is to provide a method for manufacturing a multilayer film in which a temperature margin during film formation is expanded.
- a second object of the present invention is to provide a multilayer film having a wide temperature margin during film formation and having excellent withstand voltage characteristics.
- the present inventors are engaged in various studies in order to improve the withstand voltage characteristics of the PZT film. In the following, the situation at the previous stage leading to the present invention will be described.
- FIG. 13 is a graph showing the withstand voltage and the Pb content in a PZT film produced by changing the film formation temperature.
- the horizontal axis indicates the film forming temperature
- the left vertical axis indicates the withstand voltage
- the right vertical axis indicates the Pb content.
- the “ ⁇ ” mark represents the withstand voltage
- the “ ⁇ ” mark represents the Pb content. From FIG. 13, it was found that the withstand voltage tends to increase as the film formation temperature increases, whereas the Pb content tends to decrease. Based on the experimental results, the present inventors have inferred that a higher withstand voltage can be realized if the Pb content is decreased at a film forming temperature of 620 ° C.
- FIG. 14 is a graph showing the results of examining the dependency of the withstand voltage on the Pb content based on FIG. 13 described above.
- a PZT film was formed under the same film formation conditions (film formation temperature: 620 ° C.) except that two types of targets having different Pb contents (left side: 30% PbO excess target, right side: 13% PbO excess target) were used.
- the Pb content contained in the film and the withstand voltage were evaluated.
- the withstand voltage does not increase but decreases significantly (55 ⁇ 37 [V]). From the above results, it has been clarified that there is no correlation between the Pb content contained in the PZT film and the withstand voltage.
- FIGS. 15 to 17 are SEM photographs showing examples in which a PZT film is produced by changing the film formation conditions and the surface morphology is changed.
- the photographs located above each of FIGS. 15 to 17 represent the cross section of the PZT film, and the photographs located below each of FIGS. 15 to 17 represent the surface of the PZT film.
- Table 1 shows the surface roughness (RMS), density, and withstand voltage in the PZT films shown in FIGS.
- the surface roughness (RMS) was measured using an AFM (atomic force microscope).
- the density was obtained by dissolving the PZT film completely with acid and changing the weight before and after dissolution.
- the withstand voltage was obtained by IV measurement.
- the inventors initially thought that if the surface morphology of the PZT film was improved, that is, if the surface roughness RMS could be reduced, a large withstand voltage could be realized, and the three types shown in Table 1 were realized. PZT films with different surface roughness were formed. However, as is clear from Table 1, it was found that the withstand voltage of PZT is not necessarily improved even if the surface roughness of the PZT film is suppressed, that is, the surface morphology is improved. On the other hand, it was confirmed that the withstand voltage was higher as the density of the PZT film was higher.
- the temperature margin at the time of film formation is only about 80 ° C., so that stable mass production was difficult.
- the manufacturing method of the multilayer film which concerns on the 1st aspect of this invention has the following process A, the process B, and the process C at least. That is, in the method for manufacturing a multilayer film according to the first aspect of the present invention, a conductive layer is formed on a substrate (step A), and a seed layer containing an oxide having a perovskite structure is sputtered so as to cover the conductive layer. (Step B), and a dielectric layer is formed so as to cover the seed layer (step C).
- the oxide contains lanthanum (La), nickel (Ni), and oxygen (O).
- the seed layer may be formed as described above.
- the substrate temperature at the time of forming the dielectric layer is defined as Td (dielectric).
- Td dielectric
- the relational expression Td ⁇ 500 ° C. may be satisfied.
- the seed layer is formed (step B)
- the substrate temperature is defined as Ts (seed)
- the relational expression Ts ⁇ Td is satisfied. Good.
- the multilayer film according to the second aspect of the present invention is a multilayer film formed by using the multilayer film manufacturing method according to the first aspect described above, and platinum (Pt) is formed on one main surface side of a substrate made of silicon. ), A seed layer containing lanthanum (La), nickel (Ni) and oxygen (O), and a dielectric layer are multilayer films arranged at least in order.
- an oxide having a perovskite structure is formed as a seed layer by a sputtering method. Therefore, when a dielectric film is formed on the seed layer, it is possible to form a dielectric film having a perovskite structure at a lower temperature while suppressing the occurrence of heterogeneous phases. Therefore, the present invention can provide a method for producing a multilayer film with an expanded temperature margin.
- the conductive layer made of platinum (Pt), the seed layer containing lanthanum (La), nickel (Ni), and oxygen (O), and the dielectric layer are arranged at least in order, A multilayer film having excellent pressure resistance characteristics can be provided.
- FIG. 3 is a diagram showing a diffraction peak showing a crystal structure of a PZT film formed with Sample 1.
- FIG. 4 is a diagram showing a diffraction peak showing a crystal structure of a PZT film formed with Sample 2.
- FIG. 4 is a diagram showing crystallinity of a PZT film of Sample 1. It is a figure which shows the surface photograph of the PZT film
- FIG. 4 is a diagram showing the piezoelectricity of PZT films of Sample 4 to Sample 6.
- FIG. 6 is a diagram showing the pressure resistance of the PZT films of Sample 4 to Sample 6.
- FIG. 1 is a cross-sectional view illustrating a configuration example of a multilayer film according to the present embodiment.
- the multilayer film 1 includes a conductive layer 3 made of platinum (Pt), lanthanum (La), nickel (Ni), and oxygen (O) on one main surface side (on the first surface) of a substrate 2 made of silicon.
- the seed layer 4 and the dielectric layer 5 are arranged at least in order.
- the dielectric layer 5 is not particularly limited.
- lead zirconate titanate [Pb (Zr x Ti 1-x ) O 3 : PZT], PbTiO 3 , BaTiO 3 , PMM-PZT, PNN-PZT, PMN— It is made of a ferroelectric material such as PZT, PNN-PT, PLZT, PZTN, NBT, KNN.
- a dielectric layer 5 is disposed on the seed layer 4 containing lanthanum (La), nickel (Ni), and oxygen (O).
- the dielectric layer 5 disposed on the seed layer 4 is formed to have a perovskite structure that does not include a different phase.
- this multilayer film 1 has excellent characteristics such as high piezoelectricity and pressure resistance.
- Such a multilayer film 1 is suitably used for a piezoelectric element, for example.
- the multilayer film 1 is formed by a manufacturing method as described below.
- 2A to 2C are cross-sectional views showing the manufacturing process of the multilayer film according to this embodiment.
- the process A [FIG. 2A] for forming the conductive layer 3 on the substrate 2 and the process B [FIG. 2B] for forming the seed layer 4 so as to cover the conductive layer 3 are performed.
- a step C [FIG. 2C] of forming the dielectric layer 5 so as to cover the seed layer 4.
- an oxide having a perovskite structure is formed as the seed layer 4 by a sputtering method.
- the oxide having a perovskite structure is formed as the seed layer 4 by the sputtering method, when the dielectric layer 5 is formed on the seed layer 4, the film is formed at a lower temperature. Is possible. Further, by forming the dielectric layer 5 on the seed layer 4 having a perovskite structure, the dielectric layer 5 is formed to have a perovskite structure that does not have a different phase such as a pyrochlore phase.
- the multilayer film 1 thus obtained has excellent characteristics such as high piezoelectricity and pressure resistance. Therefore, according to the embodiment of the present invention, it is possible to provide a method for manufacturing a multilayer film with an expanded temperature margin.
- FIG. 3 is a schematic cross-sectional view showing an example of the internal configuration of the film forming apparatus 10.
- the film forming apparatus 10 includes a vacuum chamber 11, a target 21 disposed in the vacuum chamber 11, a substrate holding table 32 that is disposed at a position facing the target 21, and holds a substrate 31 (substrate 2), and a substrate holding A temperature controller 18 for adjusting the substrate temperature by heating / cooling the substrate 31 held on the table 32, a sputtering power source 13 for applying a voltage to the target 21, and a sputtering gas introduction for introducing a sputtering gas into the vacuum chamber 11 Part 14, a vacuum exhaust device 15 that depressurizes the inside of the vacuum chamber 11 by discharging the gas in the vacuum chamber 11 to the outside, and a position in the vacuum chamber 11 where the particles discharged from the target 21 adhere.
- a first deposition plate 34 and a second deposition plate 35 are provided.
- a cathode electrode 22 is disposed on the upper wall surface of the vacuum chamber 11 via an insulating member 28, and the cathode electrode 22 and the vacuum chamber 11 are electrically insulated.
- the vacuum chamber 11 is at ground potential.
- One surface side (first electrode surface) of the cathode electrode 22 is locally exposed in the vacuum chamber 11.
- the target 21 is fixed in close contact with the central portion of the exposed region of the one surface side of the cathode electrode 22.
- the target 21 and the cathode electrode 22 are electrically connected.
- the sputtering power source 13 is disposed outside the vacuum chamber 11, is electrically connected to the cathode electrode 22, and can apply an AC voltage to the target 21 via the cathode electrode 22.
- a magnet device 29 is disposed on the opposite side of the cathode electrode 22 from the surface on which the target 21 is disposed, that is, on the other surface side (second electrode surface) of the cathode electrode 22.
- the magnet device 29 is configured to form magnetic lines of force on the surface of the target 21.
- the support portion 32 (substrate holding table) on which the substrate 31 is placed is made of, for example, silicon carbide (SiC).
- the outer periphery of the support portion 32 is formed larger than the outer periphery of the substrate 31, and the surface of the support portion 32 is the target 21. It is arrange
- the support unit 32 includes a device (electrostatic adsorption unit) that electrostatically adsorbs the substrate 31.
- the back surface of the substrate 31 is brought into close contact with the center portion of the surface of the support portion 32, and the substrate 31 is thermally connected to the support portion 32.
- the first deposition preventing plate 34 is formed of ceramics such as quartz and alumina.
- the inner periphery of the first deposition preventing plate 34 is larger than the outer periphery of the substrate 31, and the first deposition preventing plate 34 is formed in an annular shape. It arrange
- the back surface of the first deposition preventing plate 34 is in close contact with the outer edge portion of the surface of the support portion 32, and the first deposition preventing plate 34 is thermally connected to the support portion 32.
- the first deposition preventing plate 34 is disposed so as to surround the outer periphery of the substrate 31.
- the second protective plate 35 is made of ceramics such as quartz and alumina.
- the inner periphery of the second deposition preventing plate 35 is larger than the outer periphery of the target 21 and the outer periphery of the substrate 31, and the second deposition preventing plate 35 is formed in a cylindrical shape.
- the second deposition preventing plate 35 is disposed between the support portion 32 and the cathode electrode 22 and is configured to surround the side of the space between the substrate 31 and the target 21. Thereby, the particles emitted from the target 21 are prevented from adhering to the wall surface of the vacuum chamber 11.
- the temperature control unit 18 includes a heat generating member 33 and a heating power source 17. SiC was used as the material of the heat generating member 33.
- the heat generating member 33 is disposed at a position opposite to the surface of the support portion 32 on which the substrate 31 is disposed.
- the heating power source 17 is electrically connected to the heat generating member 33. When a direct current is supplied from the heating power supply 17 to the heat generating member 33, the heat generated by the heat generating member 33 passes through the support portion 32 to the substrate 31 and the first deposition plate 34 placed on the support portion 32. By being transmitted, the substrate 31 and the first deposition preventing plate 34 are heated together.
- the back surface of the substrate 31 is in close contact with the central portion of the surface of the support portion 32, and heat is evenly transferred from the central portion of the substrate 31 to the outer edge portion.
- a cooling unit 38 is arranged on the side opposite to the surface of the heat generating member 33 on which the support unit 32 is arranged.
- the cooling unit 38 is configured to circulate a temperature-controlled cooling medium therein, and prevents heating of the wall surface of the vacuum chamber 11 even when the heat generating member 33 generates heat.
- the sputter gas introducing unit 14 is connected to the inside of the vacuum chamber 11 and is configured so that the sputter gas can be introduced into the vacuum chamber 11.
- FIG. 3 is a diagram schematically showing the internal configuration of the film forming apparatus used for manufacturing the multilayer film.
- 2A to 2C are cross-sectional views showing the manufacturing process of the multilayer film according to this embodiment.
- FIG. 3 illustrates the case where the film forming apparatus 10 has one vacuum chamber 11 for the sake of simplicity. However, in the manufacturing method of the following steps A to C, at least three vacuum chambers 11a, 11b, A multilayer film is manufactured using 11c (11).
- the film forming apparatus 10 having three vacuum chambers will be described with reference to FIG. 3.
- Three vacuum chambers are arranged along the depth direction in FIG.
- a partition valve (not shown) is disposed between the vacuum chambers 11a and 11b, and a partition valve (not illustrated) is also disposed between the vacuum chambers 11b and 11c. Yes.
- each of the vacuum chambers 11a, 11b, and 11c can generate an independent vacuum atmosphere.
- two adjacent vacuum chambers communicate with each other, and the substrate can be transported from one of the two vacuum chambers toward the other vacuum chamber.
- the process A is performed in the vacuum chamber 11a
- the process B is performed in the vacuum chamber 11b
- the process C is performed in the vacuum chamber 11c.
- the vacuum chamber 11a (11) is used for forming a conductive layer
- the vacuum chamber 11b (11) is used for forming a seed layer
- the vacuum chamber 11c (11) is used for forming a dielectric layer.
- a multilayer film forming method will be described using reference numerals 11a, 11b, and 11c (11) of the vacuum chamber.
- the member (refer FIG. 3) which comprises a vacuum chamber, the same code
- Step A Formation of Conductive Layer
- the conductive layer 3 made of platinum (Pt) is formed on one main surface side of the substrate 2 made of silicon (Si).
- the conductive layer is formed directly on one main surface of the substrate.
- another film is formed on the main surface of the substrate 2 before forming the conductive layer. It may be provided above.
- a target made of Pt is installed in the vacuum chamber 11a (11) as the target 21a (21).
- the vacuum exhaust device 15 By depressurizing the internal space of the vacuum chamber 11a (11) by the vacuum exhaust device 15, the internal space of the vacuum chamber 11a (11) becomes a vacuum atmosphere having a high degree of vacuum.
- the degree of vacuum in this vacuum atmosphere is higher than the degree of vacuum in the pressure atmosphere during film formation.
- the vacuum exhaust device 15 is driven, so that the atmosphere in the vacuum chamber 11a (11) is continuously maintained in a vacuum.
- the substrate 31 to be deposited in the internal space of the vacuum chamber 11 a (11) is carried into the vacuum chamber 11 through an unillustrated inlet. Then, the substrate 31 is held at the center of the support portion 32 so that one main surface of the substrate 31 faces the sputtering surface of the target 21.
- a cooling medium whose temperature is controlled is circulated in the cooling unit 38.
- Ar gas is introduced as a sputtering gas from the sputtering gas introduction unit 14 into the vacuum chamber 11 while the substrate 31 is kept at the deposition temperature, and an AC voltage is applied from the power source 13 to the cathode electrode 22.
- the Pt target is sputtered.
- the Pt conductive layer 3 is formed on one main surface side of the substrate 31.
- Step B Formation of Seed Layer
- a seed layer 4 is formed so as to cover the conductive layer 3.
- an oxide having a perovskite structure is formed as the seed layer 4 by sputtering.
- the seed layer 4 is not particularly limited, and examples thereof include a Pb (Zr x Ti 1-x ) O 3 film, a SrRuO 3 film, a PbTiO 3 film, a PbLaTiO 3 film, and a LaNiO 3 film.
- LaNiO 3 is particularly preferable.
- LNO has a high self-mixing property on the (002) plane and can be formed at a low temperature of 300 ° C., for example.
- LNO also has a low resistivity.
- LNO As the seed layer 4, the formation of the pyrochlore phase, which is a different phase, can be suppressed when the dielectric layer 5 is formed, and the PZT having a perovskite structure can be formed with a wide temperature margin including a lower temperature region. It is possible to form a film. That is, in this step B, an oxide containing lanthanum (La), nickel (Ni), and oxygen (O) is formed as the seed layer 4.
- an LNO target made of an oxide containing La, Ni, and O is installed in the vacuum chamber 11b (11).
- the internal space of the vacuum chamber 11b (11) becomes a vacuum atmosphere having a high degree of vacuum.
- the degree of vacuum in this vacuum atmosphere is higher than the degree of vacuum in the pressure atmosphere during film formation.
- the vacuum evacuation device 15 is driven, so that the atmosphere in the vacuum chamber 11b (11) is continuously maintained in vacuum.
- the substrate 31 provided with the Pt conductive layer 3 in advance is carried from the vacuum chamber 11a (11) to the internal space of the vacuum chamber 11b (11). Then, the substrate 31 is held at the central portion of the surface of the support portion 32 so that one main surface side of the substrate 31, that is, the Pt conductive layer 3 faces the sputtering surface of the LNO target 21.
- Ar gas and oxygen gas are introduced into the vacuum chamber 11 b (11) from the sputtering gas introduction unit 14 as sputtering gas, and an AC voltage is applied from the power supply 13 to the cathode electrode 22.
- the LNO target is sputtered.
- the seed layer 4 made of LNO is formed on the Pt conductive layer 3 on the one main surface side of the substrate 31.
- the substrate temperature within the film formation time is controlled by a predetermined temperature profile as necessary.
- the temperature may be set so as to maintain a constant temperature from the start of film formation to the end of film formation.
- the temperature may be set so that the start of film formation is higher than the end of film formation.
- Step C Formation of Dielectric Layer
- a dielectric layer 5 is formed so as to cover the seed layer 4.
- a PZT film is formed as the dielectric layer 5 by sputtering.
- a PZT target is installed in the vacuum chamber 11c (11) as the target 21.
- the internal space of the vacuum chamber 11c (11) becomes a vacuum atmosphere having a high degree of vacuum.
- the degree of vacuum in this vacuum atmosphere is higher than the degree of vacuum in the pressure atmosphere during film formation.
- the substrate 31 on which the Pt conductive layer 3 and the seed layer 4 are provided in advance is carried from the vacuum chamber 11b (11) into the internal space of the vacuum chamber 11c (11). . Then, the substrate 31 is held at the center of the surface of the support portion 32 so that one main surface side of the substrate 31, that is, the seed layer 4 faces the sputtering surface of the PZT target 21.
- the dielectric layer 5 made of a PZT film having a perovskite structure is formed on the seed layer 4 on the one main surface side of the substrate 31.
- the substrate temperature within the film formation time is controlled by a predetermined temperature profile as necessary.
- the temperature may be set so as to maintain a constant temperature from the start of film formation to the end of film formation.
- the temperature may be set so that the start of film formation is higher than the end of film formation.
- the formation of a pyrochlore phase is suppressed as compared with a conventional layer structure without a seed layer (conductive layer / dielectric layer). It is possible to widen the range (band) of film formation temperatures that can be applied. That is, according to the embodiment of the present invention, the temperature margin can be expanded. In particular, if the seed layer 4 made of an LNO film is employed, the film formation temperature range (band) capable of suppressing the formation of the pyrochlore phase can be extended to a lower temperature side, so that the mass production process Low temperature can be achieved.
- the voltage application from the power source 13 to the cathode electrode 22 is stopped, and the sputtering gas is introduced into the vacuum chamber 11c (11) from the sputtering gas introduction unit 14. To stop.
- the current supply from the heating power supply 17 to the heat generating member 33 is stopped, the heat generating member 33 is cooled, and the substrate 31 is set to a temperature lower than the film forming temperature.
- the temperature of the heat generating member 33 is lowered to 400 ° C. or lower and the temperature is maintained.
- the film-formed substrate 31 on which a multilayer film formed by sequentially stacking three layers (conductive layer, seed layer, dielectric layer) is formed is placed outside the vacuum chamber 11. Then, it is carried out from a carrying outlet (not shown).
- a transfer robot (not shown) is suitable for the above-described substrate transfer, that is, transfer from outside to the vacuum chamber 11a (11), movement between the vacuum chambers, and transfer from the vacuum chamber 11c (11) to the outside. Used for.
- the multilayer film 1 having the structure shown in FIG. 1 is manufactured.
- the seed layer 4 has a perovskite structure, for example, the dielectric layer 5 has a perovskite structure without a different phase.
- this multilayer film 1 can implement
- Such a multilayer film 1 is suitably used for a piezoelectric element, for example.
- a multilayer film is formed by sequentially laminating a conductive layer made of a Pt film, a seed layer made of a LaNiO 3 film, and a dielectric layer made of a PZT film.
- a silicon (Si) wafer having a diameter of 8 inches was used as the substrate.
- a thermal oxide film (SiO 2 film), a Ti film (thickness 20 nm) functioning as an adhesion layer, and a Pt film (thickness 100 nm) functioning as a lower electrode layer are sequentially formed on one main surface of the Si wafer.
- a pre-laminated substrate was used.
- a flat plate type magnetron type sputtering apparatus (SME-200) having a configuration as shown in FIG. 3 was used.
- a high frequency power source (frequency: 13.56 MHz) was used as the sputtering power source.
- the deposition conditions for the seed layer made of the LaNiO 3 film were set as follows.
- a LaNiO 3 target having a diameter of 300 mm and a thickness of 5 mm was used.
- the sputtering power was 1.0 [kW]
- the pressure in the vacuum chamber during sputtering was 0.4 [Pa]
- the substrate temperature was 250 to 400 [° C.].
- the film thickness of the seed layer was 40 to 300 [nm].
- the conditions for forming the dielectric layer made of the PZT film were set as follows.
- a PZT target having a diameter of 300 mm and a thickness of 5 mm was used as the target.
- the sputtering power was 2.5 [kW]
- the pressure in the vacuum chamber during sputtering was 0.5 [Pa]
- the substrate temperature was 445 to 700 [° C.].
- the film thickness of the dielectric layer was 2.0 [ ⁇ m].
- Sample 1 The sample of Experimental Example 1 manufactured under the above-described conditions is referred to as Sample 1.
- Example 2 a multilayer film was formed in the same manner as in Experimental Example 1 except that the seed layer was changed from the LaNiO 3 film to the SrRuO 3 film.
- the deposition conditions for the seed layer made of the SrRuO 3 film were set as follows. A SrRuO 3 target having a diameter of 300 mm and a thickness of 5 mm was used as the target.
- the sputtering power was 0.7 [kW]
- the pressure in the vacuum chamber during sputtering was 0.4 [Pa]
- the substrate temperature was 500 to 800 [° C.].
- the film thickness of the seed layer was 40 to 300 [nm].
- Sample 2 The sample of Experimental Example 2 manufactured under the conditions described above is referred to as Sample 2.
- Example 3 a multilayer film was formed by forming a PZT film on the Pt thin film of the substrate without providing a seed layer.
- the conditions for forming the dielectric layer made of the PZT film are the same as in Experimental Example 1.
- the sample of Experimental Example 3 manufactured under the conditions described above is referred to as Sample 3.
- FIG. 4 is an X-ray chart of Sample 1 (seed layer: LaNiO 3 film).
- PZT films were formed by changing the substrate temperature during film formation in the range of 445 to 700 [° C.], and the crystal structure was analyzed for each PZT film formed at each substrate temperature.
- FIG. 5 is an X-ray chart of Sample 2 (seed layer: SrRuO 3 film).
- PZT films were formed by changing the substrate temperature during film formation in the range of 560 to 700 [° C.], and the crystal structure was analyzed for each PZT film formed at each substrate temperature.
- FIG. 6 is a graph showing the relationship between the substrate temperature and the peak intensity of the pyrochlore phase for a PZT film produced by changing the substrate temperature during film formation.
- the mark “ ⁇ ” represents the case of Sample 1 (seed layer: LaNiO 3 film).
- the “ ⁇ ” mark represents the case of Sample 2 (seed layer: SrRuO 3 film).
- “ ⁇ ” indicates the case of sample 3 (seed layer: none).
- the temperature range in which no peak of the pyrochlore phase is observed (the temperature range in which the formation of the pyrochlore phase can be suppressed) is lower than the low temperature region side (545 [° C.]) together with the high temperature region side (temperature range higher than 625 [° C.]). Temperature range). (A3) In sample 2 in which a PZT film is formed on a seed layer made of SrRuO 3 film, similarly to sample 1, a temperature range in which no peak of the pyrochlore phase is observed (temperature range in which formation of the pyrochlore phase can be suppressed) However, it expands to the high temperature region side (temperature range higher than 625 [° C.]). However, no expansion to the low temperature range (temperature range lower than 545 [° C.]) was observed.
- the temperature range in which the formation of the pyrochlore phase can be suppressed by forming the PZT film on the seed layer made of the LaNiO 3 film or the SrRuO 3 film. Can be planned.
- the seed layer made of a LaNiO 3 film expands the temperature range in which the formation of the pyrochlore phase can be suppressed to a low temperature range (expands the temperature margin), and thus contributes to the lowering of the manufacturing process.
- a PZT film having a perovskite structure that does not have a different pyrochlore phase can be formed in a wide temperature range including, for example, a low temperature region of 465 ° C. (substrate temperature). It was confirmed that there was.
- FIG. 7 is an X-ray chart showing the crystallinity of the PZT films of Sample 1 (solid line) and Sample 3 (dotted line). Although sample 1 is poly PZT, it has been confirmed that the (100) rocking curve has a half-value width of 0.55 degrees and has extremely high crystallinity compared to sample 3 (half-value width 4.05 degrees). It was.
- Example 4 A seed layer made of a LaNiO 3 film was formed on the substrate, and a PZT film (dielectric layer) was formed on the seed layer at 585 [° C.].
- the film formation conditions for the seed layer and the other film formation conditions for the PZT film are the same as in Sample 1 described above.
- the sample of Experimental Example 4 manufactured under the conditions described above is referred to as Sample 4.
- Example 6 A seed layer was not formed, and a PZT film was formed on a Pt thin film of a Si substrate at a substrate temperature of 585 [° C.], and then annealed under the conditions of “700 ° C., 15 minutes”. Other deposition conditions for the PZT film are the same as those of the sample 1 described above.
- the PZT film of sample 5 appears to have a larger surface roughness than the sample 4 because individual crystal grains remain on the surface. In the cross-sectional photograph, it is clear that a sharp columnar structure is formed. (B3) From FIG. 10, although the PZT film of sample 6 is not as large as the PZT film of sample 5, the shape of individual crystal grains remains on the surface and the surface roughness appears to be large. However, no conspicuous columnar structure is seen in the cross section.
- the SEM used for the evaluation described above has a length measurement function, and the surface roughness RMS [nm] of the PZT film in each sample was obtained. Further, the density of the PZT film in each sample was obtained by completely dissolving the PZT film using an acid and changing the weight before and after the dissolution. Table 2 shows the surface roughness (RMS) and density in the PZT films shown in FIGS.
- the density of the PZT film of sample 4 obtained by using LaNiO 3 film as a seed layer and forming at low temperature is higher than that of samples 5 and 6 formed at high temperature. It was confirmed.
- FIG. 11 is a graph showing the result of evaluating the piezoelectricity (piezoelectric coefficient) of the PZT films of Sample 4 to Sample 6 produced in Experimental Example 4 to Experimental Example 6.
- FIG. 12 is a graph showing the results of evaluating the pressure resistance (leakage current density) of the PZT films of Samples 4 to 6 produced in Experimental Examples 4 to 6.
- the present invention is widely applicable to a multilayer film manufacturing method and a multilayer film.
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Abstract
Description
本願は、2014年3月10日に日本に出願された特願2014-046814号に基づき優先権を主張し、その内容をここに援用する。
また、本発明は、成膜時の温度マージンが広く、優れた耐圧特性を有する多層膜を提供することを第二の目的とする。
図13は、成膜温度を変えて作製したPZT膜における耐電圧とPb含有量を示すグラフである。横軸は成膜温度を示しており、左側の縦軸は耐電圧を示しており、右側の縦軸はPb含有量を示している。プロットに関し、「□」印が耐電圧を、「○」印がPb含有量を表している。
図13から、成膜温度が上がるにつれて、耐電圧は増加傾向をとるのに対して、Pb含有量は減少傾向を示すことが分かった。この実験結果を踏まえて本発明者らは、成膜温度620℃において、Pb含有量を減少させれば、さらに高い耐電圧が実現できるのではないかと推察した。
以上の結果より、PZT膜に含まれるPb含有量と耐電圧には、相関関係が無いことが明らかとなった。
図15~図17は、成膜条件を変更してPZT膜を作製し、その表面モフォロジーを変化させた事例を示すSEM写真である。図15~図17の各々の上方に位置する写真がPZT膜の断面を表しており、図15~図17の各々の下方に位置する写真がPZT膜の表面を表している。
表1は、図15~図17に示したPZT膜における、表面粗度(RMS)、密度、耐電圧である。表面粗度(RMS)は、AFM(原子間力顕微鏡)を用いて測定した。密度は、酸を用いてPZT膜を完全に溶解させ、溶解前後における重量変化により求めた。耐電圧は、I-V測定により求めた。
本発明の第1態様に係る多層膜の製造方法は、少なくとも、以下の工程A、工程B、及び工程Cを有する。即ち、本発明の第1態様に係る多層膜の製造方法は、基板に導電層を形成し(工程A)、前記導電層を覆うように、ペロブスカイト構造を有する酸化物を含むシード層をスパッタ法により形成し(工程B)、前記シード層を覆うように誘電体層を形成する(工程C)。
本発明の第1態様に係る多層膜の製造方法においては、前記シード層を形成する際に(工程B)、前記酸化物は、ランタン(La)とニッケル(Ni)と酸素(O)を含むように前記シード層を形成してもよい。
本発明の第1態様に係る多層膜の製造方法においては、前記誘電体層を形成する際に(工程C)、前記誘電体層を形成する際の基板温度をTd(dielectric)と定義したとき、関係式Td≦500℃を満たしてもよい。
本発明の第1態様に係る多層膜の製造方法においては、前記シード層を形成する際に(工程B)、基板温度をTs(seed)と定義したとき、関係式Ts<Tdを満たしてもよい。
本発明の第2態様に係る多層膜は、上述した第1態様に係る多層膜の製造方法を用いて形成された多層膜であって、シリコンからなる基板の一主面側に、白金(Pt)からなる導電層、ランタン(La)とニッケル(Ni)と酸素(O)を含むシード層、及び誘電体層が、少なくとも順に配置された多層膜である。
また、本発明の態様では、白金(Pt)からなる導電層、ランタン(La)とニッケル(Ni)と酸素(O)を含むシード層、及び誘電体層が、少なくとも順に配置されているので、優れた耐圧特性を有する多層膜を提供することができる。
この多層膜1は、シリコンからなる基板2の一主面側(第1面上)に、白金(Pt)からなる導電層3、ランタン(La)とニッケル(Ni)と酸素(O)を含むシード層4、及び誘電体層5が、少なくとも順に配置されている。
誘電体層5が、ランタン(La)とニッケル(Ni)と酸素(O)を含むシード層4上に配置されている。このシード層4は、例えば、ペロブスカイト構造を有するので、シード層4上に配置される誘電体層5は、異相を含まないペロブスカイト構造を有するように形成される。これにより、この多層膜1は、例えば、高い圧電性と耐圧性といった優れた特性を有する。このような多層膜1は、例えば、圧電素子等に好適に用いられる。
図2A~図2Cは、本実施形態に係る多層膜の製造工程を示す断面図である。
本発明の実施形態に係る多層膜の製造方法は、基板2に導電層3を形成する工程A[図2A]と、前記導電層3を覆うようにシード層4を形成する工程B[図2B]と、前記シード層4を覆うように誘電体層5を形成する工程C[図2C]と、を少なくとも備える。このような多層膜1の製造方法の前記工程Bにおいては、前記シード層4としてペロブスカイト構造を有する酸化物を、スパッタ法により形成する。
以下では、本発明の実施形態に係る多層膜の製造方法を実施するために好適な成膜装置の構造について説明する。
図3は、成膜装置10の内部構成の一例を示す模式的な断面図である。
カソード電極22の一面側(第1電極面)は局部的に真空槽11内に露出されている。ターゲット21は、カソード電極22の一面側のうち露出された領域の中央部に密着して固定されている。ターゲット21とカソード電極22とは電気的に接続されている。
カソード電極22のターゲット21が配置される面とは反対側、すなわち、カソード電極22の他面側(第2電極面)には磁石装置29が配置されている。磁石装置29は、ターゲット21の表面に磁力線を形成するように構成されている。
支持部32の表面の中央部に基板31を載置した際に、第一の防着板34は基板31の外周より外側を取り囲むように配置されている。
発熱部材33の材料としてはSiCを用いた。発熱部材33は、基板31が配置される支持部32の面とは反対側の位置に配置されている。加熱用電源17は、発熱部材33と電気的に接続されている。加熱用電源17から発熱部材33に直流電流が供給されると、発熱部材33が発する熱が、支持部32を通して、支持部32上に載置される基板31と第一の防着板34へ伝わることにより、基板31と第一の防着板34が一緒に加熱される。
支持部32が配置される発熱部材33の面とは反対側には冷却部38が配置されている。冷却部38は、内部に温度管理された冷却媒体を循環できるように構成され、発熱部材33が発熱しても真空槽11の壁面の加熱を防止する。
以下では、多層膜の成膜方法について説明する。
図3は、多層膜の作製に用いた成膜装置の内部構成を模式的に示す図である。図2A~図2Cは、本実施形態に係る多層膜の製造工程を示す断面図である。
図3には、説明を簡略とするため、成膜装置10が1つの真空槽11を有する場合を例示したが、以下の工程A~Cの製造方法では、少なくとも3つの真空槽11a、11b、11c(11)を用いて、多層膜が製造される。
図2Aに示すように、シリコン(Si)からなる基板2の一主面側に、白金(Pt)からなる導電層3を形成する。以下では、基板の一主面に直接、導電層を形成する場合を説明するが、必要に応じて、基板2の一主面に対して、導電層を形成する前に、他の被膜を基板上に設けてもよい。
図2Bに示すように、前記導電層3を覆うようにシード層4を形成する。
本工程Bでは、シード層4として、ペロブスカイト構造をとる酸化物を、スパッタ法により形成する。
シード層4としては、特に限定されないが、例えば、Pb(ZrxTi1-x)O3膜、SrRuO3膜、PbTiO3膜、PbLaTiO3膜、LaNiO3膜、等が挙げられる。
すなわち、本工程Bにおいて、シード層4として、ランタン(La)とニッケル(Ni)と酸素(O)を含む酸化物を形成する。
図2Cに示すように、前記シード層4を覆うように誘電体層5を形成する。
本工程Cでは、誘電体層5として、PZT膜を、スパッタ法により形成する。
特に、LNO膜からなるシード層4を採用すれば、パイロクロア相の形成を抑制することが可能な成膜温度の範囲(帯域)を、より低温側に延ばすことが可能となるので、量産プロセスの低温化が図れる。
なお、上述した基板の搬送、すなわち、外部から真空槽11a(11)への搬入、各真空槽間の移動、真空槽11c(11)から外部への搬出には、不図示の搬送ロボットが好適に用いられる。
以下では、上述した本発明の実施形態によって得られる効果を確認するために行った実験例について説明する。
シード層の条件を変えてPZT膜(誘電体層)を成膜し、その特性について評価した。
本例では、Pt膜からなる導電層、LaNiO3膜からなるシード層、PZT膜からなる誘電体層を順に積層して成る多層膜を形成した。
基板としては、直径8インチのシリコン(Si)ウェハを用いた。ここでは、Siウェハの一主面に、熱酸化膜(SiO2膜)、密着層として機能するTi膜(厚さ20nm)、及び、下部電極層として機能するPt膜(厚さ100nm)が順に、予め積層された基板を使用した。
スパッタ装置としては、図3に示したような構成の、平板型マグネトロン方式のスパッタ装置(SME-200)を用いた。スパッタ電源としては、高周波電源(周波数:13.56MHz)を用いた。
ターゲットには、300mm径、厚さ5mmのLaNiO3ターゲットを用いた。
スパッタパワーは1.0[kW]、スパッタリング時の真空槽内の圧力は0.4[Pa]、基板温度は250~400[℃]とした。
シード層の膜厚は、40~300[nm]とした。
ターゲットには、300mm径、厚さ5mmのPZTターゲットを用いた。
スパッタパワーは2.5[kW]、スパッタリング時の真空槽内の圧力は0.5[Pa]、基板温度は445~700[℃]とした。
誘電体層の膜厚は、2.0[μm]とした。
上述した条件により作製した実験例1の試料を、サンプル1と呼ぶ。
本例では、シード層をLaNiO3膜からSrRuO3膜に変更した以外は、実験例1と同様にして多層膜を形成した。
SrRuO3膜からなるシード層の成膜条件は、次のように設定した。
ターゲットには、300mm径、厚さ5mmのSrRuO3ターゲットを用いた。
スパッタパワーは0.7[kW]、スパッタリング時の真空槽内の圧力は0.4[Pa]、基板温度は500~800[℃]とした。
シード層の膜厚は、40~300[nm]とした。
上述した条件により作製した実験例2の試料を、サンプル2と呼ぶ。
本例では、シード層を設けることなく、基板のPt薄膜上にPZT膜を成膜することにより多層膜を形成した。
PZT膜からなる誘電体層の成膜条件は、実験例1と同様である。
上述した条件により作製した実験例3の試料を、サンプル3と呼ぶ。
図4はサンプル1(シード層:LaNiO3膜)のX線チャートである。サンプル1については、成膜時の基板温度を445~700[℃]の範囲で変えてPZT膜の成膜を行い、各基板温度で形成されたPZT膜ごとに結晶構造を解析した。
図5はサンプル2(シード層:SrRuO3膜)のX線チャートである。サンプル1については、成膜時の基板温度を560~700[℃]の範囲で変えてPZT膜の成膜を行い、各基板温度で形成されたPZT膜ごとに結晶構造を解析した。
同様に、図5より、SrRuO3膜からなるシード層が形成されたサンプル2では、成膜温度を560~700[℃]とした場合は、PZT膜に、異相であるパイロクロア相は確認されなかった。
(A1)シード層を形成せずにPZT膜を成膜したサンプル3では、パイロクロア相のピークが見られない(すなわち、異相であるパイロクロア相の形成を抑制可能な)範囲は、545~625[℃]の約80[℃]の温度範囲である。
(A2)LaNiO3膜からなるシード層上にPZT膜を成膜したサンプル1では、465~700[℃]の約235[℃]の温度範囲であり、サンプル3に比べて、極めて広い温度範囲でパイロクロア相のピークが見られない。すなわち、パイロクロア相のピークが見られない温度範囲(パイロクロア相の形成を抑制できる温度範囲)が、高温域側(625[℃]より高い温度範囲)とともに、低温域側(545[℃]より低い温度範囲)に、拡大している。
(A3)SrRuO3膜からなるシード層上にPZT膜を成膜したサンプル2においても、サンプル1と同様に、パイロクロア相のピークが見られない温度範囲(パイロクロア相の形成を抑制できる温度範囲)が、高温域側(625[℃]より高い温度範囲)に拡大している。ただし、低温域側(545[℃]より低い温度範囲)への拡大は見られなかった。
実験を行った。
基板上にLaNiO3膜からなるシード層を形成し、シード層上に、585[℃]でPZT膜(誘電体層)を形成した。
シード層の成膜条件とPZT膜の他の成膜条件は、上述したサンプル1と同様である。
上述した条件により作製した実験例4の試料を、サンプル4と呼ぶ。
シード層を形成せず、Si基板のPt薄膜上に、基板温度を585[℃]としてPZT膜を形成した。PZT膜の他の成膜条件は、上述したサンプル1と同様である。
上述した条件により作製した実験例5の試料を、サンプル5と呼ぶ。
シード層を形成せず、Si基板のPt薄膜上に、基板温度を585[℃]としてPZT膜を形成した後、「700℃、15分間」の条件でアニール処理を施した。PZT膜の他の成膜条件は、上述したサンプル1と同様である。
図8、図9、図10は順に、サンプル4、サンプル5、サンプル6のSEM写真であり、図8、図9、図10の各々の上方に位置する写真がPZT膜の断面を表しており、図8、図9、図10の各々の下方に位置する写真がPZT膜の表面を表している。
SEM写真より、以下の点が明らかとなった。
(B1)図8より、サンプル4のPZT膜は、表面が極めて滑らかであり、断面はそれほど目立った柱状構造が見られない。
(B2)図9より、サンプル5のPZT膜は、サンプル4に比較して、表面に個々の結晶粒の形状が残存し表面粗度が大きく見える。断面写真においては、シャープな柱状構造が形成されていることが明らかとなっている。
(B3)図10より、サンプル6のPZT膜は、サンプル5のPZT膜ほどではないが、表面に個々の結晶粒の形状が残存し表面粗度が大きく見える。しかし、断面には目立った柱状構造が見られない。
また、各サンプルにおけるPZT膜の密度は、酸を用いてPZT膜を完全に溶解させ、溶解前後における重量変化により求めた。
表2は、図8~図10に示したPZT膜における、表面粗度(RMS)と密度とを示している。
図12は、実験例4~実験例6において作製した、サンプル4~サンプル6のPZT膜について、耐圧性(漏洩電流密度)を評価した結果を示すグラフである。
(C1)図11より、圧電係数は、サンプル4(17.1)とサンプル6(17.2)が同等に高く、これらに比べてサンプル5(14.7)は劣っている。
(C2)図12より、漏洩電流密度が急増することなく安定した状態が保つことができる印加電圧の範囲は、サンプル5(-30V,+31V)が最も狭い。サンプル6におけるその範囲(-60V,+61V)は、サンプル5の2倍まで広がる。さらにサンプル4におけるその範囲(-100V,+83V)はさらに拡大し、サンプル5の3倍以上まで広がる。
以上の結果より、本発明の実施形態に係る多層膜の製造方法を用いることにより、圧電性に優れるとともに、極めて高い耐圧性も兼ね備えた多層膜が得られることが確認された。
Claims (5)
- 基板に導電層を形成し、
前記導電層を覆うように、ペロブスカイト構造を有する酸化物を含むシード層をスパッタ法により形成し、
前記シード層を覆うように誘電体層を形成する多層膜の製造方法。 - 前記シード層を形成する際に、前記酸化物は、ランタン(La)とニッケル(Ni)と酸素(O)を含むように前記シード層を形成する請求項1に記載の多層膜の製造方法。
- 前記誘電体層を形成する際に、前記誘電体層を形成する際の基板温度をTd(dielectric)と定義したとき、関係式Td≦500℃を満たす請求項2に記載の多層膜の製造方法。
- 前記シード層を形成する際に、基板温度をTs(seed)と定義したとき、関係式Ts<Tdを満たす請求項3に記載の多層膜の製造方法。
- 請求項1から請求項4のいずれか一項に記載の多層膜の製造方法を用いて形成された多層膜であって、
シリコンからなる基板の一主面側に、白金(Pt)からなる導電層、ランタン(La)とニッケル(Ni)と酸素(O)を含むシード層、及び誘電体層が、少なくとも順に配置された多層膜。
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KR1020167022805A KR20160130999A (ko) | 2014-03-10 | 2015-03-03 | 다층막의 제조 방법 및 다층막 |
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