WO2015085977A8 - Verfahren zum auslesen einer resistiven speicherzelle und eine speicherzelle zur durchführung - Google Patents

Verfahren zum auslesen einer resistiven speicherzelle und eine speicherzelle zur durchführung Download PDF

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Publication number
WO2015085977A8
WO2015085977A8 PCT/DE2014/000551 DE2014000551W WO2015085977A8 WO 2015085977 A8 WO2015085977 A8 WO 2015085977A8 DE 2014000551 W DE2014000551 W DE 2014000551W WO 2015085977 A8 WO2015085977 A8 WO 2015085977A8
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WO
WIPO (PCT)
Prior art keywords
state
reading
memory cell
ion
pulse
Prior art date
Application number
PCT/DE2014/000551
Other languages
English (en)
French (fr)
Other versions
WO2015085977A1 (de
Inventor
Jan Van Den Hurk
Eike Linn
Rainer Waser
Ilia Valov
Original Assignee
Forschungszentrum Jülich GmbH
Rheinisch-Westfälische Technische Hochschule
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Forschungszentrum Jülich GmbH, Rheinisch-Westfälische Technische Hochschule filed Critical Forschungszentrum Jülich GmbH
Priority to CN201480066846.3A priority Critical patent/CN105980743B/zh
Priority to EP14828126.4A priority patent/EP3080482A1/de
Priority to US15/039,217 priority patent/US9865343B2/en
Priority to JP2016538608A priority patent/JP2017505504A/ja
Publication of WO2015085977A1 publication Critical patent/WO2015085977A1/de
Publication of WO2015085977A8 publication Critical patent/WO2015085977A8/de

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    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021—Auxiliary circuits
    • G11C13/004—Reading or sensing circuits or methods
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0009—RRAM elements whose operation depends upon chemical change
    • G11C13/0011—RRAM elements whose operation depends upon chemical change comprising conductive bridging RAM [CBRAM] or programming metallization cells [PMCs]
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021—Auxiliary circuits
    • G11C13/0069—Writing or programming circuits or methods
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/20—Multistable switching devices, e.g. memristors
    • H10N70/24—Multistable switching devices, e.g. memristors based on migration or redistribution of ionic species, e.g. anions, vacancies
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/801—Constructional details of multistable switching devices
    • H10N70/841—Electrodes
    • H10N70/8416—Electrodes adapted for supplying ionic species
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/801—Constructional details of multistable switching devices
    • H10N70/881—Switching materials
    • H10N70/882—Compounds of sulfur, selenium or tellurium, e.g. chalcogenides
    • H10N70/8822—Sulfides, e.g. CuS
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/801—Constructional details of multistable switching devices
    • H10N70/881—Switching materials
    • H10N70/882—Compounds of sulfur, selenium or tellurium, e.g. chalcogenides
    • H10N70/8825—Selenides, e.g. GeSe
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/801—Constructional details of multistable switching devices
    • H10N70/881—Switching materials
    • H10N70/882—Compounds of sulfur, selenium or tellurium, e.g. chalcogenides
    • H10N70/8828—Tellurides, e.g. GeSbTe
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/801—Constructional details of multistable switching devices
    • H10N70/881—Switching materials
    • H10N70/884—Switching materials based on at least one element of group IIIA, IVA or VA, e.g. elemental or compound semiconductors
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021—Auxiliary circuits
    • G11C13/004—Reading or sensing circuits or methods
    • G11C2013/0047—Read destroying or disturbing the data
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021—Auxiliary circuits
    • G11C13/004—Reading or sensing circuits or methods
    • G11C2013/0052—Read process characterized by the shape, e.g. form, length, amplitude of the read pulse
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2213/00—Indexing scheme relating to G11C13/00 for features not covered by this group
    • G11C2213/30—Resistive cell, memory material aspects
    • G11C2213/33—Material including silicon
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2213/00—Indexing scheme relating to G11C13/00 for features not covered by this group
    • G11C2213/50—Resistive cell structure aspects
    • G11C2213/52—Structure characterized by the electrode material, shape, etc.

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  • Semiconductor Memories (AREA)

Abstract

Im Rahmen der Erfindung wurde ein Verfahren zum Auslesen einer resistiven Speicherzelle mit zwei voneinander durch ein ionenleitendes resistives Material beabstandeten Elektroden, die sich durch Anlegen einer Schreibspannung von einem stabilen Zustand mit höherem Widerstandswert (high resistive state, HRS) in einen stabilen Zustand mit niedrigerem Widerstandswert (low resistance state, LRS) überführen lässt, entwickelt. Erfindungsgemäß wird zum Auslesen eine Lesespannung als Lesepuls angelegt, wobei die Anzahl der während des Pulses durch das ionenleitende resistive Material getriebenen Ionen über die Höhe und Dauer des Pulses so eingestellt wird, dass sie ausgehend vom Zustand zur Bildung eines elektrisch leitenden Pfades durch das ionenleitende resistive Material mindestens bis zum Einsetzen eines Stromflusses durch diesen Pfad und damit für den Übergang in einen metastabilen Zustand VRS (volatile resistance state) mit vermindertem Widerstandswert und einer vorgegebenen Relaxationszeit für die Rückkehr in den Zustand HRS ausreichen, nicht jedoch für den Übergang in den Zustand LRS. Auf diese Weise ist sichergestellt, dass sich die Speicherzelle nach dem Auslesen auf jeden Fall wieder im gleichen Zustand befindet wie vor dem Auslesen. Dies macht insbesondere Speicherelemente, die aus einer antiseriellen Schaltung zweier Speicherzellen bestehen, nichtdestruktiv auslesbar, ohne dass dies die Möglichkeit schmälert, große Arrays aus diesen Speicherelementen zu realisieren.
PCT/DE2014/000551 2013-12-11 2014-10-29 Verfahren zum auslesen einer resistiven speicherzelle und eine speicherzelle zur durchführung WO2015085977A1 (de)

Priority Applications (4)

Application Number Priority Date Filing Date Title
CN201480066846.3A CN105980743B (zh) 2013-12-11 2014-10-29 用于读取电阻存储单元的方法以及用于执行的存储单元
EP14828126.4A EP3080482A1 (de) 2013-12-11 2014-10-29 Verfahren zum auslesen einer resistiven speicherzelle und eine speicherzelle zur durchführung
US15/039,217 US9865343B2 (en) 2013-12-11 2014-10-29 Method for reading out a resistive memory cell and a memory cell for carrying out the method
JP2016538608A JP2017505504A (ja) 2013-12-11 2014-10-29 抵抗変化型メモリセルの読出方法とその方法を実施するメモリセル

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE102013020517.4 2013-12-11
DE102013020517.4A DE102013020517B4 (de) 2013-12-11 2013-12-11 Verfahren zum Auslesen einer resistiven Speicherzelle und eine Speicherzelle zur Durchführung

Publications (2)

Publication Number Publication Date
WO2015085977A1 WO2015085977A1 (de) 2015-06-18
WO2015085977A8 true WO2015085977A8 (de) 2016-05-26

Family

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Application Number Title Priority Date Filing Date
PCT/DE2014/000551 WO2015085977A1 (de) 2013-12-11 2014-10-29 Verfahren zum auslesen einer resistiven speicherzelle und eine speicherzelle zur durchführung

Country Status (6)

Country Link
US (1) US9865343B2 (de)
EP (1) EP3080482A1 (de)
JP (1) JP2017505504A (de)
CN (1) CN105980743B (de)
DE (1) DE102013020517B4 (de)
WO (1) WO2015085977A1 (de)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8031518B2 (en) * 2009-06-08 2011-10-04 Micron Technology, Inc. Methods, structures, and devices for reducing operational energy in phase change memory
JP2023037910A (ja) * 2021-09-06 2023-03-16 キオクシア株式会社 メモリデバイス

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4475098B2 (ja) * 2004-11-02 2010-06-09 ソニー株式会社 記憶素子及びその駆動方法
JP2008135659A (ja) * 2006-11-29 2008-06-12 Sony Corp 記憶素子、記憶装置
DE102007015281A1 (de) * 2007-03-29 2008-10-02 Qimonda Ag Resistiv schaltende Speicherzelle und Verfahren zum Betreiben einer resistiv schaltenden Speicherzelle
JP5551769B2 (ja) * 2009-05-29 2014-07-16 フォルシュングスツェントルム・ユーリッヒ・ゲゼルシャフト・ミット・ベシュレンクテル・ハフツング メモリ素子、積層体、メモリマトリックス及びそれらの動作方法
DE102009023153B4 (de) 2009-05-29 2011-03-17 Forschungszentrum Jülich GmbH Speicherelement, Speichermatrix und Verfahren zum Betreiben
JP2011054646A (ja) * 2009-08-31 2011-03-17 Toshiba Corp 半導体メモリ素子
US8199556B2 (en) * 2009-09-22 2012-06-12 Micron Technology, Inc. Methods of reading and using memory cells
DE102011012738B3 (de) 2011-02-24 2012-02-02 Forschungszentrum Jülich GmbH Verfahren zum nichtdestruktiven Auslesen resistiver Speicherelemente und Speicherelement
US8942025B2 (en) * 2011-08-10 2015-01-27 Panasonic Intellectual Property Management Co., Ltd. Variable resistance nonvolatile memory element writing method
US8804399B2 (en) * 2012-03-23 2014-08-12 Micron Technology, Inc. Multi-function resistance change memory cells and apparatuses including the same
JP5763004B2 (ja) * 2012-03-26 2015-08-12 株式会社東芝 不揮発性半導体記憶装置
JP2014238897A (ja) * 2013-06-06 2014-12-18 パナソニック株式会社 抵抗変化型不揮発性記憶装置およびその制御方法
GB2515568B (en) * 2013-06-28 2016-05-18 Ibm Resistive random-access memory cells
US9336870B1 (en) * 2013-08-16 2016-05-10 Sandia Corporation Methods for resistive switching of memristors
US20160012884A1 (en) * 2014-07-11 2016-01-14 Kabushiki Kaisha Toshiba Memory system and method of operation of the same

Also Published As

Publication number Publication date
JP2017505504A (ja) 2017-02-16
WO2015085977A1 (de) 2015-06-18
EP3080482A1 (de) 2016-10-19
US20170162260A1 (en) 2017-06-08
CN105980743B (zh) 2018-10-02
DE102013020517B4 (de) 2015-06-25
CN105980743A (zh) 2016-09-28
DE102013020517A1 (de) 2015-06-11
US9865343B2 (en) 2018-01-09

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