WO2015043020A1 - Circuit de détection de tension haute précision et procédé associé - Google Patents
Circuit de détection de tension haute précision et procédé associé Download PDFInfo
- Publication number
- WO2015043020A1 WO2015043020A1 PCT/CN2013/085583 CN2013085583W WO2015043020A1 WO 2015043020 A1 WO2015043020 A1 WO 2015043020A1 CN 2013085583 W CN2013085583 W CN 2013085583W WO 2015043020 A1 WO2015043020 A1 WO 2015043020A1
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- WO
- WIPO (PCT)
- Prior art keywords
- voltage
- counter
- output
- modulator
- square wave
- Prior art date
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R19/00—Arrangements for measuring currents or voltages or for indicating presence or sign thereof
- G01R19/25—Arrangements for measuring currents or voltages or for indicating presence or sign thereof using digital measurement techniques
- G01R19/255—Arrangements for measuring currents or voltages or for indicating presence or sign thereof using digital measurement techniques using analogue/digital converters of the type with counting of pulses during a period of time proportional to voltage or current, delivered by a pulse generator with fixed frequency
Definitions
- the present invention relates to the field of digital-analog hybrid integrated circuit design, and more particularly to a voltage detection circuit controlled by a digital operation circuit and its feedback interleaved signal.
- BACKGROUND OF THE INVENTION Sensors are a commonly used electronic component.
- integrated sensors With the rapid development of integrated circuits, integrated sensors have also evolved.
- Existing integrated sensors generally convert detection signals into voltage signals for processing. The detection of the voltage signal becomes the key to the integrated sensor design.
- the voltage detection circuit becomes the core circuit in the sensor circuit, and the detection accuracy directly determines the effective accuracy of the overall sensor.
- the existing voltage detection circuit basically adopts an A/D conversion circuit.
- the optional conversion circuit may be different, but regardless of the structure of the A/D conversion circuit, There are non-ideal factors such as charge injection, clock breakdown, sampling spikes, etc., resulting in low accuracy of voltage sampling results.
- higher detection accuracy is also achieved by increasing EN0B. Although this can improve the accuracy of voltage sampling to a certain extent, the power consumption, area and other expenses of the whole circuit suddenly increase, and the complexity also increases, which eventually leads to a complicated system of the circuit, poor usability, and high cost.
- the technical problem to be solved by the present invention is to provide a high-precision voltage detecting circuit and method which can output a digital code signal with high precision without requiring a digital-to-analog converter.
- the present invention provides a high-accuracy voltage detecting circuit, comprising: a modulator for receiving a voltage to be detected and a reference voltage, and outputting a modulated square wave signal, wherein a duty ratio of the modulated square wave signal is a ratio of the voltage to be detected to the reference voltage;
- the MCU processing module receives the digital code output by the counter and the frequency divider module, and calculates a voltage to be detected according to the digital code.
- the voltage detecting circuit further includes:
- a reference and bias circuit for assisting the modulator to provide the modulator with a desired reference voltage and bias voltage
- a control clock module is provided for providing the counter and divider modules with the desired high frequency clock signal.
- the modulator is a first-order ⁇ _ ⁇ modulator, including a chopper operational amplifier, an N-tube input comparator, a P-tube input comparator, an RS-type flip-flop, a sampling switch, a resistor and a capacitor, and the chopping An operational amplifier is configured to receive the reference voltage and a voltage to be detected, and the N-tube input comparator and the P-tube input comparator generate a threshold voltage for monitoring charging and discharging of the capacitor, and the output of the N-tube input comparator And an output end of the P-tube input comparator is respectively connected to two input ends of the RS-type flip-flop, and an output feedback signal of the RS-type flip-flop controls the sampling switch.
- a forward input terminal of the chopper operational amplifier is connected to the reference voltage, and an inverting input end of the chopper operational amplifier is connected to the to-be-detected voltage through the resistor, and the to-be-detected voltage is
- a sampling switch and a resistor are disposed between the inverting input terminals of the operational amplifier, and a capacitor is connected across the output end of the chopper operational amplifier and the inverting input terminal of the operational amplifier, and the output of the chopper operational amplifier
- the terminal simultaneously connects the N-tube input comparator and the P-tube input comparator, and the output of the N-tube input comparator and the output of the P-tube input comparator are respectively connected to two of the RS-type flip-flops
- the input end of the RS-type flip-flop outputs an output signal to control the sampling switch.
- the chopper operational amplifier includes three chopper switches, one of which is an input chopping switch and two output chopping switches.
- the interleaved feedback control signal controls the chopper switch, and an output terminal of each chopper switch is provided with a folded cascode amplifier.
- the chopper switch is composed of four transmission gates controlled by four reverse non-overlapping clocks.
- the counter and the frequency divider module comprise a first counter, a second counter and a divider, the first counter and the second counter receiving a modulated square wave signal output by the modulator, and outputting the modulation side
- the hold time of the high and low levels of the wave signal is given to the divider, and the divider outputs the duty ratio of the high and low levels of the modulated square wave signal to the MCU processing module in digital code form.
- a voltage detecting method comprising:
- the converting the modulated square wave signal into a digital code by using a counter and a frequency divider comprises:
- the high-level hold time and the low-level hold time of the modulated square wave signal are calculated by the counter; the ratio of the high-level hold time to the low-level hold time is calculated by the divider, and the digital code is output.
- the counter and the frequency divider generate an interlace control feedback signal to the modulator.
- the ratio of the voltage to be detected to the reference voltage is modulated into a modulated square wave signal, and the accuracy of the voltage detection depends on the number of high-level clocks and the low level of the modulated square wave signal.
- the ratio of the number of clock counts is determined, and the interleaved feedback control signal is generated by the counter and the frequency divider to control the modulator, which can eliminate the offset voltage of the modulator, greatly improve the voltage detection accuracy, and can also be processed by the MCU processing module. Further correction of the detected data is achieved, thereby again improving the accuracy of the detection.
- FIG. 1 is a circuit block diagram of an embodiment of a high precision voltage detecting circuit of the present invention
- FIG. 2 is a schematic diagram of a modulator circuit of an embodiment of the high-accuracy voltage detecting circuit of the present invention
- FIG. 3 is a schematic diagram of a chopper operational circuit of the high-accuracy voltage detecting circuit of the present invention
- FIG. 4 is a high precision of the present invention
- FIG. 5 is a schematic diagram of a counter and a divider circuit of the embodiment of the high precision voltage detecting circuit of the present invention
- Fig. 6 is a flow chart showing a voltage detecting method of an embodiment of the high-precision voltage detecting circuit of the present invention
- Fig. 7 is a waveform diagram showing the output timing of the counter and the divider of the high-accuracy voltage detecting circuit of the present invention.
- a high-precision voltage detecting circuit of the present invention includes a modulator, wherein the modulator is a first-order ⁇ _ ⁇ modulator for receiving a voltage to be detected and a reference voltage, and outputting a modulated square wave signal.
- the duty ratio of the modulated square wave signal is a ratio of the to-be-detected voltage to the reference voltage; the first-order ⁇ _ ⁇ modulator is connected with a reference and a bias circuit, and the reference and bias circuits are used.
- the modulator is supplied with the required reference voltage and bias voltage.
- the MCU processing module receives the digital code output by the counter and the frequency divider module, and calculates a voltage to be detected according to the digital code.
- the digital code is a ratio of a high level hold time t l to a low level hold time t 2 .
- the first-order ⁇ _ ⁇ modulator includes a chopper operational amplifier, an N-tube input comparator, a P-tube input comparator, an RS-type flip-flop, a sampling switch, a resistor, and a capacitor, as shown in FIG.
- the forward input terminal of the chopper operational amplifier 101 is connected to the reference voltage, and the inverting input terminal of the chopper operational amplifier 101 is connected to the to-be-detected voltage through the resistor 108, and the to-be-detected voltage and the operation
- a sampling switch S1 and S2 and a resistor 108 are disposed between the inverting input terminals of the amplifier 101, and a capacitor 1 is connected between the output end of the chopper operational amplifier 101 and the inverting input terminal of the chopper operational amplifier 101. 07.
- the output end of the chopper operational amplifier 101 is simultaneously connected to the N-tube input comparator and the P-tube input comparator, and the output of the N-tube input comparator and the output of the P-tube input comparator
- the terminals respectively connect two input ends of the RS type flip-flop, and an output end of the RS type flip-flop outputs a feedback signal to control the sampling switch.
- the chopper operational amplifier 101 is configured to receive the reference voltage and a voltage to be detected, and the N-tube input comparator 102 and the P-tube input comparator 103 generate a threshold voltage VH for monitoring charging and discharging of the capacitor 107. VL.
- An output end of the N-tube input comparator 102 and an output end of the P-tube input comparator 103 are respectively connected to two input ends of the RS-type flip-flop 104, and an output feedback signal 2 of the RS-type flip-flop 2 Control the sampling switches S1 and S2.
- the chopper operational amplifier includes three chopper switches, wherein An input chopping switch and two output chopping switches, the interleaved feedback control signals controlling the chopping switches, and each chopper switch has a folded cascode amplifier at its output.
- the connection relationship is shown in Figure 3, and is not repeated here.
- the chopper switch is composed of four transmission gates controlled by four reverse non-overlapping clocks.
- the counter and the frequency divider module include a first counter, a second counter, and a divider.
- the first counter 201 and the second counter 202 receive the output of the modulator. Modulating a square wave signal, and outputting a high and low level holding time of the modulated square wave signal to the divider 203, the divider 203 outputting a high and low level duty of the modulated square wave signal in a digital code form
- the module is processed to the MCU.
- a voltage detecting method is characterized by comprising the following steps:
- Step S100 The modulator modulates the ratio of the voltage to be detected to the reference voltage to a modulated square wave signal;
- Step S101 The counter and the frequency divider generate an interleaving control feedback signal to the modulator.
- Step 103 Calculate the value of the voltage to be tested by the MCU processing module.
- the working principle of the first-order ⁇ ⁇ ⁇ modulator Assume that the RS flip-flop initially Q is high, then Q is low. At this time, the sampling switch S1 closes the sampling switch S2 to open, and the voltage to be detected VIN passes. The resistor 108 charges the capacitor 107 to obtain a charging current of:
- the charging time of the tantalum capacitor 107 is t1. It can be seen from Fig. 2 that the voltage VI of the positive terminal of the capacitor 107 is constant, so the voltage of the lower plate of the capacitor gradually decreases during charging, and the input of the P tube is compared when the voltage drops below the threshold voltage VL.
- the flipper 103 flips, causing the RS flip-flop to flip, eventually causing the sampling switch S1 to open the sampling S2 to close, and the VI discharging the capacitor 107 through the resistor 108:
- Figure 7 is a timing waveform diagram of the output of the counter and divider circuit. If the high-level hold time of the modulated square wave is t1 and the low-level hold time is t2, then: (7) where t O is the clock period of the counter, and n is the number of clock cycles, which can be obtained by combining formula (6):
- the counter passes the count result to the divider, and the divider calculates the ratio of nl to n2, which in turn outputs a ratio 210 of the voltage VIN to the reference voltage VREF.
- the chopper op amp structure shown in Figure 3 is employed.
- the chopper op amp can effectively eliminate off set and 1/f noise.
- the modulation frequency of the traditional chopper switch needs to be satisfied: + ( 9 )
- the stable VI can obtain higher precision.
- the present invention proposes a new method for controlling a chopper switch by an interleaved feedback method (the interleaved feedback control signal is given by a counter and a divider circuit):
- the interleaved feedback control signal is given by a counter and a divider circuit:
- the interlaced feedback controlled chopper op amp can effectively filter the 1/f noise.
- a P input comparator and an N input comparator are used in the modulator.
- the two comparators are used to determine the capacitor charge and discharge threshold voltage, and it is necessary to monitor the voltage change all the time, so it needs to work all the time after the enable. Since the two comparators monitor different voltage values, the N tube is used as the input pair tube (for the case where the input common mode is relatively high) and the P tube is used as the input pair tube (for the case where the input common mode is low).
- a comparator is used to monitor the threshold voltage of the capacitor charge and discharge in the modulator.
- the simulation output code of the divider is: 1001000010010101, where the first three digits are integer parts, and the last 13 bits. Calculated by the MCU arithmetic circuit for the fractional part The detection error is 20. 072V, and the detection error is 0.36%.
- the effect of the op amp off set on the detection accuracy can be effectively suppressed.
- the op amp input introduces a 10% mismatch to the tube, and the given input voltage is 20V
- the output code of the divider is: 1001000000000100
- the voltage calculated by the MCU operation circuit is 20. 0024V. It can be seen from the calculation results that the off set voltage of the op amp is not reflected in the output of the divider, indicating that the artificially set off set has been completely eliminated, which proves that the chopper op amp controlled by the interlaced feedback signal can eliminate the offset. Achieve high precision detection.
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- General Physics & Mathematics (AREA)
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- Analogue/Digital Conversion (AREA)
Abstract
La présente invention porte sur un circuit de détection de tension haute précision, comprenant un modulateur, un module de compteur et de diviseur de fréquence et un module de traitement MCU (unité de commande multipoint). À l'aide du modulateur et d'un compteur et d'un diviseur de fréquence, un rapport d'une tension à détecter et d'une tension de référence est modulé en un signal carré de modulation, la précision de la détection de tension est amenée à dépendre d'un rapport du nombre de comptage d'une horloge de haut niveau et du nombre de comptage d'une horloge de bas niveau, et des signaux de commande à rétroaction étagée sont générés par le compteur et le diviseur de fréquence pour commander le modulateur, de telle sorte que la tension de décalage du modulateur peut être éliminée, la précision de la détection de tension peut être beaucoup augmentée; et de plus, une autre correction de données de détection peut également être réalisée par le module de traitement MCU, augmentant ainsi la précision de détection encore plus.
Applications Claiming Priority (2)
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CN201310461129.8A CN103499733B (zh) | 2013-09-30 | 2013-09-30 | 一种高精度电压检测电路及方法 |
CN201310461129.8 | 2013-09-30 |
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WO2015043020A1 true WO2015043020A1 (fr) | 2015-04-02 |
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PCT/CN2013/085583 WO2015043020A1 (fr) | 2013-09-30 | 2013-10-21 | Circuit de détection de tension haute précision et procédé associé |
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WO (1) | WO2015043020A1 (fr) |
Families Citing this family (6)
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KR101650012B1 (ko) * | 2015-06-22 | 2016-08-22 | (주)엘센 | 센서 장치 및 센싱 방법 |
CN105677295B (zh) * | 2016-01-04 | 2018-06-26 | 湖南工业大学 | 求两个输入电压间比例值的电路 |
CN108011590A (zh) * | 2016-11-01 | 2018-05-08 | 中国科学院沈阳自动化研究所 | 一种高精度低功耗rc振荡器 |
CN109085414B (zh) * | 2018-08-10 | 2021-06-11 | 深圳和而泰智能控制股份有限公司 | 电压检测方法及装置 |
CN109186812A (zh) * | 2018-10-16 | 2019-01-11 | 聚辰半导体(上海)有限公司 | 一种高精度温度传感器误差修正的方法及其修正电路 |
CN113078817B (zh) * | 2021-03-29 | 2022-03-25 | 浙江大学 | 适用于迟滞控制高频双相Buck变换器的相间电流均衡控制系统 |
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CN85103529B (zh) * | 1985-05-08 | 1987-02-25 | 三菱电机株式会社 | 电压-频率转换电路 |
GB2222333A (en) * | 1988-07-30 | 1990-02-28 | Omega Electric Ltd | Voltage to frequency converter |
US20040222799A1 (en) * | 2003-05-05 | 2004-11-11 | Tan Du | DC measurement method and system using sigma-delta modulation pattern |
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CN103499733A (zh) | 2014-01-08 |
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