WO2015043020A1

WO2015043020A1 - High-precision voltage detection circuit and method

Info

Publication number: WO2015043020A1
Application number: PCT/CN2013/085583
Authority: WO
Inventors: 赵野; 周玉梅; 黑勇; 王洪祥
Original assignee: 中国科学院微电子研究所
Priority date: 2013-09-30
Filing date: 2013-10-21
Publication date: 2015-04-02
Also published as: CN103499733A; CN103499733B

Abstract

Provided is a high-precision voltage detection circuit, comprising a modulator, a counter and frequency divider module and an MCU processing module. By using the modulator and a counter and a frequency divider, a ratio of a voltage to be detected and a reference voltage is modulated into a modulation square-wave signal, the precision of the voltage detection is made to depend on a ratio of the counting number of a high-level clock and the counting number of a low-level clock, and staggered feedback control signals are generated by the counter and frequency divider to control the modulator, so that the offset voltage of the modulator can be eliminated, the precision of the voltage detection can be increased to a great extent; and moreover, a further correction of detection data can also be realized by the MCU processing module, thereby increasing the accuracy of detection once again.

Description

TECHNICAL FIELD The present invention relates to the field of digital-analog hybrid integrated circuit design, and more particularly to a voltage detection circuit controlled by a digital operation circuit and its feedback interleaved signal. BACKGROUND OF THE INVENTION Sensors are a commonly used electronic component. With the rapid development of integrated circuits, integrated sensors have also evolved. Existing integrated sensors generally convert detection signals into voltage signals for processing. The detection of the voltage signal becomes the key to the integrated sensor design. The voltage detection circuit becomes the core circuit in the sensor circuit, and the detection accuracy directly determines the effective accuracy of the overall sensor.

In order to realize the digitization of the detection signal, the existing voltage detection circuit basically adopts an A/D conversion circuit. Depending on the application background, the optional conversion circuit may be different, but regardless of the structure of the A/D conversion circuit, There are non-ideal factors such as charge injection, clock breakdown, sampling spikes, etc., resulting in low accuracy of voltage sampling results. In the prior art, higher detection accuracy is also achieved by increasing EN0B. Although this can improve the accuracy of voltage sampling to a certain extent, the power consumption, area and other expenses of the whole circuit suddenly increase, and the complexity also increases, which eventually leads to a complicated system of the circuit, poor usability, and high cost.

SUMMARY OF THE INVENTION In view of the conventional voltage detection circuit scheme, a digital-to-analog converter is required to output a digital signal, resulting in a disadvantage of excessive circuit overhead. The technical problem to be solved by the present invention is to provide a high-precision voltage detecting circuit and method which can output a digital code signal with high precision without requiring a digital-to-analog converter.

In order to solve the above technical problem, the present invention provides a high-accuracy voltage detecting circuit, comprising: a modulator for receiving a voltage to be detected and a reference voltage, and outputting a modulated square wave signal, wherein a duty ratio of the modulated square wave signal is a ratio of the voltage to be detected to the reference voltage;

a counter and a frequency divider module for receiving a modulated square wave signal output by the modulator, converting the modulated square wave signal into a digital code output, and generating two interleaved feedback control signals, the feedback control signal Output to the modulator; The MCU processing module receives the digital code output by the counter and the frequency divider module, and calculates a voltage to be detected according to the digital code.

Preferably, the voltage detecting circuit further includes:

a reference and bias circuit for assisting the modulator to provide the modulator with a desired reference voltage and bias voltage;

A control clock module is provided for providing the counter and divider modules with the desired high frequency clock signal.

Preferably, the modulator is a first-order ∑_Δ modulator, including a chopper operational amplifier, an N-tube input comparator, a P-tube input comparator, an RS-type flip-flop, a sampling switch, a resistor and a capacitor, and the chopping An operational amplifier is configured to receive the reference voltage and a voltage to be detected, and the N-tube input comparator and the P-tube input comparator generate a threshold voltage for monitoring charging and discharging of the capacitor, and the output of the N-tube input comparator And an output end of the P-tube input comparator is respectively connected to two input ends of the RS-type flip-flop, and an output feedback signal of the RS-type flip-flop controls the sampling switch.

Preferably, a forward input terminal of the chopper operational amplifier is connected to the reference voltage, and an inverting input end of the chopper operational amplifier is connected to the to-be-detected voltage through the resistor, and the to-be-detected voltage is A sampling switch and a resistor are disposed between the inverting input terminals of the operational amplifier, and a capacitor is connected across the output end of the chopper operational amplifier and the inverting input terminal of the operational amplifier, and the output of the chopper operational amplifier The terminal simultaneously connects the N-tube input comparator and the P-tube input comparator, and the output of the N-tube input comparator and the output of the P-tube input comparator are respectively connected to two of the RS-type flip-flops The input end of the RS-type flip-flop outputs an output signal to control the sampling switch. The chopper operational amplifier includes three chopper switches, one of which is an input chopping switch and two output chopping switches. The interleaved feedback control signal controls the chopper switch, and an output terminal of each chopper switch is provided with a folded cascode amplifier.

Preferably, the chopper switch is composed of four transmission gates controlled by four reverse non-overlapping clocks. Preferably, the counter and the frequency divider module comprise a first counter, a second counter and a divider, the first counter and the second counter receiving a modulated square wave signal output by the modulator, and outputting the modulation side The hold time of the high and low levels of the wave signal is given to the divider, and the divider outputs the duty ratio of the high and low levels of the modulated square wave signal to the MCU processing module in digital code form.

A voltage detecting method, comprising:

Modulating a ratio of a voltage to be detected to a reference voltage by a modulator to a modulated square wave signal; converting the modulated square wave signal into a digital code by a counter and a frequency divider; The value of the voltage to be measured is calculated by the MCU processing module.

Preferably, the converting the modulated square wave signal into a digital code by using a counter and a frequency divider comprises:

The high-level hold time and the low-level hold time of the modulated square wave signal are calculated by the counter; the ratio of the high-level hold time to the low-level hold time is calculated by the divider, and the digital code is output. Preferably, when the modulation square wave signal is converted into a digital code by a counter and a frequency divider, the counter and the frequency divider generate an interlace control feedback signal to the modulator.

By using a modulator, a counter, and a frequency divider, the ratio of the voltage to be detected to the reference voltage is modulated into a modulated square wave signal, and the accuracy of the voltage detection depends on the number of high-level clocks and the low level of the modulated square wave signal. The ratio of the number of clock counts is determined, and the interleaved feedback control signal is generated by the counter and the frequency divider to control the modulator, which can eliminate the offset voltage of the modulator, greatly improve the voltage detection accuracy, and can also be processed by the MCU processing module. Further correction of the detected data is achieved, thereby again improving the accuracy of the detection.

BRIEF DESCRIPTION OF THE DRAWINGS The invention will be further described in detail below with reference to the drawings and specific embodiments:

1 is a circuit block diagram of an embodiment of a high precision voltage detecting circuit of the present invention;

2 is a schematic diagram of a modulator circuit of an embodiment of the high-accuracy voltage detecting circuit of the present invention; FIG. 3 is a schematic diagram of a chopper operational circuit of the high-accuracy voltage detecting circuit of the present invention; FIG. 4 is a high precision of the present invention; Schematic diagram of a chopper switching circuit of a voltage detecting circuit embodiment; FIG. 5 is a schematic diagram of a counter and a divider circuit of the embodiment of the high precision voltage detecting circuit of the present invention;

Fig. 6 is a flow chart showing a voltage detecting method of an embodiment of the high-precision voltage detecting circuit of the present invention; Fig. 7 is a waveform diagram showing the output timing of the counter and the divider of the high-accuracy voltage detecting circuit of the present invention.

detailed description The above and other objects, features and advantages of the present invention will become more <RTIgt; The same reference numerals are used throughout the drawings to refer to the same parts. The drawings are not intended to be drawn to scale, emphasis is placed on the subject matter of the invention.

As shown in FIG. 1, a high-precision voltage detecting circuit of the present invention includes a modulator, wherein the modulator is a first-order ∑_Δ modulator for receiving a voltage to be detected and a reference voltage, and outputting a modulated square wave signal. The duty ratio of the modulated square wave signal is a ratio of the to-be-detected voltage to the reference voltage; the first-order ∑ _Δ modulator is connected with a reference and a bias circuit, and the reference and bias circuits are used. In the auxiliary modulator, the modulator is supplied with the required reference voltage and bias voltage. a counter and a frequency divider module, wherein the counter and the frequency divider module are configured to receive a modulated square wave signal output by the modulator, and convert the modulated square wave signal into a digital code output to generate two interlaced signals The feedback control signals CLK1 and CLK2 are output to the first-order Σ-Δ modulator; and the control clock module is configured to provide the counter and the divider module with a desired high-frequency clock signal. The MCU processing module receives the digital code output by the counter and the frequency divider module, and calculates a voltage to be detected according to the digital code. The digital code is a ratio of a high level hold time t l to a low level hold time t 2 .

In this embodiment, the first-order ∑_Δ modulator includes a chopper operational amplifier, an N-tube input comparator, a P-tube input comparator, an RS-type flip-flop, a sampling switch, a resistor, and a capacitor, as shown in FIG. The forward input terminal of the chopper operational amplifier 101 is connected to the reference voltage, and the inverting input terminal of the chopper operational amplifier 101 is connected to the to-be-detected voltage through the resistor 108, and the to-be-detected voltage and the operation A sampling switch S1 and S2 and a resistor 108 are disposed between the inverting input terminals of the amplifier 101, and a capacitor 1 is connected between the output end of the chopper operational amplifier 101 and the inverting input terminal of the chopper operational amplifier 101. 07. The output end of the chopper operational amplifier 101 is simultaneously connected to the N-tube input comparator and the P-tube input comparator, and the output of the N-tube input comparator and the output of the P-tube input comparator The terminals respectively connect two input ends of the RS type flip-flop, and an output end of the RS type flip-flop outputs a feedback signal to control the sampling switch.

The chopper operational amplifier 101 is configured to receive the reference voltage and a voltage to be detected, and the N-tube input comparator 102 and the P-tube input comparator 103 generate a threshold voltage VH for monitoring charging and discharging of the capacitor 107. VL. An output end of the N-tube input comparator 102 and an output end of the P-tube input comparator 103 are respectively connected to two input ends of the RS-type flip-flop 104, and an output feedback signal 2 of the RS-type flip-flop 2 Control the sampling switches S1 and S2.

As shown in FIG. 3, in this embodiment, the chopper operational amplifier includes three chopper switches, wherein An input chopping switch and two output chopping switches, the interleaved feedback control signals controlling the chopping switches, and each chopper switch has a folded cascode amplifier at its output. The connection relationship is shown in Figure 3, and is not repeated here. As shown in FIG. 4, the chopper switch is composed of four transmission gates controlled by four reverse non-overlapping clocks.

In this embodiment, the counter and the frequency divider module include a first counter, a second counter, and a divider. As shown in FIG. 5, the first counter 201 and the second counter 202 receive the output of the modulator. Modulating a square wave signal, and outputting a high and low level holding time of the modulated square wave signal to the divider 203, the divider 203 outputting a high and low level duty of the modulated square wave signal in a digital code form The module is processed to the MCU.

As shown in FIG. 6, a voltage detecting method is characterized by comprising the following steps:

Step S100: The modulator modulates the ratio of the voltage to be detected to the reference voltage to a modulated square wave signal; Step S101: The counter calculates a high level hold time and a low level hold time of the modulated square wave signal;

Step S101: The counter and the frequency divider generate an interleaving control feedback signal to the modulator. Step S102: The divider calculates a ratio of the high level holding time and the low level holding time, and outputs a digital code;

Step 103: Calculate the value of the voltage to be tested by the MCU processing module.

The working principle of voltage detection in this embodiment:

First, the working principle of the first-order Σ Δ Δ modulator: Assume that the RS flip-flop initially Q is high, then Q is low. At this time, the sampling switch S1 closes the sampling switch S2 to open, and the voltage to be detected VIN passes. The resistor 108 charges the capacitor 107 to obtain a charging current of:

The charging time of the tantalum capacitor 107 is t1. It can be seen from Fig. 2 that the voltage VI of the positive terminal of the capacitor 107 is constant, so the voltage of the lower plate of the capacitor gradually decreases during charging, and the input of the P tube is compared when the voltage drops below the threshold voltage VL. The flipper 103 flips, causing the RS flip-flop to flip, eventually causing the sampling switch S1 to open the sampling S2 to close, and the VI discharging the capacitor 107 through the resistor 108:

² R ( 2 ) Similarly, if the discharge time is t2, the voltage of the lower plate of the capacitor rises slowly during the discharge, and when the threshold voltage VH rises above, the N-tube input comparator 102 flips, thereby causing the RS flip-flop to flip, eventually causing the sampling switch S1 to close. The sampling switch S2 is turned off and charges the capacitor 107, thereby forming a period, and the RS flip-flop outputs a modulated square wave 109. Because the lower plate level of the capacitor 107 drops from the threshold voltage VH to the threshold voltage VL during charging, the lower plate level of the capacitor rises from the threshold voltage VL to the threshold voltage VH during discharge, and the total charge and discharge charge is equal. Get:

X = Lxt^ ( 3) Substituting formulas ( 2 ) and ( 3 ) into ( 3 )

Obtained by the principle of an operational amplifier

VI = VREF (5 ) Substituting the formula ( 5 ) into ( 4 ) gives:

From equation (6), the ratio of t1 to t2 is measured to obtain the modulation square wave output of V3⁄4 first-order ∑_Δ modulator output to counter 1 and counter 2, respectively. The high- and low-level hold times of the wave, the divider is responsible for determining the ratio of the two data; at the same time, the counter and divider circuit module also outputs the interleaved feedback chopper op amp control signal, the specific timing relationship An explanation is given in FIG.

Figure 7 is a timing waveform diagram of the output of the counter and divider circuit. If the high-level hold time of the modulated square wave is t1 and the low-level hold time is t2, then: (7) where t O is the clock period of the counter, and n is the number of clock cycles, which can be obtained by combining formula (6):

The counter passes the count result to the divider, and the divider calculates the ratio of nl to n2, which in turn outputs a ratio 210 of the voltage VIN to the reference voltage VREF. At the same time, in order to eliminate the offset voltage error introduced by the op amp. The chopper op amp structure shown in Figure 3 is employed. The chopper op amp can effectively eliminate off set and 1/f noise. The modulation frequency of the traditional chopper switch needs to be satisfied: + ( 9 ) As can be seen from Fig. 2, the stable VI can obtain higher precision. After adding the chopper switch Each action of the switch will cause fluctuations in the VI, causing additional errors in the circuit, which will greatly reduce the effect of chopping. In order to solve this problem, the present invention proposes a new method for controlling a chopper switch by an interleaved feedback method (the interleaved feedback control signal is given by a counter and a divider circuit): When the circuit operates, each sample data period ends. The control signal of the chopper switch is flipped once, as shown by 201 and 202 in Figure 7, the chopping control switch is interleaved with the rising edge of the input data, assuming the first data cycle has:

(10) Then the second cycle has: (11) Substituting the formulas (10) and (11) into the formula (8) after sampling the voltage for two cycles, the average of the results can be paid:

V _IN = (1 +†)V ₁

(12) The result is the same as in equation (4), and it can be seen that the off set voltage has been eliminated. Although the chopper op amp has a chopper switch, its actual working principle is different from the traditional chopper op amp. The off set is not filtered by the low-pass filter without chopping modulation, but due to two interlaced feedback controls. The off set introduced by the period is equal in magnitude and opposite in direction, and is eliminated by averaging, so the chopping frequency is no longer strictly in accordance with the requirement of equation (9). Multi-cycle sampling averaging also improves the accuracy of the ratio of t l to t2. Assuming that the frequency of the interleaved feedback signal is about ΙΚΗζ-Ι ΟΚΗζ, the main 1/f noise of the op amp is concentrated at the low frequency. It can be seen that the interlaced feedback controlled chopper op amp can effectively filter the 1/f noise.

Four transfer gates controlled by four reverse non-overlapping clocks form a chopper switch, when the clock signal

When CLK CLK2 is the interleaved feedback of the chopping signal, the two transmission gates connected to the input IN1 and IN2 are alternately turned on, that is, the input signals IN1 and IN2 are respectively modulated to 0UT1 and 0UT2, and the chopper op amp is used to eliminate the offset voltage. the goal of.

A P input comparator and an N input comparator are used in the modulator. The two comparators are used to determine the capacitor charge and discharge threshold voltage, and it is necessary to monitor the voltage change all the time, so it needs to work all the time after the enable. Since the two comparators monitor different voltage values, the N tube is used as the input pair tube (for the case where the input common mode is relatively high) and the P tube is used as the input pair tube (for the case where the input common mode is low). A comparator is used to monitor the threshold voltage of the capacitor charge and discharge in the modulator.

Using the circuit of the present invention for simulation, if the simulated detection voltage is 20V, when a 16-bit digital divider circuit is used, then the simulation output code of the divider is: 1001000010010101, where the first three digits are integer parts, and the last 13 bits. Calculated by the MCU arithmetic circuit for the fractional part The detection error is 20. 072V, and the detection error is 0.36%.

By adding a chopper op amp to the detection circuit and using the counter and divider to calculate the interleaved feedback control signal generated by the circuit, the effect of the op amp off set on the detection accuracy can be effectively suppressed. For example, when the op amp input introduces a 10% mismatch to the tube, and the given input voltage is 20V, the output code of the divider is: 1001000000000100, and the voltage calculated by the MCU operation circuit is 20. 0024V. It can be seen from the calculation results that the off set voltage of the op amp is not reflected in the output of the divider, indicating that the artificially set off set has been completely eliminated, which proves that the chopper op amp controlled by the interlaced feedback signal can eliminate the offset. Achieve high precision detection.

Table 1 Voltage detection simulation results

Numerous specific details are set forth in the above description in order to provide a thorough understanding of the invention. However, the above description is only a preferred embodiment of the present invention, and the present invention can be embodied in many other ways than those described herein, and thus the present invention is not limited by the specific embodiments disclosed. At the same time, any person skilled in the art can make many possible changes and modifications to the technical solutions of the present invention by using the methods and technical contents disclosed above, or modify the equivalent implementation of equivalent changes without departing from the scope of the technical solutions of the present invention. example. Any modifications, equivalent changes, and modifications made to the above embodiments in accordance with the technical spirit of the present invention are still within the scope of the technical solutions of the present invention.

Claims

Rights request

A high-precision voltage detecting circuit, comprising:

a modulator, configured to receive a voltage to be detected and a reference voltage, and output a modulated square wave signal, wherein a duty ratio of the modulated square wave signal is a ratio of the to-be-detected voltage to the reference voltage;

a counter and a frequency divider module for receiving a modulated square wave signal output by the modulator, converting the modulated square wave signal into a digital code output, and generating two interleaved feedback control signals, the feedback control signal Output to the modulator;

The MCU processing module receives the digital code output by the counter and the frequency divider module, and calculates a voltage to be detected according to the digital code.

The high-precision voltage detecting circuit according to claim 1, wherein the voltage detecting circuit further comprises:

The high-precision voltage detecting circuit according to claim 1, wherein the modulator is a first-order ∑_Δ modulator, including a chopper operational amplifier, an N-tube input comparator, a P-tube input comparator, An RS-type flip-flop, a sampling switch, a resistor and a capacitor, the chopper operational amplifier is configured to receive the reference voltage and a voltage to be detected, and the N-tube input comparator and the P-tube input comparator generate a monitoring capacitor a threshold voltage of the charge and discharge, an output end of the N-tube input comparator and an output end of the P-tube input comparator are respectively connected to two input ends of the RS-type flip-flop, and an output of the RS-type flip-flop A feedback signal controls the sampling switch.

The high-precision voltage detecting circuit according to claim 3, wherein a forward input terminal of the chopper operational amplifier is connected to the reference voltage, and an inverting input terminal of the chopper operational amplifier passes the a resistor is connected to the voltage to be detected, and a sampling switch and a resistor are disposed between the voltage to be detected and an inverting input terminal of the operational amplifier, and an output of the chopper operational amplifier and an inverse input of the operational amplifier a capacitor is connected across the terminals, and an output terminal of the chopper operational amplifier is simultaneously connected to the N-tube input comparator and the P-tube input comparator, and the output of the N-tube input comparator and the P-tube The output terminals of the input comparator are respectively connected to two input ends of the RS type flip-flop, and the output end of the RS type flip-flop outputs a feedback signal to control the sampling switch

The high-precision voltage detecting circuit according to claim 3, wherein said 斩 wave transport The amplifier includes three chopper switches, one of which inputs a chopper switch and two output chopper switches, and the interleaved feedback control signal controls the chopper switch, and each chopper switch has a folded structure at its output end A cascode amplifier.

The high precision voltage detecting circuit according to claim 5, wherein said chopper switch is constituted by four transfer gates controlled by four reverse non-overlapping clocks.

7. The high precision voltage detection circuit according to claim 1, wherein the counter and frequency divider module comprises a first counter, a second counter and a divider, the first counter and the second counter receiving a modulated square wave signal output by the modulator, and outputting a hold time of the high and low levels of the modulated square wave signal to the divider, the divider outputting the high and low levels of the modulated square wave signal in a digital code form The duty cycle is given to the MCU processing module.

8. A voltage detecting method, characterized in that it comprises:

Modulating a ratio of a voltage to be detected to a reference voltage by a modulator to a modulated square wave signal; converting the modulated square wave signal into a digital code by a counter and a frequency divider;

The value of the voltage to be measured is calculated by the MCU processing module.

The voltage detecting method according to claim 8, wherein the converting the modulated square wave signal into a digital code by the counter and the frequency divider comprises:

The high level hold time and the low level hold time of the modulated square wave signal are calculated by the counter; the digital code is output by the ratio of the high level hold time and the low level hold time by the divider. 10. The voltage detecting method according to claim 8, wherein the counter and the frequency divider generate an interleaving control feedback signal when the modulation square wave signal is converted into a digital code by a counter and a frequency divider. Give the modulator.