WO2014190715A1 - 像素结构及液晶面板 - Google Patents

像素结构及液晶面板 Download PDF

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Publication number
WO2014190715A1
WO2014190715A1 PCT/CN2013/088869 CN2013088869W WO2014190715A1 WO 2014190715 A1 WO2014190715 A1 WO 2014190715A1 CN 2013088869 W CN2013088869 W CN 2013088869W WO 2014190715 A1 WO2014190715 A1 WO 2014190715A1
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Prior art keywords
thin film
film transistor
pixel structure
electrode
gate
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PCT/CN2013/088869
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English (en)
French (fr)
Inventor
王骁
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京东方科技集团股份有限公司
北京京东方显示技术有限公司
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Priority to US14/374,251 priority Critical patent/US10139689B2/en
Publication of WO2014190715A1 publication Critical patent/WO2014190715A1/zh

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    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/13624—Active matrix addressed cells having more than one switching element per pixel
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136204—Arrangements to prevent high voltage or static electricity failures
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1343—Electrodes
    • G02F1/134309—Electrodes characterised by their geometrical arrangement
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136286—Wiring, e.g. gate line, drain line
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/417—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
    • H01L29/41725—Source or drain electrodes for field effect devices
    • H01L29/41733—Source or drain electrodes for field effect devices for thin film transistors with insulated gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78606—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
    • H01L29/78618—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/133397—Constructional arrangements; Manufacturing methods for suppressing after-image or image-sticking
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/13606—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit having means for reducing parasitic capacitance
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0209—Crosstalk reduction, i.e. to reduce direct or indirect influences of signals directed to a certain pixel of the displayed image on other pixels of said image, inclusive of influences affecting pixels in different frames or fields or sub-images which constitute a same image, e.g. left and right images of a stereoscopic display
    • G09G2320/0214—Crosstalk reduction, i.e. to reduce direct or indirect influences of signals directed to a certain pixel of the displayed image on other pixels of said image, inclusive of influences affecting pixels in different frames or fields or sub-images which constitute a same image, e.g. left and right images of a stereoscopic display with crosstalk due to leakage current of pixel switch in active matrix panels
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3648—Control of matrices with row and column drivers using an active matrix

Definitions

  • Embodiments of the present invention relate to a pixel structure and a liquid crystal panel. Background technique
  • a thin film transistor liquid crystal display (TFT-LCD) is one of many liquid crystal displays.
  • the thin film transistor liquid crystal display means that each liquid crystal pixel on the liquid crystal panel of the display is driven by a thin film transistor (TFT) integrated therein, thereby displaying screen information with high speed, high brightness, and high contrast.
  • TFT thin film transistor
  • each pixel structure of the liquid crystal panel includes a data line 1, a gate line 2, and a pixel electrode 3, and a data line 1 and a gate line.
  • a thin film transistor 9 is formed at the intersection of 2, the gate of the thin film transistor 9 is connected to the gate line 2, the source of the thin film transistor 9 is connected to the data line 1, and the drain of the thin film transistor 9 is connected to the pixel electrode 3.
  • the equivalent circuit of the above circuit structure is shown in FIG. 2, where 11 is a liquid crystal capacitor C lc and 12 is a storage capacitor C st .
  • the off-state current I. . Ff also used to refer to the leakage current called TFT pixel structure.
  • the off-state current is too large, causing some problems. For example, if the off-state current is too large, it will have a certain influence on the pixel voltage retention characteristics. When the gate is closed, the voltage loss is too fast, exceeding 2 When the gray scale is used, the human eye can distinguish the change and cause the phenomenon of flicker. On the other hand, if the off-state current is too large, the residual DC component of the pixel is increased to cause the charge to remain, thereby generating an afterimage. Summary of the invention
  • a pixel structure including a data line, a pixel electrode, a gate line, and at least two thin film transistors connected in series between the pixel electrode and the data line, the at least two The gates of the thin film transistors are all connected to the gate lines.
  • a liquid crystal panel including the above pixel structure is provided,
  • FIG. 1 is a schematic structural view of a connection circuit of a thin film transistor in a pixel structure of the prior art
  • FIG. 2 is an equivalent circuit diagram of a connection circuit of a thin film transistor in a pixel structure of the prior art
  • FIG. 3 is a pixel structure of an embodiment of the present invention
  • FIG. 4 is an equivalent circuit diagram of a connection circuit of a dual thin film transistor in a pixel structure according to an embodiment of the present invention
  • Figure 5 is a circuit diagram showing the simulation of a single TFT circuit using Smart Spice
  • Figure 6 is a circuit diagram for simulating an analog dual TFT circuit using Smart Spice. detailed description
  • Embodiments of the present invention provide a pixel structure and a liquid crystal panel including the same, which are capable of effectively reducing off-state current, improving afterimage problems, and improving display quality of a liquid crystal panel.
  • the main parameter of the thin film transistor is the turn-on current I. n , off state current I. Ff , drain-source voltage V ds , gate-source voltage Vg p threshold voltage V TH , etc., where I. n , I.
  • the effects of ff and V TH on pixels are relatively large.
  • the calculation formula for turning on the current 1 ⁇ is as follows:
  • Ion — jUnCsiNx(VG ⁇ VTH)VD
  • W and L are respectively the channel width and length formed by the active layer of the thin film transistor
  • ⁇ ⁇ For equivalent electron mobility, ( ⁇ is the capacitance of the thin film transistor, V TH is the threshold voltage of the thin film transistor, and V G and V D are the voltages of the gate and drain of the thin film transistor with respect to the source. see, open factors influence the current I.
  • n has a ratio of channel width to length WL, electron mobility and the like.
  • q is the electron charge
  • n is the electron density
  • p is the hole density
  • / ⁇ is the hole mobility
  • W and L are the channels formed by the active layer of the thin film transistor, respectively. Width and length
  • V D is the voltage of the drain of the thin film transistor with respect to the source.
  • I is affected.
  • the factor of ff is the ratio of the channel width to the length W/L and the like. Therefore, I can be adjusted by adjusting the aspect ratio WL of the thin film transistor during pixel structure design. n , I. Ff size.
  • the pixel structure proposed by the first aspect of the present invention includes, in addition to the data line, the pixel electrode and the gate line, at least two thin film transistors connected in series between the pixel electrode and the data line, and the at least two thin film transistors The gates are each connected to the gate lines.
  • the pixel structure of an embodiment of the present invention includes a first thin film transistor 5 and a second thin film transistor 4, and a first thin film transistor, in addition to the data line 1, the pixel electrode 3, and the gate line 2.
  • the drain of 5 is connected to the source of the second thin film transistor 4, the source of the first thin film transistor 5 is connected to the data line 1, and the drain of the second thin film transistor 4 is connected to the pixel electrode 3 through the via 6.
  • FIG. 4 The equivalent circuit of the pixel structure shown in FIG. 3 is as shown in FIG. 4, where 11 is a liquid crystal capacitor C lc and 12 is a storage capacitor C st .
  • 11 is a liquid crystal capacitor C lc
  • 12 is a storage capacitor C st .
  • two cascaded thin film transistors are used in place of a thin film transistor of the prior art.
  • the advantage of this pixel structure design is that two identical thin film transistors are cascaded by controlling the channel length. When the gate line 2 is turned on, the two thin film transistors are simultaneously turned on, due to the turn-on current of the two thin film transistors and one thin film transistor.
  • n has no significant effect on the voltage of data line 1, and when gate line 2 is turned off, the reverse bias of the two thin film transistors significantly reduces the off-state current I. Ff , greatly improved afterimage The problem is that the display quality of the LCD panel is improved.
  • the first thin film transistor 5 and the second thin film transistor 4 can be formed simultaneously in the same process.
  • the drain and source of the first thin film transistor 5, the drain and source of the second thin film transistor 4, and the data line 1 are each formed of a source/drain electrode layer
  • the active layers and the active layers of the second thin film transistor 4 are each formed of a semiconductor layer
  • the gate of the first thin film transistor 5, the gate of the second thin film transistor 4, and the gate line 2 are each formed of a gate line layer.
  • the turn-on currents of the two thin film transistors are the same, and the off-state current can be reduced without changing the turn-on current. The best results.
  • the gates of the first thin film transistor and the second thin film transistor are formed by the gate lines, and an active layer, a source and a drain of the first thin film transistor and the second thin film transistor are both formed on the gate Above the line.
  • the positions of the first thin film transistor and the second thin film transistor at least partially overlap with the positions of the gate lines or the data lines.
  • the source of the first thin film transistor and the second thin film transistor are U-shaped, the drain is strip-shaped, and the U-shaped source-to-drain one end forms a semi-enclosed layout.
  • the pixel structure provided by the embodiment of the present invention may further include a common electrode line connecting the common electrodes of the pixels.
  • the pixel structure provided by the embodiment of the present invention is used for a large-sized thin film transistor liquid crystal display, due to the large size of the pixel structure, even if two thin film transistors are cascaded, the aperture ratio of the pixel structure is not greatly affected. The resulting technology works best.
  • the off-state current I is reduced as a pixel structure proposed for an embodiment of the present invention.
  • ff further validate the technical effect of embodiments of the present invention using the Smart Spice simulation software tests the single and dual TFT circuit TFT circuit 1 ⁇ and I. Ff effect.
  • the analog circuit diagram of a single TFT circuit is shown in the figure.
  • I. Ff 19.915pA
  • I. Ff 10.307pA
  • I. Ff 23.429pA
  • I. Ff 12.125pA
  • the opening current I of the dual TFT circuit and the single TFT circuit can be made by adjusting the channel length L.
  • n is basically the same, off state current I. Ff is reduced by about half.
  • the pixel structure of the above embodiment can effectively reduce the off-state current and improve the afterimage problem.
  • the liquid crystal panel using the pixel structure can produce a better display effect than the ordinary liquid crystal panel.
  • the liquid crystal panel can adopt various display modes, such as a twisted nematic (TN) mode, a vertical orientation (VA) mode, an in-plane switching (IPS) mode, an advanced super-dimensional field switching (ADS) mode, and the like. .
  • TN twisted nematic
  • VA vertical orientation
  • IPS in-plane switching
  • ADS advanced super-dimensional field switching
  • the source of the thin film transistor is connected to the data line, and the drain of the thin film transistor is connected to the pixel electrode as an example.
  • the source and drain are interchangeable. It is also possible to connect the source to the pixel electrode and the drain to the data line, which is encompassed by embodiments of the present invention.
  • the embodiment of the present invention is not limited to the series connection of two thin film transistors, and may be a series connection of a plurality of thin film transistors.

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Nonlinear Science (AREA)
  • General Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Optics & Photonics (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Chemical & Material Sciences (AREA)
  • Mathematical Physics (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Ceramic Engineering (AREA)
  • Theoretical Computer Science (AREA)
  • Liquid Crystal (AREA)
  • Geometry (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)
  • Thin Film Transistor (AREA)

Abstract

一种像素结构及液晶面板，像素结构包括数据线（1）、像素电极（3）、栅线（2）以及串联于像素电极（3）与数据线（1）之间的至少两个薄膜晶体管（4，5），至少两个薄膜晶体管（4，5）的栅极均连接于栅线。通过利用两个串联的薄膜晶体管（4，5），有效地减小了关态电流，改善了残像问题并且提高了液晶面板的显示品质。

Description

像素结构及液晶面板 技术领域
本发明的实施例涉及一种像素结构及液晶面板。 背景技术
随着液晶显示技术的飞速发展， 液晶显示器被广泛应用于笔记本、 监视 器、 电视等显示设备中。 薄膜晶体管液晶显示器（TFT-LCD )是众多液晶显 示器中的一种。 薄膜晶体管液晶显示器是指显示器的液晶面板上的每一液晶 像素点都是由集成在其后的薄膜晶体管 （TFT )来驱动， 从而可以做到高速 度、 高亮度、 高对比度地显示屏幕信息。
在现有技术的 TFT液晶面板中，薄膜晶体管的连接电路结构如图 1所示， 液晶面板的每个像素结构均包括数据线 1、 栅线 2和像素电极 3 , 在数据线 1 和栅线 2的交叉部分处形成有薄膜晶体管 9, 薄膜晶体管 9的栅极连接至栅 线 2,薄膜晶体管 9的源极连接至数据线 1 ,薄膜晶体管 9的漏极连接至像素 电极 3。 上述电路结构的等效电路如图 2所示， 其中 11为液晶电容 Clc, 12 为存储电容 Cst。
当薄膜晶体管 9被反向偏置的时候， 由于自由电子的存在， 自由电子附 着在有源层上， 从而导致漏极和源极会流过微小的电流， 这个电流被称为关 态电流 I。ff, 也习惯称为 TFT像素结构的漏电流。 在 TFT像素结构设计时关 态电流过大会引起一些问题， 例如， 如果关态电流过大， 对像素电压的保持 特性带来一定的影响， 当栅极关闭的时候保持电压损失过快， 超过 2个灰阶 的时候， 人眼就能分辨出变化， 引起闪烁的现象； 另一方面， 如果关态电流 过大，导致像素放电时残留的直流分量增加而引起电荷残留，从而产生残像。 发明内容
在本发明的一个实施例中， 提供一种像素结构， 其包括数据线、 像素电 极、栅线以及串联于所述像素电极与所述数据线之间的至少两个薄膜晶体管， 所述至少两个薄膜晶体管的栅极均连接于所述栅线。 在本发明的另一个实施例中，提供一种液晶面板，其包括上述像素结构, 附图说明
为了更清楚地说明本发明实施例的技术方案， 下面将对实施例的附图作 筒单地介绍，显而易见地，下面描述中的附图仅仅涉及本发明的一些实施例， 而非对本发明的限制。
图 1为现有技术的像素结构中薄膜晶体管的连接电路的结构示意图； 图 2为现有技术的像素结构中薄膜晶体管的连接电路的等效电路图； 图 3为本发明实施例的像素结构中双薄膜晶体管的连接电路的结构示意 图；
图 4为本发明实施例的像素结构中双薄膜晶体管的连接电路的等效电路 图；
图 5为利用 Smart Spice来仿真模拟单 TFT电路的电路结构图； 图 6为利用 Smart Spice来仿真模拟双 TFT电路的电路结构图。 具体实施方式
为使本发明实施例的目的、 技术方案和优点更加清楚， 下面将结合本发 明实施例的附图，对本发明实施例的技术方案进行清楚、 完整地描述。显然， 所描述的实施例是本发明的一部分实施例， 而不是全部的实施例。 基于所描 述的本发明的实施例， 本领域普通技术人员在无需创造性劳动的前提下所获 得的所有其他实施例， 都属于本发明保护的范围。
本发明的实施例提供一种像素结构及包括该像素结构的液晶面板， 其能 够有效减小关态电流， 改善残像问题并且提高液晶面板的显示品质。
在现有技术的薄膜晶体管液晶显示器（TFT-LCD ) 中， 薄膜晶体管的主 要参数有开启电流 I。n、 关态电流 I。ff、 漏源电压 Vds、 栅源电压 Vg p阈值电 压 VTH等， 其中 I。n、 I。ff和 VTH对像素的影响比较大。 开启电流 1∞的计算公 式如下：
w
Ion =— jUnCsiNx(VG― VTH)VD 其中， W、 L分别为薄膜晶体管的有源层所形成的沟道宽度和长度， μη 为等效电子迁移率， （^^为薄膜晶体管的电容， VTH为薄膜晶体管的阈值电 压， VG和 VD为薄膜晶体管的栅极和漏极相对于源极的电压。 由上述公式可 以看出，影响开启电流 I。n的因素有沟道宽度与长度的比值 W L、 电子迁移率 等。
关态电流 I。ff的计算公式为：
Figure imgf000004_0001
其中， q为电子电荷量， n为电子密度， 为等效电子迁移率， p为空穴 密度， /^为空穴迁移率， W、 L分别为薄膜晶体管的有源层所形成的沟道宽 度和长度， VD为薄膜晶体管的漏极相对于源极的电压。
由此可见， 影响关态电流 I。ff的因素有沟道宽度与长度的比值 W/L等。 因此， 在像素结构设计时可以通过调整薄膜晶体管的宽长比 W L来调整 I。n、 I。ff的大小。
本发明实施例的第一方面提出的像素结构除包括数据线、 像素电极和栅 线外， 还包括串联于像素电极与数据线之间的至少两个薄膜晶体管， 所述至 少两个薄膜晶体管的栅极均连接至所述栅线。 上述技术方案通过利用两个级 连的薄膜晶体管替代现有技术的单薄膜晶体管， 有效地减小了关态电流， 改 善了残像问题。
具体地， 如图 3所示， 本发明一个实施例的像素结构除包括数据线 1、 像素电极 3和栅线 2外， 还包括第一薄膜晶体管 5和第二薄膜晶体管 4, 第 一薄膜晶体管 5的漏极与第二薄膜晶体管 4的源极相连， 第一薄膜晶体管 5 的源极与数据线 1相连， 第二薄膜晶体管 4的漏极通过过孔 6与像素电极 3 相连。
图 3所示的像素结构的等效电路如图 4所示， 其中 11为液晶电容 Clc, 12为存储电容 Cst。 从图 4可以看出， 在本发明的实施例中利用两个级连的 薄膜晶体管取代现有技术的一个薄膜晶体管。 此像素结构设计的优点在于， 通过控制沟道长度让两个相同的薄膜晶体管级连， 当栅线 2开启的时候， 两 个薄膜晶体管同时打开， 由于两个薄膜晶体管与一个薄膜晶体管的开启电流
I。n大小一样， 对数据线 1的电压没有太大影响， 而当栅线 2关闭的时候， 经 过两个薄膜晶体管的反向偏置， 显著地减小了关态电流 I。ff, 大大改善了残像 问题， 提高了液晶面板的显示品质。
第一薄膜晶体管 5和第二薄膜晶体管 4可以在相同的工艺中同步形成。 在本发明的一个实施例中， 第一薄膜晶体管 5的漏极和源极、 第二薄膜 晶体管 4的漏极和源极、 数据线 1均由源漏电极层形成， 第一薄膜晶体管 5 的有源层和第二薄膜晶体管 4的有源层均由半导体层形成， 第一薄膜晶体管 5的栅极、 第二薄膜晶体管 4的栅极以及栅线 2均由栅线层形成。
当然地， 在第一薄膜晶体管 5和第二薄膜晶体管 4为形状和尺寸相同的 薄膜晶体管时， 两薄膜晶体管的开启电流相同， 在不改变开启电流的情况下 可以减小关态电流， 产生的效果最佳。
为了减小对像素结构的开口率的影响， 可以采取如下手段：
一、 所述第一薄膜晶体管和第二薄膜晶体管的栅极由所述栅线构成， 所 述第一薄膜晶体管和第二薄膜晶体管的有源层和源极、 漏极均形成于所述栅 线上方。
二、 所述第一薄膜晶体管和第二薄膜晶体管的位置与栅线或数据线的位 置至少部分重叠。
三、所述第一薄膜晶体管和第二薄膜晶体管的源极呈 U形，漏极呈条状， 并且 U形的源极对漏极的一端形成半包围的布局。
当然地， 本发明的实施例提供的像素结构还可以包括连接各像素的公共 电极的公共电极线。
本发明的实施例提供的像素结构在被用于大尺寸的薄膜晶体管液晶显示 器时， 由于像素结构的大尺寸， 即使级连两个薄膜晶体管也不会对像素结构 的开口率产生较大影响， 产生的技术效果最好。
作为对本发明的实施例提出的像素结构减小关态电流 I。ff的技术效果的 进一步验证， 本发明的实施例利用 Smart Spice软件仿真模拟检验了单 TFT 电路和双 TFT电路下对 1∞和 I。ff的影响效果。单 TFT电路的模拟电路图如图
5所示， 双 TFT电路的模拟电路图如图 6所示， 其中 VG为电源电压， 得到 的模拟结果如下：
一、 Ιοη « 6μΑ时
当 27V时：
单 TFT 电路中， W/L=68/9.8, Ion=5.981, 双 TFT电路中， W/L=68/4.9, Ion=5.986;
当 VG= -8V时：
单 TFT电路中， I。ff=19.915pA;
双 TFT电路中， I。ff=10.307pA;
二、 Ion « 7μΑ
当 27V时：
单 TFT电路中， W/L=80/9.8, Ion=7.036;
双 TFT电路中， W/L=68/4.9, Ion=7.042;
当 VG= -8V时：
单 TFT电路中， I。ff=23.429pA;
双 TFT电路中， I。ff=12.125pA;
由上述模拟结果可看出，通过调整沟道长度 L可以使得双 TFT电路与单 TFT电路的开启电流 I。n基本相同， 关态电流 I。ff减小一半左右。
由上述模拟结果还可看出， 将两个相同的 TFT设计在像素的栅线上， 通 过控制沟道长度 L来控制 I。n大小相等，对像素结构的开口率影响不大，不影 响正常液晶面板的显示， 而且能实现 I。ff减小的效果。
从上述实施例及模拟实验的模拟结果可以看出， 采用上述实施例的像素 结构能够有效地减小关态电流， 改善残像问题。 进而， 采用该像素结构的液 晶面板能够产生比普通液晶面板更好的显示效果。 这里， 所述液晶面板可以 采用各种各样的显示模式， 例如扭曲向列 （TN )模式、 垂直取向 （VA )模 式、 平面内切换（IPS )模式、 高级超维场切换（ADS )模式等。
此外， 尽管上述实施例中， 为了描述方便， 而以薄膜晶体管的源极与数 据线相连， 而薄膜晶体管的漏极与像素电极相连为例进行了说明， 然而， 本 领域的技术人员应当明白， 对于薄膜晶体管， 其源极和漏极有构成上的互换 性， 也可以将源极与像素电极相连而将漏极与数据线相连， 这被涵盖在本发 明的实施例之内。
而且， 尽管上述实施例中， 以两个薄膜晶体管串联的情形进行了说明， 然而， 本发明的实施例不限于两个薄膜晶体管串联， 还可以是更多个薄膜晶 体管的串联。
以上实施例仅用以说明本发明的技术方案， 而非对其限制； 尽管参照前 述实施例对本发明进行了详细的说明， 本领域的普通技术人员应当理解： 其 依然可以对前述各实施例所记载的技术方案进行修改， 或者对其中部分技术 特征进行等同替换； 而这些修改或者替换， 并不使相应技术方案的本质脱离 本发明各实施例技术方案的精神和范围。

Claims

权利要求书
1、 一种像素结构， 包括数据线、像素电极、栅线以及串联于所述像素电 极与所述数据线之间的至少两个薄膜晶体管， 所述至少两个薄膜晶体管的栅 极均连接于所述栅线。
2、 如权利要求 1所述的像素结构， 其中， 所述薄膜晶体管有两个， 分别 为第一薄膜晶体管和第二薄膜晶体管， 所述第一薄膜晶体管的漏极与所述第 二薄膜晶体管的源极相连， 所述第一薄膜晶体管的源极与所述数据线相连， 所述第二薄膜晶体管的漏极与所述像素电极相连。
3、如权利要求 2所述的像素结构， 其中， 所述第一薄膜晶体管和第二薄 膜晶体管在相同的工艺中同步形成。
4、如权利要求 2所述的像素结构， 其中， 所述第一薄膜晶体管的漏极和 源极、 所述第二薄膜晶体管的漏极和源极以及所述数据线均由源漏电极层形 成， 所述第一薄膜晶体管的有源层和所述第二薄膜晶体管的有源层均由半导 体层形成， 所述第一薄膜晶体管的栅极、 所述第二薄膜晶体管的栅极以及所 述栅线均由栅线层形成。
5、如权利要求 2所述的像素结构， 其中， 所述第一薄膜晶体管和所述第 二薄膜晶体管为形状和尺寸相同的薄膜晶体管。
6、如权利要求 2所述的像素结构， 其中， 所述第一薄膜晶体管和所述第 二薄膜晶体管的位置与所述栅线或所述数据线的位置至少部分重叠。
7、如权利要求 2所述的像素结构， 其中， 所述第一薄膜晶体管和第二薄 膜晶体管的栅极由所述栅线构成， 所述第一薄膜晶体管和第二薄膜晶体管的 有源层和源极、 漏极均形成于所述栅线上方。
8、如权利要求 2所述的像素结构， 其中， 所述第一薄膜晶体管和第二薄 膜晶体管具有 U形的源极和条状的漏极，并且所述 U形的源极对所述漏极的 一端形成半包围的布局。
9、如权利要求 1所述的像素结构，还包括连接各像素的公共电极的公共 电极线。
10、 一种液晶面板， 所述液晶面板的像素结构采用权利要求 1-9任一项 所述的像素结构。
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