WO2014127580A1 - 静电保护电路、显示装置和静电保护方法 - Google Patents

静电保护电路、显示装置和静电保护方法 Download PDF

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Publication number
WO2014127580A1
WO2014127580A1 PCT/CN2013/074638 CN2013074638W WO2014127580A1 WO 2014127580 A1 WO2014127580 A1 WO 2014127580A1 CN 2013074638 W CN2013074638 W CN 2013074638W WO 2014127580 A1 WO2014127580 A1 WO 2014127580A1
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Prior art keywords
signal line
switch tube
electrostatic
switch
voltage
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Application number
PCT/CN2013/074638
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English (en)
French (fr)
Inventor
赵婷婷
徐向阳
Original Assignee
合肥京东方光电科技有限公司
京东方科技集团股份有限公司
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Application filed by 合肥京东方光电科技有限公司, 京东方科技集团股份有限公司 filed Critical 合肥京东方光电科技有限公司
Priority to US14/368,861 priority Critical patent/US9368962B2/en
Priority to EP13863693.1A priority patent/EP2961020B1/en
Publication of WO2014127580A1 publication Critical patent/WO2014127580A1/zh

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Classifications

    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02HEMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
    • H02H9/00Emergency protective circuit arrangements for limiting excess current or voltage without disconnection
    • H02H9/04Emergency protective circuit arrangements for limiting excess current or voltage without disconnection responsive to excess voltage
    • H02H9/044Physical layout, materials not provided for elsewhere
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02HEMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
    • H02H9/00Emergency protective circuit arrangements for limiting excess current or voltage without disconnection
    • H02H9/04Emergency protective circuit arrangements for limiting excess current or voltage without disconnection responsive to excess voltage
    • H02H9/045Emergency protective circuit arrangements for limiting excess current or voltage without disconnection responsive to excess voltage adapted to a particular application and not provided for elsewhere
    • H02H9/046Emergency protective circuit arrangements for limiting excess current or voltage without disconnection responsive to excess voltage adapted to a particular application and not provided for elsewhere responsive to excess voltage appearing at terminals of integrated circuits
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/136204Arrangements to prevent high voltage or static electricity failures
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/0203Particular design considerations for integrated circuits
    • H01L27/0248Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
    • H01L27/0251Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
    • H01L27/0266Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using field effect transistors as protective elements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
    • H01L27/1244Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits for preventing breakage, peeling or short circuiting

Definitions

  • Embodiments of the present invention relate to an electrostatic protection circuit, a display device, and an electrostatic protection method. Background technique
  • TFT-LCD Thin Film Transistor Liquid Crystal Display
  • electrostatic problems directly affect the yield of liquid crystal display panels produced. Due to the variety of ways in which static electricity is generated, many processes generate high voltage electrostatic charges during the manufacture of TFT-LCDs. For example, when a rubbing process is performed, friction generated between the friction cloth and the display panel of the TFT-LCD generates high-voltage static electricity. Since the high-voltage electrostatic charge is likely to break down the thin film transistor controlled by the pixel, causing the pixel drive to fail, and the quality of the liquid crystal display panel is inferior, it is required to release or equalize the high-voltage static electricity in a timely and effective manner during the TFT-LCD manufacturing process. That is, the electrostatic protection circuit is designed to protect the display panel.
  • the existing electrostatic protection circuit is usually designed between the gate line/data line and the common line/short ring.
  • the circuit design is relatively simple, resulting in the generation of static electricity. Effective release, so that the working device in the display area cannot be protected. Summary of the invention
  • Embodiments of the present invention provide an electrostatic protection circuit, a display device, and an electrostatic protection method for effectively shielding an electrostatic charge to protect a working device in a display area.
  • An embodiment of the present invention provides an electrostatic protection circuit including a first switch tube, a second switch tube, a third switch tube, a fourth switch tube, and a fifth switch tube;
  • the gate and the first pole of the first switch tube are respectively connected to the first signal line, and the second pole of the first switch tube is connected to the second signal line;
  • the gate and the first pole of the second switch tube are respectively connected to the first signal line, and the second pole of the second switch tube is connected to the gate of the fourth switch tube;
  • the gate and the first pole of the third switch tube are respectively connected to the third signal line, and the second pole of the third switch tube is connected to the gate of the fourth switch tube;
  • the gate of the fourth switch tube is respectively connected to the second pole of the second switch tube and the second pole of the third switch tube, and the first pole and the third signal of the fourth switch tube a second connection of the fourth switch tube is connected to the second pole of the fifth switch tube and the gate of the second switch tube;
  • the gate and the first pole of the fifth switch tube are respectively connected to the second signal line, and the second pole of the fifth switch tube and the second pole and the second pole of the fourth switch tube respectively The gate of the switch is connected. Further, the first signal line and the second signal line are disposed adjacent to each other; and
  • the first signal line and the second signal line are both scan lines, or the first signal line and the second signal line are both data lines.
  • the third signal line may be one of a common electrode line and a short-circuit ring.
  • the first switch transistor when the electrostatic voltage formed on the first signal line reaches the turn-on voltage, the first switch transistor may be turned on to conduct electrostatic charge on the first signal line to the second signal line.
  • the second switch tube and the fourth switch tube may be opened to conduct electrostatic charges on the first signal line to the third signal line;
  • the fifth switch transistor When the electrostatic voltage formed on the second signal line reaches the turn-on voltage, the fifth switch transistor may be turned on to conduct electrostatic charge on the second signal line to the first signal line, where The second switch tube and the fourth switch tube may be opened to conduct electrostatic charge on the second signal line to the third signal line;
  • the third switch tube and the fourth switch tube may be turned on to conduct electrostatic charge on the third signal line to the first On the signal line, the second switching transistor can be turned on to conduct electrostatic charge on the third signal line to the first signal line.
  • the second opening Turning off the tube and the fourth switch tube to conduct electrostatic charge on the first signal line to the third signal line;
  • the fifth switch transistor When the electrostatic voltage formed on the second signal line reaches the turn-on voltage, the fifth switch transistor is turned on to conduct electrostatic charge on the second signal line to the first signal line, the second The switch tube and the fourth switch tube are opened to conduct electrostatic charge on the second signal line to the third signal line;
  • the third switch transistor and the fourth switch transistor are turned on to conduct electrostatic charge on the third signal line to the first signal on-line.
  • the first switch tube When the electrostatic voltage formed on the first signal line reaches an on voltage, the first switch tube is turned on to conduct electrostatic charge on the first signal line to the second signal line; When the electrostatic voltage formed on the two signal lines reaches the turn-on voltage, the fifth switch tube is turned on to conduct the electrostatic charge on the second signal line to the first signal line; when the third signal line When the formed electrostatic voltage reaches the turn-on voltage, the third switch tube and the fourth switch tube are turned on to conduct electrostatic charge on the third signal line to the first signal line, the first switch The tube is opened to conduct electrostatic charge on the third signal line to the second signal line.
  • the first switch tube When the electrostatic voltage formed on the first signal line reaches an on voltage, the first switch tube is turned on to conduct electrostatic charge on the first signal line to the second signal line, the second The switch tube and the fourth switch tube are opened to conduct electrostatic charge on the first signal line to the third signal line;
  • the fifth switch transistor When the electrostatic voltage formed on the second signal line reaches the turn-on voltage, the fifth switch transistor is turned on to conduct electrostatic charge on the second signal line to the first signal line, the second The switch tube and the fourth switch tube are opened to conduct electrostatic charges on the second signal line to the third signal line.
  • the first switch tube When the electrostatic voltage formed on the first signal line reaches an on voltage, the first switch tube is turned on to conduct electrostatic charge on the first signal line to the second signal line; When the electrostatic voltage formed on the second signal line reaches the turn-on voltage, the fifth switch transistor is turned on to conduct electrostatic charge on the second signal line to the first signal line.
  • the first switch tube When the electrostatic voltage formed on the first signal line reaches an on voltage, the first switch tube is turned on to conduct electrostatic charge on the first signal line to the second signal line, the second The switch tube and the fourth switch tube are opened to conduct electrostatic charge on the first signal line to the third signal line;
  • the third switch transistor and the fourth switch transistor are turned on to conduct electrostatic charge on the third signal line to the first signal on-line.
  • embodiments of the present invention also provide a display device including the above electrostatic protection circuit.
  • the embodiment of the present invention further provides an electrostatic protection method for electrostatically protecting a first signal line, a second signal line, and a third signal line, where the electrostatic protection method includes:
  • the gate and the first pole of the second switch Connecting the gate and the first pole of the second switch to the first signal line, and connecting the second pole of the second switch to the gate of the fourth switch;
  • the gate and the first pole of the third switch tube are respectively connected to the third signal line, and the second pole of the third switch tube is connected to the gate of the fourth switch tube;
  • the electrostatic protection method performs adjacent setting of the first signal line and the second signal line
  • the first signal line and the second signal line are both scan lines, or the first signal Both the line and the second signal line are data lines.
  • the third signal line is a common electrode line or a shorting ring.
  • FIG. 1 is a schematic structural diagram of an electrostatic protection circuit according to Embodiment 1 of the present invention
  • FIG. 2 is a schematic diagram of an operational state of the electrostatic protection circuit of FIG.
  • FIG. 3 is a schematic view showing another working state of the electrostatic protection circuit of FIG. 1;
  • FIG. 4 is a schematic diagram of still another working state of the electrostatic protection circuit of FIG. 1;
  • FIG. 5 is an equivalent circuit diagram of the first switching tube of FIG.
  • FIG. 6 is another equivalent circuit diagram when the first switch tube in FIG. 1 fails;
  • FIG. 7 is another equivalent circuit diagram when the first switch tube in FIG. 1 fails;
  • FIG. 9 is another equivalent circuit diagram of the second switch tube in Figure 1 when the fault occurs;
  • Figure 10 is an equivalent circuit diagram of the third switch tube in Figure 1;
  • Figure 11 is another equivalent circuit diagram when the third switch tube in Figure 1 fails;
  • Figure 12 is an equivalent circuit diagram of the fourth switch tube in Figure 1 when the fault occurs
  • Figure 13 is an equivalent circuit diagram of the fifth switch tube in Figure 1;
  • FIG. 14 is another equivalent circuit diagram when the fifth switch tube in FIG. 1 fails. detailed description
  • FIG. 1 is a schematic structural diagram of an electrostatic protection circuit according to Embodiment 1 of the present invention, such as As shown in FIG. 1, the electrostatic protection circuit includes: a first switch tube T1, a second switch tube ⁇ 2, a third switch tube ⁇ 3, a fourth switch tube ⁇ 4, and a fifth switch tube ;5; a gate of the first switch tube T1 and The first pole is respectively connected to the first signal line, the second pole of the first switching transistor T1 is connected to the second signal line; the gate and the first pole of the second switching transistor ⁇ 2 are respectively connected to the first signal line, and the second switch
  • the second pole of the tube 2 is connected to the gate of the fourth switch tube 4; the gate and the first pole of the third switch tube 3 are respectively connected to the third signal line, and the second pole and the fourth switch of the third switch tube 3
  • the gate of the fourth switch tube 4 is connected to the second pole of the second switch tube 2 and the second pole of the third switch tube 3, and the first pole and the third pole of the fourth switch tube 4 The
  • the electrostatic protection circuit is configured to perform electrostatic protection between the first, second, and third signal lines, and thus the first, second, and third A strip signal line is not included in the electrostatic protection circuit.
  • the first, second, and third signal lines may be any conductive wiring on the array substrate, and the electrostatic protection circuit may be disposed between adjacent signal lines or between adjacent lines.
  • the first signal line and the second signal line are adjacent to each other as an example.
  • the first signal line and the second signal line are both scan lines or the first signal line and the second signal line are both data lines
  • the third signal line is taken as an example.
  • the common electrode line or the short-circuit ring is described as an example, which is merely an exemplary embodiment and is not intended to limit the scope of the present invention.
  • the first signal line and the second signal line are any two adjacent data lines or any two scan lines
  • the third signal line is a common electrode line or a short circuit.
  • the scan line is a gate line.
  • the tube T3, the fourth switch tube ⁇ 4, and the fifth switch tube ⁇ 5 may be, for example, a thin film transistor, or another type of switch tube having a gate switch function; when the gate of the thin film transistor is turned on, the first pole thereof The second pole is electrically connected.
  • the electrostatic voltage of the first pole of the thin film transistor is high, the electrostatic discharge current flows from the first pole to the second pole; when the electrostatic voltage of the second pole of the thin film transistor is high, the electrostatic discharge current flows from the second pole to the first pole.
  • the switching tube (for example, a thin film transistor) of the above working principle is applied to the electrostatic protection circuit of the embodiment to make the static electricity shielding more flexible and effective, and is not limited by the current flow direction.
  • FIG. 2 is a schematic diagram of an operating state of the electrostatic protection circuit of FIG. 1.
  • an electrostatic charge is accumulated on the first signal line to form an electrostatic voltage
  • an electrostatic voltage formed on the first signal line reaches an on-voltage
  • the first switch tube T1 is turned on to conduct the electrostatic charge on the first signal line to the second signal line
  • the second switch tube ⁇ 2 and the fourth switch tube ⁇ 4 are turned on to conduct the electrostatic charge on the first signal line to the first Three signal lines.
  • FIG. 3 is a schematic diagram of another working state of the electrostatic protection circuit of FIG. 1. As shown in FIG. 3, an electrostatic charge is accumulated on the second signal line to form an electrostatic voltage, and an electrostatic voltage formed on the second signal line reaches an on-voltage. When the fifth switch transistor 5 is turned on to conduct the electrostatic charge on the second signal line to the first signal line, the second switch transistor 2 and the fourth switch transistor 4 are turned on to conduct the electrostatic charge on the second signal line to The third signal line.
  • FIG. 4 is a schematic diagram of another working state of the electrostatic protection circuit of FIG. 1.
  • the electrostatic charge accumulates on the third signal line to form an electrostatic voltage
  • the electrostatic voltage formed on the third signal line reaches the turn-on voltage.
  • the third switch tube 3 and the fourth switch tube 4 are opened to conduct the electrostatic charge on the third signal line to the first signal line
  • the second switch tube 2 is opened to conduct the electrostatic charge on the third signal line to the first A signal line.
  • the electrostatic charge accumulated on the third signal line is conducted to the first signal line. If the voltage on the first signal line is still 4 ⁇ at this time, the electrostatic charge on the first signal line can also be conducted to the second signal line through T1.
  • the electrostatic protection circuit provided in this embodiment passes the first switch tube T1 and the second switch tube.
  • the third switch tube ⁇ 3, the fourth switch tube ⁇ 4 and the fifth switch tube ⁇ 5 are connected by the above circuit structure between the first signal line, the second signal line and the third signal line, and accumulate on any one of the signal lines
  • the electrostatic charge circuit can conduct the electrostatic charge on the line to the other two signal lines, so that the electrostatic charge can be derived from multiple directions, thereby more effectively protecting the display.
  • the electrostatic protection circuit shown in this embodiment can work normally even if any of the switching tubes fails. In general, the probability of a short-circuit fault occurring in practice is very small, so the exemplary embodiment below is directed to the case where an open-circuit fault occurs in the switch tube.
  • FIG. 5 is an equivalent circuit diagram of the first switch tube T1 in FIG. 1 when the fault occurs.
  • the electrostatic charge accumulates on the first signal line to form an electrostatic voltage.
  • the second switch tube T2 and the fourth switch tube T4 are turned on to make the first
  • the electrostatic charge on the signal line is conducted to the third signal line. More specifically, the second switch transistor T2 and the fourth switch transistor T4 are sequentially turned on to conduct electrostatic charges on the first signal line to the third signal.
  • Fig. 6 is another equivalent circuit diagram of the first switch tube T1 in Fig. 1 when it fails.
  • the electrostatic charge accumulates on the second signal line to form an electrostatic voltage.
  • the fifth switch T5 is turned on to make the electrostatic charge on the second signal line. Conducted to the first signal line, the second switching transistor T2 and the fourth switching transistor T4 are turned on to conduct electrostatic charges on the second signal line to the third signal line. More specifically, the fifth switch tube T5 is turned on to conduct the electrostatic charge on the second signal line to the first signal line, and then the second switch tube T2 and the fourth switch tube T4 are turned on, and the second signal line is turned on. The electrostatic charge is conducted to the third signal line.
  • Fig. 7 is another equivalent circuit diagram of the first switch tube T1 in Fig. 1 when it fails. As shown
  • the electrostatic charge accumulates on the third signal line to form an electrostatic voltage
  • the third switch tube T3 and the fourth switch tube T4 are turned on to make the third signal line
  • the electrostatic charge on it is conducted to the first signal line. More specifically, the third switching transistor T3 and the fourth switching transistor T4 are sequentially turned on to conduct the electrostatic charge on the third signal line to the first signal.
  • FIG. 8 is an equivalent circuit diagram of the second switch tube T2 in FIG. 1 when the fault occurs. As shown in FIG. 8, if an electrostatic charge is accumulated on the first signal line to form an electrostatic voltage, when the electrostatic voltage formed on the first signal line reaches the turn-on voltage, the first switch transistor T1 is turned on to make the static electricity on the first signal line. The charge is conducted to the second signal line.
  • FIG. 9 is another equivalent circuit diagram when the second switch tube T2 in FIG. 1 fails. As shown in FIG.
  • the electrostatic charge accumulates on the third signal line to form an electrostatic voltage, and when the electrostatic voltage formed on the third signal line reaches the turn-on voltage, the third switch transistor T3 and the fourth switch transistor T4 are turned on to make the third
  • the electrostatic charge on the signal line is conducted to the first signal line, and the first switching transistor T1 is turned on to conduct the electrostatic charge on the third signal line to the second signal line. More specifically, the third switch tube T3 and the fourth switch tube T4 are sequentially turned on to conduct the electrostatic charge on the third signal line to the first signal, and then the first switch tube T1 is turned on, and the third signal line is turned on.
  • the electrostatic charge is conducted to the second signal line.
  • FIG. 10 is an equivalent circuit diagram of the third switch tube T3 in Figure 1 when it fails.
  • the electrostatic charge accumulates on the first signal line to form an electrostatic voltage.
  • the first switch T1 is turned on to make the electrostatic charge on the first signal line.
  • the second switching transistor T2 and the fourth switching transistor T4 are turned on to conduct electrostatic charges on the first signal line to the third signal line.
  • the first switch tube T1 is turned on to conduct the electrostatic charge on the first signal line to the second signal line, and at the same time, the second switch tube T2 and the fourth switch tube T4 are sequentially turned on, and will be first The electrostatic charge on the signal line is conducted to the third signal line.
  • FIG. 11 is another equivalent circuit diagram of the third switch tube T3 in Figure 1.
  • the electrostatic charge is accumulated on the second signal line to form an electrostatic voltage.
  • the fifth switch T5 is turned on to make the electrostatic charge on the second signal line.
  • the second switching transistor T2 and the fourth switching transistor T4 are turned on to conduct electrostatic charges on the second signal line to the third signal line.
  • the fifth switch tube T5 is turned on to conduct the electrostatic charge on the second signal line to the first signal line, and then the electrostatic charge conducted to the first signal line causes the second switch tube T2 and the fourth switch
  • the switch tube T4 is turned on to conduct the electrostatic charge on the second signal line to the third signal line.
  • Figure 12 is an equivalent circuit diagram of the fourth switch tube T4 in Figure 1 when it fails. As shown in FIG. 12, if the electrostatic charge accumulates on the first signal line to form an electrostatic voltage, when the electrostatic voltage formed on the first signal line reaches the turn-on voltage, the first switch transistor T1 is turned on to make the static electricity on the first signal line. The charge is conducted to the second signal line.
  • the fifth switch transistor T5 is turned on to make the second signal line The electrostatic charge on it is conducted to the first signal line.
  • Figure 13 is an equivalent circuit diagram of the fifth switch tube T5 in Figure 1 when it fails.
  • the electrostatic charge is accumulated on the first signal line to form an electrostatic voltage.
  • the first switch T1 is turned on to make the electrostatic charge on the first signal line.
  • the second switching transistor T2 and the fourth switching transistor T4 are turned on to conduct electrostatic charges on the first signal line to the third signal line.
  • the first switch tube T1 is turned on to conduct the electrostatic charge on the first signal line to the second signal line, and at the same time, the second switch tube T2 and the fourth switch tube T4 are turned on, and the first signal is The electrostatic charge on the line is conducted to the third signal line.
  • Fig. 14 is another equivalent circuit diagram of the fifth switch tube T5 in Fig. 1 when it fails. As shown
  • the electrostatic charge accumulates on the third signal line to form an electrostatic voltage, and when the electrostatic voltage formed on the third signal line reaches the turn-on voltage, the third switch tube T3 and the fourth switch tube T4 are turned on to make the third signal line The electrostatic charge on it is conducted to the first signal line. More specifically, the third switching transistor T3 and the fourth switching transistor T4 are sequentially turned on to conduct the electrostatic charge on the third signal line to the first signal line.
  • the remaining circuit portion of the switching tube can also normally conduct the electrostatic charge on the signal line to avoid display.
  • the panel is damaged by static electricity.
  • the electrostatic protection circuit connects the first switching tube, the second switching tube, the third switching tube, the fourth switching tube and the fifth switching tube to the first signal line with a certain circuit structure, the second Between the signal line and the third signal line, when the electrostatic voltage accumulated on any one of the signal lines reaches the turn-on voltage, the electrostatic charge on the line can be passed to the other one or two signal lines through the electrostatic protection circuit.
  • the grooming is performed so that the electrostatic discharge can be derived in multiple directions, and the working device in the display area is more effectively protected.
  • the remaining circuit of the switch tube can also properly conduct the electrostatic charge on the signal line, thereby preventing the display panel from being damaged by static electricity.
  • a second embodiment of the present invention provides a display device, which includes the electrostatic protection circuit provided in the first embodiment.
  • the display device is an LCD display device or an LED display device or the like.
  • the electrostatic protection circuit is disposed on an array substrate of the LCD.
  • the electrostatic protection circuit is disposed between any two data lines (or scan lines) disposed adjacent to the display device and the common electrode line (or short circuit ring).
  • the display device provided in this embodiment is connected between any two scanning lines (or data lines) and the common electrode line (or short-circuit ring) disposed adjacent to the display device through an electrostatic protection circuit, when any one of the scanning lines
  • the electrostatic charge can be used to guide the electrostatic charge on the line to the other two lines, so that the electrostatic discharge can be derived in multiple directions, and the pixel area can be more effectively protected.
  • the remaining switching circuit portion can also normally conduct the electrostatic charge on the signal line, and since the scanning line is periodically scanned, Each of the scan lines can serve as both the first scan line and the second scan line, thereby more effectively achieving electrostatic discharge on the scan line. This prevents the display panel from being damaged by static electricity.
  • the third embodiment of the present invention provides an electrostatic protection method for electrostatically protecting a first signal line, a second signal line, and a third signal line.
  • the static protection method includes:
  • the first signal line and the second signal line are adjacently disposed; wherein the first signal line and the second signal line are both scan lines, or the first signal line and the second signal line are data
  • the third signal line is a common electrode line or a shorting ring.
  • the electrostatic protection method can multi-directionally discharge static electricity, and even if one of the above-mentioned electrostatic protection circuits has a failure of the switching tube, the method can smoothly discharge the static electricity accumulation.
  • the above electrostatic protection method can be electrostatically protected by the circuit provided by any of the above electrostatic protection circuit embodiments, and the technical problem to be solved by the present invention can be solved as well.
  • the electrostatic protection method provided in this embodiment is connected between any two scan lines (or data lines) and the common electrode line (or short circuit ring) disposed adjacent to the display device through an electrostatic protection circuit, and any one of the scan lines
  • the electrostatic charge can be used to guide the electrostatic charge on the line to another line or two lines, so that the electrostatic discharge can be derived in multiple directions, and the pixel can be more effectively protected. region.
  • the remaining circuit of the switch circuit can also normally conduct the electrostatic charge on the signal line, and since the scan line is periodically scanned, Each of the scan lines can serve as both the first scan line and the second scan line, thereby more effectively achieving electrostatic discharge on the scan line. This prevents the display panel from being damaged by static electricity.

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Abstract

一种静电保护电路,显示装置和静电保护方法。静电保护电路包括第一开关管、第二开关管、第三开关管、第四开关管和第五开关管;第一开关管的栅极和第一极分别与第一信号线连接,第一开关管的第二极与第二信号线连接;第二开关管的栅极和第一极分别与第一信号线连接,第二开关管的第二极与第四开关管的栅极连接;第三开关管的栅极和第一极分别与第三信号线连接,第三开关管的第二极与第四开关管的栅极连接;第四开关管的第一极与第三信号线连接,第四开关管的第二极分别与第五开关管的第二极以及第二开关管的栅极连接;第五开关管的栅极和第一极分别与第二信号线连接,从而有效疏导静电。

Description

静电保护电路、 显示装置和静电保护方法 技术领域
本发明的实施例涉及一种静电保护电路、 显示装置和静电保护方 法。 背景技术
液晶显示器是目前最常用的平板显示器, 其中薄膜晶体管液晶显示器 ( Thin Film Transistor Liquid Crystal Display, 筒称: TFT-LCD )是液晶显示 器中的主流产品。
在 TFT-LCD制造行业, 静电问题直接影响生产的液晶显示面板的 良品率。 由于静电产生的方式多种多样, 所以在 TFT-LCD的制造过程 中, 很多工艺过程会产生高电压静电荷。 例如, 在进行摩擦工艺时, 摩 擦布和 TFT-LCD的显示面板之间发生的摩擦会产生高压静电。 由于高 压静电电荷很可能击穿控制像素驱动的薄膜晶体管, 导致像素驱动失 效, 使得液晶显示面板的品质低劣, 所以就要求在 TFT-LCD制造的过 程中, 及时有效地将高压静电释放或者均衡, 即要设计静电保护电路对 显示面板进行保护。
现有的静电保护电路通常是设计在栅线 /数据线 (Gate line/data line)与公共电极线 /短路环 ( Common line/ short ring)之间的, 电路设计 比较单一, 导致产生的静电不能有效的释放, 从而无法保护显示区域内 的工作器件。 发明内容
本发明的实施例提供一种静电保护电路, 显示装置和静电保护方 法, 用于有效疏导静电电荷, 从而保护显示区域内的工作器件。
本发明的一个实施例提供了一种静电保护电路, 包括第一开关管、 第二开关管、 第三开关管、 第四开关管和第五开关管;
所述第一开关管的栅极和第一极分别与第一信号线连接,所述第一 开关管的第二极与第二信号线连接; 所述第二开关管的栅极和第一极分别与所述第一信号线连接,所述 第二开关管的第二极与所述第四开关管的栅极连接;
所述第三开关管的栅极和第一极分别与第三信号线连接,所述第三 开关管的第二极与所述第四开关管的栅极连接;
所述第四开关管的栅极分别与所述第二开关管的第二极和所述第 三开关管的第二极连接,所述第四开关管的第一极与所述第三信号线连 接,所述第四开关管的第二极分别与第五开关管的第二极以及所述第二 开关管的栅极连接;
所述第五开关管的栅极和第一极分别与所述第二信号线连接,所述 第五开关管的第二极分别与所述第四开关管的第二极和所述第二开关 管的栅极连接。进一步地,所述第一信号线和所述第二信号线相邻设置; 并且
所述第一信号线和所述第二信号线均为扫描线,或者所述第一信号 线和所述第二信号线均为数据线。
进一步地, 例如, 所述第三信号线可以为公共电极线和短路环中的 一个。
进一步地, 例如, 当所述第一信号线上形成的静电电压达到开启电 压时,所述第一开关管可以打开以使所述第一信号线上的静电电荷传导 至所述第二信号线上,所述第二开关管和所述第四开关管可以打开以使 所述第一信号线上的静电电荷传导至所述第三信号线上;
当所述第二信号线上形成的静电电压达到开启电压时,所述第五开 关管可以打开以使所述第二信号线上的静电电荷传导至所述第一信号 线上,所述第二开关管和所述第四开关管可以打开以使所述第二信号线 上的静电电荷传导至所述第三信号线上; 并且
当所述第三信号线上形成的静电电压达到开启电压时,所述第三开 关管和所述第四开关管可以打开以使所述第三信号线上的静电电荷传 导至所述第一信号线上,所述第二开关管可以打开以使所述第三信号线 上的静电电荷传导至所述第一信号线上。
进一步地, 在所述第一开关管故障的情况下,
当所述第一信号线上形成的静电电压达到开启电压时,所述第二开 关管和所述第四开关管打开以使所述第一信号线上的静电电荷传导至 所述第三信号线上;
当所述第二信号线上形成的静电电压达到开启电压时,所述第五开 关管打开以使所述第二信号线上的静电电荷传导至所述第一信号线上, 所述第二开关管和所述第四开关管打开以使所述第二信号线上的静电 电荷传导至所述第三信号线上;
当所述第三信号线上形成的静电电压达到开启电压时,所述第三开 关管和所述第四开关管打开以使所述第三信号线上的静电电荷传导至 所述第一信号线上。
进一步地, 在所述第二开关管故障的情况下,
当所述第一信号线上形成的静电电压达到开启电压时,所述第一开 关管打开以使所述第一信号线上的静电电荷传导至所述第二信号线上; 当所述第二信号线上形成的静电电压达到开启电压时,所述第五开 关管打开以使所述第二信号线上的静电电荷传导至所述第一信号线上; 当所述第三信号线上形成的静电电压达到开启电压时,所述第三开 关管和所述第四开关管打开以使所述第三信号线上的静电电荷传导至 所述第一信号线上,所述第一开关管打开以使所述第三信号线上的静电 电荷传导至所述第二信号线上。
进一步地, 在所述第三开关管故障的情况下,
当所述第一信号线上形成的静电电压达到开启电压时,所述第一开 关管打开以使所述第一信号线上的静电电荷传导至所述第二信号线上, 所述第二开关管和所述第四开关管打开以使所述第一信号线上的静电 电荷传导至所述第三信号线上;
当所述第二信号线上形成的静电电压达到开启电压时,所述第五开 关管打开以使所述第二信号线上的静电电荷传导至所述第一信号线上, 所述第二开关管和所述第四开关管打开以使所述第二信号线上的静电 电荷传导至所述第三信号线上。
进一步地, 在所述第四开关管故障的情况下;
当所述第一信号线上形成的静电电压达到开启电压时,所述第一开 关管打开以使所述第一信号线上的静电电荷传导至所述第二信号线上; 当所述第二信号线上形成的静电电压达到开启电压时,所述第五开 关管打开以使所述第二信号线上的静电电荷传导至所述第一信号线上。
进一步地, 在所述第五开关管故障的情况下;
当所述第一信号线上形成的静电电压达到开启电压时,所述第一开 关管打开以使所述第一信号线上的静电电荷传导至所述第二信号线上, 所述第二开关管和所述第四开关管打开以使所述第一信号线上的静电 电荷传导至所述第三信号线上;
当所述第三信号线上形成的静电电压达到开启电压时,所述第三开 关管和所述第四开关管打开以使所述第三信号线上的静电电荷传导至 所述第一信号线上。
为实现上述目的, 本发明的实施例还提供了一种显示装置, 包括上 述静电保护电路。
本发明的实施例还提供了一种静电保护方法, 用于对第一信号线、 第二信号线和第三信号线进行静电保护, 所述静电保护方法包括:
将所述第一开关管的栅极和第一极分别与第一信号线进行连接,将 所述第一开关管的第二极与第二信号线进行连接;
将所述第二开关管的栅极和第一极分别与所述第一信号线进行连 接, 将所述第二开关管的第二极与所述第四开关管的栅极进行连接; 将所述第三开关管的栅极和第一极分别与第三信号线进行连接,将 所述第三开关管的第二极与所述第四开关管的栅极进行连接;
将所述第四开关管的栅极分别与所述第二开关管的第二极和所述 第三开关管的第二极进行连接,将所述第四开关管的第一极与所述第三 信号线进行连接,将所述第四开关管的第二极分别与第五开关管的第二 极以及所述第二开关管的栅极进行连接;
将所述第五开关管的栅极和第一极分别与所述第二信号线进行连 接,将所述第五开关管的第二极分别与所述第四开关管的第二极和所述 第二开关管的栅极进行连接。
进一步地,所述的静电保护方法将所述第一信号线和所述第二信号 线进行相邻设置;
所述第一信号线和所述第二信号线均为扫描线,或者所述第一信号 线和所述第二信号线均为数据线。
进一步地, 所述第三信号线为公共电极线或短路环。 附图说明
为了更清楚地说明本发明实施例的技术方案, 下面将对实施例的附图作 筒单地介绍,显而易见地,下面描述中的附图仅仅涉及本发明的一些实施例, 而非对本发明的限制。
图 1为本发明实施例一提供的一种静电保护电路的结构示意图; 图 2为图 1中静电保护电路的一种工作状态的示意图;
图 3为图 1中静电保护电路的另一种工作状态的示意图;
图 4为图 1中静电保护电路的再另一种工作状态的示意图; 图 5为图 1中第一开关管故障时的一种等效电路图;
图 6为图 1中第一开关管故障时的另一种等效电路图;
图 7为图 1中第一开关管故障时的再另一种等效电路图;
图 8为图 1中第二开关管故障时的一种等效电路图;
图 9为图 1中第二开关管故障时的另一种等效电路图;
图 10为图 1中第三开关管故障时的一种等效电路图;
图 11为图 1中第三开关管故障时的另一种等效电路图;
图 12为图 1中第四开关管故障时的一种等效电路图;
图 13为图 1中第五开关管故障时的一种等效电路图; 和
图 14为图 1中第五开关管故障时的另一种等效电路图。 具体实施方式
为使本发明实施例的目的、 技术方案和优点更加清楚, 下面将结合本发 明实施例的附图, 对本发明实施例提供的静电保护电路、 显示装置和静电保 护方法进行清楚、 完整地描述。 显然, 所描述的实施例是本发明的一部分实 施例, 而不是全部的实施例。 基于所描述的本发明的实施例, 本领域普通技 术人员在无需创造性劳动的前提下所获得的所有其他实施例,都属于本发明 保护的范围。
图 1为本发明实施例一提供的一种静电保护电路的结构示意图,如 图 1所示, 该静电保护电路包括: 第一开关管 Tl、 第二开关管 Τ2、 第 三开关管 Τ3、 第四开关管 Τ4和第五开关管 Τ5 ; 第一开关管 T1的栅极 和第一极分别与第一信号线连接, 第一开关管 T1的第二极与第二信号 线连接; 第二开关管 Τ2的栅极和第一极分别与第一信号线连接, 第二 开关管 Τ2的第二极与第四开关管 Τ4的栅极连接; 第三开关管 Τ3的栅 极和第一极分别与第三信号线连接, 第三开关管 Τ3的第二极与第四开 关管 Τ4的栅极连接; 第四开关管 Τ4的栅极分别与第二开关管 Τ2的第 二极和第三开关管 Τ3 的第二极连接, 第四开关管 Τ4的第一极与第三 信号线连接, 第四开关管 Τ4的第二极分别与第五开关管 Τ5 的第二极 以及第二开关管 Τ2的栅极连接; 第五开关管 Τ5 的栅极和第一极分别 与第二信号线连接, 第五开关管 Τ5 的第二极分别与第四开关管 Τ4的 第二极和第二开关管 Τ2的栅极连接。
在本申请的本实施例中, 所述静电保护电路是用于在所述第一、 第 二、 第三条信号线之间发挥静电保护的作用, 因此所述第一、 第二、 第 三条信号线不包括在所述静电保护电路中。
所述第一、第二、第三条信号线可以是阵列基板上的任意导电布线, 所述静电保护电路可以设置在相邻的信号线之间,也可以设置在不 相邻的线之间,本实施例中以第一信号线和第二信号线为相邻设置为例 进行介绍。
在本申请的实施例中,以第一信号线和第二信号线均为扫描线或者 第一信号线和第二信号线均为数据线这两种情况为例,并且以第三信号 线为公共电极线或短路环为例进行说明, 此仅为示例性实施方式, 并非 对本发明保护范围的限制。 其中, 第一信号线和第二信号线为相邻设置 的任意两根数据线或任意两根扫描线,第三信号线为公共电极线或短路 环。 当第一信号线和第二信号线为相邻设置的任意两根扫描线时, 由于 扫描线可以是周期性扫描,所以每根扫描线可以同时充当第一扫描线和 第二扫描线, 从而更加有效地实现扫描线上的静电放电。 其中所述扫描 线为栅线。
另外, 在本实施例中, 第一开关管 Tl、 第二开关管 Τ2、 第三开关 管 T3、 第四开关管 Τ4和第五开关管 Τ5例如可以为薄膜晶体管, 也可 以选择具有选通开关功能的其他类型的开关管; 当薄膜晶体管的栅极导 通时, 其第一极和第二极之间导通。 当薄膜晶体管的第一极的静电电压 高时, 静电放电电流从第一极流向第二极; 当薄膜晶体管的第二极的静 电电压高时, 静电放电电流从第二极流向第一极。 上述工作原理的开关 管(例如, 薄膜晶体管)应用在本实施例的静电保护电路中会使其对静 电的疏导更加灵活有效, 不受电流流向的限制。
图 2为图 1中静电保护电路的一种工作状态的示意图,如图 2所示, 静电电荷在第一信号线上累积形成静电电压,当第一信号线上形成的静 电电压达到开启电压时, 第一开关管 T1打开以使第一信号线上的静电 电荷传导至第二信号线上, 第二开关管 Τ2和第四开关管 Τ4打开以使 第一信号线上的静电电荷传导至第三信号线上。
图 3 为图 1 中静电保护电路的另一种工作状态的示意图, 如图 3 所示, 静电电荷在第二信号线上累积形成静电电压, 当第二信号线上形 成的静电电压达到开启电压时, 第五开关管 Τ5打开以使第二信号线上 的静电电荷传导至第一信号线上, 第二开关管 Τ2和第四开关管 Τ4打 开以使第二信号线上的静电电荷传导至第三信号线上。
图 4 为图 1 中静电保护电路的另一种工作状态的示意图, 如图 4 所示, 静电电荷在第三信号线上累积形成静电电压, 第三信号线上形成 的静电电压达到开启电压时, 第三开关管 Τ3和第四开关管 Τ4打开以 使第三信号线上的静电电荷传导至第一信号线上, 第二开关管 Τ2打开 以使第三信号线上的静电电荷传导至第一信号线上。 由此, 将第三信号 线上积累的静电电荷向第一信号线疏导。 如果此时第一信号线上的电压 仍然 4艮大, 第一信号线上的静电电荷也可以通过 T1传导至第二信号线上。
本实施例提供的静电保护电路通过将第一开关管 Tl、 第二开关管
Τ2、 第三开关管 Τ3、 第四开关管 Τ4和第五开关管 Τ5以上述电路结构 连接在第一信号线, 第二信号线和第三信号线之间, 当其中任一信号线 上积累的静电电压达到开启电压时,都可以通过所述静电保护电路将该 线上的静电电荷向另外两条信号线上进行疏导,从而使静电电荷可以从 多方向疏导出去, 从而更加有效地保护显示区域内的工作器件。 本实施例所示出的静电保护电路即使在任一开关管出现故障的情 况下也可以正常工作。 一般来说, 在实际中发生短路故障的几率非常小, 因此下文中的示例性实施例针对的是开关管发生开路故障的情况。
图 5为图 1中第一开关管 T1故障时的一种等效电路图。 如图 5所 示, 静电电荷在第一信号线上累积形成静电电压, 当第一信号线上形成 的静电电压达到开启电压时, 第二开关管 T2和第四开关管 T4打开以 使第一信号线上的静电电荷传导至第三信号线上。 更具体来说, 第二开 关管 T2和第四开关管 T4依次打开, 将第一信号线上的静电电荷传导 至第三信号上。
图 6为图 1 中第一开关管 T1故障时的另一种等效电路图。 如图 6 所示, 静电电荷在第二信号线上累积形成静电电压, 当第二信号线上形 成的静电电压达到开启电压时, 第五开关管 T5打开以使第二信号线上 的静电电荷传导至第一信号线上, 第二开关管 T2和第四开关管 T4打 开以使第二信号线上的静电电荷传导至第三信号线上。 更具体来说, 第 五开关管 T5打开, 将第二信号线上的静电电荷传导至第一信号线上, 然后, 第二开关管 T2和第四开关管 T4打开, 将第二信号线上的静电 电荷传导至第三信号线上。
图 7为图 1中第一开关管 T1故障时的再另一种等效电路图。 如图
7所示, 静电电荷在第三信号线上累积形成静电电压, 当第三信号线上 形成的静电电压达到开启电压时, 第三开关管 T3和第四开关管 T4打 开以使第三信号线上的静电电荷传导至第一信号线上。 更具体来说, 第 三开关管 T3和第四开关管 T4依次打开, 将第三信号线上的静电电荷 传导至第一信号上。
图 8为图 1中第二开关管 T2故障时的一种等效电路图。 如图 8所 示, 如果静电电荷在第一信号线上累积形成静电电压, 当第一信号线上 形成的静电电压达到开启电压时, 第一开关管 T1打开以使第一信号线 上的静电电荷传导至第二信号线上。
如果静电电荷在第二信号线上累积形成静电电压,当第二信号线上 形成的静电电压达到开启电压时, 第五开关管 T5打开以使第二信号线 上的静电电荷传导至第一信号线上。 图 9为图 1 中第二开关管 T2故障时的另一种等效电路图。 如图 9 所示, 静电电荷在第三信号线上累积形成静电电压, 当第三信号线上形 成的静电电压达到开启电压时, 第三开关管 T3和第四开关管 T4打开 以使第三信号线上的静电电荷传导至第一信号线上, 第一开关管 T1打 开以使第三信号线上的静电电荷传导至第二信号线上。 更具体来说, 第 三开关管 T3和第四开关管 T4依次打开, 将第三信号线上的静电电荷 传导至第一信号上, 随即第一开关管 T1打开, 将第三信号线上的静电 电荷传导至第二信号线上。
图 10为图 1 中第三开关管 T3故障时的一种等效电路图。 如图 10 所示, 静电电荷在第一信号线上累积形成静电电压, 当第一信号线上形 成的静电电压达到开启电压时, 第一开关管 T1打开以使第一信号线上 的静电电荷传导至第二信号线上, 第二开关管 T2和第四开关管 T4打 开以使第一信号线上的静电电荷传导至第三信号线上。 更具体来说, 第 一开关管 T1打开, 将第一信号线上的静电电荷传导至第二信号线上, 与此同时, 第二开关管 T2和第四开关管 T4依次打开, 将第一信号线 上的静电电荷传导至第三信号线上。
图 11 为图 1 中第三开关管 T3故障时的另一种等效电路图。 如图 11 所示, 静电电荷在第二信号线上累积形成静电电压, 当第二信号线 上形成的静电电压达到开启电压时, 第五开关管 T5打开以使第二信号 线上的静电电荷传导至第一信号线上,第二开关管 T2和第四开关管 T4 打开以使第二信号线上的静电电荷传导至第三信号线上。 更具体来说, 第五开关管 T5打开,将第二信号线上的静电电荷传导至第一信号线上, 随即传导至第一信号线上的静电电荷会使第二开关管 T2和第四开关管 T4打开, 将第二信号线上的静电电荷传导至第三信号线上。
图 12为图 1 中第四开关管 T4故障时的一种等效电路图。 如图 12 所示, 如果静电电荷在第一信号线上累积形成静电电压, 当第一信号线 上形成的静电电压达到开启电压时, 第一开关管 T1打开以使第一信号 线上的静电电荷传导至第二信号线上。
如果静电电荷在第二信号线上累积形成静电电压,当第二信号线上 形成的静电电压达到开启电压时, 第五开关管 T5打开以使第二信号线 上的静电电荷传导至第一信号线上。
图 13为图 1 中第五开关管 T5故障时的一种等效电路图。 如图 13 所示, 静电电荷在第一信号线上累积形成静电电压, 当第一信号线上形 成的静电电压达到开启电压时, 第一开关管 T1打开以使第一信号线上 的静电电荷传导至第二信号线上, 第二开关管 T2和第四开关管 T4打 开以使第一信号线上的静电电荷传导至第三信号线上。 更具体来说, 第 一开关管 T1打开, 将第一信号线上的静电电荷传导至第二信号线上, 与此同时, 第二开关管 T2和第四开关管 T4打开, 将第一信号线上的 静电电荷传导至第三信号线上。
图 14为图 1 中第五开关管 T5故障时的另一种等效电路图。 如图
14 所示, 静电电荷在第三信号线上累积形成静电电压, 当第三信号线 上形成的静电电压达到开启电压时, 第三开关管 T3 和第四开关管 T4 打开以使第三信号线上的静电电荷传导至第一信号线上。 更具体来说, 第三开关管 T3和第四开关管 T4依次打开, 将第三信号线上的静电电 荷传导至第一信号线上。
本实施例提供的静电保护电路的技术方案中,当静电保护电路中的 任一个开关管故障时,其剩余的开关管电路部分也可以对上述信号线上 的静电电荷进行正常疏导, 从而避免显示面板因静电而受到损坏。
本发明的实施例提供的静电保护电路通过将第一开关管、第二开关 管、 第三开关管、 第四开关管和第五开关管以一定的电路结构连接在第 一信号线, 第二信号线和第三信号线之间, 当其中任一信号线上积累的 静电电压达到开启电压时,都可以通过所述静电保护电路将该线上的静 电电荷向另外一条或两条信号线上进行疏导,从而使静电放电可以被多 方向疏导出去, 更加有效地保护显示区域内的工作器件。 同时, 当静电 保护电路中的任一个开关管故障时,其剩余的开关管电路部分也可以对 上述信号线上的静电电荷进行正常疏导,从而避免显示面板因静电而受 到损坏。
本发明实施例二提供了一种显示装置,该显示装置包括上述实施例 一提供的静电保护电路。
显示装置为 LCD显示装置或者 LED显示装置等等。 当显示装置为 LCD显示装置时, 所述静电保护电路设置在 LCD的阵列基板上。
静电保护电路设置在显示装置上相邻设置的任意两根数据线(或者 扫描线) 与公共电极线 (或短路环) 之间。
本实施例提供的显示装置通过静电保护电路连接在该显示装置上 相邻设置的任意两根扫描线 (或者数据线) 与公共电极线 (或短路环) 之间, 当其中任一扫描线上积累的静电电压达到开启电压时, 都可以通 过静电保护电路将该线上的静电电荷向另外两条线上进行疏导,从而使 静电放电可以被多方向疏导出去, 更加有效地保护像素区域。 同时, 当 所述静电保护电路中的任一个开关管故障时,其剩余的开关管电路部分 也可以对上述信号线上的静电电荷进行正常疏导, 另外, 由于扫描线是 周期性扫描的, 所以每根扫描线可以同时充当第一扫描线和第二扫描 线, 从而更加有效地实现扫描线上的静电放电。 从而避免显示面板因静 电而受到损坏。
本发明实施例三提供了一种静电保护方法, 用于对第一信号线、 第 二信号线和第三信号线进行静电保护, 该静电保护方法包括:
将第一开关管的栅极和第一极分别与第一信号线进行连接,将第一 开关管的第二极与第二信号线进行连接;
将第二开关管的栅极和第一极分别与所述第一信号线进行连接,将 第二开关管的第二极与第四开关管的栅极进行连接;
将第三开关管的栅极和第一极分别与第三信号线进行连接,将第三 开关管的第二极与第四开关管的栅极进行连接;
将第四开关管的栅极分别与第二开关管的第二极和第三开关管的 第二极进行连接, 将第四开关管的第一极与第三信号线进行连接, 将第 四开关管的第二极分别与第五开关管的第二极以及第二开关管的栅极 进行连接;
将第五开关管的栅极和第一极分别与第二信号线进行连接,将第五 开关管的第二极分别与第四开关管的第二极和第二开关管的栅极进行 连接。
可选地, 将第一信号线和第二信号线进行相邻设置; 其中, 第一信 号线和第二信号线均为扫描线,或者第一信号线和第二信号线均为数据 线; 第三信号线为公共电极线或短路环。
该静电保护方法可多向疏导静电,即使上述静电保护电路中有某个 开关管故障, 该方法也能将静电累积顺利疏导出去。
上述静电保护方法可以采用上述的任一静电保护电路实施例所提 供的电路进行静电保护, 同样能够解决本发明所要解决的技术问题。
本实施例提供的静电保护方法通过静电保护电路连接在该显示装 置上相邻设置的任意两根扫描线(或者数据线)与公共电极线(或短路 环)之间, 当其中任一扫描线上积累的静电电压达到开启电压时, 都可 以通过静电保护电路将该线上的静电电荷向另外一条或两条线上进行 疏导, 从而使静电放电可以被多方向疏导出去, 更加有效地保护像素区 域。 同时, 当所述静电保护电路中的任一个开关管故障时, 其剩余的开 关管电路部分也可以对上述信号线上的静电电荷进行正常疏导, 另外, 由于扫描线是周期性扫描的,所以每根扫描线可以同时充当第一扫描线 和第二扫描线, 从而更加有效地实现扫描线上的静电放电。 从而避免显 示面板因静电而受到损坏。
可以理解的是, 以上实施方式仅仅是为了说明本发明的原理而采用的示 例性实施方式, 然而本发明并不局限于此。 对于本领域内的普通技术人员而 言, 在不脱离本发明的精神和实质的情况下, 可以做出各种变型和改进, 这 些变型和改进也视为本发明的保护范围。

Claims

权利要求书
1.一种静电保护电路, 包括: 第一开关管、 第二开关管、 第三开关 管、 第四开关管和第五开关管;
所述第一开关管的栅极和第一极分别与第一信号线连接,所述第一 开关管的第二极与第二信号线连接;
所述第二开关管的栅极和第一极分别与所述第一信号线连接,所述 第二开关管的第二极与所述第四开关管的栅极连接;
所述第三开关管的栅极和第一极分别与第三信号线连接,所述第三 开关管的第二极与所述第四开关管的栅极连接;
所述第四开关管的栅极分别与所述第二开关管的第二极和所述第 三开关管的第二极连接,所述第四开关管的第一极与所述第三信号线连 接,所述第四开关管的第二极分别与所述第五开关管的第二极以及所述 第二开关管的栅极连接;
所述第五开关管的栅极和第一极分别与所述第二信号线连接,所述 第五开关管的第二极分别与所述第四开关管的第二极和所述第二开关 管的栅极连接。
2.根据权利要求 1所述的静电保护电路, 其中, 所述第一信号线和 所述第二信号线相邻设置;并且所述第一信号线和所述第二信号线均为 扫描线。
3.根据权利要求 1所述的静电保护电路, 其中, 所述第一信号线和 所述第二信号线相邻设置;并且所述第一信号线和所述第二信号线均为 数据线。
4.根据权利要求 1-3中任一项所述的静电保护电路, 其中, 所述第 三信号线为公共电极线和短路环中的一个。
5.根据权利要求 1-4中任一项所述的静电保护电路, 其中, 当所述第一信号线上形成的静电电压达到开启电压时,所述第一开 关管打开以使所述第一信号线上的静电电荷传导至所述第二信号线上, 并且所述第二开关管和所述第四开关管打开以使所述第一信号线上的 静电电荷传导至所述第三信号线上;
当所述第二信号线上形成的静电电压达到开启电压时,所述第五开 关管打开以使所述第二信号线上的静电电荷传导至所述第一信号线上, 并且所述第二开关管和所述第四开关管打开以使所述第二信号线上的 静电电荷传导至所述第三信号线上;
当所述第三信号线上形成的静电电压达到开启电压时,所述第三开 关管和所述第四开关管打开以使所述第三信号线上的静电电荷传导至 所述第一信号线上,并且所述第二开关管打开以使所述第三信号线上的 静电电荷传导至所述第一信号线上。
6.根据权利要求 1-4中任一项所述的静电保护电路, 其中, 在所述 第一开关管故障的情况下,
当所述第一信号线上形成的静电电压达到开启电压时,所述第二开 关管和所述第四开关管打开以使所述第一信号线上的静电电荷传导至 所述第三信号线上;
当所述第二信号线上形成的静电电压达到开启电压时,所述第五开 关管打开以使所述第二信号线上的静电电荷传导至所述第一信号线上, 所述第二开关管和所述第四开关管打开以使所述第二信号线上的静电 电荷传导至所述第三信号线上;
当所述第三信号线上形成的静电电压达到开启电压时,所述第三开 关管和所述第四开关管打开以使所述第三信号线上的静电电荷传导至 所述第一信号线上。
7.根据权利要求 1-4中任一项所述的静电保护电路, 其中, 在所述 第二开关管故障的情况下,
当所述第一信号线上形成的静电电压达到开启电压时,所述第一开 关管打开以使所述第一信号线上的静电电荷传导至所述第二信号线上; 当所述第二信号线上形成的静电电压达到开启电压时,所述第五开 关管打开以使所述第二信号线上的静电电荷传导至所述第一信号线上; 当所述第三信号线上形成的静电电压达到开启电压时,所述第三开 关管和所述第四开关管打开以使所述第三信号线上的静电电荷传导至 所述第一信号线上,并且所述第一开关管打开以使所述第三信号线上的 静电电荷传导至所述第二信号线上。
8.根据权利要求 1-4中任一项所述的静电保护电路, 其中, 在所述 第三开关管故障的情况下,
当所述第一信号线上形成的静电电压达到开启电压时,所述第一开 关管打开以使所述第一信号线上的静电电荷传导至所述第二信号线上, 所述第二开关管和所述第四开关管打开以使所述第一信号线上的静电 电荷传导至所述第三信号线上;
当所述第二信号线上形成的静电电压达到开启电压时,所述第五开 关管打开以使所述第二信号线上的静电电荷传导至所述第一信号线上, 所述第二开关管和所述第四开关管打开以使所述第二信号线上的静电 电荷传导至所述第三信号线上。
9.根据权利要求 1所述的静电保护电路, 其中, 在所述第四开关管 故障的情况下,
当所述第一信号线上形成的静电电压达到开启电压时,所述第一开 关管打开以使所述第一信号线上的静电电荷传导至所述第二信号线上; 当所述第二信号线上形成的静电电压达到开启电压时,所述第五开 关管打开以使所述第二信号线上的静电电荷传导至所述第一信号线上。
10.根据权利要求 1 所述的静电保护电路, 其中, 在所述第五开关 管故障的情况下,
当所述第一信号线上形成的静电电压达到开启电压时,所述第一开 关管打开以使所述第一信号线上的静电电荷传导至所述第二信号线上, 所述第二开关管和所述第四开关管打开以使所述第一信号线上的静电 电荷传导至所述第三信号线上;
当所述第三信号线上形成的静电电压达到开启电压时,所述第三开 关管和所述第四开关管打开以使所述第三信号线上的静电电荷传导至 所述第一信号线上。
11.一种显示装置, 包括根据权利要求 1至 10中任一项所述的静电 保护电路。
12.—种静电保护方法, 用于对第一信号线、 第二信号线和第三信 号线进行静电保护, 其中, 所述静电保护方法包括:
将第一开关管的栅极和第一极分别与第一信号线进行连接,将所述 第一开关管的第二极与第二信号线进行连接;
将第二开关管的栅极和第一极分别与所述第一信号线进行连接,将 所述第二开关管的第二极与所述第四开关管的栅极进行连接;
将第三开关管的栅极和第一极分别与第三信号线进行连接,将所述 第三开关管的第二极与所述第四开关管的栅极进行连接;
将第四开关管的栅极分别与所述第二开关管的第二极和所述第三 开关管的第二极进行连接,将所述第四开关管的第一极与所述第三信号 线进行连接,将所述第四开关管的第二极分别与第五开关管的第二极以 及所述第二开关管的栅极进行连接;
将第五开关管的栅极和第一极分别与所述第二信号线进行连接,将 所述第五开关管的第二极分别与所述第四开关管的第二极和所述第二 开关管的栅极进行连接。
13.根据权利要求 11所述的静电保护方法, 其中, 将所述第一信号 线和所述第二信号线进行相邻设置;
所述第一信号线和所述第二信号线均为扫描线。
14.根据权利要求 11所述的静电保护方法, 其中, 将所述第一信号 线和所述第二信号线进行相邻设置; 所述第一信号线和所述第二信号线均为数据线。
15. 根据权利要求 12-14中任一项所述的静电保护方法, 其中, 述第三信号线为公共电极线或短路环。
PCT/CN2013/074638 2013-02-22 2013-04-24 静电保护电路、显示装置和静电保护方法 WO2014127580A1 (zh)

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