WO2012094780A8 - Dispositif mosfet latéral de type soi et circuit intégré l'utilisant - Google Patents
Dispositif mosfet latéral de type soi et circuit intégré l'utilisant Download PDFInfo
- Publication number
- WO2012094780A8 WO2012094780A8 PCT/CN2011/000232 CN2011000232W WO2012094780A8 WO 2012094780 A8 WO2012094780 A8 WO 2012094780A8 CN 2011000232 W CN2011000232 W CN 2011000232W WO 2012094780 A8 WO2012094780 A8 WO 2012094780A8
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- region
- active layer
- body region
- gate structure
- integrated circuit
- Prior art date
Links
- 210000000746 body region Anatomy 0.000 abstract 7
- 239000004065 semiconductor Substances 0.000 abstract 2
- 239000012212 insulator Substances 0.000 abstract 1
- 230000010354 integration Effects 0.000 abstract 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/7816—Lateral DMOS transistors, i.e. LDMOS transistors
- H01L29/7824—Lateral DMOS transistors, i.e. LDMOS transistors with a substrate comprising an insulating layer, e.g. SOI-LDMOS transistors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
- H01L27/085—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
- H01L27/088—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
- H01L27/092—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors
- H01L27/0922—Combination of complementary transistors having a different structure, e.g. stacked CMOS, high-voltage and low-voltage CMOS
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/7816—Lateral DMOS transistors, i.e. LDMOS transistors
- H01L29/7825—Lateral DMOS transistors, i.e. LDMOS transistors with trench gate electrode
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7831—Field effect transistors with field effect produced by an insulated gate with multiple gate structure
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
- H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
- H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
- H01L29/063—Reduced surface field [RESURF] pn-junction structures
- H01L29/0634—Multiple reduced surface field (multi-RESURF) structures, e.g. double RESURF, charge compensation, cool, superjunction (SJ), 3D-RESURF, composite buffer (CB) structures
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0684—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
- H01L29/0692—Surface layout
- H01L29/0696—Surface layout of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/1095—Body region, i.e. base region, of DMOS transistors or IGBTs
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
- H01L29/42356—Disposition, e.g. buried gate electrode
- H01L29/4236—Disposition, e.g. buried gate electrode within a trench, e.g. trench gate electrode, groove gate electrode
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
- H01L29/42372—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the conducting layer, e.g. the length, the sectional shape or the lay-out
- H01L29/4238—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the conducting layer, e.g. the length, the sectional shape or the lay-out characterised by the surface lay-out
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Thin Film Transistor (AREA)
Abstract
L'invention concerne un dispositif MOSFET latéral de type silicium sur isolant (SOI) et un circuit intégré l'utilisant. Dans ledit dispositif, une couche active (3) comprend une région de corps (9) et une région de drain (12) qui sont situées sur la surface de la couche active (3), respectivement, et qui sont séparées l'une de l'autre, ainsi qu'une région planaire de canal de grille (14'), une région de source (11a), une région de contact de corps (10) et une région de source (11b) qui sont situées sur la surface de la région de corps (9) et qui sont implantées successivement à partir du côté adjacent à la région de drain (12). La couche active (3) située entre la région de corps (9) et la région de drain (12) est une région de dérive, la région de dérive et la région de corps (9) étant de types de conduction opposés. Une couche semi-conductrice enterrée (4) est placée au-dessous de la surface de la couche active (3), la couche semi-conductrice enterrée (4) et la région de corps (9) étant du même type de conduction. Ledit dispositif possède une structure à grille en tranchée (8) et une structure à grille planaire (8'), la structure à grille en tranchée (8) étant en contact avec la région de corps (9) et s'étendant longitudinalement de la surface de la couche active (3) à une couche diélectrique enterrée (2) et la structure à grille planaire (8') étant formée au-dessus de la région de corps (9). Ledit dispositif offre les avantages d'une bonne tension de tenue, d'une faible résistance spécifique à l'état passant, d'une faible consommation électrique, d'un faible coût et d'une facilité de la miniaturisation et de l'intégration.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201110003586.3 | 2011-01-10 | ||
CN 201110003586 CN102148251B (zh) | 2011-01-10 | 2011-01-10 | Soi横向mosfet器件和集成电路 |
Publications (2)
Publication Number | Publication Date |
---|---|
WO2012094780A1 WO2012094780A1 (fr) | 2012-07-19 |
WO2012094780A8 true WO2012094780A8 (fr) | 2012-09-07 |
Family
ID=44422390
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/CN2011/000232 WO2012094780A1 (fr) | 2011-01-10 | 2011-02-15 | Dispositif mosfet latéral de type soi et circuit intégré l'utilisant |
Country Status (2)
Country | Link |
---|---|
CN (1) | CN102148251B (fr) |
WO (1) | WO2012094780A1 (fr) |
Families Citing this family (24)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102306657A (zh) * | 2011-10-13 | 2012-01-04 | 电子科技大学 | 一种具有浮空埋层的绝缘栅双极型晶体管 |
US8518764B2 (en) * | 2011-10-24 | 2013-08-27 | Freescale Semiconductor, Inc. | Semiconductor structure having a through substrate via (TSV) and method for forming |
CN102738240B (zh) * | 2012-06-04 | 2015-05-27 | 电子科技大学 | 一种双栅功率mosfet器件 |
CN102810553B (zh) * | 2012-08-21 | 2015-03-25 | 重庆大学 | 一种极低导通电阻的槽型场氧功率mos器件 |
US8785988B1 (en) * | 2013-01-11 | 2014-07-22 | Macronix International Co., Ltd. | N-channel metal-oxide field effect transistor with embedded high voltage junction gate field-effect transistor |
CN103325820A (zh) * | 2013-06-14 | 2013-09-25 | 四川长虹电器股份有限公司 | 带p型埋层的双栅soi-ligbt器件 |
CN104241365A (zh) * | 2014-04-10 | 2014-12-24 | 电子科技大学 | 一种soi横向功率mosfet器件 |
CN103915506B (zh) * | 2014-04-28 | 2016-08-31 | 重庆大学 | 一种具有纵向npn结构的双栅ldmos器件 |
CN105161420B (zh) * | 2015-07-13 | 2017-10-13 | 电子科技大学 | 一种横向mosfet器件的制造方法 |
CN108242467B (zh) * | 2016-12-27 | 2020-05-22 | 无锡华润上华科技有限公司 | Ldmos器件及其制作方法 |
US10573744B1 (en) | 2017-10-03 | 2020-02-25 | Maxim Integrated Products, Inc. | Self-aligned, dual-gate LDMOS transistors and associated methods |
CN108039371A (zh) * | 2017-12-01 | 2018-05-15 | 德淮半导体有限公司 | 横向扩散金属氧化物半导体晶体管及其制造方法 |
CN108231902A (zh) * | 2018-01-05 | 2018-06-29 | 桂林电子科技大学 | 具有串联槽栅结构的多叠层功率器件 |
WO2019139619A1 (fr) * | 2018-01-12 | 2019-07-18 | Intel Corporation | Interface de canal et de contact de source pour réduire la charge corporelle d'une tunnellisation bande à bande |
CN109103249A (zh) * | 2018-04-04 | 2018-12-28 | 北京大学 | 一种优化平面布局和结构的大电流氮化镓高电子迁移率晶体管 |
CN109192778A (zh) * | 2018-08-01 | 2019-01-11 | 长沙理工大学 | 一种具有双纵向场板的分离栅槽型功率器件 |
CN110112217A (zh) * | 2019-04-15 | 2019-08-09 | 杭州电子科技大学 | 抗单粒子烧毁ldmos器件 |
CN111081777A (zh) * | 2019-11-25 | 2020-04-28 | 西安电子科技大学 | 双沟道横向超结双扩散金属氧化物元素半导体场效应管及其制作方法 |
CN110993691A (zh) * | 2019-11-25 | 2020-04-10 | 西安电子科技大学 | 双沟道横向超结双扩散金属氧化物宽带隙半导体场效应管及其制作方法 |
CN111106178B (zh) * | 2019-12-11 | 2021-12-03 | 电子科技大学 | 具有高介电常数钝化层的双通道横向功率mosfet器件 |
CN111477681A (zh) * | 2020-04-23 | 2020-07-31 | 西安电子科技大学 | 双通道均匀电场调制横向双扩散金属氧化物元素半导体场效应管及制作方法 |
CN111477680A (zh) * | 2020-04-23 | 2020-07-31 | 西安电子科技大学 | 双通道均匀电场调制横向双扩散金属氧化物宽带隙半导体场效应管及制作方法 |
CN113284954B (zh) * | 2021-07-22 | 2021-09-24 | 成都蓉矽半导体有限公司 | 一种高沟道密度的碳化硅mosfet及其制备方法 |
CN117810266B (zh) * | 2024-02-29 | 2024-05-03 | 电子科技大学 | 一种基于标准工艺的抗辐射横向扩散金属氧化半导体 |
Family Cites Families (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6509220B2 (en) * | 2000-11-27 | 2003-01-21 | Power Integrations, Inc. | Method of fabricating a high-voltage transistor |
JP4322453B2 (ja) * | 2001-09-27 | 2009-09-02 | 株式会社東芝 | 半導体装置およびその製造方法 |
JP3783156B2 (ja) * | 2001-10-17 | 2006-06-07 | 株式会社日立製作所 | 半導体装置 |
US6800917B2 (en) * | 2002-12-17 | 2004-10-05 | Texas Instruments Incorporated | Bladed silicon-on-insulator semiconductor devices and method of making |
JP4590884B2 (ja) * | 2003-06-13 | 2010-12-01 | 株式会社デンソー | 半導体装置およびその製造方法 |
US10062788B2 (en) * | 2008-07-30 | 2018-08-28 | Maxpower Semiconductor Inc. | Semiconductor on insulator devices containing permanent charge |
CN101060136A (zh) * | 2007-06-05 | 2007-10-24 | 北京大学 | 一种双鳍型沟道围栅场效应晶体管及其制备方法 |
KR101009399B1 (ko) * | 2008-10-01 | 2011-01-19 | 주식회사 동부하이텍 | Ldmos 트랜지스터 및 그 제조방법 |
US7829947B2 (en) * | 2009-03-17 | 2010-11-09 | Alpha & Omega Semiconductor Incorporated | Bottom-drain LDMOS power MOSFET structure having a top drain strap |
CN101771085A (zh) * | 2010-01-20 | 2010-07-07 | 电子科技大学 | 一种高压半导体器件及其制造方法 |
CN101840935B (zh) * | 2010-05-17 | 2012-02-29 | 电子科技大学 | Soi横向mosfet器件 |
-
2011
- 2011-01-10 CN CN 201110003586 patent/CN102148251B/zh not_active Expired - Fee Related
- 2011-02-15 WO PCT/CN2011/000232 patent/WO2012094780A1/fr unknown
Also Published As
Publication number | Publication date |
---|---|
WO2012094780A1 (fr) | 2012-07-19 |
CN102148251A (zh) | 2011-08-10 |
CN102148251B (zh) | 2013-01-30 |
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