WO2012094780A8 - Soi lateral mosfet device and integrated circuit thereof - Google Patents

Soi lateral mosfet device and integrated circuit thereof Download PDF

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Publication number
WO2012094780A8
WO2012094780A8 PCT/CN2011/000232 CN2011000232W WO2012094780A8 WO 2012094780 A8 WO2012094780 A8 WO 2012094780A8 CN 2011000232 W CN2011000232 W CN 2011000232W WO 2012094780 A8 WO2012094780 A8 WO 2012094780A8
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WO
WIPO (PCT)
Prior art keywords
region
active layer
body region
gate structure
integrated circuit
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Application number
PCT/CN2011/000232
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French (fr)
Chinese (zh)
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WO2012094780A1 (en
Inventor
罗小蓉
姚国亮
雷天飞
王元刚
张波
李肇基
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电子科技大学
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Publication of WO2012094780A1 publication Critical patent/WO2012094780A1/en
Publication of WO2012094780A8 publication Critical patent/WO2012094780A8/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/7801DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
    • H01L29/7816Lateral DMOS transistors, i.e. LDMOS transistors
    • H01L29/7824Lateral DMOS transistors, i.e. LDMOS transistors with a substrate comprising an insulating layer, e.g. SOI-LDMOS transistors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/08Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/085Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
    • H01L27/088Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
    • H01L27/092Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors
    • H01L27/0922Combination of complementary transistors having a different structure, e.g. stacked CMOS, high-voltage and low-voltage CMOS
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/7801DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
    • H01L29/7816Lateral DMOS transistors, i.e. LDMOS transistors
    • H01L29/7825Lateral DMOS transistors, i.e. LDMOS transistors with trench gate electrode
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
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    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/7831Field effect transistors with field effect produced by an insulated gate with multiple gate structure
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    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • H01L29/0607Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
    • H01L29/0611Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
    • H01L29/0615Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
    • H01L29/063Reduced surface field [RESURF] pn-junction structures
    • H01L29/0634Multiple reduced surface field (multi-RESURF) structures, e.g. double RESURF, charge compensation, cool, superjunction (SJ), 3D-RESURF, composite buffer (CB) structures
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    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0684Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
    • H01L29/0692Surface layout
    • H01L29/0696Surface layout of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs
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    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/10Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/1095Body region, i.e. base region, of DMOS transistors or IGBTs
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
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    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312Gate electrodes for field effect devices
    • H01L29/42316Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H01L29/42356Disposition, e.g. buried gate electrode
    • H01L29/4236Disposition, e.g. buried gate electrode within a trench, e.g. trench gate electrode, groove gate electrode
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    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312Gate electrodes for field effect devices
    • H01L29/42316Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H01L29/42372Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the conducting layer, e.g. the length, the sectional shape or the lay-out
    • H01L29/4238Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the conducting layer, e.g. the length, the sectional shape or the lay-out characterised by the surface lay-out

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Thin Film Transistor (AREA)

Abstract

A silicon-on-insulator (SOI) lateral MOSFET device and the integrated circuit thereof are provided. In said device, an active layer (3) includes a body region (9) and a drain region (12) which are located on the surface of the active layer (3) respectively and are separated from each other, and also a planar gate channel region (14'), a source region (11a), a body contact region (10) and a source region (11b) which are located on the surface of the body region (9) and are set in sequence from the side adjacent to the drain region (12). The active layer (3) located between the body region (9) and the drain region (12) is a drift region, wherein the drift region and the body region (9) have opposite conduction types. A semiconductor buried layer (4) is set beneath the surface of the active layer (3), wherein the semiconductor buried layer (4) and the body region (9) have the same conduction type. Said device has a trench gate structure (8) and a planar gate structure (8'), wherein the trench gate structure (8) contacts with the body region (9) and longitudinally extends from the surface of the active layer (3) to a dielectric buried layer (2), and the planar gate structure (8') is formed above the body region (9). Said device has the advantages of high withstand voltage, low specific on-resistance, low power consumption, low cost, and easy miniaturization and integration.
PCT/CN2011/000232 2011-01-10 2011-02-15 Soi lateral mosfet device and integrated circuit thereof WO2012094780A1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN 201110003586 CN102148251B (en) 2011-01-10 2011-01-10 Semiconductor on insulator (SOI) lateral metal-oxide-semiconductor field-effect-transistor (MOSFET) device and integrated circuit
CN201110003586.3 2011-01-10

Publications (2)

Publication Number Publication Date
WO2012094780A1 WO2012094780A1 (en) 2012-07-19
WO2012094780A8 true WO2012094780A8 (en) 2012-09-07

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WO (1) WO2012094780A1 (en)

Families Citing this family (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102306657A (en) * 2011-10-13 2012-01-04 电子科技大学 Insulated gate bipolar transistor with floating buried layer
US8518764B2 (en) * 2011-10-24 2013-08-27 Freescale Semiconductor, Inc. Semiconductor structure having a through substrate via (TSV) and method for forming
CN102738240B (en) * 2012-06-04 2015-05-27 电子科技大学 Bigrid power MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor) device
CN102810553B (en) * 2012-08-21 2015-03-25 重庆大学 Groove type field oxide power MOS (metal oxide semiconductor) device with ultra low conduction resistance
US8785988B1 (en) * 2013-01-11 2014-07-22 Macronix International Co., Ltd. N-channel metal-oxide field effect transistor with embedded high voltage junction gate field-effect transistor
CN103325820A (en) * 2013-06-14 2013-09-25 四川长虹电器股份有限公司 Double-gate SOI-LIGBT device with P-type buried layer
CN104241365A (en) * 2014-04-10 2014-12-24 电子科技大学 SOI horizontal power MOSFET device
CN103915506B (en) * 2014-04-28 2016-08-31 重庆大学 A kind of double grid LDMOS device with longitudinal NPN structure
CN105161420B (en) * 2015-07-13 2017-10-13 电子科技大学 A kind of manufacture method of lateral MOSFET device
CN108242467B (en) * 2016-12-27 2020-05-22 无锡华润上华科技有限公司 LDMOS device and manufacturing method thereof
US10573744B1 (en) 2017-10-03 2020-02-25 Maxim Integrated Products, Inc. Self-aligned, dual-gate LDMOS transistors and associated methods
CN108039371A (en) * 2017-12-01 2018-05-15 德淮半导体有限公司 LDMOS transistor and its manufacture method
CN108231902A (en) * 2018-01-05 2018-06-29 桂林电子科技大学 More stacked layer power devices with series connection slot grid structure
WO2019139619A1 (en) * 2018-01-12 2019-07-18 Intel Corporation Source contact and channel interface to reduce body charging from band-to-band tunneling
CN109103249A (en) * 2018-04-04 2018-12-28 北京大学 A kind of high current GaN high electron mobility transistor optimizing plane figure and structure
CN109192778A (en) * 2018-08-01 2019-01-11 长沙理工大学 A kind of separate gate slot type power device with double longitudinal field plates
CN110112217A (en) * 2019-04-15 2019-08-09 杭州电子科技大学 Anti-single particle burns LDMOS device
CN110993691A (en) * 2019-11-25 2020-04-10 西安电子科技大学 Double-channel transverse super-junction double-diffusion metal oxide wide band gap semiconductor field effect transistor and manufacturing method thereof
CN111081777A (en) * 2019-11-25 2020-04-28 西安电子科技大学 Double-channel transverse super-junction double-diffusion metal oxide semiconductor field effect transistor and manufacturing method thereof
CN111106178B (en) * 2019-12-11 2021-12-03 电子科技大学 Dual channel lateral power MOSFET device with high dielectric constant passivation layer
CN111477680A (en) * 2020-04-23 2020-07-31 西安电子科技大学 Double-channel uniform electric field modulation transverse double-diffusion metal oxide wide-band-gap semiconductor field effect transistor and manufacturing method thereof
CN111477681A (en) * 2020-04-23 2020-07-31 西安电子科技大学 Double-channel uniform electric field modulation transverse double-diffusion metal oxide semiconductor field effect transistor and manufacturing method thereof
CN113284954B (en) * 2021-07-22 2021-09-24 成都蓉矽半导体有限公司 Silicon carbide MOSFET with high channel density and preparation method thereof
CN117810266B (en) * 2024-02-29 2024-05-03 电子科技大学 Anti-radiation lateral diffusion metal oxide semiconductor based on standard process

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6509220B2 (en) * 2000-11-27 2003-01-21 Power Integrations, Inc. Method of fabricating a high-voltage transistor
JP4322453B2 (en) * 2001-09-27 2009-09-02 株式会社東芝 Semiconductor device and manufacturing method thereof
JP3783156B2 (en) * 2001-10-17 2006-06-07 株式会社日立製作所 Semiconductor device
US6800917B2 (en) * 2002-12-17 2004-10-05 Texas Instruments Incorporated Bladed silicon-on-insulator semiconductor devices and method of making
JP4590884B2 (en) * 2003-06-13 2010-12-01 株式会社デンソー Semiconductor device and manufacturing method thereof
CN101060136A (en) * 2007-06-05 2007-10-24 北京大学 A double-fin channel wrap gate field-effect transistor and its manufacture method
WO2010014281A1 (en) * 2008-07-30 2010-02-04 Maxpower Semiconductor Inc. Semiconductor on insulator devices containing permanent charge
KR101009399B1 (en) * 2008-10-01 2011-01-19 주식회사 동부하이텍 Lateral DMOS transistor and method of fabricating thereof
US7829947B2 (en) * 2009-03-17 2010-11-09 Alpha & Omega Semiconductor Incorporated Bottom-drain LDMOS power MOSFET structure having a top drain strap
CN101771085A (en) * 2010-01-20 2010-07-07 电子科技大学 High-voltage semi-conductor device and manufacturing method thereof
CN101840935B (en) * 2010-05-17 2012-02-29 电子科技大学 SOI (Silicon-on-insulator) MOSFET lateral (metal-oxide-semiconductor field effect transistor) device

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Publication number Publication date
CN102148251A (en) 2011-08-10
CN102148251B (en) 2013-01-30
WO2012094780A1 (en) 2012-07-19

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