CN102306657A - Insulated gate bipolar transistor with floating buried layer - Google Patents
Insulated gate bipolar transistor with floating buried layer Download PDFInfo
- Publication number
- CN102306657A CN102306657A CN201110309838A CN201110309838A CN102306657A CN 102306657 A CN102306657 A CN 102306657A CN 201110309838 A CN201110309838 A CN 201110309838A CN 201110309838 A CN201110309838 A CN 201110309838A CN 102306657 A CN102306657 A CN 102306657A
- Authority
- CN
- China
- Prior art keywords
- buried regions
- bipolar transistor
- insulated gate
- gate bipolar
- floating empty
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Images
Abstract
The invention provides an insulated gate bipolar transistor (IGBT) with a floating buried layer, belonging to the power semiconductor device technology field. According to the invention, based on a traditional IGBT device structure, a drift region with a first conductive type is introduced with one or more layers of continuous or incontinuous second conductive type floating buried layers, through a modulation effect of introduced space charge and additional electric field of the second conductive type floating buried layer, new electric field peak is introduced into the drift region of the first conductive type, and with a same device drift region thickness, breakdown voltage of an IGBT device is substantially raised; with certain breakdown voltage, an IGBT device drift region thickness can be substantially reduced, thus forward conduction voltage drop and shutoff time of the device are substantially reduced. Simultaneously, with an effect of introduced space charge of the floating buried layer, avalanche breakdown in device shutoff can be inhibited, and dynamic breakdown voltage and reverse direction safety operation area of the IGBT device are improved.
Description
Technical field
The invention belongs to the power semiconductor technical field, relate to insulated gate bipolar transistor (IGBT), in particular, relate to floating empty buried regions IGBT device.
Background technology
Insulated gate bipolar transistor (IGBT) is a kind of MOS field effect and the compound novel electric power electric device of bipolar transistor.Its existing MOSFET is easy to drive; Control simple advantage; Have the pressure drop of power transistor turns low again, on state current is big, the advantage that loss is little; Become one of core electron components and parts in the modern power electronic circuit, be widely used in the frequency control inverter such as fields such as locomotive traction, electric automobile, wind power generation, ups power, air-conditionings.
Since the IGBT invention, people are devoted to improve three important and conflicting parameters of IGBT always: forward conduction voltage drop, turn-off time and safety operation area.Development through decades has proposed 6 generation IGBT device architectures in succession, makes device performance obtain steady lifting.Yet; For the IGBT device; Making device have through conductivity modulation effect when than low forward conduction voltage drop; The right storage in the nonequilibrium electron hole of base also makes its turn-off speed obviously slow down, and has limited applying frequency and has increased switching loss, and this becomes the major obstacle that the IGBT device is further used.In recent years, along with the fast development of inverter, existing IGBT structure has been difficult to satisfy the demand of system to High Speed I GBT device, presses for the new device architecture of exploitation.Simultaneously, IGBT has higher requirement to the reliability and the durability of device in the large-scale application of industrial circle, presses for the IGBT device that exploitation has wide safety operation area.Therefore, the High Speed I GBT new construction of studying wide safety operation area has become one of hot fields of current power electronics.
Summary of the invention
In order to obtain the High Speed I GBT device new construction of low forward conduction voltage drop and wide safety operation area, the present invention provides a kind of insulated gate bipolar transistor with floating empty buried regions.The floating empty buried regions insulated gate bipolar transistor (as shown in Figure 1) on the basis of conventional I GBT structure that is provided;, introduces by device one in having the drift region of first conduction type to the floating empty buried regions of continuous or discrete second conduction type of multilayer; Through the space charge of the floating empty buried regions introducing of second conduction type and the modulating action of additional electric field; In the drift region of first conduction type, introduce new electric field spike; Under identical device drift region thickness, can improve the puncture voltage of IGBT device greatly; Under certain breakdown-voltage, can reduce the thickness of IGBT device drift region greatly, thereby reduce the forward conduction voltage drop and the turn-off time of device greatly.The effect of the space charge that floating simultaneously empty buried regions is introduced, but the avalanche breakdown when suppression device turn-offs improve the dynamic puncture voltage and reverse safety operation area of IGBT device.
Technical scheme of the present invention is following:
Floating empty buried regions insulated gate bipolar transistor to shown in Figure 7, has the buried regions 22 of second conduction type like Fig. 2 in the drift region 14 of first conduction type of said insulated gate bipolar transistor.
In the such scheme:
Buried regions 22 shapes of said second conduction type can be square, bar shaped, triangle, trapezoidal, circular or oval.
The buried regions 22 of said second conduction type can be individual layer continuous structure (as shown in Figure 2), or the discontinuous structure of individual layer (as shown in Figure 3).
The buried regions 22 of said second conduction type can be multilayer continuous structure (as shown in Figure 4), or the discontinuous structure of multilayer (shown in Fig. 5-7).
The collector electrode of said insulated gate bipolar transistor can be electric field termination structure, transparent anode structure or anode in short circuit structure.
The grid of said insulated gate bipolar transistor can be plane grid or groove-shaped grid.
Said insulated gate bipolar transistor can be the first conduction type N type, and second conduction type is the P type, also can be that first conduction type is the P type, and second conduction type is the N type.
The concentration of said buried regions, thickness, shape, the number of plies etc. can be according to designing requirements and respective change.The semi-conducting material of said insulated gate bipolar transistor can adopt silicon (Si), carborundum (SiC), GaAs (GaAs) or gallium nitride (GaN) etc.
Beneficial effect of the present invention shows:
Insulated gate bipolar transistor with floating empty buried regions provided by the invention; Be on the basis of conventional I GBT structure;, introduces by device one in having the drift region of first conduction type to the floating empty buried regions of continuous or discrete second conduction type of multilayer; Through the space charge of the floating empty buried regions introducing of second conduction type and the modulating action of additional electric field; In the drift region of first conduction type, introduce new electric field spike, under identical device drift region thickness, can improve the puncture voltage of IGBT device greatly; Under certain breakdown-voltage, can reduce the thickness of IGBT device drift region greatly, thereby reduce the forward conduction voltage drop and the turn-off time of device greatly.The effect of the space charge that floating simultaneously empty buried regions is introduced, but the avalanche breakdown when suppression device turn-offs improve the dynamic puncture voltage and reverse safety operation area of IGBT device.Said insulated gate bipolar transistor is applicable to from small-power to the large-power semiconductor power device with the power integrated circuit field.
Description of drawings
Fig. 1 is conventional IGBT device architecture sketch map.
Fig. 2 to Fig. 7 is the insulated gate bipolar transistor structural representation with floating empty buried regions that the present invention proposes.
Among Fig. 1 to Fig. 7,11 is collector electrode, and 12 is the second conduction type collector region, and 13 is the first conduction type electric field trapping layer; 14 is the first conduction type drift region, and 15 is grid oxygen, and 16 is grid; 17 is the insulating barrier between grid and the emitter, and 18 is the second conduction type base, and 19 is the first conduction type contact zone; 20 is the second conduction type contact zone, 21 emitters, and 22 is the second conduction type buried regions.
Fig. 8 is emulation traditional structure with identity unit drift region thickness that obtains and the reverse I-V characteristic curve that floats empty buried structure IGBT device.
Fig. 9 and Figure 10 are under the same breakdown voltage of emulation acquisition, the forward I-V characteristic curve and the waveform that turn-offs transient current and voltage of traditional structure and floating empty buried structure IGBT device.
Embodiment
A kind of insulated gate bipolar transistor with floating empty buried regions to shown in Figure 7, has a buried regions 21 to continuous or discrete second conduction type of multilayer like Fig. 2 in the drift region 14 of first conduction type of said insulated gate bipolar transistor.
In the above-mentioned execution mode:
The buried regions 22 of said second conduction type can obtain through two step diffusion technologys on the first conductivity type substrate material before conventional I GBT technology begins.Promptly before conventional I GBT technology begins; On the first conductivity type substrate material, carry out dark second conductive type impurity diffusion of a step earlier; And then carry out a step shallow first conductive type impurity diffusion; Control junction depth poor of twice diffusion, just can obtain to satisfy the buried regions 22 of second conduction type of thickness and concentration requirement.
The buried regions 22 of said second conduction type can be before conventional I GBT technology begins; Form the material layer of second conduction type of a layer thickness, concentration and controllable shapes at the substrate surface of first conduction type through modes such as ion injection or diffusions; Then at the material layer of this substrate surface, can obtain to satisfy the buried regions 22 of second conduction type of thickness and concentration requirement through technology regrowth one deck first conduction types such as extension.
Buried regions 22 shapes of said second conduction type can be regular or irregular square, bar shaped, triangle, trapezoidal, circular or oval.
The buried regions 22 of said second conduction type can be the individual layer continuous structure, or the discontinuous structure of individual layer.
The buried regions 22 of said second conduction type can be the multilayer continuous structure, or the discontinuous structure of multilayer.
The collector electrode of said insulated gate bipolar transistor can be electric field termination structure, transparent anode structure or anode in short circuit structure.
The grid of said insulated gate bipolar transistor can be plane grid or groove-shaped grid.
Said insulated gate bipolar transistor can be the first conduction type N type, and second conduction type is the P type, also can be that first conduction type is the P type, and second conduction type is the N type.
The concentration of said buried regions, thickness, shape, the number of plies etc. can be according to designing requirements and respective change.
The semi-conducting material of said insulated gate bipolar transistor can adopt silicon (Si), carborundum (SiC), GaAs (GaAs) or gallium nitride (GaN) etc.
Fig. 8 is emulation traditional structure with identity unit drift region thickness that obtains and the reverse I-V characteristic curve that floats empty buried structure IGBT device.As can be seen from the figure, through the introducing of the floating empty buried regions of second conduction type, under identical device drift region thickness, floating empty buried structure can improve the puncture voltage of IGBT device greatly.
Fig. 9 and Figure 10 are under the same breakdown voltage of emulation acquisition, the forward I-V characteristic curve and the waveform that turn-offs transient current and voltage of traditional structure and floating empty buried structure IGBT device.As can be seen from the figure, under certain breakdown-voltage, floating empty buried structure IGBT device can reduce the forward conduction voltage drop and the turn-off time of device greatly.
Claims (10)
1. the insulated gate bipolar transistor with floating empty buried regions is characterized in that having the buried regions (22) of second conduction type in the drift region (14) of first conduction type of said insulated gate bipolar transistor.
2. the insulated gate bipolar transistor with floating empty buried regions according to claim 1 is characterized in that, that said buried regions (22) is shaped as is square, bar shaped, triangle, trapezoidal, circular or oval.
3. the insulated gate bipolar transistor with floating empty buried regions according to claim 1 and 2 is characterized in that said buried regions (22) is the individual layer continuous structure.
4. the insulated gate bipolar transistor with floating empty buried regions according to claim 1 and 2 is characterized in that said buried regions (22) is the discontinuous structure of individual layer.
5. the insulated gate bipolar transistor with floating empty buried regions according to claim 1 and 2 is characterized in that, said buried regions (22) is a multilayer continuous structure at interval.
6. the insulated gate bipolar transistor with floating empty buried regions according to claim 1 and 2 is characterized in that, said buried regions (22) is the discontinuous structure of multilayer at interval.
7. the insulated gate bipolar transistor with floating empty buried regions according to claim 1 and 2 is characterized in that, said buried regions (22) obtained through two step diffusion technologys on the first conductivity type substrate material before conventional I GBT technology begins.
8. the insulated gate bipolar transistor with floating empty buried regions according to claim 1 and 2; It is characterized in that; Said buried regions (22) is before conventional I GBT technology begins; Through the material layer of modes such as ion injection or diffusion, obtain at the material layer of this substrate surface then through technology regrowth one deck first conduction types such as extensions at substrate surface formation one deck second conduction type of first conduction type.
9. the insulated gate bipolar transistor with floating empty buried regions according to claim 1 and 2 is characterized in that the current collection of said insulated gate bipolar transistor is electric field termination structure, transparent anode structure or anode in short circuit structure very.
10. the insulated gate bipolar transistor with floating empty buried regions according to claim 1 and 2 is characterized in that the grid of said insulated gate bipolar transistor is plane grid or groove-shaped grid.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201110309838A CN102306657A (en) | 2011-10-13 | 2011-10-13 | Insulated gate bipolar transistor with floating buried layer |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201110309838A CN102306657A (en) | 2011-10-13 | 2011-10-13 | Insulated gate bipolar transistor with floating buried layer |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN102306657A true CN102306657A (en) | 2012-01-04 |
Family
ID=45380491
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201110309838A Pending CN102306657A (en) | 2011-10-13 | 2011-10-13 | Insulated gate bipolar transistor with floating buried layer |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN102306657A (en) |
Cited By (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102683402A (en) * | 2012-04-24 | 2012-09-19 | 电子科技大学 | Flat-grid electric charge storage type IGBT (insulated gate bipolar translator) |
| CN102683403A (en) * | 2012-04-24 | 2012-09-19 | 电子科技大学 | Trench gate charge storage type insulated gate bipolar transistor (IGBT) |
| CN102969351A (en) * | 2012-12-07 | 2013-03-13 | 株洲南车时代电气股份有限公司 | Planar gate IGBT (Insulated Gate Bipolar Transistor) chip |
| WO2014086013A1 (en) * | 2012-12-06 | 2014-06-12 | 中国科学院微电子研究所 | Igbt and cell structure thereof, and method for forming igbt |
| CN105097905A (en) * | 2014-05-15 | 2015-11-25 | 英飞凌科技股份有限公司 | Insulated gate bipolar transistor |
| CN108321192A (en) * | 2018-02-05 | 2018-07-24 | 电子科技大学 | A kind of two-way trench gate charge storage type IGBT and preparation method thereof |
| CN108899362A (en) * | 2018-08-22 | 2018-11-27 | 江苏中科君芯科技有限公司 | Planar gate IGBT device |
| CN110021655A (en) * | 2019-04-19 | 2019-07-16 | 西安电子科技大学 | A kind of half super-junction laterally double-diffusion metal-oxide-semiconductor field effect transistor with ladder N-type heavy doping buried layer |
| CN108899362B (en) * | 2018-08-22 | 2024-04-12 | 江苏中科君芯科技有限公司 | Planar gate IGBT device |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1565051A (en) * | 2001-10-04 | 2005-01-12 | 通用半导体公司 | Method for fabricating a power semiconductor device having a voltage sustaining layer with a terraced trench facilitating formation of floating islands |
| CN101425536A (en) * | 2008-12-04 | 2009-05-06 | 电子科技大学 | Bipolar junction transistor |
| CN101512738A (en) * | 2006-09-22 | 2009-08-19 | 飞思卡尔半导体公司 | Semiconductor device and method of forming the same |
| CN102082177A (en) * | 2010-12-08 | 2011-06-01 | 四川长虹电器股份有限公司 | Bulk silicon LDMOS (Laterally Diffused Metal Oxide Semiconductor) device modulated in bulk electric field |
| CN102148251A (en) * | 2011-01-10 | 2011-08-10 | 电子科技大学 | Semiconductor on insulator (SOI) lateral metal-oxide-semiconductor field-effect-transistor (MOSFET) device and integrated circuit |
-
2011
- 2011-10-13 CN CN201110309838A patent/CN102306657A/en active Pending
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1565051A (en) * | 2001-10-04 | 2005-01-12 | 通用半导体公司 | Method for fabricating a power semiconductor device having a voltage sustaining layer with a terraced trench facilitating formation of floating islands |
| CN101512738A (en) * | 2006-09-22 | 2009-08-19 | 飞思卡尔半导体公司 | Semiconductor device and method of forming the same |
| CN101425536A (en) * | 2008-12-04 | 2009-05-06 | 电子科技大学 | Bipolar junction transistor |
| CN102082177A (en) * | 2010-12-08 | 2011-06-01 | 四川长虹电器股份有限公司 | Bulk silicon LDMOS (Laterally Diffused Metal Oxide Semiconductor) device modulated in bulk electric field |
| CN102148251A (en) * | 2011-01-10 | 2011-08-10 | 电子科技大学 | Semiconductor on insulator (SOI) lateral metal-oxide-semiconductor field-effect-transistor (MOSFET) device and integrated circuit |
Cited By (14)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102683403B (en) * | 2012-04-24 | 2015-05-27 | 电子科技大学 | Trench gate charge storage type insulated gate bipolar transistor (IGBT) |
| CN102683403A (en) * | 2012-04-24 | 2012-09-19 | 电子科技大学 | Trench gate charge storage type insulated gate bipolar transistor (IGBT) |
| CN102683402B (en) * | 2012-04-24 | 2015-08-19 | 电子科技大学 | A kind of planar gate charge storage type IGBT |
| CN102683402A (en) * | 2012-04-24 | 2012-09-19 | 电子科技大学 | Flat-grid electric charge storage type IGBT (insulated gate bipolar translator) |
| WO2014086013A1 (en) * | 2012-12-06 | 2014-06-12 | 中国科学院微电子研究所 | Igbt and cell structure thereof, and method for forming igbt |
| CN102969351B (en) * | 2012-12-07 | 2015-07-08 | 株洲南车时代电气股份有限公司 | Planar gate IGBT (Insulated Gate Bipolar Transistor) chip |
| CN102969351A (en) * | 2012-12-07 | 2013-03-13 | 株洲南车时代电气股份有限公司 | Planar gate IGBT (Insulated Gate Bipolar Transistor) chip |
| CN105097905A (en) * | 2014-05-15 | 2015-11-25 | 英飞凌科技股份有限公司 | Insulated gate bipolar transistor |
| CN105097905B (en) * | 2014-05-15 | 2018-05-29 | 英飞凌科技股份有限公司 | Igbt |
| CN108321192A (en) * | 2018-02-05 | 2018-07-24 | 电子科技大学 | A kind of two-way trench gate charge storage type IGBT and preparation method thereof |
| CN108321192B (en) * | 2018-02-05 | 2020-08-28 | 电子科技大学 | Bidirectional trench gate charge storage type IGBT and manufacturing method thereof |
| CN108899362A (en) * | 2018-08-22 | 2018-11-27 | 江苏中科君芯科技有限公司 | Planar gate IGBT device |
| CN108899362B (en) * | 2018-08-22 | 2024-04-12 | 江苏中科君芯科技有限公司 | Planar gate IGBT device |
| CN110021655A (en) * | 2019-04-19 | 2019-07-16 | 西安电子科技大学 | A kind of half super-junction laterally double-diffusion metal-oxide-semiconductor field effect transistor with ladder N-type heavy doping buried layer |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN101694850B (en) | Carrier-storing grooved gate IGBT with P-type floating layer | |
| CN101853878B (en) | Combined PNP-trench isolation RC-GCT component and preparation method thereof | |
| CN102779840B (en) | Insulated gate bipolar translator (IGBT) with terminal deep energy level impurity layer | |
| CN102306657A (en) | Insulated gate bipolar transistor with floating buried layer | |
| CN102683403A (en) | Trench gate charge storage type insulated gate bipolar transistor (IGBT) | |
| CN102683402B (en) | A kind of planar gate charge storage type IGBT | |
| CN109065607B (en) | Bipolar power semiconductor device and preparation method thereof | |
| CN102201439A (en) | Trench-type insulated gate bipolar transistor (Trench IGBT) with enhanced internal conductivity modulation | |
| CN102779847A (en) | Carrier stored groove bipolar transistor | |
| CN101393927A (en) | Accumulation layer controlled insulation gate type bipolar transistor | |
| CN102832240A (en) | Insulated gate bipolar transistor with dielectric layer at collector terminal | |
| CN102623492A (en) | MOS (Metal Oxide Semiconductor) field control thyristor | |
| CN103489910A (en) | Power semiconductor device and manufacturing method thereof | |
| CN102800691A (en) | Carrier-stored trench gate bipolar transistor | |
| CN102779839A (en) | Insulated gate bipolar transistor (IGBT) with deep energy level impurity implantation | |
| CN109065608B (en) | Transverse bipolar power semiconductor device and preparation method thereof | |
| CN109300975B (en) | Trench gate bipolar transistor with low electromagnetic interference noise characteristic | |
| CN102354706A (en) | Trench-type insulated gate bipolar transistor with P-type embedded island structure | |
| CN103855206A (en) | Insulated gate bipolar transistor and manufacturing method thereof | |
| CN105047704A (en) | High voltage IGBT having communicated storage layer and manufacturing method | |
| CN106992208B (en) | Thin silicon layer SOI (silicon on insulator) -based lateral insulated gate bipolar transistor and manufacturing method thereof | |
| CN102194864A (en) | Groove-grid-type insulated gate bipolar transistor with body electrode | |
| US20160013299A1 (en) | Semiconductor device, drive device for semiconductor circuit, and power conversion device | |
| KR102585094B1 (en) | Separated Buffer Super Junction IGBT | |
| CN116454127A (en) | SOI LIGBT with low turn-off loss |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| ASS | Succession or assignment of patent right |
Owner name: INSTITUTE OF ELECTRONIC AND INFORMATION ENGINEERIN Effective date: 20130326 |
|
| C41 | Transfer of patent application or patent right or utility model | ||
| TA01 | Transfer of patent application right |
Effective date of registration: 20130326 Address after: 611731 Chengdu province high tech Zone (West) West source Avenue, No. 2006 Applicant after: University of Electronic Science and Technology of China Applicant after: Institute of Electronic and Information Engineering In Dongguan, UESTC Address before: 611731 Chengdu province high tech Zone (West) West source Avenue, No. 2006 Applicant before: University of Electronic Science and Technology of China |
|
| C12 | Rejection of a patent application after its publication | ||
| RJ01 | Rejection of invention patent application after publication |
Application publication date: 20120104 |