CN102082177A - Bulk silicon LDMOS (Laterally Diffused Metal Oxide Semiconductor) device modulated in bulk electric field - Google Patents
Bulk silicon LDMOS (Laterally Diffused Metal Oxide Semiconductor) device modulated in bulk electric field Download PDFInfo
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Abstract
The invention relates to a semiconductor power device technology, solves the problem that the optimization of a device surface electric field is only concerned for the traditional bulk silicon LDMOS (Laterally Diffused Metal Oxide Semiconductor), and provides a bulk silicon LDMOS device modulated in a bulk electric field. A technical scheme is characterized in that: in the bulk silicon LDMOS device modulated in the bulk electric field, a first type impurity substrate is horizontally provided with a second type impurity floating layer, and the vertical distance between the second type impurity floating layer and a second type impurity epitaxial layer is larger than zero. The bulk silicon LDMOS device has the advantages that: by introducing charges of the second type impurity floating layer into the first type impurity substrate, the interaction between the introduced charges and the first type impurity substrate can enhance the surface field of the device, simultaneously promote a depletion layer to extend towards the first type impurity substrate, and reduce the longitudinal electric-field intensity of the device, and in addition, the second type impurity floating layer can be used for modulating a lateral electric field and a longitudinal electric field in a device drift region and is suitable for the bulk silicon LDMOS device.
Description
Technical field
The present invention relates to the technology of semiconductor power device, particularly body silicon LDMOS device.
Background technology
Fast development along with semicon industry, power integrated circuit (PIC) constantly uses in a plurality of fields, as drive controlling of Electric Machine Control, flat panel display drive controlling, computer peripheral equipment or the like, in the circuit in the employed power device, the LDMOS high tension apparatus have operating voltage height, technology simple, be easy to low voltage CMOS circuit characteristics such as compatibility and be subjected to extensive concern on technology.The LDMOS of SOI material or SiC material has been subjected to paying close attention to widely and a large amount of research, but some restrictions of the technology of being subjected to or material itself, they are difficult to be applied among the PIC, and the at present domestic process production line that does not also have based on these two kinds of materials, and it has been quite ripe based on the flowing water processing technology of body silicon materials, body silicon LDMOS device also has greater advantage relatively on cost of manufacture simultaneously, therefore body silicon LDMOS device is subjected to extensive studies equally, conventional body silicon LDMOS device cutaway view such as Fig. 1, it comprises source electrode, drain electrode, the first type impurity substrate 1 and the second type impurity epitaxial loayer 3, the described second type impurity epitaxial loayer 3 comprises first type impurity back of the body gate contact zone 7, the source electrode second type impurity ohmic contact regions 6, the second type impurity device drift region 5 and the second type impurity ohmic contact regions 4 that drains, the described first type impurity substrate 1 is arranged on the horizontal plane, the second type impurity device drift region 5 is arranged on the first type impurity substrate 1, first type impurity back of the body gate contact zone 7 and the source electrode second type impurity ohmic contact regions 6 are mutually arranged side by side, be arranged on the position of the second type impurity device drift region, 5 upper surfaces near source electrode, the described drain electrode second type impurity ohmic contact regions 4 is arranged on the position of the second type impurity device drift region, 5 upper surfaces near drain electrode, wherein the first type impurity is p type impurity or n type impurity, the second type impurity is that (conduction type of p type impurity is an air gap type for n type impurity or p type impurity, the conduction type of n type impurity is an electron type), traditional body silicon LDMOS technology, be subjected to the influence of power device surface knot curvature effect, power device avalanche breakdown often occurs in the surface, what therefore international and domestic colleague mainly paid close attention to is the optimization of device surface electric field, the peak value of device surface electric field can pass through RESURF (REduced SURface Field) technology and some surface termination technology, as floating empty field limiting ring, technology such as drift region varying doping reduce.
Summary of the invention
The objective of the invention is to overcome the shortcoming that present conventional body silicon LDMOS device is only paid close attention to this device surface electric Field Optimization, the body silicon LDMOS device of a kind of body internal field modulation is provided.
The present invention solves its technical problem, the technical scheme that adopts is, the body silicon LDMOS device of body internal field modulation, comprise source electrode, drain electrode, the first type impurity substrate and the second type impurity epitaxial loayer, the described first type impurity substrate is arranged on horizontal plane, the second type impurity epitaxial loayer is arranged on the first type impurity substrate, it is characterized in that, comprise that also the second type impurity floats dead level, the floating dead level of the described second type impurity is horizontally set in the first type impurity substrate, vertical range between the floating dead level of the second type impurity and the second type impurity epitaxial loayer is greater than zero, and the floating dead level of the described second type impurity is identical with the conduction type of the second type impurity epitaxial loayer.
Concrete, the described first type impurity is p type impurity or n type impurity, the second type impurity is n type impurity or p type impurity.
Further, the floating dead level of the described second type impurity, has between per two adjacent areas greater than zero spacing to n the zone that be divided into of being interrupted the end of source electrode from an end of drain electrode.
Concrete, the spacing between identical and per two adjacent areas of described n regional length is identical.
Further again, described gap length is that 2 μ m are to 8 μ m.
Concrete, an end of the floating dead level of the described second type impurity is positioned at drain electrode, and the other end and source electrode have certain horizontal range, and described horizontal range adds the length of the spacing between these two zones greater than two zones.
Further again, the spacing between inequality and per two adjacent areas of length in described n zone is also inequality.
Concrete, the end of described spacing from an end of the drain electrode of the floating dead level of the second type impurity to source electrode increases successively, and the end of described zone length from an end of the drain electrode of the floating dead level of the second type impurity to source electrode reduces successively.
Further again, the concentration of the floating dead level of the described second type impurity is 1e16cm
-3To 2e17cm
-3, its thickness be 1 μ m to 5 μ m, the vertical range of itself and the second type impurity epitaxial loayer is that 5 μ m are to 20 μ m.
The invention has the beneficial effects as follows, body silicon LDMOS device by the modulation of above-mentioned body internal field, it introduces the floating dead level electric charge of the second type impurity in the first type impurity substrate, the electric charge of being introduced and the first type impurity substrate interaction can increase the surface field of this device, it impels depletion layer to extend to the first type impurity substrate simultaneously, reduce this device longitudinal electric field intensity, and the floating dead level of the second type impurity can be modulated for transverse electric field and longitudinal electric field in the second type impurity device drift region, compare conventional LDMOS device, it can obtain bigger puncture voltage on the length of identical drift region, realize the bigger power figure of merit.
Description of drawings
Fig. 1 is conventional body silicon LDMOS device cutaway view;
Fig. 2 is the floating dead level zone length of the body silicon LDMOS device second type impurity of body internal field modulation of present embodiment and the cutaway view when identical at interval;
Fig. 3 is positioned at drain electrode, the cutaway view the when other end and source electrode have certain horizontal range for an end of the floating dead level of the body silicon LDMOS device second type impurity of the body internal field modulation of present embodiment;
Fig. 4 increases successively for the spacing of the floating dead level of the body silicon LDMOS device second type impurity of the body internal field of the present embodiment modulation end from an end of the drain electrode of the floating dead level of the second type impurity to source electrode, the cutaway view the when end of zone length from an end of the drain electrode of the floating dead level of the second type impurity to source electrode reduces successively;
Equipotential lines distribution map when Fig. 5 is conventional body silicon LDMOS device breakdown;
One end of the floating dead level of the second type impurity of Fig. 6 present embodiment is positioned at drain electrode, equipotential lines distribution map during the body silicon LDMOS device breakdown that modulates in the body internal field the when other end and source electrode have certain horizontal range;
Fig. 7 is positioned at drain electrode for an end of the floating dead level of the second type impurity of conventional body silicon LDMOS device and present embodiment, surface field distribution character curve during the body silicon LDMOS device breakdown that modulates in the body internal field the when other end and source electrode have certain horizontal range;
Fig. 8 is positioned at drain electrode for an end of the floating dead level of the second type impurity of conventional body silicon LDMOS device and present embodiment, characteristic curve during the body silicon LDMOS device breakdown that modulates in the body internal field the when other end and source electrode have certain horizontal range;
Wherein, 1 is the first type impurity substrate, and 2 is the floating dead level of the second type impurity, 3 is the second type impurity epitaxial loayer, and 4 are the drain electrode second type impurity ohmic contact regions, and 5 is the second type impurity device drift region, 6 source electrodes, the second type impurity ohmic contact regions, 7 is first type impurity back of the body gate contact zone.
Embodiment
Below in conjunction with drawings and Examples, describe technical scheme of the present invention in detail.
The body silicon LDMOS device of body of the present invention internal field modulation, it has been horizontally disposed with the floating dead level 2 of the second type impurity in the first type impurity substrate 1, vertical range between the floating dead level 2 of the second type impurity and the second type impurity epitaxial loayer 3 is greater than zero, wherein, the floating dead level of the second type impurity is identical with the conduction type of the second type impurity epitaxial loayer, because it introduces floating dead level 2 electric charges of the second type impurity in the first type impurity substrate 1, electric charge of being introduced and 1 interaction of the first type impurity substrate can increase the surface field of this device, it impels depletion layer to extend to the first type impurity substrate 1 simultaneously, reduce this device longitudinal electric field intensity, and the floating dead level 2 of the second type impurity can be modulated for transverse electric field and longitudinal electric field in the second type impurity device drift region 5.
Embodiment
The floating dead level 2 of the second type impurity of the body silicon LDMOS device of this routine body internal field modulation from an end of source electrode to be interrupted the end of drain electrode be divided into n regional, has spacing between per two adjacent areas greater than zero, cutaway view such as Fig. 2 when floating dead level zone length of its second type impurity and interval are identical, one end of the floating dead level of its second type impurity is positioned at drain electrode, cutaway view when the other end and source electrode have certain horizontal range such as Fig. 3, the end of the spacing of the floating dead level of its second type impurity from an end of the drain electrode of the floating dead level of the second type impurity to source electrode increases successively, cutaway view such as Fig. 4 when the end of zone length from an end of the drain electrode of the floating dead level of the second type impurity to source electrode reduces successively, equipotential lines distribution map such as Fig. 5 during routine body silicon LDMOS device breakdown, one end of the floating dead level of the second type impurity of present embodiment is positioned at drain electrode, equipotential lines distribution map such as Fig. 6 during the body silicon LDMOS device breakdown of body internal field when the other end and source electrode have certain horizontal range modulation, one end of the floating dead level of the second type impurity of conventional body silicon LDMOS device and present embodiment is positioned at drain electrode, surface field distribution character curve such as Fig. 7 during the body silicon LDMOS device breakdown of body internal field when the other end and source electrode have certain horizontal range modulation, conventional body silicon LDMOS device is positioned at drain electrode with an end of the floating dead level of the second type impurity of present embodiment, characteristic curve such as Fig. 8 during the body silicon LDMOS device breakdown that modulates in the body internal field the when other end and source electrode have certain horizontal range.
The body silicon LDMOS device of this body internal field modulation has been horizontally disposed with the floating dead level 2 of the second type impurity in the first type impurity substrate 1, vertical range between the floating dead level 2 of the second type impurity and the second type impurity epitaxial loayer 3 is greater than zero, wherein, the floating dead level of the second type impurity is identical with the conduction type of the second type impurity epitaxial loayer, when the first type impurity is p type impurity, the second type impurity is n type impurity, when the first type impurity is n type impurity, the second type impurity is p type impurity, the floating dead level 2 of its second type impurity from an end of source electrode to be interrupted the end of drain electrode be divided into n regional, has spacing between per two adjacent areas greater than zero, wherein, the length in n zone can be identical or inequality, spacing between per two adjacent areas also can be identical or inequality, when the spacing between identical and per two adjacent areas of length in n zone is also identical, its spacing length is that 2 μ m are to 8 μ m, one end of the floating dead level 2 of the second type impurity can also be arranged on drain locations, the other end is arranged on the position that has certain horizontal range with source electrode, this horizontal range adds the length of the spacing between these two zones greater than two zones, when the spacing between inequality and per two adjacent areas of length in n zone is also inequality, the end of spacing from an end of the drain electrode of the floating dead level 2 of the second type impurity to source electrode increased successively, its increase amplitude can be identical, the end of zone length from an end of the drain electrode of the floating dead level of the second type impurity to source electrode reduces successively, it reduces amplitude also can be identical, wherein, the concentration of the floating dead level of the second type impurity is 1e16cm
-3To 2e17cm
-3, its thickness be 1 μ m to 5 μ m, the vertical range of itself and the second type impurity epitaxial loayer is that 5 μ m are to 20 μ m.
Equipotential lines distribution map such as Fig. 5 during routine body silicon LDMOS device breakdown, its adjacent equipotential lines voltage difference is 10V, as can be seen from Figure 5 electric field is sparse in its second type impurity device drift region 5, and the electrical bending amount is bigger in the second type impurity device drift region 5, and this LDMOS device fails to reach making full use of of the second type impurity device drift region 5; One end of the floating dead level of the second type impurity of present embodiment is positioned at drain electrode, equipotential lines distribution map such as Fig. 6 during the body silicon LDMOS device breakdown of body internal field when the other end and source electrode have certain horizontal range modulation, its adjacent equipotential lines voltage difference is 10V, as can be seen from Figure 6 because the factor that the floating dead level 2 of the second type impurity exists, the equipotential lines of its second type impurity device drift region 5 is by vertically stretching, just begin to show the curved shape of conventional LDMOS device up to its equipotential lines of floating dead level 2 places of the second type impurity, so having more uniform surface field, the body silicon LDMOS device of the body internal field that present embodiment provides modulation distributes, simultaneously because the electric field of 3 of the floating dead level 2 of the second type impurity and the second type impurity epitaxial loayers is more straight, its longitudinal component is less, so its depletion layer is more expanded to longitudinal direction than conventional LDMOS device, make the designed LDMOS device that goes out not have vertical withstand voltage restriction, under the thin second type impurity epitaxial loayer, 3 situations, it is considerable equally that it is withstand voltage; One end of the floating dead level of the second type impurity of conventional body silicon LDMOS device and present embodiment is positioned at drain electrode, surface field distribution character curve such as Fig. 7 during the body silicon LDMOS device breakdown of body internal field when the other end and source electrode have certain horizontal range modulation, wherein, X-axis is represented the horizontal direction distance, Y-axis is represented electric field, the body silicon LDMOS device of the body internal field modulation that present embodiment provided as can be seen from Fig. 7 is because the effect of the floating dead level 2 of the second type impurity, and its surface field is compared conventional LDMOS device and distributed more even; One end of the floating dead level of the second type impurity of conventional body silicon LDMOS device and present embodiment is positioned at drain electrode, characteristic curve such as Fig. 8 during the body silicon LDMOS device breakdown of body internal field when the other end and source electrode have certain horizontal range modulation, wherein, X-axis is represented drain voltage, Y-axis is represented drain current, as can be seen because the body silicon LDMOS device of the body internal field of present embodiment modulation has obtained the 560V puncture voltage, and conventional body silicon LDMOS device electric breakdown strength only has 440V from Fig. 8.
Claims (10)
1. the body silicon LDMOS device of body internal field modulation, comprise source electrode, drain electrode, the first type impurity substrate and the second type impurity epitaxial loayer, the described first type impurity substrate is arranged on horizontal plane, the second type impurity epitaxial loayer is arranged on the first type impurity substrate, it is characterized in that, comprise that also the second type impurity floats dead level, the floating dead level of the described second type impurity is horizontally set in the first type impurity substrate, vertical range between the floating dead level of the second type impurity and the second type impurity epitaxial loayer is greater than zero, and the floating dead level of the described second type impurity is identical with the conduction type of the second type impurity epitaxial loayer.
2. according to the body silicon LDMOS device of the described body of claim 1 internal field modulation, it is characterized in that the described first type impurity is p type impurity or n type impurity, the second type impurity is n type impurity or p type impurity.
3. according to the body silicon LDMOS device of the described body of claim 2 internal field modulation, it is characterized in that the floating dead level of the described second type impurity, has between per two adjacent areas greater than zero spacing to n the zone that be divided into of being interrupted the end of source electrode from an end of drain electrode.
4. according to the body silicon LDMOS device of the described body of claim 3 internal field modulation, it is characterized in that the spacing between identical and per two adjacent areas of described n regional length is identical.
5. according to the body silicon LDMOS device of the described body of claim 4 internal field modulation, it is characterized in that described gap length is that 2 μ m are to 8 μ m.
6. according to the body silicon LDMOS device of claim 4 or 5 described body internal fields modulation, it is characterized in that, one end of the floating dead level of the described second type impurity is positioned at drain electrode, the other end and source electrode have certain horizontal range, and described horizontal range adds the length of the spacing between these two zones greater than two zones.
7. according to the body silicon LDMOS device of the described body of claim 6 internal field modulation, it is characterized in that the concentration of the floating dead level of the described second type impurity is 1e16cm
-3To 2e17cm
-3, its thickness be 1 μ m to 5 μ m, the vertical range of itself and the second type impurity epitaxial loayer is that 5 μ m are to 20 μ m.
8. according to the body silicon LDMOS device of the described body of claim 3 internal field modulation, it is characterized in that the spacing between inequality and per two adjacent areas of described n regional length is also inequality.
9. the body silicon LDMOS device of described according to Claim 8 body internal field modulation, it is characterized in that, the end of described spacing from an end of the drain electrode of the floating dead level of the second type impurity to source electrode increases successively, and the end of described zone length from an end of the drain electrode of the floating dead level of the second type impurity to source electrode reduces successively.
10. according to the body silicon LDMOS device of claim 1 or the modulation of 2 or 3 or 4 or 5 or 8 or 9 described body internal fields, it is characterized in that the concentration of the floating dead level of the described second type impurity is 1e16cm
-3To 2e17cm
-3, its thickness be 1 μ m to 5 μ m, the vertical range of itself and the second type impurity epitaxial loayer is that 5 μ m are to 20 μ m.
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102306657A (en) * | 2011-10-13 | 2012-01-04 | 电子科技大学 | Insulated gate bipolar transistor with floating buried layer |
| CN102306659A (en) * | 2011-09-08 | 2012-01-04 | 浙江大学 | LDMOS (laterally double-diffused metal-oxide-semiconductor field effect transistor) device based on internal electric field modulation |
| CN103928526A (en) * | 2014-04-28 | 2014-07-16 | 重庆大学 | Transverse power MOS high-voltage device |
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| CN1695255A (en) * | 2002-10-31 | 2005-11-09 | 飞思卡尔半导体公司 | Semiconductor component and method of manufacturing same |
| CN101577291A (en) * | 2008-05-06 | 2009-11-11 | 世界先进积体电路股份有限公司 | High-voltage semiconductor element device |
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- 2010-12-08 CN CN 201010579333 patent/CN102082177A/en active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1695255A (en) * | 2002-10-31 | 2005-11-09 | 飞思卡尔半导体公司 | Semiconductor component and method of manufacturing same |
| CN101577291A (en) * | 2008-05-06 | 2009-11-11 | 世界先进积体电路股份有限公司 | High-voltage semiconductor element device |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102306659A (en) * | 2011-09-08 | 2012-01-04 | 浙江大学 | LDMOS (laterally double-diffused metal-oxide-semiconductor field effect transistor) device based on internal electric field modulation |
| CN102306659B (en) * | 2011-09-08 | 2013-06-19 | 浙江大学 | LDMOS (laterally double-diffused metal-oxide-semiconductor field effect transistor) device based on internal electric field modulation |
| CN102306657A (en) * | 2011-10-13 | 2012-01-04 | 电子科技大学 | Insulated gate bipolar transistor with floating buried layer |
| CN103928526A (en) * | 2014-04-28 | 2014-07-16 | 重庆大学 | Transverse power MOS high-voltage device |
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Application publication date: 20110601 |