CN107871778B - Lateral double-diffusion metal oxide semiconductor field effect transistor with potential floating type field plate - Google Patents
Lateral double-diffusion metal oxide semiconductor field effect transistor with potential floating type field plate Download PDFInfo
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- CN107871778B CN107871778B CN201711032799.2A CN201711032799A CN107871778B CN 107871778 B CN107871778 B CN 107871778B CN 201711032799 A CN201711032799 A CN 201711032799A CN 107871778 B CN107871778 B CN 107871778B
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 26
- 229910044991 metal oxide Inorganic materials 0.000 title claims abstract description 18
- 150000004706 metal oxides Chemical class 0.000 title claims abstract description 18
- 230000005669 field effect Effects 0.000 title claims abstract description 13
- 238000009792 diffusion process Methods 0.000 title abstract description 5
- 239000002184 metal Substances 0.000 claims abstract description 44
- 230000006698 induction Effects 0.000 claims abstract description 19
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 10
- 239000000758 substrate Substances 0.000 claims description 6
- 230000005684 electric field Effects 0.000 abstract description 8
- 230000015556 catabolic process Effects 0.000 abstract description 6
- 238000000034 method Methods 0.000 description 7
- 229920005591 polysilicon Polymers 0.000 description 7
- 238000005516 engineering process Methods 0.000 description 5
- 230000003071 parasitic effect Effects 0.000 description 4
- 230000008569 process Effects 0.000 description 4
- 238000010586 diagram Methods 0.000 description 2
- 230000006872 improvement Effects 0.000 description 2
- 230000000295 complement effect Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7833—Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's
- H01L29/7835—Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's with asymmetrical source and drain regions, e.g. lateral high-voltage MISFETs with drain offset region, extended drain MISFETs
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/402—Field plates
- H01L29/404—Multiple field plate structures
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/7816—Lateral DMOS transistors, i.e. LDMOS transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
- H01L29/42364—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the insulating layer, e.g. thickness or uniformity
- H01L29/42368—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the insulating layer, e.g. thickness or uniformity the thickness being non-uniform
Abstract
The invention discloses an N-type transverse double-diffusion metal oxide semiconductor field effect transistor with a charge adjustable field plate, which comprises: the field oxide layer is arranged on the surface of the field oxide layer and is provided with a plurality of charge adjustable field plates, each charge adjustable field plate is connected with a metal induction layer, the P-type contact region and the N-type source region are connected with source electrode metal, and the source electrode metal completely covers all the metal induction layers. The structure can enable the whole drift region of the device to obtain uniform surface transverse electric field distribution, has high transverse voltage resistance, and can improve the doping concentration of the drift region of the device under the condition of keeping high breakdown voltage, thereby obtaining low on-resistance.
Description
Technical Field
The invention relates to the field of power semiconductor devices, in particular to a lateral double-diffused metal oxide semiconductor field effect transistor (LDMOS) suitable for high-voltage application, and is suitable for a driving chip in the high-voltage and low-current fields of printers, motors, flat-panel displays and the like.
Background
A lateral double diffused metal oxide semiconductor transistor (LDMOS) is a lateral high voltage device of a double diffused metal oxide semiconductor transistor Device (DMOS). The method has the advantages of high withstand voltage, large gain, low distortion and the like, and is more compatible with a CMOS (complementary metal oxide semiconductor) process, so that the method is widely applied to an intelligent power integrated circuit. The current design of the lateral double-diffused metal oxide semiconductor (LDMOS) is focused on how to reasonably mitigate the contradiction between the breakdown voltage and the on-resistance and ensure higher stability. Currently, people mainly focus on the design of the concentration of a drift region of a lateral double-diffused metal oxide semiconductor transistor (LDMOS), and compromise between breakdown voltage and on-resistance is realized by reducing the surface electric field strength (RESURF) of a device through a buried layer technology, and by using technologies such as a resistance field plate, a Super Junction, drift region gradient doping and the like.
In order to make the device have better functions, it is an important research topic to improve the breakdown voltage of the device. The field plate technology is an effective means for optimizing the surface electric field of the LDMOS device, and the traditional field plate technology cannot enable the device to obtain uniform surface electric field distribution and has room for improvement. Meanwhile, the potential of the traditional field plate is fixed to be a low potential, so that the traditional field plate only acts in the state that the device is switched off and is resistant to voltage, and the current capability of the device cannot be adjusted in the state that the device is switched on. Therefore, there is room for further improvement in conventional field plate technology.
Disclosure of Invention
The invention discloses a transverse double-diffusion metal oxide semiconductor field effect transistor with a potential floating type field plate, which can improve the transverse electric field distribution on the surface of a device, improve the transverse voltage-resisting capability of the device and reduce the on-resistance of the device.
The technical scheme of the invention is as follows:
a transverse double-diffusion metal oxide semiconductor field effect transistor with a potential floating type field plate comprises a P-type semiconductor substrate, wherein an N-type drift region and a P-type well are arranged on the P-type semiconductor substrate, an N-type source region and a P-type contact region are arranged on the P-type well, an N-type drain region and a field oxide layer are arranged on the N-type drift region, a gate oxide layer is arranged above part of the N-type drift region and part of the P-type well, one end of the gate oxide layer is abutted against the boundary of the N-type source region, the other end of the gate oxide layer is abutted against the boundary of the field oxide layer, a polysilicon gate is arranged on the surface of the gate oxide layer and extends to the upper part of the field oxide layer, dielectric layers are arranged on the surfaces of part of the P-type well, the P-type contact region, the N-type source region, the polysilicon gate, the N-type drain region and part of the field oxide layer, the field oxide layer is provided with a first charge adjustable field plate, a second charge adjustable field plate and a third charge adjustable field plate on the surface, the first charge adjustable field plate is connected with a first metal induction layer, the second charge adjustable field plate is connected with a second metal induction layer, the third charge adjustable field plate is connected with a third metal induction layer, the surface of the dielectric layer is provided with a field plate potential adjusting electrode, and the field plate potential adjusting electrode completely covers the first metal induction layer, the second metal induction layer and the third metal induction layer;
the potential of the field plate potential adjusting electrode is related to the working state of the device, and when the device is in a turn-off state, the field plate potential adjusting electrode is connected with a low potential to assist the depletion of the N-type drift region and improve the transverse voltage-resisting capability of the device; when the device is in a conducting state, the field plate potential adjusting electrode is connected with a high potential, the carrier concentration in the N-type drift region is improved, and the current capacity of the device is improved.
Furthermore, the lengths of the first charge-adjustable field plate, the second charge-adjustable field plate, the third charge-adjustable field plate, the first metal induction layer, the second metal induction layer and the third metal induction layer are different from each other, and can be respectively adjusted according to design requirements.
The invention further discloses a driving chip applied to a printer, a motor or a flat panel display, which comprises the transverse double-diffused metal oxide semiconductor field effect transistor with the potential floating type field plate.
The invention further discloses a printer, and the driving chip is adopted.
The invention further discloses a motor which adopts the driving chip.
The invention further discloses a flat panel display which adopts the driving chip.
Compared with the prior art, the invention has the following advantages:
(1) in the structure of the present invention, the first charge-tunable field plate 121 is connected to the first metal sensing layer 131, so that a parasitic capacitance between the first charge-tunable field plate 121 and the N-type drift region 2 and a parasitic capacitance between the first metal sensing layer 131 and the source metal 14 form a series relationship, and therefore, the induced potentials of the first charge-tunable field plate 121 and the first metal sensing layer 131 are influenced by the magnitude of the parasitic capacitance between the first charge-tunable field plate 121 and the N-type drift region 2 and the magnitude of the parasitic capacitance between the first metal sensing layer 131 and the source metal 14. Therefore, the charge on the first charge-tunable field plate 121 and the induced charge on the first charge-tunable field plate 121 can be adjusted by adjusting the length of the first charge-tunable field plate 121 and the length of the first metal induction layer 131. Similarly, the potential of the second charge-tunable field plate 122 and the induced charge on the second charge-tunable field plate 122 can be adjusted by the length of the second charge-tunable field plate 122 and the length of the second metal sensing layer 132, and the potential of the third charge-tunable field plate 123 and the induced charge on the third charge-tunable field plate 123 can be adjusted by the length of the third charge-tunable field plate 123 and the length of the third metal sensing layer 133.
(2) The quantity of the induced charges on the first charge-adjustable field plate 121 can be adjusted to offset the negative charges induced on the first charge-adjustable field plate 121 and the positive space charges in the N-type drift region 2, so that the lateral electric field on the surface of the device under the first charge-adjustable field plate 121 is uniformly distributed. Referring to fig. 2, the device with the structure of the invention has very uniform surface lateral electric field distribution in the whole drift region under breakdown state.
(3) The induced charge amounts on the first charge-adjustable field plate 121, the second charge-adjustable field plate 122 and the third charge-adjustable field plate 123 in the structure of the invention can be adjusted, so that after the doping concentration of the N-type drift region 2 of the device is increased, the induced charges on the first charge-adjustable field plate 121, the second charge-adjustable field plate 122 and the third charge-adjustable field plate 123 can be adjusted to enable the device to obtain uniform surface transverse electric field distribution in the whole drift region, and therefore, the structure of the invention can reduce the on-resistance of the device by increasing the doping concentration of the N-type drift region 2 under the condition of keeping high breakdown voltage.
(4) The first charge-tunable field plate 121, the second charge-tunable field plate 122, the third charge-tunable field plate 123, the first metal sensing layer 131, the second metal sensing layer 132, and the third metal sensing layer 133 in the structure of the present invention can be implemented by using a polysilicon gate or an interconnection metal in a conventional CMOS process, and do not require additional process steps, so that the structure of the present invention is completely compatible with the conventional CMOS process, and does not increase process cost.
Drawings
Fig. 1 is a schematic diagram of a lateral double-diffused metal oxide semiconductor field effect transistor structure with a potential floating type field plate according to the present invention.
Fig. 2 is a schematic diagram of potential changes of the polysilicon gate and the field plate potential adjusting electrode of the device with the structure of the invention in a working state.
The specific implementation mode is as follows:
referring to fig. 1, a lateral double diffused metal oxide semiconductor field effect transistor with a potential floating type field plate includes: the semiconductor device comprises a P-type semiconductor substrate 1, wherein an N-type drift region 2 and a P-type well 3 are arranged on the P-type semiconductor substrate 1, an N-type source region 4 and a P-type contact region 5 are arranged on the P-type well 3, an N-type drain region 6 and a field oxide layer 7 are arranged on the N-type drift region 2, a gate oxide layer 8 is arranged above part of the N-type drift region 2 and part of the P-type well 3, one end of the gate oxide layer 8 is abutted against the boundary of the N-type source region 4, the other end of the gate oxide layer 8 is abutted against the boundary of the field oxide layer 7, a polysilicon gate 9 is arranged on the surface of the gate oxide layer 8, the polysilicon gate 9 extends to the upper part of the field oxide layer 7, a dielectric layer 10 is arranged on the surfaces of part of the P-type well 3, the P-type contact region 5, the N-type source region 4, the polysilicon gate 9, the N-type drain region 6 and part of the field oxide layer 7, a, the field oxide layer 7 is provided with a first charge-adjustable field plate 121, a second charge-adjustable field plate 122 and a third charge-adjustable field plate 123 on the surface, the first charge-adjustable field plate 121 is connected with a first metal sensing layer 131, the second charge-adjustable field plate 122 is connected with a second metal sensing layer 132, the third charge-adjustable field plate 123 is connected with a third metal sensing layer 133, the surface of the dielectric layer 10 is provided with a field plate potential adjusting electrode 15, and the field plate potential adjusting electrode 15 completely covers the first metal sensing layer 131, the second metal sensing layer 132 and the third metal sensing layer 133;
the potential of the field plate potential adjusting electrode 15 is related to the working state of the device, when the device is in a turn-off state, the field plate potential adjusting electrode 15 is connected with a low potential to assist the depletion of the N-type drift region 2, so that the transverse voltage resistance of the device is improved; when the device is in a conducting state, the field plate potential adjusting electrode 15 is connected with a high potential, so that the carrier concentration in the N-type drift region 2 is improved, and the current capacity of the device is improved.
In the present invention, the lengths of the first charge-tunable field plate 121, the second charge-tunable field plate 122, the third charge-tunable field plate 123, the first metal sensing layer 131, the second metal sensing layer 132 and the third metal sensing layer 133 are different from each other, and can be respectively adjusted according to design requirements.
The invention further discloses a driving chip applied to a printer, a motor or a flat panel display, wherein the chip adopts the transverse double-diffused metal oxide semiconductor field effect transistor with the potential floating type field plate.
The invention further discloses a printer, a motor or a flat panel display, and the devices all adopt a driving chip comprising the transverse double-diffused metal oxide semiconductor field effect transistor with the potential floating type field plate.
Although the embodiments of the present invention have been described with reference to the accompanying drawings, it is not intended to limit the scope of the present invention, and it should be understood by those skilled in the art that various modifications and variations can be made without inventive efforts by those skilled in the art based on the technical solution of the present invention.
Claims (6)
1. Lateral double-diffused metal oxide semiconductor field effect transistor with potential floating type field plate includes: p type semiconductor substrate (1), be provided with N type drift region (2) and P type trap (3) on P type semiconductor substrate (1), be equipped with N type source region (4) and P type contact zone (5) on P type trap (3), be equipped with N type drain region (6) and field oxide (7) on N type drift region (2), be equipped with gate oxide (8) in partial N type drift region (2) and partial P type trap (3) top, and the one end of gate oxide (8) offsets with the border of N type source region (4), the other end of gate oxide (8) offsets with the border of field oxide (7), is equipped with polycrystalline silicon gate (9) on gate oxide (8) surface, and polycrystalline silicon gate (9) extend to the top of field oxide (7), at partial P type trap (3), P type contact zone (5), N type source region (4), polycrystalline silicon gate (9), The field oxide layer-type field-type transistor is characterized in that a first charge-adjustable field plate (121), a second charge-adjustable field plate (122) and a third charge-adjustable field plate (123) are arranged on the surface of the field oxide layer (7), the first charge-adjustable field plate (121) is connected with a first metal induction layer (131), the second charge-adjustable field plate (122) is connected with a second metal induction layer (132), the third charge-adjustable field plate (123) is connected with a third metal induction layer (133), a field plate potential adjusting electrode (15) is arranged on the surface of the dielectric layer (10), and the potential adjusting electrode (15) completely covers the first metal induction layer (131) and the field oxide layer (4), A second metal sensing layer (132) and a third metal sensing layer (133);
the potential of the field plate potential adjusting electrode (15) is related to the working state of the device, when the device is in a turn-off state, the field plate potential adjusting electrode (15) is connected with a low potential to assist the depletion of the N-type drift region (2), so that the transverse voltage resistance of the device is improved; when the device is in a conducting state, the field plate potential adjusting electrode (15) is connected with a high potential, so that the carrier concentration in the N-type drift region (2) is improved, and the current capacity of the device is improved.
2. The lateral double-diffused metal oxide semiconductor field effect transistor with a potential floating field plate according to claim 1, wherein the lengths of the first charge-tunable field plate (121), the second charge-tunable field plate (122), the third charge-tunable field plate (123), the first metal induction layer (131), the second metal induction layer (132) and the third metal induction layer (133) are different and can be adjusted respectively according to design requirements.
3. A driver chip for a printer, a motor or a flat panel display, wherein the lateral double diffused mosfet with a floating potential type field plate according to any of claims 1 to 2 is used.
4. A printer characterized by using the driver chip according to claim 3.
5. An electric motor, characterized in that the driving chip of claim 3 is used.
6. A flat panel display characterized by using the driving chip of claim 3.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201711032799.2A CN107871778B (en) | 2017-10-30 | 2017-10-30 | Lateral double-diffusion metal oxide semiconductor field effect transistor with potential floating type field plate |
| PCT/CN2018/112150 WO2019085835A1 (en) | 2017-10-30 | 2018-10-26 | Super field plate structure adapted for power semiconductor device, and application thereof |
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| CN201711032799.2A CN107871778B (en) | 2017-10-30 | 2017-10-30 | Lateral double-diffusion metal oxide semiconductor field effect transistor with potential floating type field plate |
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| CN107871778A CN107871778A (en) | 2018-04-03 |
| CN107871778B true CN107871778B (en) | 2020-09-04 |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| WO2019085835A1 (en) * | 2017-10-30 | 2019-05-09 | 济南大学 | Super field plate structure adapted for power semiconductor device, and application thereof |
| CN108847422B (en) * | 2018-06-15 | 2021-08-06 | 济南大学 | High electron mobility transistor with coupled field plate |
| CN110416301A (en) * | 2018-04-28 | 2019-11-05 | 中芯国际集成电路制造(上海)有限公司 | Lateral double-diffused transistor and forming method thereof |
| CN111755417B (en) * | 2019-03-27 | 2022-04-12 | 中芯国际集成电路制造(北京)有限公司 | Semiconductor structure and forming method thereof |
| CN113130632B (en) * | 2019-12-31 | 2022-08-12 | 无锡华润上华科技有限公司 | Lateral diffusion metal oxide semiconductor device and preparation method thereof |
| CN113410303A (en) * | 2020-09-22 | 2021-09-17 | 杰华特微电子股份有限公司 | LDMOS device and manufacturing method thereof |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104752512A (en) * | 2015-01-09 | 2015-07-01 | 电子科技大学 | Transverse high-voltage device with multi-electrode structure |
| CN106653830A (en) * | 2015-10-28 | 2017-05-10 | 无锡华润上华半导体有限公司 | Semiconductor device voltage-withstanding structure |
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| US20040201078A1 (en) * | 2003-04-11 | 2004-10-14 | Liping Ren | Field plate structure for high voltage devices |
| CN102790086B (en) * | 2012-07-10 | 2016-03-30 | 苏州远创达科技有限公司 | There is LDMOS device and the manufacture method of the multiple discontinuous field plate of staged |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104752512A (en) * | 2015-01-09 | 2015-07-01 | 电子科技大学 | Transverse high-voltage device with multi-electrode structure |
| CN106653830A (en) * | 2015-10-28 | 2017-05-10 | 无锡华润上华半导体有限公司 | Semiconductor device voltage-withstanding structure |
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