CN107871778A - Lateral double diffusion metal oxide semiconductor FET with potential fluctuation type field plate - Google Patents
Lateral double diffusion metal oxide semiconductor FET with potential fluctuation type field plate Download PDFInfo
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- CN107871778A CN107871778A CN201711032799.2A CN201711032799A CN107871778A CN 107871778 A CN107871778 A CN 107871778A CN 201711032799 A CN201711032799 A CN 201711032799A CN 107871778 A CN107871778 A CN 107871778A
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 26
- 238000009792 diffusion process Methods 0.000 title claims abstract description 15
- 229910044991 metal oxide Inorganic materials 0.000 title claims abstract description 14
- 150000004706 metal oxides Chemical class 0.000 title claims abstract description 14
- 239000002184 metal Substances 0.000 claims abstract description 50
- 230000001939 inductive effect Effects 0.000 claims abstract description 44
- 239000000758 substrate Substances 0.000 claims abstract description 7
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 10
- 229920005591 polysilicon Polymers 0.000 claims description 10
- 238000013461 design Methods 0.000 claims description 5
- 230000005669 field effect Effects 0.000 claims description 4
- 230000005684 electric field Effects 0.000 abstract description 9
- 230000005611 electricity Effects 0.000 description 5
- 238000000034 method Methods 0.000 description 5
- 238000005516 engineering process Methods 0.000 description 4
- 230000003071 parasitic effect Effects 0.000 description 4
- 240000002853 Nelumbo nucifera Species 0.000 description 3
- 235000006508 Nelumbo nucifera Nutrition 0.000 description 3
- 235000006510 Nelumbo pentapetala Nutrition 0.000 description 3
- 230000015556 catabolic process Effects 0.000 description 3
- 230000008569 process Effects 0.000 description 3
- 230000008901 benefit Effects 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 230000001965 increasing effect Effects 0.000 description 2
- 230000003647 oxidation Effects 0.000 description 2
- 238000007254 oxidation reaction Methods 0.000 description 2
- 230000008859 change Effects 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 238000011160 research Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7833—Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's
- H01L29/7835—Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's with asymmetrical source and drain regions, e.g. lateral high-voltage MISFETs with drain offset region, extended drain MISFETs
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/402—Field plates
- H01L29/404—Multiple field plate structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/7816—Lateral DMOS transistors, i.e. LDMOS transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
- H01L29/42364—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the insulating layer, e.g. thickness or uniformity
- H01L29/42368—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the insulating layer, e.g. thickness or uniformity the thickness being non-uniform
Abstract
The invention discloses a kind of N-type lateral double diffusion metal oxide semiconductor FET with electric charge adjustable type field plate, including：P-type semiconductor substrate, P-type semiconductor substrate is provided with N-type drift region and p-type trap, N-type source region, p-type contact zone and gate oxide are provided with p-type trap, N-type drain region and field oxide are provided with N-type drift region, characterized in that, the field oxide surface is provided with multiple electric charge adjustable type field plates, metal inductive layer is respectively connected with each electric charge adjustable type field plate, source metal is connected with p-type contact zone and N-type source region, all metal inductive layers are completely covered in the source metal.The structure can make the whole drift region of device obtain uniform surface transverse electric field distribution, have very high horizontal voltage endurance capability, the drift doping concentration of device can be improved under conditions of high-breakdown-voltage is kept, so as to obtain low conducting resistance.
Description
Technical field
The present invention relates to power semiconductor field, is on a kind of horizontal stroke suitable for high-voltage applications in particular
To double-diffusion metal-oxide-semiconductor field effect transistor (LDMOS), suitable for printer, motor, the contour electricity of flat-panel monitor
Pressure, the driving chip in low current field.
Background technology
Lateral double-diffused metal-oxide-semiconductor transistor (LDMOS) is dmost
A kind of lateral high-voltage device of device (DMOS).With high pressure, the advantage such as gain is big, distortion is low, and it is more easy to and CMOS works
Skill is compatible, therefore is widely used in smart-power IC.Lateral double diffusion metal oxide semiconductor at present
The emphasis of transistor (LDMOS) design is how rationally to relax the contradiction between breakdown voltage and conducting resistance, and ensures it
There is higher stability.The focus master that current people are studied lateral double-diffused metal-oxide-semiconductor transistor (LDMOS)
The design of its drift region concentration is concentrated on, device surface electric-field intensity (Reducd Sfurace are reduced by buried regions technology
Field, abbreviation RESURF), and the technology such as resistance field plate, Super Junction, drift region gradient doping hits to realize
Wear the compromise of voltage and conducting resistance.
To make device have more preferable effect, the breakdown voltage for improving device is an important research topic.Field plate techniques are
Optimize a kind of effective means of LDMOS device surface field, and traditional field plate techniques can not make device obtain uniform table
Face Electric Field Distribution, still leaves some room for improvement.Meanwhile the current potential of traditional field plate is fixed as low potential, cause traditional field plate only in device
Part turns off to work under resistance to pressure condition, and can not be in the current capacity of adjusting means under device on-state.So traditional field plate
Technology also has further improved space.
The content of the invention
, should the invention discloses the lateral double diffusion metal oxide semiconductor FET with potential fluctuation type field plate
Device can improve the transverse electric field distribution of device surface, improve the horizontal voltage endurance capability of device, reduce the conducting resistance of device.
Technical scheme is as follows：
Lateral double diffusion metal oxide semiconductor FET with potential fluctuation type field plate, including P type semiconductors
Substrate, N-type drift region and p-type trap are provided with P-type semiconductor substrate, N-type source region and p-type contact zone are provided with p-type trap,
N-type drain region and field oxide are provided with N-type drift region, gate oxidation is provided with above part N-type drift region and part p-type trap
Layer, and one end of gate oxide and the border of N type source regions offset, the other end of the gate oxide and the border of field oxide
Offset, polysilicon gate is provided with gate oxide surface, and polysilicon gate extends to the top of field oxide, p-type trap, P in part
Type contact zone, N-type source region, polysilicon gate, the surface of N-type drain region and part field oxide are provided with dielectric layer, connect on N-type drain region
Drain metal is connected to, source metal is connected with p-type contact zone and N-type source region, it is characterised in that the field oxide surface
Provided with the first electric charge adjustable type field plate, the second electric charge adjustable type field plate and tricharged adjustable type field plate, first electric charge can
The first metal inductive layer is connected with tune type field plate, the second metal inductive layer is connected with the second electric charge adjustable type field plate,
The 3rd metal inductive layer is connected with the tricharged adjustable type field plate, the dielectric layer surface is provided with field plate current potential regulation electricity
Pole, and the first metal inductive layer, the second metal inductive layer and the 3rd metal inductive layer is completely covered in field plate current potential regulation electrode；
The current potential of the field plate current potential regulation electrode is relevant with device working condition, when device is off state, field
Plate current potential regulation electrode connection low potential, aids in exhausting for N-type drift region, improves device transverse direction voltage endurance capability；When device is in
During conducting state, field plate current potential regulation electrode connection high potential, the carrier concentration in N types drift region is improved, improves device
Current capacity.
Further, the first electric charge adjustable type field plate, the second electric charge adjustable type field plate, tricharged adjustable type field
Plate, the first metal inductive layer, the length of the second metal inductive layer and the 3rd metal inductive layer are different, can be according to design need
To be adjusted respectively.
The present invention further discloses a kind of driving chip applied to printer, motor or flat-panel monitor, bag
Include, using any of the above-described kind of lateral double diffusion metal oxide semiconductor FET for carrying potential fluctuation type field plate.
The present invention further discloses a kind of printer, using above-mentioned driving chip.
The present invention further discloses a kind of motor, using above-mentioned driving chip.
The present invention further discloses a kind of flat-panel monitor, using above-mentioned driving chip.
Compared with prior art, the invention has the advantages that：
(1) first electric charge adjustable type field plate 121 is connected with the first metal inductive layer 131 in structure of the present invention, so, first
Parasitic capacitance between electric charge adjustable type field plate 121 and N-type drift region 2 and the first metal inductive layer 131 and source metal 14 it
Between parasitic capacitance formed series relationship, therefore, the sensing of the first electric charge adjustable type field plate 121 and the first metal inductive layer 131
Parasitic capacitance size and first metal inductive layer of the current potential between by the first electric charge adjustable type field plate 121 and N-type drift region 2
Parasitic capacitance size between 131 and source metal 14 influences.So length by adjusting the first electric charge adjustable type field plate 121
The length of degree and the first metal inductive layer 131 is the electric charge and the first electric charge of adjustable first electric charge adjustable type field plate 121
Charge inducing on adjustable type field plate 121.Similarly, the current potential and the second electric charge adjustable type of the second electric charge adjustable type field plate 122
Charge inducing on field plate 122 can pass through the length of the second electric charge adjustable type field plate 122 and the second metal inductive layer 132
Length is adjusted, the charge inducing on the current potential and tricharged adjustable type field plate 123 of tricharged adjustable type field plate 123
It can be adjusted by the length of tricharged adjustable type field plate 123 and the length of the 3rd metal inductive layer 133.
(2) the first electric charge adjustable type can be made by adjusting the charge inducing quantity on the first electric charge adjustable type field plate 121
The negative electrical charge sensed on field plate 121 is cancelled out each other with the positive space charge in N-type drift region 2 so that the first electric charge adjustable type field
The device surface transverse electric field distribution of the lower section of plate 121 is uniform, and similarly, the second electric charge adjustable type field plate 122 and tricharged are adjustable
The lower section of type field plate 123 can also obtain equally distributed surface transverse electric field, so, structure of the present invention can be in whole drift region
It is interior to obtain uniform surface transverse electric field distribution, there is very high horizontal voltage endurance capability.Reference picture 2, the device of structure of the present invention
The surface transverse electric field distribution in whole drift region under breakdown conditions is all highly uniform.
(3) the first electric charge adjustable type field plate 121 in structure of the present invention, the second electric charge adjustable type field plate 122 and the 3rd electricity
Charge inducing amount on lotus adjustable type field plate 123 is adjustable, therefore, after the doping concentration of increase device N-type drift region 2 according to
So can be by adjusting the first electric charge adjustable type field plate 121, the second electric charge adjustable type field plate 122 and tricharged adjustable type field plate
Charge inducing on 123 makes device obtain uniform surface transverse electric field distribution in whole drift region, so, structure of the present invention
Under conditions of high-breakdown-voltage is kept the conducting resistance of device can be reduced by increasing the doping concentration of N-type drift region 2.
(4) the first electric charge adjustable type field plate 121 in structure of the present invention, the second electric charge adjustable type field plate 122 and the 3rd electricity
Lotus adjustable type field plate 123, the first metal inductive layer 131, the second metal inductive layer 132 and the 3rd metal inductive layer 133 can profits
Realized with the polysilicon gate in traditional cmos process or interconnection metal, it is not necessary to extra processing step, therefore, structure of the present invention
It is completely compatible with traditional cmos process, and process costs will not be increased.
Brief description of the drawings
Fig. 1 is the lateral double diffusion metal oxide semiconductor field-effect provided by the invention with potential fluctuation type field plate
Tubular construction schematic diagram.
Fig. 2 is that the polysilicon gate of structure devices of the present invention and field plate current potential adjust electrode potential change in the operating condition
Schematic diagram.
Embodiment：
Reference picture 1, the lateral double diffusion metal oxide semiconductor FET with potential fluctuation type field plate, including：P
Type Semiconductor substrate 1, N-type drift region 2 and p-type trap 3 are provided with P-type semiconductor substrate 1, N-type source is provided with p-type trap 3
Area 4 and p-type contact zone 5, N-type drain region 6 and field oxide 7, N-type drift region 2 and part P in part are provided with N-type drift region 2
The top of type trap 3 is provided with gate oxide 8, and one end of gate oxide 8 and the border of N-type source region 4 offset, the gate oxide 8
The border of the other end and field oxide 7 offsets, and is provided with polysilicon gate 9 on the surface of gate oxide 8, and polysilicon gate 9 extends to field
The top of oxide layer 7, p-type trap 3, p-type contact zone 5, N-type source region 4, polysilicon gate 9, N-type drain region 6 and the oxidation of part field in part
The surface of layer 7 is provided with dielectric layer 10, drain metal 11 is connected with N-type drain region 6, on p-type contact zone 5 and N-type source region 4
It is connected with source metal 14, it is characterised in that the surface of field oxide 7 is provided with first the 121, second electricity of electric charge adjustable type field plate
Lotus adjustable type field plate 122 and tricharged adjustable type field plate 123, first is connected with the first electric charge adjustable type field plate 121
Metal inductive layer 131, the second metal inductive layer 132, the tricharged are connected with the second electric charge adjustable type field plate 122
The 3rd metal inductive layer 133 is connected with adjustable type field plate 123, the surface of dielectric layer 10 is provided with field plate current potential regulation electrode
15, and the first metal inductive layer 131, the second metal inductive layer 132 and the 3rd metal is completely covered in field plate current potential regulation electrode 15
Inductive layer 133；
The current potential of the field plate current potential regulation electrode 15 is relevant with device working condition, when device is off state,
Field plate current potential regulation electrode 15 connects low potential, and auxiliary N-type drift region 2 exhausts, and improves device transverse direction voltage endurance capability；Work as device
When in the conduction state, field plate current potential regulation electrode 15 connects high potential, improves the carrier concentration in N-type drift region 2, improves
The current capacity of device.
It should be noted that in the present invention, the first electric charge adjustable type field plate 121, the second electric charge adjustable type field plate
122nd, tricharged adjustable type field plate 123, the first metal inductive layer 131, the second metal inductive layer 132 and the sensing of the 3rd metal
The length of layer 133 is different, can be adjusted respectively according to the design needs.
The present invention further discloses a kind of driving chip applied on printer, motor or flat-panel monitor,
The lateral double diffusion metal oxide semiconductor FET with potential fluctuation type field plate of the present invention is employed in the chip.
The present invention further discloses a kind of printer, motor or flat-panel monitor, said apparatus, which uses, to be included
The driving core of lateral double diffusion metal oxide semiconductor FET disclosed by the invention with potential fluctuation type field plate
Piece.
Although above-mentioned the embodiment of the present invention is described with reference to accompanying drawing, model not is protected to the present invention
The limitation enclosed, one of ordinary skill in the art should be understood that on the basis of technical scheme those skilled in the art are not
Need to pay various modifications or deformation that creative work can make still within protection scope of the present invention.
Claims (6)
1. the lateral double diffusion metal oxide semiconductor FET with potential fluctuation type field plate, including：P-type semiconductor serves as a contrast
Bottom (1), N-type drift region (2) and p-type trap (3) are provided with P-type semiconductor substrate (1), N-type source is provided with p-type trap (3)
Area (4) and p-type contact zone (5), N-type drain region (6) and field oxide (7) are provided with N-type drift region (2), N-type is drifted about in part
Gate oxide (8), and one end of gate oxide (8) and the border of N-type source region (4) are provided with above area (2) and part p-type trap (3)
Offset, the border of the other end and field oxide (7) of the gate oxide (8) is offseted, and polycrystalline is provided with gate oxide (8) surface
Si-gate (9), and polysilicon gate (9) extends to the top of field oxide (7), in part p-type trap (3), p-type contact zone (5), N-type
Source region (4), polysilicon gate (9), the surface of N-type drain region (6) and part field oxide (7) are provided with dielectric layer (10), in N-type drain region
(6) drain metal (11) is connected with, source metal (14), its feature are connected with p-type contact zone (5) and N-type source region (4)
Be, field oxide (7) surface be provided with the first electric charge adjustable type field plate (121), the second electric charge adjustable type field plate (122) and
Tricharged adjustable type field plate (123), the first metal inductive layer is connected with the first electric charge adjustable type field plate (121)
(131) the second metal inductive layer (132), is connected with the second electric charge adjustable type field plate (122), the tricharged is adjustable
The 3rd metal inductive layer (133) is connected with type field plate (123), dielectric layer (10) surface is provided with field plate current potential regulation electrode
(15), and field plate current potential regulation electrode (15) be completely covered the first metal inductive layer (131), the second metal inductive layer (132) and
3rd metal inductive layer (133)；
The current potential of the field plate current potential regulation electrode (15) is relevant with device working condition, when device is off state, field
Plate current potential regulation electrode (15) connection low potential, auxiliary N-type drift region (2) exhaust, and improve device transverse direction voltage endurance capability；Work as device
When part is in the conduction state, field plate current potential regulation electrode (15) connects high potential, and the carrier improved in N-type drift region (2) is dense
Degree, improve the current capacity of device.
2. the lateral double diffusion metal oxide semiconductor field-effect according to claim 1 with potential fluctuation type field plate
Pipe, it is characterised in that the first electric charge adjustable type field plate (121), the second electric charge adjustable type field plate (122), tricharged can
Tune type field plate (123), the first metal inductive layer (131), the second metal inductive layer (132) and the 3rd metal inductive layer (133)
Length is different, can be adjusted respectively according to the design needs.
3. a kind of driving chip applied to printer, motor or flat-panel monitor, it is characterised in that using claim 1-
Any lateral double diffusion metal oxide semiconductor FET with potential fluctuation type field plate described in 2.
4. a kind of printer, it is characterised in that employ the driving chip described in claim 3.
5. a kind of motor, it is characterised in that employ the driving chip described in claim 3.
6. a kind of flat-panel monitor, it is characterised in that employ the driving chip described in claim 3.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201711032799.2A CN107871778B (en) | 2017-10-30 | 2017-10-30 | Lateral double-diffusion metal oxide semiconductor field effect transistor with potential floating type field plate |
| PCT/CN2018/112150 WO2019085835A1 (en) | 2017-10-30 | 2018-10-26 | Super field plate structure adapted for power semiconductor device, and application thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201711032799.2A CN107871778B (en) | 2017-10-30 | 2017-10-30 | Lateral double-diffusion metal oxide semiconductor field effect transistor with potential floating type field plate |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN107871778A true CN107871778A (en) | 2018-04-03 |
| CN107871778B CN107871778B (en) | 2020-09-04 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201711032799.2A Active CN107871778B (en) | 2017-10-30 | 2017-10-30 | Lateral double-diffusion metal oxide semiconductor field effect transistor with potential floating type field plate |
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Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108847422A (en) * | 2018-06-15 | 2018-11-20 | 济南大学 | High electron mobility transistor with coupling field plate |
| WO2019085835A1 (en) * | 2017-10-30 | 2019-05-09 | 济南大学 | Super field plate structure adapted for power semiconductor device, and application thereof |
| CN110416301A (en) * | 2018-04-28 | 2019-11-05 | 中芯国际集成电路制造(上海)有限公司 | Lateral double-diffused transistor and forming method thereof |
| CN111755417A (en) * | 2019-03-27 | 2020-10-09 | 中芯国际集成电路制造(北京)有限公司 | Semiconductor structure and forming method thereof |
| WO2021135342A1 (en) * | 2019-12-31 | 2021-07-08 | 无锡华润上华科技有限公司 | Laterally diffused metal oxide semiconductor device and preparation method therefor |
| CN113410303A (en) * | 2020-09-22 | 2021-09-17 | 杰华特微电子股份有限公司 | LDMOS device and manufacturing method thereof |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20040201078A1 (en) * | 2003-04-11 | 2004-10-14 | Liping Ren | Field plate structure for high voltage devices |
| CN102790086A (en) * | 2012-07-10 | 2012-11-21 | 苏州远创达科技有限公司 | LDMOS device with stepped multiple discontinuous filed plate and manufacturing method for LDMOS device |
| CN104752512A (en) * | 2015-01-09 | 2015-07-01 | 电子科技大学 | Transverse high-voltage device with multi-electrode structure |
| CN106653830A (en) * | 2015-10-28 | 2017-05-10 | 无锡华润上华半导体有限公司 | Semiconductor device voltage-withstanding structure |
-
2017
- 2017-10-30 CN CN201711032799.2A patent/CN107871778B/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20040201078A1 (en) * | 2003-04-11 | 2004-10-14 | Liping Ren | Field plate structure for high voltage devices |
| CN102790086A (en) * | 2012-07-10 | 2012-11-21 | 苏州远创达科技有限公司 | LDMOS device with stepped multiple discontinuous filed plate and manufacturing method for LDMOS device |
| CN104752512A (en) * | 2015-01-09 | 2015-07-01 | 电子科技大学 | Transverse high-voltage device with multi-electrode structure |
| CN106653830A (en) * | 2015-10-28 | 2017-05-10 | 无锡华润上华半导体有限公司 | Semiconductor device voltage-withstanding structure |
Non-Patent Citations (1)
| Title |
|---|
| 张春伟等: ""功率LIGBT热载流子退化机理及环境温度影响"", 《东南大学学报》 * |
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2019085835A1 (en) * | 2017-10-30 | 2019-05-09 | 济南大学 | Super field plate structure adapted for power semiconductor device, and application thereof |
| CN110416301A (en) * | 2018-04-28 | 2019-11-05 | 中芯国际集成电路制造(上海)有限公司 | Lateral double-diffused transistor and forming method thereof |
| CN108847422A (en) * | 2018-06-15 | 2018-11-20 | 济南大学 | High electron mobility transistor with coupling field plate |
| CN108847422B (en) * | 2018-06-15 | 2021-08-06 | 济南大学 | High electron mobility transistor with coupled field plate |
| CN111755417A (en) * | 2019-03-27 | 2020-10-09 | 中芯国际集成电路制造(北京)有限公司 | Semiconductor structure and forming method thereof |
| CN111755417B (en) * | 2019-03-27 | 2022-04-12 | 中芯国际集成电路制造(北京)有限公司 | Semiconductor structure and forming method thereof |
| WO2021135342A1 (en) * | 2019-12-31 | 2021-07-08 | 无锡华润上华科技有限公司 | Laterally diffused metal oxide semiconductor device and preparation method therefor |
| CN113410303A (en) * | 2020-09-22 | 2021-09-17 | 杰华特微电子股份有限公司 | LDMOS device and manufacturing method thereof |
Also Published As
| Publication number | Publication date |
|---|---|
| CN107871778B (en) | 2020-09-04 |
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