CN107680997B - Lateral double-diffusion metal oxide semiconductor field effect transistor with adjustable field plate - Google Patents
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 23
- 230000005669 field effect Effects 0.000 title claims abstract description 18
- 229910044991 metal oxide Inorganic materials 0.000 title claims abstract description 18
- 150000004706 metal oxides Chemical class 0.000 title claims abstract description 18
- 238000009792 diffusion process Methods 0.000 title abstract description 8
- 239000003990 capacitor Substances 0.000 claims abstract description 58
- 230000005684 electric field Effects 0.000 claims abstract description 15
- 230000006698 induction Effects 0.000 claims abstract description 5
- 239000002184 metal Substances 0.000 claims description 19
- 230000003071 parasitic effect Effects 0.000 description 8
- 230000015556 catabolic process Effects 0.000 description 7
- 238000000034 method Methods 0.000 description 5
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 5
- 229920005591 polysilicon Polymers 0.000 description 5
- 238000005516 engineering process Methods 0.000 description 3
- 230000001105 regulatory effect Effects 0.000 description 3
- 239000000758 substrate Substances 0.000 description 3
- 238000010586 diagram Methods 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000002360 preparation method Methods 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/7816—Lateral DMOS transistors, i.e. LDMOS transistors
- H01L29/7824—Lateral DMOS transistors, i.e. LDMOS transistors with a substrate comprising an insulating layer, e.g. SOI-LDMOS transistors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/402—Field plates
- H01L29/404—Multiple field plate structures
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/7816—Lateral DMOS transistors, i.e. LDMOS transistors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
- H01L29/42364—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the insulating layer, e.g. thickness or uniformity
- H01L29/42368—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the insulating layer, e.g. thickness or uniformity the thickness being non-uniform
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- Condensed Matter Physics & Semiconductors (AREA)
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Abstract
The invention provides a lateral double-diffusion metal oxide semiconductor field effect transistor with an adjustable field plate, which comprises: the field oxide layer and a drift region positioned below the field oxide layer are arranged, a plurality of adjustable field plates are arranged on the surface of the field oxide layer, and a set distance is arranged between every two adjacent adjustable field plates; each adjustable field plate is connected with an adjusting capacitor; by adjusting the sizes of the adjustable field plate and the positive electrode and the negative electrode of the adjustable capacitor, the induction charge quantity and the induction potential on the adjustable field plate can be adjusted, so that uniform surface transverse electric field distribution is obtained in the drift region. The device with the structure can improve the distribution of a transverse electric field on the surface of a drift region of the device, and has high transverse voltage endurance capability and low on-resistance.
Description
Technical Field
The invention relates to the field of power semiconductor devices, in particular to a lateral double-diffused metal oxide semiconductor field effect transistor (LDMOS) with an adjustable field plate, which is suitable for high-voltage application.
Background
Lateral double diffused metal oxide semiconductor field effect transistors (LDMOS) are a lateral structure of double diffused metal oxide semiconductor field effect transistors (DMOS). The CMOS transistor has the advantages of high withstand voltage, large gain, easiness in driving and the like, and is more compatible with a CMOS process, so that the CMOS transistor is widely applied to an intelligent power integrated circuit. The current design of the lateral double-diffused metal oxide semiconductor field effect transistor (LDMOS) is mainly used for reasonably alleviating the contradiction between breakdown voltage and on-resistance and ensuring higher stability. Currently, people mainly focus on the design of the concentration of a drift region of a lateral double-diffused metal oxide semiconductor Field effect transistor (LDMOS), and compromise between breakdown voltage and on-resistance is realized by reducing the surface electric Field strength (reduced surface Field) of a device through a buried layer technology and by using technologies such as a resistance Field plate, Super Junction, drift region gradient doping and the like.
As shown in fig. 1, in order to make the LDMOS device perform a better function in a chip, and improve the compromise relationship between the breakdown voltage and the on-resistance of the device, a significant research topic of LDMOS design is provided. The field plate technology can improve the compromise relationship between the breakdown voltage and the on-resistance of the LDMOS device, however, the traditional field plate is connected with the source electrode of the device and has a fixed potential, and the potential of the surface of the drift region of the device in a voltage-withstanding state changes along the length direction of the device, so that induced charges of the traditional field plate in the voltage-withstanding state of the device are unevenly distributed in the length direction of the device, the influence of the field plate on different positions of the drift region of the device is different, and the traditional field plate cannot enable the drift region of the device to obtain even transverse electric field (namely, electric field in the length direction) distribution.
Disclosure of Invention
The invention aims to solve the problems and provides a lateral double-diffused metal oxide semiconductor field effect transistor with an adjustable field plate, wherein the action size of each field plate in the device can be adjusted through the design of device structure parameters, the problem of uneven distribution of a lateral electric field in a drift region is solved, and the device has higher lateral voltage withstanding capability and smaller on-resistance.
In order to achieve the purpose, the invention adopts the following technical scheme:
the invention discloses a lateral double-diffusion metal oxide semiconductor field effect transistor with an adjustable field plate, which comprises: the field oxide layer is provided with a plurality of adjustable field plates, and a set distance is arranged between every two adjacent adjustable field plates;
each adjustable field plate is connected with an adjusting capacitor; the adjustable field plate is connected with a positive electrode of the adjusting capacitor, and an adjusting capacitor negative electrode is arranged above the adjusting capacitor positive electrode; the negative electrodes of all the adjusting capacitors are connected with the source metal through metal interconnection lines;
the size of the adjustable field plate and the size of the positive electrode and the negative electrode of the adjusting capacitor are arranged, so that the induction charge amount on the adjustable field plate can be adjusted, and uniform surface transverse electric field distribution is obtained in the drift region.
Further, the positive electrode and the negative electrode of the adjusting capacitor are equal in size and are completely aligned.
Further, in the direction from the source metal to the drain metal, the area of the mutual coverage between the positive electrode and the negative electrode of the adjusting capacitor is gradually reduced.
Furthermore, the gap between the source metal and the drain metal is filled with an insulating medium layer.
Further, the length and/or width of the adjustable field plate and the adjustable capacitor are designed according to actual needs.
Furthermore, the adjustable field plate is intermittently arranged along the width direction, the adjustable field plate in the width direction is divided into a plurality of adjustable field plate units, and each adjustable field plate unit is connected with a corresponding adjusting capacitor unit.
The invention further discloses a driving chip applied to a printer, a motor or a flat panel display, and the transverse double-diffusion metal oxide semiconductor field effect transistor with the adjustable field plate is adopted.
The invention further discloses a printer, and the driving chip is adopted.
The invention further discloses a motor which adopts the driving chip.
The invention further discloses a flat panel display which adopts the driving chip.
The invention has the beneficial effects that:
(1) each field plate of the traditional structure device has the same potential as the source electrode in the turn-off voltage-resistant state, and the potential on the surface of the drift region of the device continuously changes along the length direction, so that the influence of the field plate on different positions of the drift region of the device is different, and the distribution of a transverse electric field on the inner surface of the drift region of the device is uneven. In the structure, the field plates at different transverse positions can have different potentials in the off voltage-resistant state of the device by adjusting the parasitic capacitance between the adjustable field plate and the drift region and the size of the adjustable capacitance, so that the device obtains uniform surface transverse electric field distribution in the whole drift region, and the device has higher transverse voltage-resistant capability.
(2) The breakdown voltage of the conventional structure device decreases as the concentration of the drift region increases. The field plate in the device with the structure has adjustable action size, so that after the concentration of the drift region is increased, the action size of the field plate can be changed by adjusting the potential of the adjustable field plate of the device, the device can continuously keep uniform surface transverse electric field distribution in the drift region, and the breakdown voltage of the device cannot be reduced. Therefore, the device with the structure can increase the concentration of the drift region and keep the breakdown voltage of the device unchanged, so that the device has smaller on-resistance.
(3) The structure of the invention is completely compatible with the traditional process, can be realized only by changing the layout on the traditional preparation process, does not need to add extra process steps and does not bring the increase of the process cost.
Drawings
FIG. 1 is a three-dimensional schematic diagram of a conventional lateral double-diffused metal oxide semiconductor field effect transistor structure;
fig. 2 is a three-dimensional schematic diagram of a lateral double-diffused metal oxide semiconductor field effect transistor structure with a tunable field plate according to the present invention;
FIG. 3 is a schematic cross-sectional view of a structured device of the present invention taken along the length and thickness directions;
FIG. 4 is a schematic cross-sectional view of a structural device of the present invention taken along the width and length directions;
the semiconductor device comprises a P-type semiconductor substrate, a buried oxide layer, a drift region, a P-type well, a contact region, a source region, a drain metal, a gate oxide layer, a polysilicon gate, a first adjustable field plate, a second adjustable field plate, a field oxide layer, a drain region, a drain metal, a gate oxide layer, a polysilicon gate electrode, a first adjustable field plate, a first adjustable capacitor positive electrode, a second adjustable capacitor positive electrode, a polysilicon gate electrode, a first adjustable capacitor.
Detailed Description
The invention is further described with reference to the following figures and specific embodiments.
The invention discloses a lateral double-diffusion metal oxide semiconductor field effect transistor with an adjustable field plate, which comprises: a P-type semiconductor substrate 1, a buried oxide layer 2 is arranged on the P-type semiconductor substrate 1, an N-type drift region 3 and a P-type well 4 are arranged on the buried oxide layer 2, a P-type contact region 5 and an N-type source region 6 are arranged on the P-type well 4, a source metal 7 is connected on the P-type contact region 5 and the N-type source region 6, a field oxide layer 8 and an N-type drain region 9 are arranged on the N-type drift region 3, a drain metal 10 is connected on the N-type drain region 9, a gate oxide layer 11 is arranged above part of the N-type drift region 3 and part of the P-type trap 4, one end of the gate oxide layer 11 is pressed against the boundary of the N-type source region 6, the other end of the gate oxide layer 11 is pressed against the boundary of the field oxide layer 8, a polysilicon gate 12 is disposed above the gate oxide layer 11, and the polysilicon gate 12 extends to above the field oxide layer 8, a plurality of adjustable field plates are arranged on the surface of the field oxide layer 8, and a distance is set between every two adjacent adjustable field plates at intervals.
The adjustable field plate is arranged in parallel with the source metal 7 in the width direction, and the adjustable field plate is spaced by a set distance in the length direction.
It should be noted that the number of the adjustable field plates in the present invention is set according to actual needs.
In this embodiment, the number of the adjustable field plates is three, as shown in fig. 2 and fig. 3, which are respectively: a first adjustable field plate 131, a second adjustable field plate 132 and a third adjustable field plate 133;
the first adjustable field plate 131 is connected with a first adjustable capacitor positive electrode 141, the second adjustable field plate 132 is connected with a second adjustable capacitor positive electrode 142, and the third adjustable field plate 133 is connected with a third adjustable capacitor positive electrode 143;
a first adjusting capacitor negative electrode 151 is arranged above the first adjusting capacitor positive electrode 141, a second adjusting capacitor negative electrode 152 is arranged above the second adjusting capacitor positive electrode 142, a third adjusting capacitor negative electrode 153 is arranged above the third adjusting capacitor positive electrode 143, and the first adjusting capacitor negative electrode 151, the second adjusting capacitor negative electrode 152 and the third adjusting capacitor negative electrode 153 are connected with the source metal 7 through metal interconnection lines 16.
Preferably, the first adjustment capacitor negative electrode 151 is disposed directly above the first adjustment capacitor positive electrode 141 in the embodiment of the present invention, and the first adjustment capacitor positive electrode 141 and the first adjustment capacitor negative electrode 151 are equal in size and completely aligned.
As shown in fig. 4, the area of the third adjustment capacitor negative electrode 153 and the third adjustment capacitor positive electrode 143 covered with each other is smaller than the area of the second adjustment capacitor negative electrode 152 and the second adjustment capacitor positive electrode 142 covered with each other; the area of the second adjustment capacitor negative electrode 152 and the second adjustment capacitor positive electrode 142 covered each other is smaller than the area of the first adjustment capacitor negative electrode 151 and the first adjustment capacitor positive electrode 141 covered each other.
As an embodiment, the gap on the surface of the lateral double-diffused mosfet device with the tunable field plate according to the present invention may be filled with an insulating dielectric layer.
In the present invention, the lengths and widths of the first, second, third, and fourth adjustment capacitor positive electrodes 141, 142, 143, 151, 152, and 153 may be designed according to device requirements.
As an embodiment, the adjustable field plates are intermittently arranged in the width direction, each segmented adjustable field plate unit is connected with the positive electrode plate of the regulating capacitor, the positive electrode plates of the regulating capacitor on two adjacent segments are correspondingly disconnected, and the negative electrode plates of the regulating capacitor can be disconnected or not. By the method, the size of the parasitic capacitance between the adjustable field plate and the drift region and the size of the parasitic capacitance between the positive plate and the negative plate of the capacitor can be adjusted. In the structure of the present invention, a parasitic capacitance is provided between the first adjustable field plate 131 and the N-type drift region 3, which is named as C131, a parasitic capacitance is provided between the first adjustable capacitance positive electrode 141 and the first adjustable capacitance negative electrode 151, which is named as C141, because the first adjustable field plate 131 is connected to the first adjustable capacitance positive electrode 141, the parasitic capacitances C131 and C141 form a series relationship, when the device is in an off-withstand voltage state, the first adjustable capacitance negative electrode 151 is at a low potential, and the N-type drift region 3 is at a high potential, which can be obtained according to a voltage dividing relationship of the series capacitance, a potential of the first adjustable field plate 131 is between a potential of the N-type drift region 3 and a potential field plate of the first adjustable capacitance negative electrode 151, and a potential of the first adjustable field plate 131 is influenced by magnitudes of the parasitic capacitances C131 and C141.
Therefore, by designing the lengths and widths of the first adjustable field plate 131, the first adjustable capacitor positive electrode 141 and the first adjustable capacitor negative electrode 151, the sizes of the parasitic capacitors C131 and C141 can be adjusted, and then the potential of the first adjustable field plate 131 can be adjusted, the amount of induced charge on the first adjustable field plate 131 can be adjusted by adjusting the potential of the first adjustable field plate 131, and then the action size of the first adjustable field plate 131 is adjusted, so that the N-type drift region 3 below the first adjustable field plate 131 obtains uniform surface transverse (i.e., length direction) electric field distribution.
Similarly, the potential of the second adjustable field plate 132 can be adjusted by the length and width design of the second adjustable field plate 132, the second adjustable capacitor positive electrode 142 and the second adjustable electrode negative electrode 152, so that the N-type drift region 33 under the second adjustable field plate 132 obtains uniform surface lateral electric field distribution, and the potential of the third adjustable field plate 133 can be adjusted by the length and width design of the third adjustable field plate 133, the third adjustable capacitor positive electrode 143 and the third adjustable electrode negative electrode 153, so that the N-type drift region 3 under the third adjustable field plate 133 obtains uniform surface lateral electric field distribution.
Therefore, the field plates at different transverse positions in the structural device have different potentials in the off voltage-resistant state of the device, and the device can obtain uniform surface transverse electric field distribution in the whole drift region, so that the structural device has higher transverse voltage-resistant capability.
It should be noted that the above description of the lateral double-diffused mosfet with the adjustable field plate is performed with respect to the structure of an N-type device, and for the structure of a P-type device, the adjustable field plate structure of the present invention may also be adopted, and the specific embodiments are the same as above, and are not described herein again.
The invention further discloses a driving chip applied to a printer, a motor or a flat panel display, wherein the chip adopts the transverse double-diffusion metal oxide semiconductor field effect transistor with the adjustable field plate.
The invention further discloses a printer, a motor or a flat panel display, which all adopt a driving chip comprising the transverse double-diffusion metal oxide semiconductor field effect transistor with the adjustable field plate.
Although the embodiments of the present invention have been described with reference to the accompanying drawings, it is not intended to limit the scope of the present invention, and it should be understood by those skilled in the art that various modifications and variations can be made without inventive efforts by those skilled in the art based on the technical solution of the present invention.
Claims (9)
1. Lateral double-diffused metal oxide semiconductor field effect transistor with adjustable field plate includes: the field oxide layer is provided with a plurality of adjustable field plates, and a distance is set between every two adjacent adjustable field plates;
each adjustable field plate is connected with an adjusting capacitor; the adjustable field plate is connected with a positive electrode of the adjusting capacitor, and an adjusting capacitor negative electrode is arranged above the adjusting capacitor positive electrode; the negative electrodes of all the adjusting capacitors are connected with the source metal through metal interconnection lines;
in the direction from the source metal to the drain metal, the area covered by the positive electrode and the negative electrode of the adjusting capacitor is sequentially reduced;
through setting up adjustable type field plate and the size of the positive negative electrode of adjusting electric capacity, can adjust induction electric quantity and induction potential on the adjustable type field plate for obtain even surface horizontal electric field distribution in the drift region.
2. The ldmosfet of claim 1 wherein said tuning capacitors have positive and negative electrodes of equal size and are fully aligned.
3. The ldmosfet of claim 1 wherein the gap between the source metal and the drain metal is filled with an insulating dielectric layer.
4. The lateral double-diffused metal oxide semiconductor field effect transistor with the adjustable field plate as claimed in claim 1, wherein the length and/or width of the adjustable field plate and the positive electrode and the negative electrode of the adjustable capacitor are designed according to actual needs.
5. The ldmosfet of claim 1 wherein said adjustable field plate is intermittently arranged in the width direction to divide the adjustable field plate in the width direction into a plurality of adjustable field plate cells, each of which is connected to a corresponding tuning capacitor cell.
6. A driver chip for a printer, a motor or a flat panel display, wherein the lateral double diffused mosfet with an adjustable field plate of any of claims 1-5 is used.
7. A printer characterized by using the driver chip of claim 6.
8. An electric motor, characterized in that the driving chip of claim 6 is used.
9. A flat panel display characterized by using the driving chip of claim 6.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201711032851.4A CN107680997B (en) | 2017-10-30 | 2017-10-30 | Lateral double-diffusion metal oxide semiconductor field effect transistor with adjustable field plate |
| PCT/CN2018/112150 WO2019085835A1 (en) | 2017-10-30 | 2018-10-26 | Super field plate structure adapted for power semiconductor device, and application thereof |
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| Application Number | Priority Date | Filing Date | Title |
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| CN201711032851.4A CN107680997B (en) | 2017-10-30 | 2017-10-30 | Lateral double-diffusion metal oxide semiconductor field effect transistor with adjustable field plate |
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| CN107680997A CN107680997A (en) | 2018-02-09 |
| CN107680997B true CN107680997B (en) | 2020-04-14 |
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Families Citing this family (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2019085835A1 (en) * | 2017-10-30 | 2019-05-09 | 济南大学 | Super field plate structure adapted for power semiconductor device, and application thereof |
| CN108365009B (en) * | 2018-02-13 | 2020-10-30 | 扬州江新电子有限公司 | LDMOS device with array type multilayer Faraday shielding ring structure |
| CN110416301A (en) * | 2018-04-28 | 2019-11-05 | 中芯国际集成电路制造(上海)有限公司 | Lateral double-diffused transistor and forming method thereof |
| US10665712B2 (en) * | 2018-09-05 | 2020-05-26 | Monolithic Power Systems, Inc. | LDMOS device with a field plate contact metal layer with a sub-maximum size |
| CN109411540A (en) * | 2018-10-31 | 2019-03-01 | 电子科技大学 | With the low lateral high-voltage device than conducting resistance |
| US20200144381A1 (en) * | 2018-11-07 | 2020-05-07 | Monolithic Power Systems, Inc. | Ldmos device with a drain contact structure with reduced size |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1487594A (en) * | 2002-09-30 | 2004-04-07 | 东南大学 | High-voltage P-type metal oxide semiconductor transistor |
| CN1649168A (en) * | 2004-01-26 | 2005-08-03 | 三菱电机株式会社 | Semiconductor device |
| CN103515438A (en) * | 2012-06-20 | 2014-01-15 | 株式会社东芝 | Semiconductor device |
| CN106653830A (en) * | 2015-10-28 | 2017-05-10 | 无锡华润上华半导体有限公司 | Semiconductor device voltage-withstanding structure |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7709908B2 (en) * | 2007-08-10 | 2010-05-04 | United Microelectronics Corp. | High-voltage MOS transistor device |
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Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1487594A (en) * | 2002-09-30 | 2004-04-07 | 东南大学 | High-voltage P-type metal oxide semiconductor transistor |
| CN1649168A (en) * | 2004-01-26 | 2005-08-03 | 三菱电机株式会社 | Semiconductor device |
| CN103515438A (en) * | 2012-06-20 | 2014-01-15 | 株式会社东芝 | Semiconductor device |
| CN106653830A (en) * | 2015-10-28 | 2017-05-10 | 无锡华润上华半导体有限公司 | Semiconductor device voltage-withstanding structure |
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