CN106876464A - A kind of lateral double diffusion metal oxide semiconductor FET - Google Patents
A kind of lateral double diffusion metal oxide semiconductor FET Download PDFInfo
- Publication number
- CN106876464A CN106876464A CN201611248826.5A CN201611248826A CN106876464A CN 106876464 A CN106876464 A CN 106876464A CN 201611248826 A CN201611248826 A CN 201611248826A CN 106876464 A CN106876464 A CN 106876464A
- Authority
- CN
- China
- Prior art keywords
- metal oxide
- oxide semiconductor
- double diffusion
- lateral double
- diffusion metal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 22
- 238000009792 diffusion process Methods 0.000 title claims abstract description 16
- 229910044991 metal oxide Inorganic materials 0.000 title claims abstract description 16
- 150000004706 metal oxides Chemical class 0.000 title claims abstract description 16
- 239000000758 substrate Substances 0.000 claims abstract description 40
- 239000002019 doping agent Substances 0.000 claims description 6
- 239000003989 dielectric material Substances 0.000 claims description 5
- 230000001788 irregular Effects 0.000 claims description 3
- 239000000463 material Substances 0.000 claims description 3
- 238000000638 solvent extraction Methods 0.000 claims description 2
- 230000015556 catabolic process Effects 0.000 abstract description 15
- 230000005684 electric field Effects 0.000 abstract description 9
- 239000002210 silicon-based material Substances 0.000 description 4
- 238000005457 optimization Methods 0.000 description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- 239000004020 conductor Substances 0.000 description 2
- 230000008094 contradictory effect Effects 0.000 description 2
- 229910000449 hafnium oxide Inorganic materials 0.000 description 2
- WIHZLLGSGQNAGK-UHFFFAOYSA-N hafnium(4+);oxygen(2-) Chemical compound [O-2].[O-2].[Hf+4] WIHZLLGSGQNAGK-UHFFFAOYSA-N 0.000 description 2
- 238000001727 in vivo Methods 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000012938 design process Methods 0.000 description 1
- 238000011982 device technology Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- VDGJOQCBCPGFFD-UHFFFAOYSA-N oxygen(2-) silicon(4+) titanium(4+) Chemical compound [Si+4].[O-2].[O-2].[Ti+4] VDGJOQCBCPGFFD-UHFFFAOYSA-N 0.000 description 1
- 238000005192 partition Methods 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
- H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
- H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
- H01L29/0619—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE] with a supplementary region doped oppositely to or in rectifying contact with the semiconductor containing or contacting region, e.g. guard rings with PN or Schottky junction
- H01L29/0623—Buried supplementary region, e.g. buried guard ring
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/7816—Lateral DMOS transistors, i.e. LDMOS transistors
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
Abstract
The present invention discloses a kind of lateral double diffusion metal oxide semiconductor FET.Assisted depletion substrate buried regions is set in the structure in drain terminal lower section, the buried regions can extend the longitudinal space charge area of lateral double diffusion metal oxide semiconductor FET, so as to break through the voltage saturation phenomenon brought because longitudinal direction is pressure-resistant limited, the buried regions can also be modulated using Electric Field Modulation to surface transverse electric field and internal longitudinal electric field simultaneously, so as under conditions of device low on-resistance is ensured, the breakdown voltage of device can be increased substantially.
Description
Technical field
The present invention relates to semiconductor power device technology field, and in particular to be a kind of lateral double diffusion metal oxide half
Conductor field-effect tube structure.
Background technology
Lateral double diffusion metal oxide semiconductor FET (Lateral Double-diffused MOSFET, letter
Claim LDMOS) have it is easy of integration, heat endurance is good, and preferable frequency stability, low-power consumption, many subconductivity, power drive is small, opens
The advantages of pass speed is high is the core of smart power circuits and high tension apparatus.Due to portable power source management and automobile electronics
The market demand it is growing, receive more and more attention in the world.Be primarily characterized in that base and drain region it
Between add one section it is relatively long drift region is lightly doped, the doping type of the drift region is consistent with drain region.By adding drift region,
Can play a part of to share breakdown voltage, improve the breakdown voltage of LDMOS, reach low conducting resistance optimization mesh
Mark, minimizes its conduction loss.
In order that obtaining LDMOS device has breakdown voltage and relatively low ratio conducting resistance higher, in device design process
In, it is necessary to meet reduction surface field (Reduced Surface Field, abbreviation RESURF) technology condition cause device
Breakdown point is transferred in vivo from surface.However as the increase of device drift region length, the breakdown voltage of LDMOS device is mainly received
It is limited to longitudinal direction voltage endurance capability in vivo, i.e., due to the voltage saturation effect of lateral power, the breakdown voltage of device is with drift
The increase of section length gradually tends to saturation.
The content of the invention
The present invention proposes a kind of LDMOS with longitudinal assisted depletion substrate layer, improves breakdown voltage and than electric conduction
Contradictory relation between resistance, realizes breakdown voltage and low ratio conducting resistance high.
The present invention program is as follows：
A kind of lateral double diffusion metal oxide semiconductor FET, including：
The substrate of semi-conducting material；
Positioned at the base and drift region of the semiconductor substrate surface；
Positioned at the source region of the base region surface；
Positioned at the drain region on drift region surface；
It is characterized in that：
The drift region lower section of drain terminal is connected to longitudinal assisted depletion substrate layer, longitudinal assisted depletion substrate layer by N-type and/
Or p-type doped semiconductor materials are constituted, or use dielectric material.
Based on above basic scheme, the present invention also further does following optimization and limits and improve：
Above-mentioned longitudinal assisted depletion substrate layer is located at the drift region lower section of drain terminal, can be that the N-type Uniform Doped of a monoblock is buried
Layer or the uniform type buried dopant layers of P.
Above-mentioned longitudinal assisted depletion substrate layer is located at the drift region lower section of drain terminal, can be that the N-type subregion doping of a monoblock is buried
Layer or P partitioning type buried dopant layers.
Above-mentioned longitudinal assisted depletion substrate layer is located at the drift region lower section of drain terminal, can be buried for the alternate Uniform Doped of N/P type posts
Layer.
Above-mentioned longitudinal assisted depletion substrate layer is located at the drift region lower section of drain terminal, can be buried for the alternate subregion doping of N/P type posts
Layer.
Above-mentioned longitudinal assisted depletion substrate layer is located at the drift region lower section of drain terminal, can be other dielectric materials, such as titanium dioxide
Silicon, hafnium oxide etc..
The length of above-mentioned longitudinal assisted depletion substrate layer accounts for the ratio of drift region entire length, longitudinal assisted depletion substrate layer
Width and thickness can adjust according to the actual requirements.
The shape of above-mentioned longitudinal assisted depletion substrate layer can be regular figure, or irregular figure, such as stepped, ladder
Shape etc..
Beneficial effects of the present invention are as follows：
Substrate-assisted depletion layer is set under LDMOS drain terminals, and the buried regions can extend lateral double diffusion metal oxide half
The longitudinal space charge area of conductor FET, so that the voltage saturation phenomenon brought because longitudinal direction is pressure-resistant limited is broken through, together
When the buried regions surface transverse electric field and internal longitudinal electric field can also be modulated using Electric Field Modulation, so as to ensure
Under conditions of device low on-resistance, the breakdown voltage of device can be increased substantially.
This programme device is simple to manufacture, and operability is stronger.
Brief description of the drawings
Fig. 1 is the lateral double diffusion metal oxide semiconductor FET that the present invention has longitudinal assisted depletion substrate layer
The schematic three dimensional views of structure.
Fig. 2 is sectional view of the structure longitudinal direction assisted depletion substrate layer along OAC directions.
Specific embodiment
It is as depicted in figs. 1 and 2 a kind of LDMOS with subregion longitudinal direction assisted depletion substrate zone：
Semiconductive material substrate 1；
Positioned at the base 2 and drift region 5 of the semiconductor substrate surface；
Positioned at the source region 3 of the base region surface；
Positioned at the drain region 4 on drift region surface；
It is longitudinal assisted depletion substrate layer 6 and 7 under the drift region of drain terminal.
Longitudinal assisted depletion substrate layer can be alternate for N-type Uniform Doped silicon materials, P Uniform Dopeds silicon materials, N/P type posts
Even doped silicon material, N/P multi partition doped silicon materials, or use dielectric material.Specifically：
Longitudinal assisted depletion substrate layer 6 and 7 can be N-type post, p-type post or the alternate Uniform Doped of N/P type posts；
Longitudinal assisted depletion substrate layer 6 and 7 can be N-type post, p-type post or the alternate subregion doping of N/P type posts；
Longitudinal assisted depletion substrate layer 6 and 7 can also be dielectric material, such as silica, hafnium oxide.
The length of longitudinal assisted depletion substrate layer 6 and 7 accounts for the ratio of drift region entire length, longitudinal assisted depletion substrate layer
6 and 7 width and thickness can be adjusted according to the actual requirements.
The shape of longitudinal assisted depletion substrate layer 6 and 7 can be regular figure, or irregular figure, such as stepped, ladder
Shape etc..
Longitudinal depletion region below drain terminal further can extend to substrate；Shadow of longitudinal bulk electric field by assisted depletion substrate layer
Ring, a new electric field peak can occur in buried regions bottom boundary, so that longitudinal electric field is optimized, longitudinal breakdown voltage is carried
Rise；Surface field can equally be influenceed by assisted depletion substrate layer so that horizontal surface field is also optimized, and is laterally hit
Voltage is worn to be lifted.Therefore breakdown voltage and can be obtained most preferably than the optimization of conducting resistance.Hence improve hitting for device
Wear voltage and than the contradictory relation between conducting resistance.
Thin drift region (2 μm) LDMOS is for example directed to, when drift region length is 70 μm, conventional LDMOS breakdown voltages are only
460V or so, and structure of the invention is used, can be by device using the longitudinal assisted depletion layer of the N-type rectangle doping of 40 μm of length
Breakdown voltage bring up to 900V, improve 95%. can be by device using the alternate doping rectangle longitudinal direction assisted depletion layer of 40 μm long N/P
Part breakdown voltage brings up to 1100V, improves nearly 120%.
Certainly, the LDMOS in the present invention can also be P-channel, and its structure is identical with N-channel LDMOS, no longer goes to live in the household of one's in-laws on getting married herein
State.
The above is only the preferred embodiment of the present invention, it is noted that for the ordinary skill people of the art
For member, on the premise of the technology of the present invention principle is not departed from, some improvement and replacement can also be made, these improve and replace
Also should be regarded as protection scope of the present invention.
Claims (7)
1. a kind of lateral double diffusion metal oxide semiconductor FET, including：
The substrate of semi-conducting material；
Positioned at the base and drift region of the semiconductor substrate surface；
Positioned at the source region of the base region surface；
Positioned at the drain region on drift region surface；
It is characterized in that：
The drift region lower section of drain terminal is connected to longitudinal assisted depletion substrate layer, and longitudinal assisted depletion substrate layer is by N-type and/or P
Type doped semiconductor materials are constituted, or use dielectric material.
2. lateral double diffusion metal oxide semiconductor FET according to claim 1, it is characterised in that：It is described vertical
To the uniform type buried dopant layers of the P of N-type Uniform Doped buried regions or a monoblock that assisted depletion substrate layer is a monoblock.
3. lateral double diffusion metal oxide semiconductor FET according to claim 1, it is characterised in that：It is described vertical
To N-type subregion buried dopant layer or the P partitioning type buried dopant layers of a monoblock that assisted depletion substrate layer is a monoblock.
4. lateral double diffusion metal oxide semiconductor FET according to claim 1, it is characterised in that：It is described vertical
It is the alternate Uniform Doped buried regions of N/P type posts to assisted depletion substrate layer.
5. lateral double diffusion metal oxide semiconductor FET according to claim 1, it is characterised in that：It is described vertical
It is the alternate subregion buried dopant layer of N/P type posts to assisted depletion substrate layer.
6. lateral double diffusion metal oxide semiconductor FET according to claim 1, it is characterised in that：Longitudinal direction is auxiliary
Help exhaust substrate layer to be shaped as regular figure or irregular figure.
7. lateral double diffusion metal oxide semiconductor FET according to claim 6, it is characterised in that：It is described not
Regular figure is stepped or trapezoidal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201611248826.5A CN106876464A (en) | 2016-12-29 | 2016-12-29 | A kind of lateral double diffusion metal oxide semiconductor FET |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201611248826.5A CN106876464A (en) | 2016-12-29 | 2016-12-29 | A kind of lateral double diffusion metal oxide semiconductor FET |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN106876464A true CN106876464A (en) | 2017-06-20 |
Family
ID=59164481
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201611248826.5A Pending CN106876464A (en) | 2016-12-29 | 2016-12-29 | A kind of lateral double diffusion metal oxide semiconductor FET |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN106876464A (en) |
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107623039A (en) * | 2017-09-11 | 2018-01-23 | 西安电子科技大学 | There is one kind transverse and longitudinal electric field to optimize wide band gap semiconducter transverse direction double-diffused transistor simultaneously |
| CN107634100A (en) * | 2017-09-11 | 2018-01-26 | 西安电子科技大学 | There is one kind transverse and longitudinal electric field to optimize wide band gap semiconducter transverse direction superjunction double-diffused transistor simultaneously |
| CN107681004A (en) * | 2017-09-11 | 2018-02-09 | 西安电子科技大学 | A kind of elemental semiconductor transverse direction double-diffused transistor with polycyclic Electric Field Modulated substrate |
| CN107768425A (en) * | 2017-09-11 | 2018-03-06 | 西安电子科技大学 | There is one kind transverse and longitudinal electric field to optimize elemental semiconductor transverse direction superjunction double-diffused transistor simultaneously |
| CN107768424A (en) * | 2017-09-11 | 2018-03-06 | 西安电子科技大学 | A kind of wide band gap semiconducter transverse direction superjunction double-diffused transistor with polycyclic Electric Field Modulated substrate |
| CN107799599A (en) * | 2017-09-11 | 2018-03-13 | 西安电子科技大学 | There is one kind transverse and longitudinal electric field to optimize elemental semiconductor transverse direction double-diffused transistor simultaneously |
| CN107808902A (en) * | 2017-09-11 | 2018-03-16 | 西安电子科技大学 | A kind of wide band gap semiconducter transverse direction double-diffused transistor with polycyclic Electric Field Modulated substrate |
| CN109560119A (en) * | 2017-09-25 | 2019-04-02 | 新唐科技股份有限公司 | High voltage semiconductor element |
Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20070290262A1 (en) * | 2006-06-16 | 2007-12-20 | Jun Cai | High voltage LDMOS |
| CN101542697A (en) * | 2006-05-31 | 2009-09-23 | 先进模拟科技公司 | High-voltage bipolar-CMOS-DMOS integrated circuit devices and modular methods of forming the same |
| CN101777581A (en) * | 2009-12-18 | 2010-07-14 | 东南大学 | P-type super-junction laterally double diffused metal oxide semiconductor |
| CN102157560A (en) * | 2011-03-02 | 2011-08-17 | 电子科技大学 | High-voltage LDMOS (landscape diffusion metal oxide semiconductor) device |
| CN102184941A (en) * | 2011-04-19 | 2011-09-14 | 电子科技大学 | Groove type power MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor) device |
| CN102208450A (en) * | 2011-05-27 | 2011-10-05 | 东南大学 | Isolation structure of high-voltage driving circuit |
| CN102760769A (en) * | 2011-04-27 | 2012-10-31 | 万国半导体股份有限公司 | Through silicon via processing techniques for lateral double-diffused mosfets |
-
2016
- 2016-12-29 CN CN201611248826.5A patent/CN106876464A/en active Pending
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101542697A (en) * | 2006-05-31 | 2009-09-23 | 先进模拟科技公司 | High-voltage bipolar-CMOS-DMOS integrated circuit devices and modular methods of forming the same |
| US20070290262A1 (en) * | 2006-06-16 | 2007-12-20 | Jun Cai | High voltage LDMOS |
| CN101777581A (en) * | 2009-12-18 | 2010-07-14 | 东南大学 | P-type super-junction laterally double diffused metal oxide semiconductor |
| CN102157560A (en) * | 2011-03-02 | 2011-08-17 | 电子科技大学 | High-voltage LDMOS (landscape diffusion metal oxide semiconductor) device |
| CN102184941A (en) * | 2011-04-19 | 2011-09-14 | 电子科技大学 | Groove type power MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor) device |
| CN102760769A (en) * | 2011-04-27 | 2012-10-31 | 万国半导体股份有限公司 | Through silicon via processing techniques for lateral double-diffused mosfets |
| CN102208450A (en) * | 2011-05-27 | 2011-10-05 | 东南大学 | Isolation structure of high-voltage driving circuit |
Cited By (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107623039A (en) * | 2017-09-11 | 2018-01-23 | 西安电子科技大学 | There is one kind transverse and longitudinal electric field to optimize wide band gap semiconducter transverse direction double-diffused transistor simultaneously |
| CN107634100A (en) * | 2017-09-11 | 2018-01-26 | 西安电子科技大学 | There is one kind transverse and longitudinal electric field to optimize wide band gap semiconducter transverse direction superjunction double-diffused transistor simultaneously |
| CN107681004A (en) * | 2017-09-11 | 2018-02-09 | 西安电子科技大学 | A kind of elemental semiconductor transverse direction double-diffused transistor with polycyclic Electric Field Modulated substrate |
| CN107768425A (en) * | 2017-09-11 | 2018-03-06 | 西安电子科技大学 | There is one kind transverse and longitudinal electric field to optimize elemental semiconductor transverse direction superjunction double-diffused transistor simultaneously |
| CN107768424A (en) * | 2017-09-11 | 2018-03-06 | 西安电子科技大学 | A kind of wide band gap semiconducter transverse direction superjunction double-diffused transistor with polycyclic Electric Field Modulated substrate |
| CN107799599A (en) * | 2017-09-11 | 2018-03-13 | 西安电子科技大学 | There is one kind transverse and longitudinal electric field to optimize elemental semiconductor transverse direction double-diffused transistor simultaneously |
| CN107808902A (en) * | 2017-09-11 | 2018-03-16 | 西安电子科技大学 | A kind of wide band gap semiconducter transverse direction double-diffused transistor with polycyclic Electric Field Modulated substrate |
| CN107768424B (en) * | 2017-09-11 | 2021-06-18 | 西安电子科技大学 | Wide band gap semiconductor transverse super junction double-diffusion transistor with multi-ring electric field modulation substrate |
| CN107808902B (en) * | 2017-09-11 | 2021-06-18 | 西安电子科技大学 | Wide band gap semiconductor lateral double-diffused transistor with multi-ring electric field modulation substrate |
| CN109560119A (en) * | 2017-09-25 | 2019-04-02 | 新唐科技股份有限公司 | High voltage semiconductor element |
| CN109560119B (en) * | 2017-09-25 | 2021-11-16 | 新唐科技股份有限公司 | High voltage semiconductor element |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN106876464A (en) | A kind of lateral double diffusion metal oxide semiconductor FET | |
| CN101840933B (en) | Super-junction metal oxide field effect transistor with surface buffering ring terminal structure | |
| EP2860762B1 (en) | High voltage junction field effect transistor | |
| CN102231390B (en) | Vertical double-diffused metal oxide semiconductor power device with super junction structure | |
| CN103280457B (en) | A kind of horizontal high voltage power device of Ultra-low Specific conducting resistance and manufacture method | |
| CN104201206A (en) | Horizontal SOI power LDMOS (lateral double-diffusion metal oxide semiconductor) device | |
| CN107871778B (en) | Lateral double-diffusion metal oxide semiconductor field effect transistor with potential floating type field plate | |
| WO2012055225A1 (en) | High voltage ldmos device | |
| CN107887426B (en) | P-type LDMOS structure with charge-adjustable field plate | |
| CN107863379A (en) | A kind of N-type LDMOS structure with field plate supplementary doping area | |
| CN103413830A (en) | Laterally high-voltage MOSFET and manufacturing method thereof | |
| CN108962974A (en) | A kind of ldmos transistor with the vertical field plate of L shape | |
| CN107516680A (en) | One kind division gate power MOS device | |
| CN107564965B (en) | Transverse double-diffusion MOS device | |
| US20120292689A1 (en) | Semiconductor Structure and Method for Operating the Same | |
| CN111725071A (en) | Silicon-based junction accumulation layer and buffer layer lateral double-diffusion field effect transistor and manufacturing method thereof | |
| CN105140288B (en) | Radio frequency ldmos device | |
| CN107546274B (en) | LDMOS device with step-shaped groove | |
| CN105789270A (en) | VDMOS device with variable dielectric side | |
| CN108565286A (en) | High K dielectric channel lateral bilateral diffusion metal oxide elemental semiconductor field-effect tube and preparation method thereof | |
| CN110473908A (en) | Silicon ldmos transistor on a kind of insulating layer with trapezoidal oxidation trough | |
| CN102790092A (en) | Transverse high-voltage DMOS (double-diffusion metal oxide semiconductor) device | |
| CN107681004B (en) | Element semiconductor transverse double-diffusion transistor with multi-ring electric field modulation substrate | |
| CN112713193B (en) | Trench LDMOS transistor with convex type extended buried oxide region | |
| CN110504321A (en) | Silicon ldmos transistor on a kind of insulating layer with PN column |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| RJ01 | Rejection of invention patent application after publication | ||
| RJ01 | Rejection of invention patent application after publication |
Application publication date: 20170620 |