CN101840933B - Super-junction metal oxide field effect transistor with surface buffering ring terminal structure - Google Patents
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Abstract
The invention discloses a super-junction metal-oxide field effect transistor with a surface buffering ring terminal structure, comprising an N-type doped semiconductor substrate, wherein an N-type doped epitaxial layer is arranged on the N-type doped semiconductor substrate, a P-type doped deep well region is arranged inside the N-type doped epitaxial layer, a P-type doped region and a P-type doped buffer region are arranged at the upper side of the P-type doped deep well region, and a high-concentration N-type doped region is arranged in the P-type doped region; polysilicon is arranged above partial gate oxide layer, and the polysilicon forms a polysilicon field plate structure at a terminal structure region and also forms a double-layer field plate together with a metal field plate which extends to a traditional region from a source end in the super-junction metal oxide field effect transistor with the surface buffering ring terminal structure; therefore, the surface field peak value can be reduced, the surface potential distribution is optimized, and the transverse pressure resistance level of components is effectively improved.
Description
Technical field
The invention belongs to the semiconductor power device technology field, relate to a kind of longitudinal high-pressure power device, in particular, be the vertical super-junction metal oxide field effect transistor that has the belt surface buffering ring terminal structure of high-speed switch and low on-resistance simultaneously about a kind of.
Background technology
Super-junction metal oxide field effect transistor is the new device that a kind of insulated gate structure advantage with metal oxide semiconductor transistor has high current density low on-resistance advantage simultaneously, and it is a kind of power semiconductor that can be used for reducing effectively the conduction loss of traditional power metal oxide semiconductor field-effect transistor.It is based on the charge compensation type device of charge balance concept.
Conventional high-tension power metal oxide semiconductor field-effect transistor device adopts low-doped extension drift layer to make the voltage supporting layer, and its conducting resistance mainly is exactly a drift layer resistance.The voltage endurance capability of drift layer is by its thickness and doping content decision, so, in order to improve puncture voltage, must increase drift layer thickness simultaneously and reduce its doping content, this just makes the resistance of drift layer constantly increase, when conducting state when high pressure (especially), drift layer resistance accounts for the overwhelming majority of conducting resistance.
The basic characteristics of super-junction metal oxide field effect transistor are that it realizes withstand voltage by the drift region that interval n-and p-doped regions constitute.Conventional high-tension power metal oxide semiconductor field-effect transistor device is when bearing high back voltage, it is withstand voltage that it mainly relies on vertically exhausting of PN junction to realize, the electric field strength peak value can appear in the PN junction place in entire device, and super-junction metal oxide field effect transistor is owing to introduced charge compensation mechanism, its inside is exhausting when withstand voltage, Electric Field Distribution is more even, with the triangle peak value Electric Field Distribution of conventional high-tension power metal oxide semiconductor field-effect transistor device, the device inside electric field of super-junction metal oxide field effect transistor is a distributed rectangular in vertical withstand voltage direction.The rectangle electric-field intensity distribution makes its entire device in exhausting withstand voltage process, the respective electrical fields peak value do not occur.Owing to insert p type island region on the vertical direction, can compensate excessive current lead-through electric charge.Add reverse bias voltage at drift layer, will produce a transverse electric field, PN junction is exhausted.When voltage reached certain value, drift layer exhausted fully, will play the effect of voltage supporting layer, therefore the doping impurity concentration of its voltage supporting layer can improve order of magnitude nearly, because the significantly raising of doping content, under identical puncture voltage, conducting resistance can reduce greatly.Therefore through constantly evolution and perfect, the new construction of super-junction metal oxide field effect transistor constantly occurs.
Design at the super-junction metal oxide field effect transistor terminal structure also is the focus that the researcher is closed always.The super-junction metal oxide field effect transistor terminal structure is different from conventional high-tension power metal oxide semiconductor field-effect transistor device, and its structure Design can combine with the super-junction structure of inside.In correlation technique, the someone proposes to change the ratio of PN doped region, and also the someone proposes cycle of dwindling by multiplying power the PN doped region etc.These methods all are better withstand voltage in order to realize the super-junction metal oxide field effect transistor terminal structure, yet these methods all can increase extra technology manufacture process, and technology difficulty and cost are increased.
Summary of the invention
The invention provides a kind of super-junction metal oxide field effect transistor of belt surface buffering ring terminal structure, it is under the prerequisite that does not increase technology difficulty and cost, when can guarantee requirement of withstand voltage, can not increase extra technology manufacture process, the original size of terminal structure can not extend, and surface potential that can the better optimize terminal structure distributes, and effectively reduces the electric field strength on surface.
The present invention adopts following technical scheme:
A kind of super-junction metal oxide field effect transistor of belt surface buffering ring terminal structure, comprise: N type dope semiconductor substrates, on described N type dope semiconductor substrates, be provided with N type doped epitaxial layer, be provided with P type doping deep-well region in the inside of described N type doped epitaxial layer, upside in described P type doping deep-well region is provided with P type doped region and P type doped buffer region, in described P type doped region, be provided with N type doped region, described P type doped region, the common primitive unit cell source region, inside that constitutes described super-junction metal oxide field effect transistor of described N type doped region and the described N type of part doped epitaxial layer, described P type doping deep-well region, the common terminal pressure-resistance structure zone that constitutes described super-junction metal oxide field effect transistor of described P type doped buffer region and the described N type of part doped epitaxial layer, at the described N type of part doped epitaxial layer, the top of part described P type doped region and P type doping deep-well region is provided with gate oxide, above the described gate oxide of part, be provided with polysilicon, described polysilicon has constituted the gate electrode of described super-junction metal oxide field effect transistor in described inner primitive unit cell source region, described polysilicon in described terminal pressure-resistance structure zone, constituted the polysilicon field plate structure and, above described inner primitive unit cell source region, be provided with metal level, constituted the source metal electrode of described super-junction metal oxide field effect transistor, below described N type dope semiconductor substrates, be provided with metal level, constituted the drain metal electrode of described super-junction metal oxide field effect transistor, above the described terminal pressure-resistance structure of part zone, be provided with the metal field plate, described P type doped buffer region is attached to the both sides of described P type doping deep-well region, extend in direction terminal that described polysilicon field plate structure mind-set from described P type doping deep-well region the is withstand voltage outside, and ending at the centre position of adjacent two P type doping deep-well region, described polysilicon field plate structure is positioned at the outermost in described terminal pressure-resistance structure zone.
Further, the length of described polysilicon field plate structure equates with described polysilicon field plate.
Further, described P type doped buffer region is positioned at the upper surface both sides of P type doping deep-well region, and does not link to each other each other between the described P type doped buffer region in diffusion back.
Further, described polysilicon field plate structure and the formed field plate structure of described metal field plate are double-deck field plate structures.
Further, described P type doping deep-well region is to adopt deep trouth corrosion and silicon backfilling process and handle the back through flattening surface to form.
Compared with prior art, the present invention has following advantage:
(1) in the structure of the present invention, in terminal pressure-resistance structure zone, the both sides, top of the deep-well region that the P type mixes are provided with the surperficial buffering ring that the P type mixes.Reverse when withstand voltage when device, this surperficial buffering ring has increased the surface curvature radius of deep-well region surface PN junction, has optimized the surface potential distribution, has reduced surface field, the terminal pressure-resistance structure is punctured surface leakage can not occur.And just be attached to the both sides of P type doping deep-well region, do not influence the inside CONCENTRATION DISTRIBUTION of the deep-well region of P type doping, can not destroy the charge balance relation.
(2) in the structure of the present invention, the setting of surperficial buffering ring structure can not increase the device fabrication step, and it uses the identical well structure of P type doped region with the primitive unit cell zone, and does not influence the structure and the concentration of P type doping deep-well region.
(3) structure of the present invention has adopted the double-deck field plate structure of polysilicon field plate structure and metal field plate.At terminal pressure-resistance structure intra-zone, polycrystalline field plate mind-set from P moldeed depth trap is withstand voltage extends to the terminal outside, and ends at the centre position of two P type doping deep-well region.The location layout of polycrystalline field plate makes the electromotive force that the P of overlapping type doping deep-well region is arranged with it extend to the withstand voltage direction of terminal structure, but do not have influence on another adjacent with it P type doping deep-well region, thereby reduce surface field intensity, thereby increased the laterally withstand voltage of device.
Description of drawings
Fig. 1 is the profile of an embodiment of the super-junction metal oxide field effect transistor of a kind of belt surface buffering ring terminal structure of the present invention.
Fig. 2 is the surperficial schematic top plan view of the super-junction metal oxide field effect transistor of a kind of belt surface buffering ring terminal structure of the present invention among Fig. 1.
Fig. 3 is the withstand voltage figure of exhausting of the terminal structure that does not comprise surperficial buffering ring of super-junction metal oxide field effect transistor of the present invention among Fig. 1.
Fig. 4 is the withstand voltage figure of exhausting of the terminal structure that comprises surperficial buffering ring of super-junction metal oxide field effect transistor of the present invention among Fig. 1.The equipotential lines distribution is compared more even with Fig. 3.
Fig. 5 is the surface potential figure of the terminal structure that does not comprise surperficial buffering ring of super-junction metal oxide field effect transistor of the present invention among Fig. 1.
Fig. 6 is the surface potential figure of the terminal structure that comprises surperficial buffering ring of super-junction metal oxide field effect transistor of the present invention among Fig. 1.
Embodiment
With reference to Fig. 1, a kind of super-junction metal oxide field effect transistor of belt surface buffering ring terminal structure, comprise: N type dope semiconductor substrates 1, on described N type dope semiconductor substrates 1, be provided with N type doped epitaxial layer 2, be provided with P type doping deep-well region 3 in the inside of described N type doped epitaxial layer 2, upside in described P type doping deep-well region 3 is provided with P type doped region 4 and P type doped buffer region 5, in described P type doped region 4, be provided with N type doped region 6, described P type doped region 4, described N type doped region 6 and the described N type of the part doped epitaxial layer 2 common primitive unit cell source regions, inside 11 that constitute described super-junction metal oxide field effect transistor, described P type doping deep-well region 3, described P type doped buffer region 5 and the described N type of the part doped epitaxial layer 2 common terminal pressure-resistance structure zones 12 that constitute described super-junction metal oxide field effect transistor, at the described N type of part doped epitaxial layer 2, the top of the described P type of part doped region 4 and P type doping deep-well region 3 is provided with gate oxide, above the described gate oxide of part, be provided with polysilicon, described polysilicon has constituted the gate electrode 7 of described super-junction metal oxide field effect transistor in described inner primitive unit cell source region 11, described polysilicon has constituted polysilicon field plate structure 8 and 14 in described terminal pressure-resistance structure zone 12, above described inner primitive unit cell source region 11, be provided with metal level, constituted the source metal electrode 9 of described super-junction metal oxide field effect transistor, below described N type dope semiconductor substrates 1, be provided with metal level, constituted the drain metal electrode 10 of described super-junction metal oxide field effect transistor, above the described terminal pressure-resistance structure of part zone 12, be provided with metal field plate 13, described P type doped buffer region 5 is attached to the both sides of described P type doping deep-well region 3, extend in direction terminal that described polysilicon field plate structure 8 mind-set from described P type doping deep-well region 3 the is withstand voltage outside, and ending at the centre position of adjacent two P type doping deep-well region 3, described polysilicon field plate structure 14 is positioned at the outermost in described terminal pressure-resistance structure zone 12.The length of described polysilicon field plate structure equates with described polysilicon field plate.Described P type doped buffer region is positioned at the upper surface both sides of P type doping deep-well region, and does not link to each other each other between the described P type doped buffer region in diffusion back.Described polysilicon field plate structure and the formed field plate structure of described metal field plate are double-deck field plate structures.Among the present invention, the concentration of P type doping deep-well region 3 is higher than the concentration of N type doped epitaxial layer 2, the concentration of P type doped buffer region 5 is higher than the concentration of P type doping deep-well region 3, the primitive unit cell source region 11, inside of described device architecture is alternately arranged by P type doping deep-well region 3 and N type doped epitaxial layer 2 on the length direction of device and is formed, and the width ratio between P type doping deep-well region 3 and the N type doped epitaxial layer 2 and concentration ratio by this device the size and the minimum requirement of withstand voltage of the conducting electric current that should satisfy determine jointly.
With reference to Fig. 2, this figure is the surperficial schematic top plan view of super-junction metal oxide field effect transistor of a kind of belt surface buffering ring terminal structure of this invention, the crosscut sectional position in 12 zones, AA ' representative terminal pressure-resistance structure shown in Figure 1 zone among the figure.
Concrete experiment effect of the present invention such as Fig. 3-shown in Figure 6, wherein Fig. 3 is the withstand voltage figure of exhausting of the terminal structure that does not comprise surperficial buffering ring of super-junction metal oxide field effect transistor of the present invention among Fig. 1.Fig. 4 is the withstand voltage figure of exhausting of the terminal structure that contains surperficial buffering ring of super-junction metal oxide field effect transistor of the present invention among Fig. 1, abscissa among Fig. 3 and Fig. 4 is represented the lateral dimension coordinate of device architecture, and ordinate is represented the longitudinal size coordinate of device architecture.Equipotential lines distribution among Fig. 4 is compared more even with Fig. 3, electric leakage do not occur concentrating.Abscissa among Fig. 5 and Fig. 6 is represented the lateral dimension coordinate of device architecture, and ordinate is represented the surface potential of device.Fig. 5 is the surface potential figure of the terminal structure that does not comprise surperficial buffering ring of super-junction metal oxide field effect transistor of the present invention among Fig. 1, and Potential Distributing is inhomogeneous.Fig. 6 is the surface potential figure of the terminal structure that comprises surperficial buffering ring of super-junction metal oxide field effect transistor of the present invention among Fig. 1, and Potential Distributing is compared more even with Fig. 5.
The present invention adopts following method to prepare:
1, get a N type high-concentration dopant silicon chip 1, epitaxial growth N type epitaxial loayer 2 adopts ion to inject then and subsequent annealing technology forms P type doped region 4 and P type doped buffer region 5;
2, adopt deep trouth corrosion and silicon backfilling process, flattening surface is handled the back and is formed P type doping deep-well region 3, generates gate oxide through overheated growth then;
3, follow the deposit polysilicon, and carry out etching formation polysilicon gate 7 and polysilicon field plate structure 8,14, inject through ion then and annealing process formation N type doped source contact area 6;
4, through deposit aluminium and etching aluminium technology, form the source electrode of metal level 9 as device, metal level 10 is as the drain electrode of device, and metal level 13 carries out follow-up Passivation Treatment at last as the metal field plate of device.
Claims (5)
1. the super-junction metal oxide field effect transistor of a belt surface buffering ring terminal structure, comprise: N type dope semiconductor substrates (1), on described N type dope semiconductor substrates (1), be provided with N type doped epitaxial layer (2), be provided with P type doping deep-well region (3) in the inside of described N type doped epitaxial layer (2), upside in described P type doping deep-well region (3) is provided with P type doped region (4) and P type doped buffer region (5), in described P type doped region (4), be provided with N type doped region (6), described P type doped region (4), described N type doped region (6) and the described N type of part doped epitaxial layer (2) constitute the primitive unit cell source region, inside (11) of described super-junction metal oxide field effect transistor jointly, described P type doping deep-well region (3), described P type doped buffer region (5) and the described N type of part doped epitaxial layer (2) constitute the terminal pressure-resistance structure zone (12) of described super-junction metal oxide field effect transistor jointly, at the described N type of part doped epitaxial layer (2), the top of the described P type of part doped region (4) and P type doping deep-well region (3) is provided with gate oxide, above the described gate oxide of part, be provided with polysilicon, described polysilicon has constituted the gate electrode (7) of described super-junction metal oxide field effect transistor in described inner primitive unit cell source region (11), described polysilicon has constituted the first polysilicon field plate structure (8) and the second polysilicon field plate structure (14) in described terminal pressure-resistance structure zone (12), top in described inner primitive unit cell source region (11) is provided with metal level, constituted the source metal electrode (9) of described super-junction metal oxide field effect transistor, below in described N type dope semiconductor substrates (1) is provided with metal level, constituted the drain metal electrode (10) of described super-junction metal oxide field effect transistor, be provided with metal field plate (13) in the top in the described terminal pressure-resistance structure of part zone (12), it is characterized in that, described P type doped buffer region (5) is attached to the both sides of described P type doping deep-well region (3), extend in the outside in described first polysilicon field plate structure (8) mind-set terminal pressure-resistance structure zone (12) from described P type doping deep-well region (3), and ending at the centre position of adjacent two P type doping deep-well region (3), the described second polysilicon field plate structure (14) is positioned at the outermost in described terminal pressure-resistance structure zone (12).
2. the super-junction metal oxide field effect transistor of belt surface buffering ring terminal structure according to claim 1 is characterized in that, the length of the described second polysilicon field plate structure (14) equates with the described first polysilicon field plate structure (8).
3. the super-junction metal oxide field effect transistor of belt surface buffering ring terminal structure according to claim 1, it is characterized in that, described P type doped buffer region (5) is positioned at the upper surface both sides of P type doping deep-well region (3), and does not link to each other each other between the diffusion described P type doped buffer region in back (5).
4. the super-junction metal oxide field effect transistor of belt surface buffering ring terminal structure according to claim 1 is characterized in that, the described first polysilicon field plate structure (8) is double-deck field plate structure with the formed field plate structure of described metal field plate (13).
5. the super-junction metal oxide field effect transistor of belt surface buffering ring terminal structure according to claim 1 is characterized in that, described P type doping deep-well region (3) is to adopt deep trouth corrosion and silicon backfilling process and handle the back through flattening surface to form.
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| CN102569388B (en) * | 2010-12-23 | 2014-09-10 | 无锡华润上华半导体有限公司 | Semiconductor device and manufacturing method thereof |
| JP5719167B2 (en) * | 2010-12-28 | 2015-05-13 | ルネサスエレクトロニクス株式会社 | Semiconductor device |
| CN102867842B (en) * | 2011-07-05 | 2015-04-08 | 上海华虹宏力半导体制造有限公司 | Super junction device and manufacturing method thereof |
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| CN103000665B (en) * | 2011-09-08 | 2015-08-19 | 上海华虹宏力半导体制造有限公司 | Super-junction device and manufacture method |
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| CN102969356B (en) * | 2012-11-08 | 2015-05-27 | 电子科技大学 | Terminal structure of super-junction power device |
| CN103779399A (en) * | 2014-02-20 | 2014-05-07 | 西安芯派电子科技有限公司 | Semiconductor device with super junction structure |
| CN108428733B (en) * | 2017-02-15 | 2021-03-16 | 深圳尚阳通科技有限公司 | Super junction device and manufacturing method thereof |
| CN109755316B (en) * | 2017-11-08 | 2022-08-16 | 深圳尚阳通科技有限公司 | Super junction device and manufacturing method thereof |
| CN109755314B (en) * | 2017-11-08 | 2022-08-16 | 深圳尚阳通科技有限公司 | Super junction device and manufacturing method thereof |
| CN109755291B (en) * | 2017-11-08 | 2022-08-16 | 深圳尚阳通科技有限公司 | Super junction device and manufacturing method thereof |
| CN109755315B (en) * | 2017-11-08 | 2022-08-16 | 深圳尚阳通科技有限公司 | Super junction device and manufacturing method thereof |
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| CN114823873B (en) * | 2022-04-28 | 2023-10-27 | 电子科技大学 | Super junction power device terminal structure |
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