WO2011137676A1 - 一种无线通讯模块产品 - Google Patents

一种无线通讯模块产品 Download PDF

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Publication number
WO2011137676A1
WO2011137676A1 PCT/CN2011/070961 CN2011070961W WO2011137676A1 WO 2011137676 A1 WO2011137676 A1 WO 2011137676A1 CN 2011070961 W CN2011070961 W CN 2011070961W WO 2011137676 A1 WO2011137676 A1 WO 2011137676A1
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Prior art keywords
chip
substrate
functional
wireless communication
communication module
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PCT/CN2011/070961
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English (en)
French (fr)
Inventor
李军
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中兴通讯股份有限公司
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Publication of WO2011137676A1 publication Critical patent/WO2011137676A1/zh

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/065—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L25/0655—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00 the devices being arranged next to each other
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/552—Protection against radiation, e.g. light or electromagnetic waves
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    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/64—Impedance arrangements
    • H01L23/66—High-frequency adaptations
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    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/16—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
    • H01L25/165—Containers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
    • H01L23/49816—Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L24/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00011—Not relevant to the scope of the group, the symbol of which is combined with the symbol of this group
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01015—Phosphorus [P]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/095—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00 with a principal constituent of the material being a combination of two or more materials provided in the groups H01L2924/013 - H01L2924/0715
    • H01L2924/097—Glass-ceramics, e.g. devitrified glass
    • H01L2924/09701—Low temperature co-fired ceramic [LTCC]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1532—Connection portion the connection portion being formed on the die mounting surface of the substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/30107—Inductance
    • H—ELECTRICITY
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/3025—Electromagnetic shielding
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • H05K1/181—Printed circuits structurally associated with non-printed electric components associated with surface mounted components

Definitions

  • the present invention relates to the field of electronics, and in particular, to a wireless communication module product.
  • the module size of this package is 25.6(W) X 42(L) X 4(H)mm, the interface is unified, it supports hot swap, and the internal antenna is integrated, but the heat dissipation problem is not easy. At the same time, due to the influence of the antenna, the structure is limited, and the size is too large and the thickness is large.
  • the stamp hole encapsulation module the package form is widely used.
  • the module pins are similar to the teeth protruding from the edge of the module, corresponding The motherboard pad is rectangular.
  • This type of package the technology is relatively mature, the process is relatively simple, and the soldering condition of the module is easy to repair. However, due to its own characteristics, this package is easy to cause copper wire and hole deflection in the hole.
  • PCB Printed Circuit Board
  • the Interconnection, PCIE organization defines the Peripheral Component Interconnect (PCI) Express Mini Card protocol standard, and any module that conforms to this protocol can be plugged into a slot that conforms to the protocol.
  • PCI Peripheral Component Interconnect
  • the PCIE-based Mini PCIE has a unified interface, plug and play, low cost, and easy replacement.
  • the PCI Express Mini Card protocol specifies the module size and pin definition.
  • the module size is: full size 50.95mm (L) 30mm (W) 5mm (H), half size 26.80mm (L) 30mm (W) x 5mm (H) Therefore, even a half-size PCIE package module is large in size and difficult to use in some cases where the size and thickness are relatively strict.
  • the B2B module is soldered with a matching connector on the module and the main board.
  • the module can be directly inserted into the main board through the connector.
  • BUsed in the form of B2B connector it has high reliability and easy replacement.
  • the size of the connector is generally large and the height is relatively high, the size of the module is large and the height is relatively high. It can be seen that the existing packaging technology will result in a larger size and thickness of the packaged wireless communication module.
  • the present invention provides a wireless communication module product, the wireless communication module product comprising: a functional die packaged by a chip package process, a functional chip packaged by a chip package process, and a substrate ( The functional wafer and the functional chip are connected to each other through the substrate; wherein the substrate comprises a first surface and a second surface; wherein the functional wafer and the functional chip are separately packaged on different surfaces of the substrate; Alternatively, the functional chip and the functional chip are independently packaged on the same surface of the substrate; or the functional chip and the functional chip are stacked and packaged on the same surface of the substrate. among them,
  • the first surface or the second surface of the substrate on which the functional wafer is mounted is soldered with solder balls or pads. among them,
  • the solder ball includes a ground solder ball and a solder ball as a function pin of the wireless communication module product. among them,
  • the solder ball serves as one or more of the following functional pins: Universal Serial Bus (USB) interface pin, voice input interface pin, voice output interface pin, universal asynchronous receive and receive (UART) interface pin, joint Test Behavior Organization-Defined (JTAG) Interface Pins, Main Antenna Pins, Diversity Antenna Pins, Power Supply Pins, General Purpose Input Output (GPIO) Interface Pins, Ground Pins, Customer Identification Module (SIM) Interface, Secure Digital Card (SD) interface, I2C interface, and serial peripheral interface (SPI) pins.
  • USB Universal Serial Bus
  • voice input interface pin voice input interface pin
  • voice output interface pin universal asynchronous receive and receive (UART) interface pin
  • JTAG Joint Test Behavior Organization-Defined
  • JTAG Joint Test Behavior Organization-Defined
  • GPIO General Purpose Input Output
  • Ground Pins Ground Pins
  • SIM Customer Identification Module
  • SD Secure Digital Card
  • I2C interface I2C interface
  • SPI serial peripheral interface
  • the functional chip and the functional chip are packaged on the same surface of the substrate, the functional chip is packaged on the first surface or the second surface of the substrate, and the functional chip is packaged on the functional chip.
  • the functional chip and the functional chip are connected by flip chip or gold wire. among them,
  • a first surface of the substrate is soldered with a radio frequency connector, and/or a second surface of the substrate is soldered with a radio frequency soldering member, the radio frequency soldering member including solder balls or pads. among them,
  • the first surface of the substrate is soldered with a radio frequency connector, and when the second surface of the substrate is soldered with the radio frequency weldment, the radio frequency weldment is placed on the second surface and the radio frequency connection with the first surface The shortest position of the RF trace.
  • the first surface and/or the second surface of the substrate is soldered with a shielding device.
  • the shielding device includes a shielding frame and a shielding cover, and the first surface and/or the second surface of the substrate is soldered with a shielding frame, and the shielding frame is externally coupled with a shielding cover, and the shielding frame is combined with the shielding cover Forming a closed cavity; or, the shielding device includes a shield, and the first surface and/or the second surface of the substrate is soldered with a shield, and the shield is combined with the substrate to form a closed cavity.
  • a diameter larger than the functional chip is soldered on the first surface or the second surface of the substrate on which the functional wafer is packaged.
  • the function chip includes one or more of the following chips: a baseband chip, a radio frequency chip, a power amplifier chip, a power management chip, an audio codec chip, a memory chip, a clock crystal, and a clock crystal.
  • the functional wafer comprises one or more of the following wafers: a memory wafer, a baseband wafer, a radio frequency chip, a power amplifier chip, a power management chip, and an audio codec chip.
  • the substrate is further soldered with a passive device, and the passive device includes one or more of the following devices: a resistor, a capacitor, and an inductor.
  • the two-sided layout that is, the functional chip and the functional chip are separately packaged on different surfaces of the substrate, the size and thickness of the entire module product are more effectively reduced.
  • An ultra-compact communication module is now available.
  • the modularization of chips and wafers that can achieve uniform functions the consideration of such functional modules is eliminated in the manufacturing process of mobile phones or other communication products, shortening the development and production cycle, and the small size is also Convenient system design.
  • an RF connector can be integrated on the wireless communication module product to facilitate application.
  • the wireless communication module product of the invention can be applied to mobile phones and mobile internet devices (Mobile
  • Inernet Device MID
  • e-books video surveillance
  • PMPs portable media players
  • navigators navigators
  • electronic devices with communication capabilities such as automotive electronics.
  • FIG. 1 is a schematic view of a module in accordance with an embodiment of the present invention
  • FIG. 2 is a bottom view of a module according to an embodiment of the present invention
  • FIG. 3a is a schematic view of a chip packaged on a top surface of a PCB according to an embodiment of the present invention
  • FIG. 4 is a schematic view showing the substrate soldered on the user's main board when the wafer is packaged on the bottom surface of the substrate according to the embodiment of the present invention
  • FIG. 4b is a bottom view of the substrate when the wafer is packaged on the bottom surface of the substrate according to the embodiment of the present invention
  • 5a is a cross-sectional view of the RF connector packaged on the substrate according to the embodiment of the present invention
  • FIG. 5b is a plan view of the RF connector of the embodiment of the present invention when it is packaged on the substrate;
  • Figure 6b is a plan view of the shield directly mounted on the substrate of the embodiment of the present invention;
  • Figure 6c is a plan view of the shield mounted on the substrate with the RF connector of the embodiment of the present invention;
  • Figure 7a is a shield for the embodiment of the present invention An exploded perspective view of a shielded manner of a shield frame;
  • FIG. 7b is a shield and a screen mounted on a substrate on which an RF connector is mounted in accordance with an embodiment of the present invention;
  • a preferred embodiment of the present invention includes a functional die, a functional chip, and a substrate (PCB), wherein the functional chip and the functional chip are connected by a substrate; wherein the substrate includes a first surface and a The functional surface and the functional chip are separately packaged on different surfaces of the substrate; or the functional chip and the functional chip are independently packaged on the same surface of the substrate; or the functional chip and function
  • the chip stack is packaged on the same surface of the substrate.
  • the functional chip is packaged by a package process of a wafer (for example, by a molding method), and the functional chip is packaged by a package process of a chip.
  • the substrate can be coated with a low temperature cofired ceramic (Low Temperature Cofired Ceramic,
  • the solder ball includes a ground solder ball and a solder ball as a function pin of the wireless communication module product (ie, the module leads to a signal line by using a solder ball package).
  • the solder ball serves as one or more of the following functional pins: Universal Serial Bus (USB) interface pin, voice input interface pin, voice output interface pin, universal asynchronous receive and receive (Universal Asynchronous Receiver) /Transmitter, UART) interface pin, Joint Test Action Group (JTAG) interface pin, main antenna pin, diversity antenna pin, power supply pin, general purpose input output (General Purpose Input Output, GPIO) interface pin, ground pin, Subscriber Identity Module (SIM) interface, Secure Digital (SD) card interface, I2C interface, and Serial Peripheral Interface (SPI) pin.
  • USB Universal Serial Bus
  • JTAG Joint Test Action Group
  • main antenna pin main antenna pin
  • diversity antenna pin power supply pin
  • ground pin General Purpose Input Output
  • SIM Subscriber Identity Module
  • SD Secure Digital
  • I2C interface Serial Peripheral Interface
  • SPI Serial Peripheral Interface
  • the functional chip and the functional chip are packaged on the same surface of the substrate, the functional chip is packaged on the first surface or the second surface of the substrate, and the functional chip is packaged on the functional chip.
  • the functional wafer is independently packaged on the substrate, or when the functional chip is packaged on the functional chip, the functional wafer and the substrate are connected by flip-chip or gold wire ( Wire bonding ).
  • the first surface of the substrate is soldered with a radio frequency connector, and/or the second surface of the substrate is soldered with a radio frequency weldment comprising a solder ball or a pad.
  • the first surface of the substrate is soldered with a radio frequency connector, and when the second surface of the substrate is soldered with the radio frequency weldment, the radio frequency weldment is placed on the second surface and the radio frequency connection with the first surface The shortest position of the RF trace.
  • the first surface and/or the second surface of the substrate is soldered with a shielding device, wherein: the shielding device comprises a shielding frame and a shielding cover, and the first surface and/or the second surface of the substrate is soldered with a shielding frame, shielding The shielding frame is coupled with the shielding cover, and the shielding frame is combined with the shielding cover to form a sealed cavity; or the shielding device comprises a shielding cover, and the first surface and/or the second surface of the substrate is soldered with a shielding cover.
  • the shield is combined with the substrate to form a closed cavity.
  • the shielding device can avoid electromagnetic interference.
  • the shielding device can shield the interference between the whole module and the outside world, and protect the module product.
  • a diameter larger than a thickness of the functional wafer is soldered a solder ball
  • the solder ball is distributed around the functional wafer
  • the solder ball includes a ground solder ball
  • the wireless communication module product is soldered on the user's main board through the ground solder ball
  • the user motherboard is The functional wafer is coppered at a corresponding location.
  • the function chip comprises one or more of the following chips: a baseband chip, a radio frequency chip, a power amplifier (PA) chip, a power management chip, an audio codec chip, a memory chip, a clock crystal and a clock Crystal.
  • the functional wafer comprises one or more of the following wafers: a memory wafer, a baseband wafer, a radio frequency wafer, a power amplifier chip, a power management wafer, and an audio codec wafer.
  • some passive components may be soldered on the substrate without affecting the overall volume of the module product.
  • the passive device includes one or more of the following devices: resistance, capacitance, and inductance.
  • FIG. 1 is a longitudinal sectional view of the module.
  • the top surface of the communication module is distributed with a baseband and a radio frequency chipset.
  • the baseband and the RF chipset are soldered to the substrate by a conventional packaging method, for example, a ball grid.
  • BGA Grid Array
  • LGA Land Grid Array
  • QFN Quad Flat No-lead
  • the baseband chip and the RF chip have their own shielded cavities.
  • the PCB substrate in this embodiment is a BT medium.
  • the circular shape of the bottom surface of the module is the solder ball of the communication module.
  • the solder balls are distributed around the wafer or distributed on one side or both sides of the wafer. In other embodiments, the perimeter of the wafer may also be distributed as pads.
  • the solder balls distributed around the wafer are function pin pads, which are the function pins of the module product and can be used as one or more of the following function pins: Universal Serial Bus (USB) interface pin, voice Input interface pins, voice output interface pins, Universal Asynchronous Receive Transmit (UART) interface pins, JTAG (Joint Test Behavior Organization defined) interface pins, main antenna pins, diversity antenna pins, power supply pins, general purpose Input/Output (GPIO) interface pins, ground pins, Customer Identification Module (SIM) interface, Secure Digital Card (SD) interface, I2C interface, and Serial Peripheral Interface (SPI) pins.
  • USB Universal Serial Bus
  • voice Input interface pins voice output interface pins
  • UART Universal Asynchronous Receive Transmit
  • JTAG Joint Test Behavior Organization defined interface pins
  • main antenna pins main antenna pins
  • diversity antenna pins power supply pins
  • GPIO general purpose Input/Output
  • SIM Customer Identification Module
  • SD Secure Digital Card
  • the bottom package wafer is a memory wafer, including a Nand flash and DDRAM wafer, and a wire-bond connection.
  • the wafer is directly connected from the wafer to the substrate PCB, and the wafer is protected by a plastic molding on the outside. Since the wafer is in close contact with the PCB, the overall height after molding is lower than that of the BGA.
  • solder ball it is also possible to solder some passive devices with low height and small volume, such as resistors, in the gap between the molded wafer and the solder ball or the gap between the solder ball and the solder ball.
  • capacitors and inductors, etc. to improve space utilization, as shown in Figure 2.
  • the existing circuit design if it is a single-sided layout, it is usually necessary to put a sticker on the PCB.
  • a flash chip and this embodiment encapsulates the chip of the flash directly on the bottom surface of the PCB, and does not occupy extra space for the PCB of the single-sided layout.
  • the chip package can be reduced. The thickness and area of the PCB, thus effectively reducing the size of the communication module.
  • the chip using the chip packaging process has only two kinds of memory chips, NAND and DDRAM.
  • other functional units such as a radio frequency transceiver, a duplexer, etc., may be packaged according to actual conditions.
  • the wafer In addition to placing the wafer on the bottom surface of the PCB, it can also be placed on the top surface of the PCB, as shown in Figure 3a. Preferably, the wafer can be placed on the top surface of the chip, as shown in Figure 3b. In order to optimize heat dissipation, devices with more severe heat, such as RF and power amplifiers, are packaged in
  • FIG 4 shows the shielding of the bottom package wafer of the module.
  • the shield can be formed by the design of the PCB.
  • the grounding solder ball is generally soldered on the PCB board and around the chip packaging area, and a large amount of copper layer is laid on the PCB area of the user's main board corresponding to the wafer. The user board and the PCB board pass the PCB.
  • FIG. 4a is a bottom view of the substrate PCB of FIG. 4a. As can be seen from the figure, a large number of ground solder balls are placed in the solder balls laid on the bottom surface of the PCB to ensure the heat dissipation effect of the wafer.
  • the module of the present invention can also increase the function of the RF connection by encapsulating the RF connector on the substrate and/or encapsulating the RF solder ball on the substrate, as shown in FIG. 5a, which shows two RF access modes.
  • One is the RF connector soldered at one corner of the module PCB board, and the other is the RF solder ball soldered on the bottom surface of the module PCB board, or the antenna pin solder ball, or other RF soldering parts, such as pads.
  • the RF connector and the corresponding RF weldment can be respectively disposed at any position of the module.
  • the RF weldment is placed on the second surface and the RF trace of the RF connector of the first surface is the shortest.
  • the corresponding means that the two are in the same or similar position on the vertical line of the module.
  • the RF connector is packaged in the upper left corner of the top surface of the module, and correspondingly, the position of the module antenna pin solder ball is located at or near the bottom surface of the module at a position of the RF connector.
  • FIG. 6 is a shielding method for directly using the shielding cover, wherein FIG. 6a is a ⁇ board A cross-sectional view of the directly welded shield, FIG. 6b is a top view of FIG. 6a, and FIG. 6c is a top view of the module mounting shield with the RF connector soldered.
  • Figure 7 shows the shielding of the shield and shield.
  • Figure 7a is a top view of the module after soldering the shield frame and a top view after soldering the shield.
  • Figure 7b is a top view of the welded shield frame on the module with the RF connector soldered and a top view after soldering the shield.
  • Figure 7c shows the shield cover.
  • the shielding method of the shield cover and the shield frame shown in FIG. 7 is to directly solder the shield frame to the top surface (front surface) of the module PCB board, and then directly attach the shield cover to the shield frame, and the shield frame is combined with the shield cover. Closed cavity.
  • the advantage of this method is that the shield frame and the shield cover are simple to manufacture.
  • the shield cover After the shield cover is removed, the components on the front side of the module can be directly repaired and inspected, and the test and debugging are convenient, but since the shield frame is soldered on the PCB board on the front of the module, The shield is also buckled on the shield to increase the overall thickness of the module.
  • the shield cover In the shielding mode without the shield frame shown in Fig. 6, the shield cover is directly welded to the top surface of the module PCB board, and the shield cover and the substrate are combined to form a closed cavity.
  • the advantage is that the front part of the module can be divided into chambers by plastic, etc., and the sealing performance and shielding performance are good.
  • the direct welding mask because the direct welding mask is used, the size of the shielding frame is reduced, so Can effectively reduce the thickness of the module.
  • it since it is a direct welding method, it is not easy to repair and test.
  • the invention can effectively reduce the thickness or size of the entire wireless communication module product, thereby achieving the purpose of reducing the volume of the wireless communication module.
  • the two-sided layout that is, the functional chip and the functional chip are separately packaged on different surfaces of the substrate, the size and thickness of the entire module product are more effectively reduced, and an ultra-compact communication module is realized.
  • an RF connector can be integrated on the wireless communication module product to facilitate application.
  • the wireless communication module product of the invention can be applied to a mobile phone, a mobile internet device (MID), an e-book, a video monitor, a portable media player (PMP), a navigator, and a car electronic device. Communication functions in electronic devices.

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Description

一种无线通讯模块产品
技术领域 本发明涉及电子领域， 尤其涉及一种无线通讯模块产品。
背景技术
随着消费类电子和无线网络的不断发展与升级， 无线通讯模块越来越受 到人们的关注， 与此同时， 随着移动通讯技术的飞速发展， 消费类产品对无 线通讯模块的要求也越来越高， 很多新兴的产品形式需要体积更小， 厚度更 薄的无线通讯模块。 目前， 市面上的无线通讯模块形式多种多样， 尺寸基本都比较大， 厚度 也较大， 在消费类电子中， 有时候很难满足超薄超小型的设计要求。 按照封 装的不同形式， 主要分为以下几种： 日本 WILLCOM运营商的推出的可用于个人手持式电话系统（Personal Handy-phone System, PHS的 W-SIM通用模块， 同时也可应用于笔记本电脑 使用的移动电话或掌上电脑。 这种封装形式的模块尺寸为 25.6(W) X 42(L) X 4(H)mm, 接口统一， 支持热插拔， 同时内部集成天线等优点， 但散热问题不 易解决， 同时由于天线影响， 给结构上带来限制， 且尺寸太大和厚度都较大。 邮票孔封装的模块， 这种封装形式使用较为广泛。 模块引脚类似于齿状 突出于模块边缘， 对应主板焊盘为矩形。 此类型封装， 技术较为成熟， 工艺 较为简单， 同时对于模块的焊接状况易于检修。 但是， 这种封装方式由于其 自身的特点， 所以容易造成孔内铜丝和孔切偏以及孔切破后残留铜丝， 从而 导致焊接性能下降； 且釆用的是比较普通的印刷电路板 （Printed Circuit Board, PCB ) 工艺， 尺寸和厚度难以降低。 PCIE 封装形式， 外部设备部件接口 （ Peripheral Component
Interconnection, PCIE )组织定义了周边元件扩展接口（ Peripheral Component Interconnect, PCI ) Express Mini Card协议标准， 任何符合该协议的模块都 可以插在符合该协议的插槽中。 目前， 该技术已经广泛应用在个人电脑上。 基于 PCIE的 Mini PCIE这种封装形式接口统一， 即插即用， 成本较低， 更 换容易。 但 PCI Express Mini Card协议规定了模块尺寸大小及管脚定义， 模 块尺寸大小为：全尺寸 50.95mm(L) 30mm(W) 5mm(H),半尺寸 26.80mm(L) 30mm(W) x 5mm(H), 因此， 即使是半尺寸的 PCIE封装模块尺寸较大， 不 易使用在一些对尺寸大小及厚度要求比较严格的场合。
B2B模块， 在模块和主板上分别焊接有配套的连接器， 模块可通过连接 器直接插在主板上。 釆用 B2B连接器的形式， 可靠性高， 更换容易。 但是， 一般情况下由于连接器的尺寸一般都比较大、 高度比较高， 这种模块的尺寸 也较大、 高度比较高。 可见，现有的封装技术都会导致封装后的无线通讯模块尺寸和厚度较大。
发明内容 本发明要解决的技术问题是提供一种无线通讯模块产品， 减小无线通讯 模块的体积。 为解决上述技术问题， 本发明提供了一种无线通讯模块产品， 所述无线 通讯模块产品包括： 釆用晶片封装工艺封装的功能晶片 （die ) 、 釆用芯片封 装工艺封装的功能芯片以及基板（PCB ) ， 所述功能晶片和功能芯片通过所 述基板相连； 其中， 所述基板包含第一表面和第二表面； 其中， 所述功能晶片和功能芯片分别独立封装在所述基板的不同表面； 或者， 所述功能晶片和功能芯片独立封装在所述基板的同一表面； 或者， 所 述功能晶片和功能芯片层叠封装在所述基板的同一表面。 其中，
当所述功能晶片和功能芯片分别独立封装在所述基板的不同表面时， 封 装有所述功能晶片的所述基板的第一表面或第二表面焊接有焊球或焊盘。 其中，
所述焊球包括接地焊球及作为所述无线通讯模块产品功能引脚的焊球。 其中，
所述焊球作为以下一种或几种功能引脚： 通用串行总线（USB )接口引脚、 语音输入接口引脚、 语音输出接口引 脚、通用异步接收发送（UART )接口引脚、联合测试行为组织定义的（ JTAG ) 接口引脚、 主天线引脚、 分集天线引脚、 供电引脚、 通用输入输出 （GPIO ) 接口引脚、 接地引脚、 客户识别模块（SIM )接口、 安全数字卡（SD )接口、 I2C接口和串行外围接口 （SPI ) 引脚。 其中， 所述功能晶片独立封装在所述基板上时， 所述功能晶片与所述基板通过 倒装芯片或者金线连接。 其中， 所述功能晶片和功能芯片层叠封装在所述基板的同一表面时， 所述功能 芯片封装在所述基板的第一表面或第二表面， 所述功能晶片封装在所述功能 芯片上。 其中， 所述功能晶片封装在所述功能芯片上时， 所述功能晶片与所述功能芯片 通过倒装芯片或者金线连接。 其中，
所述基板的第一表面焊接有射频连接器， 和 /或， 所述基板的第二表面焊 接有射频焊件， 所述射频焊件包括焊球或焊盘。 其中，
所述基板的第一表面焊接有射频连接器， 且所述基板的第二表面焊接有 射频焊件时， 所述射频焊件置于所述第二表面上与所述第一表面的射频连接 器的射频走线最短的位置。 其中， 所述基板的第一表面和 /或第二表面焊接有屏蔽器件。 其中， 所述屏蔽器件包括屏蔽架和屏蔽罩，所述基板的第一表面和 /或第二表面 焊接有屏蔽架， 所述屏蔽架外卡接有屏蔽罩， 所述屏蔽架与屏蔽罩组合形成 密闭腔体； 或者， 所述屏蔽器件包括屏蔽罩，所述基板的第一表面和 /或第二表面焊接有屏 蔽罩， 所述屏蔽罩与基板组合形成密闭腔体。 其中， 所述功能晶片和功能芯片分别独立封装在所述基板的不同表面时， 在所 述基板的封装有所述功能晶片的第一表面或第二表面上， 焊接有直径大于所 述功能晶片厚度的焊球， 所述焊球分布于所述功能晶片的周围， 所述焊球中 包括接地焊球，所述无线通讯模块产品通过所述接地焊球焊接在用户主板上， 所述用户主板上与所述功能晶片对应的位置铺铜， 所述用户主板、 所述接地 焊球与所述基板组合形成所述功能晶片的屏蔽腔。 其中， 所述功能芯片包括以下芯片中的一种或几种： 基带芯片、 射频芯片、 功 率放大器芯片、 电源管理芯片、 音频编解码芯片、 存储器芯片、 时钟晶振、 以及时钟晶体。 其中， 所述功能晶片包括以下晶片中的一种或几种： 存储器晶片、 基带晶片、 射频晶片、 功率放大器晶片、 电源管理晶片、 以及音频编解码晶片。 其中， 所述基板上还焊接有被动器件， 所述被动器件包括以下器件中的一种或 几种： 电阻、 电容、 以及电感。 本发明通过将功能晶片代替芯片封装在 PCB 板上作为无线通讯模块产 品， 可以有效减小整个无线通讯模块产品的厚度或尺寸， 从而达到缩小无线 通讯模块体积的目的。 当双面布局时， 即功能晶片和功能芯片分别独立封装 在所述基板的不同表面时， 更为有效地减小整个模块产品的尺寸和厚度， 实 现了超小型化的通讯模块。 另外， 由于将能达到统一功能的芯片和晶片模块 化， 使得在手机或其他通讯产品的生产制造过程中省去了对该类功能模块的 考虑， 缩短了开发和生产周期， 同时小型的体积也方便系统方案设计。 此外， 还可以在该无线通讯模块产品上集成射频连接器， 以方便应用。 本发明无线通讯模块产品可以应用在手机、 移动互联网设备 ( Mobile
Inernet Device, MID ) ,电子书，视频监控，可携式媒体播放器（ portable media player, PMP ) , 导航仪， 以及汽车电子等具有通讯功能的电子设备中。
附图概述 图 1是本发明实施例模块整理架构图； 图 2是本发明实施例模块底面视图； 图 3a是本发明实施例晶片封装于 PCB顶面的示意图； 图 3b是本发明实施例晶片封装于芯片顶面的示意图； 图 4a是本发明实施例晶片封装于基板底面位置时，基板焊接在用户主板 上的示意图； 图 4b是本发明实施例晶片封装在基板底面时， 基板的仰视图； 图 5a是本发明实施例射频连接器封装于基板上的剖视图； 图 5b是本发明实施例射频连接器封装于基板上时的俯视图； 图 6a是本发明实施例基板上直接安装屏蔽罩的剖视图； 图 6b是本发明实施例基板上直接安装屏蔽罩的俯视图； 图 6c是本发明实施例安装有射频连接器的基板上安装屏蔽罩的俯视图； 图 7a是本发明实施例釆用屏蔽罩结合屏蔽架的屏蔽方式的立体分解图； 图 7b是本发明实施例安装有射频连接器的基板上安装屏蔽和屏蔽架的 示意图； 图 7c是本发明实施例釆用屏蔽罩结合屏蔽架的屏蔽方式的剖视图。 本发明的较佳实施方式 本发明所述模块产品包括功能晶片 （die )、 功能芯片以及基板（PCB ) , 所述功能晶片和功能芯片通过基板相连； 其中， 所述基板包含第一表面和第 二表面； 其中， 所述功能晶片和功能芯片分别独立封装在所述基板的不同表 面； 或者， 所述功能晶片和功能芯片独立封装在所述基板的同一表面； 或者， 所述功能晶片和功能芯片层叠封装在所述基板的同一表面。 其中， 所述功能 晶片釆用晶片的封装工艺封装（例如塑封胶（ molding )方式进行封装）， 所 述功能芯片釆用芯片的封装工艺封装。 所述基板可以釆用低温共烧陶瓷（Low Temperature Cofired Ceramic,
LTCC )基板或者 FR4基板或者 BT基板或者其他介质的基板实现。 当所述功能晶片和功能芯片分别独立封装在所述基板的不同表面时， 封 装有所述功能晶片的所述基板的第一表面或第二表面焊接有焊球或焊盘。 上述焊球包括接地焊球及作为所述无线通讯模块产品功能引脚的焊球 (即所述模块釆用焊球的封装形式引出信号线 ) 。 所述焊球作为以下一种或 几种功能引脚： 通用串行总线（Universal Serial Bus, USB )接口引脚、 语音 输入接口引脚、 语音输出接口引脚、 通用异步接收发送 （ Universal Asynchronous Receiver/Transmitter , UART )接口引脚、 联合测试行为组织定 义的 （Joint Test Action Group, JTAG )接口引脚、 主天线引脚、 分集天线引 脚、 供电引脚、 通用输入输出 （ General Purpose Input Output, GPIO )接口引 脚、 接地引脚、 客户识别模块（ Subscriber Identity Module, SIM )接口、 安 全数字（ Secure Digital, SD )卡接口、 I2C接口和串行外围接口（ Serial Peripheral Interface, SPI ) 引脚。 不排除作为其他功能引脚的可能。 这些功能引脚提供 了常用的丰富的通讯接口， 同时上述接地焊球还可以提高模块的散热性能。
所述功能晶片和功能芯片层叠封装在所述基板的同一表面时， 所述功能 芯片封装在所述基板的第一表面或第二表面， 所述功能晶片封装在所述功能 芯片上。 所述功能晶片独立封装在所述基板上时， 或者， 所述功能晶片封装在所 述功能芯片上时， 所述功能晶片与所述基板通过倒装芯片 （ flip-chip )或者金 线连接 ( wire bonding ) 。 所述基板的第一表面焊接有射频连接器， 和 /或， 所述基板的第二表面焊 接有射频焊件， 所述射频焊件包括焊球或焊盘。 所述基板的第一表面焊接有 射频连接器， 且所述基板的第二表面焊接有射频焊件时， 所述射频焊件置于 所述第二表面上与所述第一表面的射频连接器的射频走线最短的位置。 所述基板的第一表面和 /或第二表面焊接有屏蔽器件， 其中： 所述屏蔽器 件包括屏蔽架和屏蔽罩， 所述基板的第一表面和 /或第二表面焊接有屏蔽架， 屏蔽架外卡接有屏蔽罩， 所述屏蔽架与屏蔽罩组合形成密闭腔体； 或者， 所 述屏蔽器件包括屏蔽罩 , 所述基板的第一表面和 /或第二表面焊接有屏蔽罩 , 所述屏蔽罩与基板组合形成密闭腔体。 该屏蔽器件可以避免电磁干扰。 屏蔽器件可以屏蔽整体模块和外界之间的干扰， 起到保护所述模块产品 的作用。 所述功能晶片和功能芯片分别独立封装在所述基板的不同表面时， 在所 述基板的封装有所述功能晶片的第一表面或第二表面上， 焊接有直径大于所 述功能晶片厚度的焊球， 所述焊球分布于所述功能晶片的周围， 所述焊球中 包括接地焊球，所述无线通讯模块产品通过所述接地焊球焊接在用户主板上， 所述用户主板上与所述功能晶片对应的位置铺铜。 优选地， 所述功能芯片包括以下芯片中的一种或几种： 基带芯片、 射频 芯片、 功率放大器 （Power Amplifier, PA ) 芯片、 电源管理芯片、 音频编解 码芯片、 存储器芯片、 时钟晶振和时钟晶体。 优选地， 所述功能晶片包括以下晶片中的一种或几种： 存储器晶片、 基 带晶片、 射频晶片、 功率放大器晶片、 电源管理晶片、 以及音频编解码晶片。 优选地， 在不影响所述模块产品整体体积的情况下， 所述基板上还可焊 接一些被动器件。 所述被动器件包括以下器件中的一种或几种电阻、 电容和 电感。 下面通过以下实施例及附图对本通讯模块进行详细说明。需要说明的是， 在不冲突的情况下，本申请中的实施例及实施例中的特征可以相互任意组合。 在下述实施例中， 用顶面和地面的描述方式代替第一表面和第二表面的描述 方式。 图 1为模块纵向剖面图， 如图 1所示， 本通讯模块的顶面分布有基带和 射频芯片组， 所述基带和射频芯片组釆用常规的封装方法与基板焊接， 例如 可以是球栅阵列（Ball Grid Array, BGA )封装、栅格阵列（ Land Grid Array, LGA )封装或者方形扁平无引脚（Quad Flat No-lead, QFN )封装等方式。 如 图所示，基带芯片与射频芯片有各自的屏蔽腔体。 本实施例中的 PCB基板是 BT介质。 模块底面圓形图示为本通讯模块的焊球， 焊球分布在晶片的四周， 也可以分布在晶片的一侧或两侧。 在其他实施例中， 晶片的周围也可以分布 为焊盘。 分布在晶片周围的焊球为功能引脚焊盘，即作为该模块产品的功能引脚， 可作为以下功能引脚中的一种或几种： 通用串行总线（USB )接口引脚、 语 音输入接口引脚、 语音输出接口引脚、 通用异步接收发送（UART )接口引 脚、 JTAG (联合测试行为组织定义的）接口引脚、 主天线引脚、 分集天线引 脚、 供电引脚、 通用输入输出 （GPIO )接口引脚、 接地引脚、 客户识别模块 ( SIM卡）接口、 安全数字卡（SD )接口、 I2C接口和串行外围接口 （SPI ) 引脚等。 模块的底面， 焊球之间是封装的是功能晶片， 图示实施例中底面封装的 晶片是存储器的晶片， 包括 Nand flash 和 DDRAM 的晶片， 釆用金线 ( wire-bond )的连接方式， 直接从晶片连到基板 PCB, 外面通过塑封胶塑封 将晶片保护起来， 由于晶片紧贴着 PCB板， 其塑封后整个高度比 BGA的焊 球要低一些。 另外， 由于焊球的高度较高， 还可以在塑封的晶片和焊球之间的空隙或 者焊球与焊球之间的间隙焊接一些器件高度较矮、 体积较小的被动器件， 比 如电阻、 电容和电感中的一种或几种等， 以提高空间的利用率， 如图 2所示。 在现有的电路设计中， 如果是单面布局， 通常需要在 PCB 板上贴一个 闪存（flash ) 芯片， 而本实施例通过直接将 flash的晶片封装在 PCB底面， 对于单面布局的 PCB板， 其不占用额外的空间， 对于双面布局的 PCB板， 用晶片方式封装可以减少 PCB板的厚度和面积，从而有效减小通讯模块的体 积。 在本实施例中， 釆用芯片封装工艺的晶片只有 NAND和 DDRAM两种 存储器晶片， 事实上， 也可以根据实际情况封装其它功能单元， 例如射频收 发器、 双工器等。 除了将晶片置于 PCB板的底面外， 还可置于 PCB板的顶面， 如图 3a所 示， 优选地， 晶片可以置于芯片的顶面， 如图 3b所示。 为了优化散热， 将发热较为严重的器件， 如射频、 功率放大器等封装于
PCB板顶面， 并且在这些高功率器件对应的 PCB底面焊接可用于散热的接 地焊球。 图 4介绍了模块底面封装晶片的屏蔽方式。如图 4a所示， 由于晶片是在 焊球和两块 PCB之间的腔体内， 因此可以通过 PCB的设计来形成屏蔽。 为 了保证底面晶片的屏蔽效果， 一般会在 PCB板上， 晶片封装区域的周围， 焊 接接地焊球， 同时在晶片对应的用户主板 PCB区域铺大量的地铜层， 该用户 主板与 PCB板通过 PCB板上的地焊球连接， 所述用户主板、 所述接地焊球 与所述基板组合形成所述功能晶片的屏蔽腔，如图 4a所示，焊球和用户主板 上的铺铜形成一个类似于屏蔽架的形式， 从而将该晶片包裹于屏蔽腔内。 图 4b是图 4a中基板 PCB的仰视图，从图中可以看出，在 PCB板底面铺设的焊 球中有大量的接地焊球， 以保证晶片的散热效果。 本发明模块还可增加射频连接的功能，通过在基板上封装射频连接器和 / 或在基板上封装射频焊球来实现，如图 5a所示， 图中示出了两种射频接入方 式， 一种是模块 PCB板的一角处焊接的射频连接器， 另一种是模块 PCB板 底面焊接的射频焊球， 或称天线引脚焊球， 也可釆用其他射频焊件， 如焊盘。 射频连接器和相对应的射频焊件可分别设在模块的任意位置， 优选地， 所述 射频焊件置于所述第二表面上与所述第一表面的射频连接器的射频走线最短 的位置， 如射频连接器在 PCB板上面的位置与天线引脚焊球在 PCB板底面 的位置相对应， 所述相对应是指二者在模块的垂直线上处于一样或相近的位 置。 例如， 图 5b中， 射频连接器封装于模块顶面的左上角， 相对应的， 模块 天线引脚焊球的位置位于射频连接器的位置垂直映射在模块底面的位置或在 其附近。
当基板 PCB 上的芯片容易受外界干扰时， 可以在基板顶面设置屏蔽器 件， 如图 6和图 7所示， 图 6为直接釆用屏蔽罩的屏蔽方式， 其中， 图 6a 为^^板上直接焊接屏蔽罩的剖视图， 图 6b为图 6a的俯视图， 图 6c为焊接 有射频连接器的模块安装屏蔽罩的俯视图。 图 7为屏蔽架加屏蔽罩的屏蔽方 式。 图 7a为模块上焊接屏蔽架后的俯视图以及焊接屏蔽罩后的俯视图， 图 7b 为焊接有射频连接器的模块上焊接屏蔽架后的俯视图以及焊接屏蔽罩后 的俯视图， 图 7c为屏蔽罩结合屏蔽架的屏蔽方式的剖视图。 图 7所示的屏蔽罩加屏蔽架的屏蔽方式是将屏蔽架直接焊接在模块 PCB 板的顶面 （正面） ， 然后再将屏蔽罩直接卡接在屏蔽架上， 屏蔽架与屏蔽罩 组合形成密闭腔体。 此种方式的优点是， 屏蔽架和屏蔽罩制作简单， 去掉屏 蔽罩后， 可以直接对模块正面的元器件进行维修和检查， 测试调试方便， 但 由于屏蔽架焊接在模块正面 PCB板上后，还要将屏蔽罩扣在屏蔽架上， 增加 了模块整体的厚度。 而图 6所示的没有屏蔽架的屏蔽方式， 屏蔽罩直接焊接 在模块 PCB板的顶面， 在屏蔽罩与基板组合形成密闭腔体。 优点是， 模块正 面元器件在屏蔽罩内部可釆用塑胶等方式进行分腔， 密闭性能及屏蔽性能较 好， 同时， 因为釆用直接焊接屏蔽罩的方式， 减少了屏蔽架的尺寸高度， 所 以可以有效的减少模块的厚度。 但由于是釆用直接焊接的方式， 所以不易维 修、 测试。
当然， 本发明还可有其他多种实施例， 在不背离本发明精神及其实质的 但这些相应的改变和变形都应属于本发明所附的权利要求的保护范围。
工业实用性 本发明通过将功能晶片代替芯片封装在 PCB 板上作为无线通讯模块产 品， 可以有效减小整个无线通讯模块产品的厚度或尺寸， 从而达到缩小无线 通讯模块体积的目的。 当双面布局时， 即功能晶片和功能芯片分别独立封装 在所述基板的不同表面时， 更为有效地减小整个模块产品的尺寸和厚度， 实 现了超小型化的通讯模块。 另外， 由于将能达到统一功能的芯片和晶片模块 化， 使得在手机或其他通讯产品的生产制造过程中省去了对该类功能模块的 考虑， 缩短了开发和生产周期， 同时小型的体积也方便系统方案设计。 此外， 还可以在该无线通讯模块产品上集成射频连接器， 以方便应用。 本发明无线通讯模块产品可以应用在手机、 移动互联网设备 ( Mobile Inernet Device, MID ) ,电子书，视频监控，可携式媒体播放器（ portable media player, PMP ) , 导航仪， 以及汽车电子等具有通讯功能的电子设备中。

Claims

权 利 要 求 书
1、一种无线通讯模块产品， 所述无线通讯模块产品包括： 釆用晶片封装 工艺封装的功能晶片 （die ) 、 釆用芯片封装工艺封装的功能芯片以及基板
( PCB ) , 所述功能晶片和功能芯片通过所述基板相连； 其中， 所述基板包含第一表面和第二表面； 其中， 所述功能晶片和功能芯片分别独立封装在所述基板的不同表面； 或者， 所述功能晶片和功能芯片独立封装在所述基板的同一表面； 或者， 所 述功能晶片和功能芯片层叠封装在所述基板的同一表面。
2、 如权利要求 1所述的无线通讯模块产品， 其中， 当所述功能晶片和功能芯片分别独立封装在所述基板的不同表面时， 封 装有所述功能晶片的所述基板的第一表面或第二表面焊接有焊球或焊盘。
3、 如权利要求 2所述的无线通讯模块产品， 其中， 所述焊球包括接地焊球及作为所述无线通讯模块产品功能引脚的焊球。
4、 如权利要求 3所述的无线通讯模块产品， 其中， 所述焊球作为以下一种或几种功能引脚： 通用串行总线（USB )接口引脚、 语音输入接口引脚、 语音输出接口引 脚、通用异步接收发送（UART )接口引脚、联合测试行为组织定义的（ JTAG ) 接口引脚、 主天线引脚、 分集天线引脚、 供电引脚、 通用输入输出 （GPIO ) 接口引脚、 接地引脚、 客户识别模块（SIM )接口、 安全数字卡（SD )接口、 I2C接口和串行外围接口 （SPI ) 引脚。
5、 如权利要求 1或 2或 3或 4所述的无线通讯模块产品， 其中， 所述功能晶片独立封装在所述基板上时， 所述功能晶片与所述基板通过 倒装芯片或者金线连接。
6、 如权利要求 1所述的无线通讯模块产品， 其中， 所述功能晶片和功能芯片层叠封装在所述基板的同一表面时， 所述功能 芯片封装在所述基板的第一表面或第二表面， 所述功能晶片封装在所述功能 芯片上。
7、 如权利要求 6所述的无线通讯模块产品， 其中， 所述功能晶片封装在所述功能芯片上时， 所述功能晶片与所述功能芯片 通过倒装芯片或者金线连接。
8、如权利要求 1或 2或 3或 4或 6或 7所述的无线通讯模块产品，其中， 所述基板的第一表面焊接有射频连接器， 和 /或， 所述基板的第二表面焊 接有射频焊件， 所述射频焊件包括焊球或焊盘。
9、 如权利要求 8所述的无线通讯模块产品， 其中， 所述基板的第一表面焊接有射频连接器， 且所述基板的第二表面焊接有 射频焊件时， 所述射频焊件置于所述第二表面上与所述第一表面的射频连接 器的射频走线最短的位置。
10、 如权利要求 1或 2或 3或 4或 6或 7所述的无线通讯模块产品， 其 中，
所述基板的第一表面和 /或第二表面焊接有屏蔽器件。
11、 如权利要求 10所述的无线通讯模块产品， 其中， 所述屏蔽器件包括屏蔽架和屏蔽罩，所述基板的第一表面和 /或第二表面 焊接有屏蔽架， 所述屏蔽架外卡接有屏蔽罩， 所述屏蔽架与屏蔽罩组合形成 密闭腔体； 或者， 所述屏蔽器件包括屏蔽罩 ,所述基板的第一表面和 /或第二表面焊接有屏 蔽罩， 所述屏蔽罩与基板组合形成密闭腔体。
12、 如权利要求 1所述的无线通讯模块产品， 其中， 所述功能晶片和功能芯片分别独立封装在所述基板的不同表面时， 在所 述基板的封装有所述功能晶片的第一表面或第二表面上， 焊接有直径大于所 述功能晶片厚度的焊球， 所述焊球分布于所述功能晶片的周围， 所述焊球中 包括接地焊球，所述无线通讯模块产品通过所述接地焊球焊接在用户主板上， 所述用户主板上与所述功能晶片对应的位置铺铜， 所述用户主板、 所述接地 焊球与所述基板组合形成所述功能晶片的屏蔽腔。
13、如权利要求 1 ^讯模块产品， 其中， 所述功能芯片包括以下芯片中的一种或几种: 基带芯片、 射频芯片、 功 率放大器芯片、 电源管理芯片、 音频编解码芯片. 存储器芯片、 时钟晶振、 以及时钟晶体。
其中， 所述功能晶片包括以下晶片中的一种或几种： 存储器晶片、 基带晶片、 射频晶片、 功率放大器晶片、 电源管理晶片、 以及音频编解码晶片。
其中， 所述基板上还焊接有被动器件， 所述被动器件包括以下器件中的一种或 几种： 电阻、 电容、 以及电感。
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