TWI667743B - 電子封裝件及其製法 - Google Patents

電子封裝件及其製法 Download PDF

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TWI667743B
TWI667743B TW106136127A TW106136127A TWI667743B TW I667743 B TWI667743 B TW I667743B TW 106136127 A TW106136127 A TW 106136127A TW 106136127 A TW106136127 A TW 106136127A TW I667743 B TWI667743 B TW I667743B
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substrate
electronic package
item
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TW106136127A
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TW201917834A (zh
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周世民
陳漢宏
林榮政
余國華
林長甫
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矽品精密工業股份有限公司
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Priority to TW106136127A priority Critical patent/TWI667743B/zh
Priority to CN201711121672.8A priority patent/CN109698168B/zh
Priority to US15/961,103 priority patent/US11380978B2/en
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    • H—ELECTRICITY
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Abstract

一種電子封裝件及其製法，係將天線板堆疊於線路板上，並於該天線板與線路板之間形成固接該天線板與線路板之支撐體，以於封裝製程中，藉由該支撐體使該天線板與線路板之間的距離保持不變，確保該天線板之天線功能正常，進而提升產品的良率。

Description

電子封裝件及其製法
本發明係關於一種電子封裝件，特別是關於一種具有天線結構之電子封裝件。
目前無線通訊技術已廣泛應用於各式各樣的消費性電子產品以利接收或發送各種無線訊號，而為滿足消費性電子產品的外觀設計需求，無線通訊模組之製造與設計係朝輕、薄、短、小之需求作開發，其中，平面天線(Patch Antenna)因具有體積小、重量輕與製造容易等特性而廣泛利用在如手機(cell phone)之電子產品之無線通訊模組中。
如第1圖所示，係為習知無線通訊模組1之剖面示意圖。該無線通訊模組1係於一下側設有半導體晶片11之線路板10之上側藉由複數銲錫凸塊18堆疊一具有天線(圖略)之基板12，且該線路板10具有接地片(圖略)及天線回饋線路(antenna feed lines)(圖略)，並於該線路板10下方形成複數銲球19，其中，該線路板10與該基板12之間需於特定區域定義為空曠區A(即該些銲錫凸塊18環繞之區域，其內部不可有點膠或模壓填入物)，且需控制該線 路板10與該基板12之間的距離L，以確保該天線與該半導體晶片之間的傳接訊號品質。
惟，習知無線通訊模組1中，當該線路板10與該基板12堆疊後，會翻轉整體結構(可將第1圖上下顛倒視之)以回銲該些銲球19，此時該些銲錫凸塊18會呈熔融狀態，故該基板12會因受重力而下降，以拉伸該些銲錫凸塊18，導致該線路板10與該基板12之間的距離L變大，因而影響該天線的功能，進而造成產品之良率下降。
因此，如何克服上述習知技術的問題，實已成目前亟欲解決的課題。
鑑於上述習知技術之缺失，本發明係提供一種電子封裝件，係包括：第一基板，係具有天線結構；第二基板，係具有線路層且與該第一基板相堆疊；數導電元件，係設於該第一基板與第二基板之間，用以電性連接該第一基板與第二基板；以及至少一支撐體，係設於該第一基板與第二基板之間，用以固接但未電性連接該第一基板與第二基板。
本發明復提供一種電子封裝件之製法，係包括：將具有天線結構之第一基板透過複數導電元件堆疊於具有線路層之第二基板上；以及形成至少一支撐體於該第一與第二基板之間，使該支撐體固接但未電性連接該第一基板與該第二基板。
前述之製法中，該支撐體之製程係將膠材填入於該第 一基板與該第二基板之間以接觸該第一與第二基板，再使該膠材固化，以形成該支撐體。
前述之電子封裝件及其製法中，該第一基板係藉由複數導電元件堆疊於該第二基板上並電性連接該第二基板。
前述之電子封裝件及其製法中，該第一基板與第二基板之間所包圍的區域由中心向外依序定義有空曠區、導接區及支撐區，該導電元件位於該導接區，該支撐體位於該支撐區。
前述之電子封裝件及其製法中，該第一基板復具有至少一貫通之穿孔，且該支撐體係對應該穿孔之位置。例如，該穿孔係位於該第一基板之外圍區域。進一步，該穿孔係連通該第一基板之側面。
前述之電子封裝件及其製法中，該支撐體係凸出該第一基板之側面。
前述之電子封裝件及其製法中，該第一基板之寬度係小於該第二基板之寬度。
前述之電子封裝件及其製法中，該支撐體係為絕緣材。
前述之電子封裝件及其製法中，該支撐體未電性連接該第一基板與第二基板。
前述之電子封裝件及其製法中，該支撐體係為熱固性膠材。
前述之電子封裝件及其製法中，復包括設置電子元件於該第二基板上。例如，該第二基板具有相對之第一側與 第二側，且該第一基板係堆疊於該第一側上，而該電子元件係設置於該第二側上。
前述之電子封裝件及其製法中，該導電元件未電性連接該天線結構。
前述之電子封裝件及其製法中，該第二基板復具有天線體。例如，該天線體與該線路層係電性隔絕、或者該導電元件未電性連接該天線體。
由上可知，本發明之電子封裝件及其製法中，係藉由該支撐體連接該第一與第二基板，使該第一與第二基板之間的距離保持不變，以於封裝製程(如進行回銲製程)中，該第一基板不會因重力下降而拉伸該些導電元件，故相較於習知技術，本發明之電子封裝件不會因該第一與第二基板之間的距離變大而影響該天線結構的功能，因而能避免產品良率下降之問題。
1‧‧‧無線通訊模組
10‧‧‧線路板
11‧‧‧半導體晶片
12‧‧‧基板
18‧‧‧銲錫凸塊
19,29‧‧‧銲球
2‧‧‧電子封裝件
20‧‧‧電子元件
200‧‧‧導電凸塊
21,51‧‧‧第一基板
21a‧‧‧第一表面
21b‧‧‧第二表面
21c,51c‧‧‧側面
210,310‧‧‧穿孔
211‧‧‧天線結構
212‧‧‧第一電性接點
22‧‧‧第二基板
22a‧‧‧第一側
22b‧‧‧第二側
220‧‧‧接地片
221‧‧‧線路層
222‧‧‧第二電性接點
223‧‧‧植球墊
224‧‧‧天線體
23‧‧‧支撐體
28‧‧‧導電元件
A‧‧‧空曠區
B‧‧‧導接區
C‧‧‧支撐區
D,T‧‧‧寬度
L‧‧‧距離
S‧‧‧區域
第1圖係為習知無線通訊模組之剖面示意圖；第2A至2D圖係為本發明之電子封裝件之製法之剖面示意圖；第3A圖係為第2C圖之第一基板之上視示意圖；第3B圖係為第3A圖之另一實施例；以及第4及5圖係為本發明之電子封裝件之其它實施例之剖面示意圖。
以下藉由特定的具體實施例說明本發明之實施方 式，熟悉此技藝之人士可由本說明書所揭示之內容輕易地瞭解本發明之其他優點及功效。
須知，本說明書所附圖式所繪示之結構、比例、大小等，均僅用以配合說明書所揭示之內容，以供熟悉此技藝之人士之瞭解與閱讀，並非用以限定本發明可實施之限定條件，故不具技術上之實質意義，任何結構之修飾、比例關係之改變或大小之調整，在不影響本發明所能產生之功效及所能達成之目的下，均應仍落在本發明所揭示之技術內容得能涵蓋之範圍內。同時，本說明書中所引用之如“第一”、“第二”、及“一”等之用語，亦僅為便於敘述之明瞭，而非用以限定本發明可實施之範圍，其相對關係之改變或調整，在無實質變更技術內容下，當亦視為本發明可實施之範疇。
第2A至2D圖係為本發明之電子封裝件2之製法之剖面示意圖。
如第2A圖所示，堆疊一第一基板21與一第二基板22，其中，該第一基板21具有相對之第一表面21a與第二表面21b、鄰接該第一與第二表面21a,21b之側面21c及至少一連通該第一與第二表面21a,21b之穿孔210。
於本實施例中，該第一基板21係為天線板，其設有天線結構211及複數第一電性接點212，且該天線結構211係為線路型天線，其與該第一電性接點212係電性隔絕。應可理解地，該第一基板21亦可為其它類型之天線板，並不限於上述。
再者，該第二基板22係為線路板，其定義有相對之第一側22a與第二側22b，且具有天線體224、接地片220及電性連接該接地片220之線路層221，其中，該天線體224係為線路型天線，其與該線路層221(或該接地片220)係電性隔絕。例如，該線路層221包含複數第二電性接點222與複數植球墊223。應可理解地，該第二基板22亦可為其它承載晶片之承載件，並不限於上述。
又，該穿孔210係位於該第一基板21之外圍區域而未連通該側面21c，如第3A圖所示之圓形；或者，該穿孔310係連通該第一基板21之側面21c，如第3B圖所示之半圓形。應可理解地，有關該穿孔之形狀與配置可依需求設計，並不限於上述。
如第2B圖所示，將該第一基板21以其第一表面21a藉由複數導電元件28堆疊於該第二基板22之第一側22a。
於本實施例中，該些導電元件28係接合於該第一電性接點212與第二電性接點222之間，以電性連接該第一基板21與該第二基板22，且該天線結構211係感應該天線體224，以訊號傳輸於兩者之間。
再者，該導電元件28係例如為銅柱、銲錫材或其它構造，並無特別限制。
又，該導電元件28無法電性導通該天線結構211及天線體224，但該導電元件28可電性連接該接地片220或虛墊(dummy pad)，即該第一電性接點212或第二電性接點222作為無電性功能之虛墊。
另外，如第2B及3A圖所示，該第一基板21與該第二基板22之間所包圍的區域S由中心向外依序可定義有空曠區A、導接區B及支撐區C，其中，該空曠區A內不可有點膠、模壓填入物或其它物體，以確保該天線結構211之傳接訊號品質，且該導接區B係用以佈設該些導電元件28，以令該些導電元件28環繞該空曠區A，而該支撐區C係環繞該導接區B。
如第2C圖所示，經由該穿孔210將支撐體23形成於該第一基板21之第一表面21a與該第二基板22之第一側22a之間的支撐區C，使該支撐體23固接該第一基板21與該第二基板22，且該支撐體23未電性連接該第一與第二基板21,22。
於本實施例中，該支撐體23係為如膠體之絕緣材，且令該支撐體23外露於該穿孔210或外露於該第一基板21之第二表面21b。例如，該支撐體23之製程係以點膠針將熱固性膠材經由該穿孔210灌入於該第一基板21與該第二基板22之間以接觸該第一基板21之第一表面21a與第二基板22之第一側22a(還可接觸該穿孔210之壁面)，再加熱使該熱固性膠材固化，以作為該支撐體23。
再者，當該穿孔310呈現如第3B圖所示之半圓形時，可使用較大的點膠針頭，以降低成本。
又，該支撐體23可部分位於該穿孔210中。
如第2D圖所示，將該第一基板21與該第二基板22之位置上、下翻轉，再於該第二基板22之第二側22b上設 置至少一電子元件20，且於該植球墊223上形成複數如銲球29之導電元件，並回銲該些銲球29以接置如電路板或另一線路板之電子結構，進而製得電子封裝件2。
於本實施例中，該電子元件20係設於該第二基板22之第二側22b，其為主動元件、被動元件或其二者組合等，其中，該主動元件係例如半導體晶片，且該被動元件係例如電阻、電容及電感。例如，該電子元件20係藉由複數如銲錫材料之導電凸塊200以覆晶方式電性連接該線路層221；或者，該電子元件20可藉由複數銲線(圖略)以打線方式電性連接該線路層221；亦或，該電子元件20可直接接觸該線路層221以電性連接該線路層221。然而，有關該電子元件20電性連接該第二基板22之方式不限於上述。
再者，該電子元件20雖未設於該第一基板21與該第二基板22之間，但有關該電子元件之配置方式繁多(如設於該第二基板22之第一側22a)，並不限於上述。
又，如第4圖所示，當使用第3B圖所示之穿孔310連通該第一基板21之側面21c時，該支撐體23可凸出該第一基板21之側面21c(如接觸該第一基板21之側面21c與該穿孔310之壁面)或不凸出該第一基板21之側面21c(圖略)。
另外，如第5圖所示，亦可令該第一基板51之寬度T小於該第二基板22之寬度D，使該支撐體23凸出該第一基板51之側面51c(如接觸該第一基板21之側面21c)，藉此無需製作該穿孔210,310。
本發明之電子封裝件之製法主要藉由該支撐體23連接該第一基板21,51與該第二基板22，使該第一基板21,51與該第二基板22之間的距離L保持不變，以於回銲該些銲球29或後續高溫烘烤製程時，該第一基板21,51不會因重力下降而拉伸該些熔融狀態之導電元件28，故相較於習知技術，本發明之電子封裝件2不會因該第一基板21,51與該第二基板22之間的距離L變大而影響該天線結構211與天線體224的功能，因而能有效控制天線品質，進而能提高產品良率。
本發明復提供一種電子封裝件2，其包括：第一基板21,51、第二基板22以及至少一支撐體23。
所述之第一基板21,51係具有天線結構211。
所述之第二基板22係具有線路層221且與該第一基板21,51相堆疊。
所述之支撐體23係連接該第一基板21,51與該第二基板22並位於該第一基板21,51與該第二基板22之間，其中，該支撐體23未電性連接該第一基板21,51與該第二基板22。
於一實施例中，該第一基板21,51係藉由複數導電元件28堆疊於該第二基板22上。
於一實施例中，該第一基板21復具有至少一貫通之穿孔210,310，且該支撐體23係對應該穿孔210,310之位置。例如，該穿孔210,310係位於該第一基板21之外圍區域，進一步，該穿孔310係連通該第一基板21之側面21c。
於一實施例中，該支撐體23係凸出該第一基板21,51之側面21c,51c。
於一實施例中，該第一基板51之寬度T係小於該第二基板22之寬度D。
於一實施例中，該支撐體23係為絕緣材。
於一實施例中，該支撐體23未電性連接該第一基板21,51與第二基板22。
於一實施例中，該支撐體23係為熱固性膠材。
於一實施例中，所述之電子封裝件2復包括至少一電子元件20，係設於該第二基板22上。例如，該第二基板22具有相對之第一側22a與第二側22b，且該第一基板22係堆疊於該第一側22a上，而該電子元件20係設置該第二側22b上。
於一實施例中，該導電元件28未電性連接該天線結構211。
於一實施例中，該第二基板22復具有天線體224。例如，該天線體224與該線路層221係電性隔絕、或者該導電元件28未電性連接該天線體224。
綜上所述，本發明之電子封裝件及其製法，係藉由該支撐體之設計，使該第一與第二基板之間的距離於高溫製程後仍可保持不變，故本發明之電子封裝件能確保該天線結構的功能正常，因而能確保產品良率符合預期。
上述實施例係用以例示性說明本發明之原理及其功效，而非用於限制本發明。任何熟習此項技藝之人士均可 在不違背本發明之精神及範疇下，對上述實施例進行修改。因此本發明之權利保護範圍，應如後述之申請專利範圍所列。

Claims (33)

  1. 一種電子封裝件，係包括：第一基板，係具有天線結構；第二基板，係具有線路層且與該第一基板相堆疊，其中，該第一基板與第二基板之間所包圍的區域係定義有空曠區，且該天線結構係對應該空曠區設置；複數導電元件，係設於該第一基板與第二基板之間；以及至少一支撐體，係設於該第一基板與第二基板之間，用以固接該第一基板與第二基板。
  2. 如申請專利範圍第1項所述之電子封裝件，其中，該第一基板與第二基板之間所包圍的區域由中心向外依序定義有該空曠區、導接區及支撐區，該導電元件位於該導接區，該支撐體位於該支撐區。
  3. 如申請專利範圍第1項所述之電子封裝件，其中，該第一基板復具有至少一貫通之穿孔，且該支撐體係對應該穿孔之位置。
  4. 如申請專利範圍第3項所述之電子封裝件，其中，該穿孔係位於該第一基板之外圍區域。
  5. 如申請專利範圍第4項所述之電子封裝件，其中，該穿孔係連通該第一基板之側面。
  6. 如申請專利範圍第1項所述之電子封裝件，其中，該支撐體係凸出該第一基板之側面。
  7. 如申請專利範圍第1項所述之電子封裝件，其中，該第一基板之寬度係小於該第二基板之寬度。
  8. 如申請專利範圍第1項所述之電子封裝件，其中，該支撐體係為絕緣材。
  9. 如申請專利範圍第1項所述之電子封裝件，其中，該支撐體未電性連接該第一基板與第二基板。
  10. 如申請專利範圍第1項所述之電子封裝件，其中，該支撐體係為熱固性膠材。
  11. 如申請專利範圍第1項所述之電子封裝件，復包括電子元件，係設於該第二基板上。
  12. 如申請專利範圍第11項所述之電子封裝件，其中，該第二基板具有相對之第一側與第二側，且該第一基板係堆疊於該第一側上，而該電子元件係設置於該第二側上。
  13. 如申請專利範圍第1項所述之電子封裝件，其中，該導電元件未電性連接該天線結構。
  14. 如申請專利範圍第1項所述之電子封裝件，其中，該第二基板復具有天線體。
  15. 如申請專利範圍第14項所述之電子封裝件，其中，該天線體與該線路層係電性隔絕。
  16. 如申請專利範圍第14項所述之電子封裝件，其中，該導電元件未電性連接該天線體。
  17. 一種電子封裝件之製法，係包括：將具有天線結構之第一基板透過複數導電元件堆疊於具有線路層之第二基板上，其中，該第一基板與第二基板之間所包圍的區域係定義有空曠區，且該天線結構係對應該空曠區設置；以及形成至少一支撐體於該第一基板與第二基板之間，使該支撐體固接該第一基板與該第二基板。
  18. 如申請專利範圍第17項所述之電子封裝件之製法，其中，該第一基板與第二基板之間所包圍的區域由中心向外依序定義有該空曠區、導接區及支撐區，該導電元件位於該導接區，該支撐體位於該支撐區。
  19. 如申請專利範圍第17項所述之電子封裝件之製法，其中，該第一基板復具有至少一貫通之穿孔，且該支撐體係對應該穿孔之位置。
  20. 如申請專利範圍第19項所述之電子封裝件之製法，其中，該穿孔係位於該第一基板之外圍區域。
  21. 如申請專利範圍第20項所述之電子封裝件之製法，其中，該穿孔係連通該第一基板之側面。
  22. 如申請專利範圍第17項所述之電子封裝件之製法，其中，該支撐體係凸出該第一基板之側面。
  23. 如申請專利範圍第17項所述之電子封裝件之製法，其中，該第一基板之寬度係小於該第二基板之寬度。
  24. 如申請專利範圍第17項所述之電子封裝件之製法，其中，該支撐體係為絕緣材。
  25. 如申請專利範圍第17項所述之電子封裝件之製法，其中，該支撐體未電性連接該第一基板與第二基板。
  26. 如申請專利範圍第17項所述之電子封裝件之製法，其中，該支撐體係為熱固性膠材。
  27. 如申請專利範圍第17項所述之電子封裝件之製法，復包括設置電子元件於該第二基板上。
  28. 如申請專利範圍第27項所述之電子封裝件之製法，其中，該第二基板具有相對之第一側與第二側，且該第一基板係堆疊於該第一側上，而該電子元件係設置於該第二側上。
  29. 如申請專利範圍第17項所述之電子封裝件之製法，其中，該支撐體之製程係將膠材填入於該第一基板與該第二基板之間以接觸該第一與第二基板，再使該膠材固化，以形成該支撐體。
  30. 如申請專利範圍第17項所述之電子封裝件之製法，其中，該導電元件未電性連接該天線結構。
  31. 如申請專利範圍第17項所述之電子封裝件之製法，其中，該第二基板復具有天線體。
  32. 如申請專利範圍第31項所述之電子封裝件之製法，其中，該天線體與該線路層係電性隔絕。
  33. 如申請專利範圍第31項所述之電子封裝件之製法，其中，該導電元件未電性連接該天線體。
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