Classifications

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  • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
  • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
  • H10P14/29—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by the substrates
  • H10P14/2901—Materials
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  • H10F77/00—Constructional details of devices covered by this subclass
  • H10F77/30—Coatings
  • H10F77/306—Coatings for devices having potential barriers
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  • H10F10/00—Individual photovoltaic cells, e.g. solar cells
  • H10F10/10—Individual photovoltaic cells, e.g. solar cells having potential barriers
  • H10F10/14—Photovoltaic cells having only PN homojunction potential barriers
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  • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
  • H10F71/00—Manufacture or treatment of devices covered by this subclass
  • H10F71/121—The active layers comprising only Group IV materials
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  • H10F77/00—Constructional details of devices covered by this subclass
  • H10F77/30—Coatings
  • H10F77/306—Coatings for devices having potential barriers
  • H10F77/311—Coatings for devices having potential barriers for photovoltaic cells
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  • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
  • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
  • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
  • H10P14/26—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials using liquid deposition
  • H10P14/265—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials using liquid deposition using solutions
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  • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
  • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
  • H10P14/29—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by the substrates
  • H10P14/2924—Structures
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  • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
  • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
  • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
  • H10P14/29—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by the substrates
  • H10P14/2924—Structures
  • H10P14/2925—Surface structures
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  • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
  • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
  • H10P14/32—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by intermediate layers between substrates and deposited layers
  • H10P14/3242—Structure
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  • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
  • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
  • H10P14/34—Deposited materials, e.g. layers
  • H10P14/3402—Deposited materials, e.g. layers characterised by the chemical composition
  • H10P14/3404—Deposited materials, e.g. layers characterised by the chemical composition being Group IVA materials
  • H10P14/3411—Silicon, silicon germanium or germanium
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  • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
  • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
  • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
  • H10P14/34—Deposited materials, e.g. layers
  • H10P14/3451—Structure
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  • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
  • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
  • H10P14/36—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by treatments done before the formation of the materials
  • H10P14/3602—In-situ cleaning
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  • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
  • H10P32/00—Diffusion of dopants within, into or out of wafers, substrates or parts of devices
  • H10P32/10—Diffusion of dopants within, into or out of semiconductor bodies or layers
  • H10P32/16—Diffusion of dopants within, into or out of semiconductor bodies or layers between a solid phase and a liquid phase
• • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
  • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
  • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
  • Y02E10/00—Energy generation through renewable energy sources
  • Y02E10/50—Photovoltaic [PV] energy
  • Y02E10/547—Monocrystalline silicon PV cells
• • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
  • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
  • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
  • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
  • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

Definitions

• Selective emitters in solar cells are desirable because they allow for improved electrical conductivity between the metal contact and a P- or N-type doped region of the solar cell without negatively impacting light absorption of the cell in other areas when compared to a conventional solar cell without a selective emitter structure.
• Such selective emitters generally increase the power efficiency of a solar cell by increasing the currency extraction from the cell thereby lowering the cost of power produced from sunlight.
• a conventional solar cell 100 as shown in FIG. 1, utilizing a p-type silicon substrate 110 (e.g.
• a wafer, a ribbon, thin film, etc., of p-type silicon generally includes an N+ doped silicon layer 120 thereon and a P+ doped region 115 on the backside thereof.
• the conventional cell 100 further includes contacts 130a-c and an anti-reflective coating 140 on the doped silicon layer 120, and a backside contact 145.
• current extraction and power conversion efficiency is limited by relatively high contact resistance between the N+ doped silicon 120 and the metallization contacts 130a-c.
• the doped silicon layer 220 includes N++ regions 225a-c (which have higher N-dopant concentrations than areas in layer 220 not covered by metal contact) under and adjacent to one or more contacts 230a-c formed on the doped silicon layer 220.
• the selective emitter cell 200 includes a backside contact 245 and an anti-reflective coating 240.
• the selective emitter structure improves contact resistance without significantly negatively impacting light absorption. This results in increased power conversion efficiency.
• the present epitaxial structures (which may be formed from a liquid-phase Group IVA semiconductor element ink comprising a (poly)silane, a (poly)germane, and/or a (poly)germasilane) may be advantageous because such inks form a relatively good film in terms of texture (smoothness), density, conformality, adhesion, electrical conductivity and purity when compared to similar films formed from a Group IVA semiconductor element nanoparticle-based ink.
• FIG. 3 A and 3B show cross-sectional electron microscope scans comparing cured silicon thin films made from (poly)silane-based ink and silicon nanoparticle-based ink, respectively.
• the film formed from a (poly)silane -based ink is dense and smooth relative to the film(s) formed from silicon nanoparticle-based ink(s) (see, e.g., the film[s] shown in FIG. 3B). It is believed that the silicon nanoparticle-based ink produces a relatively rough and porous film because nanoparticles may have broad particle size distributions and do not always densify perfectly during sintering.
• devices or cells comprising a global emitter e.g., as shown in FIG. 1 and/or devices or cells comprising a selective emitter (e.g., as shown in FIG. 2) formed from an ink containing only silicon nanoparticles as a silicon source
• devices or cells having a selective emitter made using an ink comprising a (poly)silane, a (poly)germane and/or a (poly)germasilane may result in improved power conversion efficiency due to the improved film quality.
• liquid-phase Group IVA semiconductor element inks comprising a cyclo- and/or (poly)silane form epitaxial films or features after curing when the ink is deposited onto a substrate having a cleaned or etched (poly)crystalline surface.
• the epitaxial films or features can be used to make structures such as contacts (e.g., ohmic contacts, collector contacts, source/drain contacts, selective emitters etc.), wells in analog, mixed signal and CMOS devices, and/or devices such as diodes, solar cells, MOSFET devices, SOI devices, bipolar transistors, and/or thin film transistors.
• Such structures and/or devices may be particularly useful in photovoltaic, light sensor, image sensor, light emitting, MEMS, display, sensor and other applications because the epitaxial films or features according to the present invention may provide a substantially perfect interface in the regions between the epitaxial film or feature and the material (e.g., a substrate) to which the film or feature makes contact, at a substantially lower cost (e.g., by coating and/or printing an ink, as compared to conventional vacuum-based epitaxial growth and possible photolithographic patterning steps).
• the material e.g., a substrate
• a layer or feature to be grown epitaxially on a substrate cannot be formed from a Group IVA semiconductor element nanoparticle-based ink because of the nanocrystalline nature of such particles, leading to a multitude of surface defects and varying crystallographic phases and/or orientations, their largely random orientation relative to each other in a deposited film, and their typical poor sintering behavior, as outlined above. Consequently, films formed from a Group IVA nanoparticle-based ink appear to be limited with regard to the formation of good quality epitaxial films, layers, and/or features, which may lead to the enhancement of properties such as power conversion efficiency and contact resistance that depend on the quality of the interface between the film and the material or substrate to which the film makes contact.
• Embodiments of the present invention relate to methods of forming an epitaxial structure comprising (a) cleaning or etching a surface of a substrate, the surface having an exposed crystalline, poly crystalline or microcrystalline material after the cleaning or etching; (b) depositing on the exposed surface a liquid-phase ink on the crystalline, polycrystalline or microcrystalline material by printing or coating, the liquid-phase ink comprising a (poly)silane, a (poly)germane, and/or a (poly)germasilane; and (c) heating the substrate and the deposited (poly)silane, (poly)germane, and/or (poly)germasilane at a temperature and for a length of time sufficient for a film or feature formed from the (poly)silane, (poly)germane, and/or (poly)germasilane to adopt a crystalline structure of the exposed material.
• the (poly)silane, (poly)germane, and/or (poly)germasilane that is heated to adopt the crystalline structure of the exposed material on the substrate may not be exactly the same as the (poly)silane, (poly)germane, and/or (poly)germasilane in the ink.
• the ink is irradiated (e.g., with UV light) during or immediately after deposition
• the (poly)silane, (poly)germane, and/or (poly)germasilane may have a higher molecular weight and/or viscosity, be crosslinked, or have other chemical and/or physical difference(s).
• inventions of the present invention relate to structures comprising: (a) a substrate having a surface, the surface having an exposed crystalline, polycrystalline or microcrystalline material (e.g., in the absence of an overlying material); (b) a film or feature comprising a Group IVA semiconductor element on the exposed crystalline, polycrystalline or microcrystalline material, the film or feature having (i) a crystalline structure of the exposed material, and (ii) a first doped region; and (c) one or more contacts on the first doped region of the film or feature.
• the Group IVA semiconductor element comprises silicon and/or germanium.
• the present invention provides epitaxial structures, methods of forming epitaxial structures, and devices comprising epitaxial structures.
• the structures and methods described herein leverage the generally very good film quality obtained from a liquid-phase semiconductor ink comprising a (poly)silane, a (poly)germane, and/or a (poly)germasilane in terms of smoothness, density, conformality, purity, electronic properties, and/or porosity relative to a film made from an ink containing nanoparticles of the same Group IVA semiconductor element as the only source of the silicon and/or germanium, using an identical process under identical conditions, without a (poly)silane, (poly)germane, and/or (poly)germasilane in the ink.
• the methods and structures described herein may advantageously provide devices (e.g., photovoltaic devices, solar cells, light sensors, image sensors, light emitting devices, MEMS devices, analog or bipolar devices, etc.) having improved properties (e.g., power conversion efficiency of solar cells using a selective emitter structure based on printing a doped Group IV semiconductor element precursor ink comprising a (poly)silane, (poly)germane and/or (poly)germasilane) due to improved film quality and/or epitaxial film formation, but at a cost associated with coating or printing an ink (e.g., a lower cost), rather than that associated with high-vacuum deposition equipment and possible photolithographic patterning steps.
• devices e.g., photovoltaic devices, solar cells, light sensors, image sensors, light emitting devices, MEMS devices, analog or bipolar devices, etc.
• improved properties e.g., power conversion efficiency of solar cells using a selective emitter structure based on printing a doped Group IV semiconductor
• FIG. 1 is a cross-sectional view of a conventional cell structure.
• FIG. 2 is a cross-sectional view of a selective emitter cell structure.
• FIG. 3A is a cross-sectional electron microscope scan of a cured thin film made using a (poly)silane-based ink.
• FIG. 3B is a cross-sectional electron microscope scan of a cured thin film made using a silicon nanoparticle-based ink.
• FIGS. 4A-4D are cross-sectional views showing an exemplary process for forming an epitaxial layer on a crystalline substrate according to embodiments of the present invention.
• FIGS. 5A-5D are cross-sectional views of an exemplary method of forming an epitaxial structure according to embodiments of the present invention.
• FIGS. 7A-7C are cross-sectional views of an exemplary method of forming an epitaxial structure by printing in accordance with embodiments of the present invention.
• FIG. 8 is a cross-sectional view of an exemplary structure according to embodiments of the present invention.
• FIG. 9 is a two-dimensional diffraction map of a first exemplary silicon film sample made in accordance with the present invention.
• FIG. 10 shows x-ray diffraction results for four exemplary silicon film samples made in accordance with the present invention.
• coating or printing may comprise inkjetting, gravure-, screen-, offset-, or flexo-printing, spray-coating, spin coating, slit coating, extrusion coating, dip coating, meniscus coating, microspotting and/or pen-coating the formulation onto a substrate.
• the phrase “consisting essentially of does not exclude intentionally added dopants, which may give the material to which the dopant is added (or the element or structure formed from such material) certain desired (and potentially quite different) physical and/or electrical properties.
• silane refers to a compound or mixture of compounds that contains primarily or that consists essentially of (1) silicon and/or germanium and (2) hydrogen
• polysilane refers to a silane or a mixture of silanes that predominantly contains species having at least 15 silicon and/or germanium atoms.
• (poly)silanes refers to compounds or groups of compounds that are silanes, polysilanes or both.
• (cyclo)silane refers to a compound or a mixture of compounds that contains primarily or that consists essentially of (1) silicon and/or germanium and (2) hydrogen, that may contain one or more cyclic rings, and that generally contains less than 15 silicon and/or germanium atoms.
• hetero(cyclo)silane and “hetero(poly)silane” refer to compounds or mixtures of compounds that consist essentially of (1) silicon and/or germanium, (2) hydrogen, and (3) one or more dopant atoms such as B, P, As or Sb that may be substituted on the dopant atom by a conventional hydrocarbon, silyl or germyl substituent, and that may contain one or more cyclic rings or at least 15 silicon and/or germanium atoms, respectively.
• Liquid-phase generally describes one or more materials that, alone or in combination, are in the liquid phase at an ambient temperature (e.g., from about 15 °C. to about 25 °C).
• doped silane refers to a composition comprising (1) a Group IVA atom source (generally consisting of one or more Group IVA semiconductor elements [such as Si and/or Ge] and hydrogen) and (2) a dopant source (generally consisting essentially of one or more conventional semiconductor dopant atoms such as B, P, As, or Sb, which may have one or more covalently bound mono- or divalent hydrocarbon or silane substituents), and which may include a single species such as a hetero(cyclo)silane or hetero(poly)silane, or plural species such as a (poly)silane and an organo- or silylphosphine or -borane.
• a Group IVA atom source generally consisting of one or more Group IVA semiconductor elements [such as Si and/or Ge]
• Coupled to means direct or indirect coupling, connection or communication, unless the context unambiguously indicates otherwise. These terms are generally used interchangeably herein, but are generally given their art-recognized meanings.
• crystalline polycrystalline
• microcrystalline may be used interchangeably, but are generally given their art-recognized meanings.
• (semi)conductor “(semi)conductive” and grammatical equivalents thereof refer to materials, precursors, layers, features or other species or structures that are conductive and/or semiconductive.
• the terms “part,” “portion,” and “region” may be used interchangeably, but these terms are also generally given their art-recognized meanings.
• the terms “known,” “given,” “certain” and “predetermined” generally refer to a value, quantity, parameter, constraint, condition, state, process, procedure, method, practice, or combination thereof that is, in theory, variable, but is typically set in advance and not varied thereafter when in use.
• a first aspect of the present invention relates to methods of forming epitaxial structures.
• the method generally comprises cleaning or etching a surface of a substrate, which generally has an exposed crystalline, polycrystalline, or microcrystalline material on its surface after the cleaning or etching process. After cleaning or etching the substrate surface, the method further comprises depositing (e.g., by printing or coating) a liquid-phase ink comprising a (poly)silane, a (poly)germane, and/or a (poly)germasilane on the crystalline, polycrystalline, or microcrystalline material exposed on the substrate surface.
• the substrate and the (poly)silane, (poly)germane, and/or (poly)germasilane is then heated at a temperature and for a length of time sufficient for a film or feature formed from the (poly)silane, (poly)germane, and/or (poly)germa- silane to adopt a crystalline structure of the crystalline, polycrystalline, or microcrystalline material on the substrate surface.
• the substrate 400 comprises any suitable electrically active and/or mechanical support structure, having a surface 405 that exposes a partially or completely crystalline, polycrystalline, or microcrystalline material.
• Suitable electrically inert or inactive substrates may comprise a plate, disc, sheet and/or foil of a glass, ceramic, dielectric and/or plastic.
• suitable electrically (semi)conductive substrates may comprise a wafer, disc, sheet and/or foil of a semiconductor (e.g., silicon) and/or a metal.
• the substrate comprises a member selected from the group consisting of a silicon wafer, a glass plate, a ceramic plate or disc, a plastic sheet or disc, metal foil, a metal sheet or disc, and laminated or layered combinations thereof.
• the substrate comprises a single-crystalline wafer, a polycrystalline wafer, a multi-crystalline wafer, a metallurgical-grade wafer, a ribbon or a band consisting essentially of the same or different Group IVA semiconductor element as the epitaxial film or feature to be formed thereon.
• the substrate comprises a ceramic substrate (e.g., a plate, slip, wafer or disc of an oxide ceramic, such as alumina, beryllia, ceria, zirconia, etc., a non-oxide ceramic such as boron carbide, boron nitride, graphite, or a carbide, nitride, and/or boride of silicon and/or aluminum, a mixed oxide / non-oxide ceramic such as silicon oxynitride, silicon oxycarbide, silicon aluminum oxynitride, etc., or other composite ceramic) or a porous silicon substrate.
• a ceramic substrate e.g., a plate, slip, wafer or disc of an oxide ceramic, such as alumina, beryllia, ceria, zirconia, etc.
• a non-oxide ceramic such as boron carbide, boron nitride, graphite, or a carbide, nitride, and/or
• the substrate may include one or more microcrystalline or polycrystalline thin films or features (e.g., comprising an at least partially crystalline Group IVA element) deposited on the surface of the substrate.
• the microcrystalline or polycrystalline thin film or feature may have a thickness of less than 100 ⁇ , or preferably, less than 50 ⁇ .
• the exposed crystalline, polycrystalline, or microcrystalline material on the substrate surface is cleaned and/or etched prior to depositing the liquid-phase ink comprising the (poly)silane, (poly)germane, and/or (poly)germasilane (i.e., the "(poly)silane ink") thereon.
• Cleaning or etching the surface of the structure may remove any native oxides, residual organic material, particles and/or other contaminants (e.g. metals etc.) that might be present and adversely affect the adhesion and/or wetting of the (poly)silane ink to the substrate surface and/or adversely affect epitaxial growth or electronic properties of the formed epitaxial structure.
• Suitable etching techniques may include wet etching processes (e.g., wet chemical etching) or dry etching (e.g., reactive ion etching [RIE]).
• Liquid- or vapor-based etchants such as aqueous hydrofluoric acid (which may be buffered with NH 3 and/or NH 4 F), HF vapor, HF:pyridine, HBr, and other etchants commonly known in the art may be used to etch the substrate surface.
• the substrate surface may be cleaned by sputter etching or a plasma etching process, as is known in the art.
• the substrate is cleaned by immersing the substrate in and/or rinsing the substrate with a liquid-phase and/or solvent-based cleaner (e.g., one that removes organic residue), followed by wet etching using a dilute aqueous acid (e.g., dil. aq. HF, which may be buffered with ammonia and/or ammonium fluoride).
• a liquid-phase and/or solvent-based cleaner e.g., one that removes organic residue
• a dilute aqueous acid e.g., dil. aq. HF, which may be buffered with ammonia and/or ammonium fluoride.
• Alternative etch processes include a conventional piranha etch
• alternative acids for use in wet etching the substrate include nitric acid, sulfuric acid, hydrochloric acid, etc., depending on the substrate used and the temperature at which the substrate will be processed.
• the substrate before or after etching, can be rinsed (e.g., with deionized water), and then optionally further cleaned by immersing and/or rinsing with an organic solvent or solvent mixture to remove undesired organic residue that may be present on the surface of the substrate.
• further cleaning of the substrate may comprise immersing and/or rinsing with an aqueous solution or suspension of a surfactant (followed by rinsing with deionized water).
• Suitable cleaning solvents for further cleaning of the substrate are described in detail in U.S. Patent Application No. 12/790,627, filed on May 28, 2010 (Attorney Docket No. IDR3022), which is incorporated by reference herein.
• the (poly)silane ink comprises one or more linear, branched, cross-linked, cyclic or polycyclic (poly)silanes, (poly)germanes, or (poly)silagermanes (hereinafter collectively referred to as "(poly)silanes").
• the (poly)silane ink may further comprise silicon and/or germanium nanoparticles. In further embodiments, the (poly)silane ink may further comprise compounds incorporating one or more dopant atoms (e.g. P, B, As, and/or Sb).
• dopant atoms e.g. P, B, As, and/or Sb.
• the (poly)silane may comprise compounds having the formula A n H 2n +2 (e.g., Si n H 2n+2 , which may be linear, branched and/or crosslinked), cyclo-A m H 2m (e.g., Si m H 2m ), and/or A n H 2n - P (e.g., Si n H 2 n-p, which may contain branched segments or crosslinks, and which includes one or more cyclic rings) where A is Si and/or Ge, n is at least 3 (e.g., from 3 to 1,000,000, 10 to 1,000, 15 to 250, or any other range of values > 3 or > 15), m is from 3 to about 20 (e.g., from 5 to 8, or any other range of values therein), and p is 0 or an even integer not greater than n.
• a n H 2n +2 e.g., Si n H 2n+2 , which may be linear, branched and/or
• the (poly)silane compound may comprise (or further comprise) one or more linear, branched, cross-linked, cyclic, or polycyclic polymers or copolymers of one or more (cyclo)silanes having from 3 to 20 Si and/or Ge atoms.
• the (cyclo)silane may have from 3 to 12 Si and/or Ge atoms, from 5 to 8 Si and/or Ge atoms, or any other range of Si and/or Ge atoms therein.
• the amount of the relatively high molecular weight (poly)silane(s) may vary, and is typically an amount providing a viscosity of from about 2 to about 100,000 cP (e.g., from about 4 to about 50,000 cP, from about 4 to about 10,000 cP, from about 5 to about 5000 cP, from about 5 to about 1000 cP, or any other range of values therein).
• the amount of (poly)silane in the ink may range from about 1% to about 40% by weight (e.g., from about 1% to about 20% by weight of the ink, or any other range of values therein).
• the ink composition comprises a (poly)silane
• the (poly)silane may have an atomic purity of greater than 90% with respect to silicon, germanium and hydrogen (i.e., greater than 90% of the atoms in the [poly]silane are Si, Ge or H).
• the (poly)silane has an atomic purity of greater than 90% with respect to silicon and hydrogen.
• the (poly)silane can contain up to 10 at.% of other species (such as boron, gallium, phosphorous, arsenic, antimony, halogens [e.g., F, CI, Br, etc.], carbon, oxygen, nitrogen, etc.) as long as the other species do not significantly adversely affect the electrical properties of a film or feature formed from the (poly)silane for a given application.
• the atomic purity is greater than 99%.
• the liquid-phase (poly)silane ink may further comprise a solvent in which the precursor material is soluble.
• the solvent may be one that provides a relatively high degree of stability to the ink composition, has low impurity levels, and/or is easily purified from such, provides an advantageous viscosity and/or volatility (e.g., sufficient to prevent inkjet nozzle clogging and allow printed ink to dry at relatively low temperatures and/or relatively short times, etc.) and/or that is generally easily and/or thoroughly removable from the ink composition.
• the solvent is one that is substantially completely removed by printing the ink onto a platen at a temperature of 30-90 °C, followed by heating for 10 minutes at 100 °C.
• the solvent may comprise one or more hydrocarbon solvents, such as an alkane, a mono- or bicycloalkane (e.g., cyclooctane, decalin, dicyclopentane, etc.), an alkyl-substituted mono- or bicycloalkane, a (cyclic) siloxane, an aliphatic alcohol (e.g., a Ci-C 2 o alcohol such as methanol, ethanol, butanol, hexanol, octanol, decanol, dodecanol, icosanol, cyclohexanol, cyclooctanol, terpineol, borneol, etc.), and/or a fluoroalkane.
• hydrocarbon solvents such as an alkane, a mono- or bicycloalkane (e.g., cyclooctane, decalin, dicyclopentane,
• Suitable solvents are generally those that are liquid at ambient temperatures (e.g.,
• the solvent may be selected from the group consisting of C 5 -Ci 2 linear and/or branched alkanes; C 6 -Ci2 monocycloalkanes; C3-C8 monocycloalkanes substituted with from 1 to 2n C1-C4 alkyl or halogen substituents or from 1 to n C1-C4 alkoxy substituents, where n is the number of carbon atoms in the monocycloalkane ring; siloxanes of the formula (R 3 Si)(OSiR 2 )p(OSiR 3 ) and cyclosiloxanes of the formula (SiR' 2 0) q , where p is from 0 to 4, q is from 2 to 6 (preferably from 3 to 5), each R and R' is independently H, Ci-C 6 alkyl, benzyl or phenyl substituted with from 0 to 3 C1-C4 alkyl groups (preferably R' is methyl); and
• the solvent comprises a C5-C10 cycloalkane (e.g., cyclohexane, cycloheptane, cyclooctane, cis-decalin, etc.).
• the solvent comprises one or more C5-C10 mono- and/or bicycloalkanes, which may be substituted by up to 3 C1-C4 alkyl groups.
• apolar and/or non-polar solvents e.g., saturated hydrocarbons such as C5-C12 alkanes, aliphatic ethers such as di-C 2 -C6 alkyl ethers, methyl C4-C6 alkyl ethers and di-Ci-C4 alkyl C 2 -C 6 alkylene diethers [e.g., glyme], cyclic ethers such as tetrahydrofuran and dioxane, arenes such as benzene, toluene and xylenes, etc.) may be included in the present formulation.
• saturated hydrocarbons such as C5-C12 alkanes
• aliphatic ethers such as di-C 2 -C6 alkyl ethers, methyl C4-C6 alkyl ethers and di-Ci-C4 alkyl C 2 -C 6 alkylene diethers [e.g., glyme]
• the dopant has the formula D(AH 3 ) 3 , where D is P or B, and A is Si or Ge.
• the ink composition may contain suitable proportions of Group IVA semiconductor element precursor(s) (e.g., (poly)silanes, (poly)germanes, and/or (poly)germasilanes) and dopant source(s) to provide a desired doping level in the final film or feature.
• Group IVA semiconductor element precursor(s) e.g., (poly)silanes, (poly)germanes, and/or (poly)germasilanes
• dopant source(s) e.g., from 0.00001 to about 20 vol.% (or any range of values therein, such as
• the composition may consist essentially of the dopant source.
• the dopant source(s) may be present in an amount providing from about 0.0001 to about 10 at.% (or any range of values therein) of dopant atoms with respect to Si and/or Ge atoms in the Group IVA semiconductor element precursor(s).
• Dopant precursors, doped silane intermediates, doped silane compositions, doped semiconductor precursor inks, exemplary methods for their preparation, and techniques for determining and/or controlling the dopant levels in the precursor inks and active films are described in greater detail in U.S. Patent Nos. 7,314,513, 7,674,926, and 7,879,696, and in co-pending U.S. Patent Application Nos. 11/249,167 and 11/867,587, respectively filed on October 11, 2005 and October 4, 2007 (Attorney Docket Nos. IDR0423 and IDR0884, respectively), the relevant portions of each of which are incorporated herein by reference.
• the liquid-phase (poly)silane ink may further comprise one or more conventional additives, such as a surface tension reducing agent, a surfactant, a binding agent, a thickening agent, a photosensitizer, etc. (see, e.g., U.S. Patent Application No. 12/243,880, filed on October
• the (poly)silane ink may be deposited using any suitable method known in the art.
• the liquid-phase ink may be blanket-deposited or coated on the substrate.
• blanket deposition may comprise spin-coating, slit coating, slit die coating, extrusion coating, spray coating, or meniscus coating, or printing processes such as inkjet printing, gravure printing, flexographic printing, offset lithography, screen printing, slit coating, slit die coating, extrusion coating, pen coating, spray coating, meniscus coating, microspotting, stenciling, stamping, syringe dispensing, and/or pump dispensing the liquid- phase (poly)silane ink on the exposed crystalline, polycrystalline, or microcrystalline surface of the substrate.
• coating and/or printing may include purging an atmosphere in which the substrate is placed, then introducing an inert and/or reducing gas into the atmosphere, prior to coating and/or printing.
• the inert and/or reducing gas may comprise He, Ar, N 2 , etc., which may further comprise H 2 , NH 3 , SiH 4 , and/or other source of gas-phase reducing agent (e.g., in an amount up to about 20 vol.%).
• the inert and/or reducing gas atmosphere may reduce any incidence of inadvertent and/or undesired oxide formation.
• the liquid-phase ink composition may be irradiated (e.g., with light and/or actinic radiation) simultaneously with and/or immediately subsequent to depositing the liquid-phase ink on the exposed substrate surface.
• the liquid-phase (poly)silane ink may be irradiated with ultraviolet light having a wavelength (or wavelength band) shorter than 450 nm, preferably less than 400 nm, and most preferably less than 350 nm (e.g., within a range of 200 nm to 450 nm, such as 220 nm to 400 nm, or 250 to 350 nm, or any other range of values therein).
• the deposited liquid-phase ink may be dried at a temperature for a length of time sufficient to remove substantially all of the remaining solvent(s) from the ink composition.
• drying comprises removing the solvent(s) in a vacuum, with or without applied heat.
• Evaporating the solvent may comprise heating the coated or printed precursor composition (and/or substrate) to a temperature of from about 30 °C to about 200 °C (e.g., from 30 °C to about 90 °C, from 80 °C to about 120 °C, or any other range of values therein).
• the length of time may be sufficient to remove substantially all of the solvent and/or substantially all of the additive(s) from the coated or printed precursor ink (e.g., from 1 second to 4 hours, 1 minute to 120 minutes, or any other range of values therein).
• the vacuum may be from 1 mTorr to 300 Torr, 100 mTorr to 100 Torr, 1-20 Torr, or any other range of values therein, and may be applied by vacuum pump, aspirator, Venturi tube, etc.
• the solvent can be evaporated under an inert atmosphere with 0 2 levels « 1 ppm to avoid unacceptably high oxygen content in the formed films or features.
• the Group IVA semiconductor element precursor is further cured at a second temperature ranging from 300 °C to 600 °C (e.g., from 350 °C to 550 °C, from 400 °C to 500 °C, or any other range of temperatures therein) for a length of time between 1 minute and 60 minutes (e.g., between 5 minutes and 30 minutes, between 10 minutes and 20 minutes, or any other range of times therein) to form a continuous hydrogenated, amorphous Group IVA semiconductor element film 412.
• the hydrogenated, amorphous Group IVA semiconductor element film 412 may be a patterned feature and/or may be doped.
• the temperature may be varied in order to optimize the (doped) Group IVA semiconductor element film or feature properties (e.g., density, purity, etc.).
• the curing process may further comprise an annealing step, which may include heating the substrate 400 and the coated or printed Group IVA semiconductor element precursor film or feature 410, or the cured Group IVA semiconductor element film or feature 412 (e.g., the amorphous, hydrogenated film) at a temperature and for a length of time sufficient to provide the film or feature with certain predetermined or desired characteristics or qualities (e.g., conductivity, morphology, electromigration and/or etch resistance, stress and/or surface strain, etc.), and/or to activate any dopant(s) that are present in the film or feature.
• an annealing step may include heating the substrate 400 and the coated or printed Group IVA semiconductor element precursor film or feature 410, or the cured Group IVA semiconductor element film or feature 412 (e.g., the amorphous, hydrogenated film) at a temperature and for a length of time sufficient to provide the film or feature with certain predetermined or desired characteristics or qualities (e.g., conductivity, morphology, electromigration and
• the Group IVA semiconductor element film or feature is heated to a temperature and for a length of time sufficient to form an epitaxial layer.
• Suitable annealing temperatures generally range from about 400 °C to about 1400 °C, or any temperature or range of temperatures therein (e.g., from about 500 °C to about 800 °C, etc.).
• annealing may include one or more temperature ramps (e.g., stepped or continuous increases in temperature over predetermined periods of time).
• the substrate 400 and the deposited Group IVA semiconductor element precursor (e.g., 410 in FIG. 4B or 412 in FIG. 4C) is heated at a temperature and for a length of time sufficient for a film or feature 414 formed from the Group IVA semiconductor element precursor to adopt the crystalline structure of the exposed material at the surface 405 of the substrate 400.
• the film or feature 410/412 is heated at a temperature above 400 °C (e.g., 500 °C, 600 °C, 800 °C, 900 °C, etc.) and for a length of time sufficient to form an epitaxial layer 414.
• the epitaxial structure (e.g., the combination of the substrate 400 and the at least partially crystallized film or feature 414) is larger in at least one dimension than before depositing the ink 410 (compare to, e.g., substrate 400 alone), but the newly formed material (e.g., 414) has the same crystalline structure as the substrate surface 405.
• the Group IVA semiconductor element precursor can be annealed (e.g., epitaxially grown) without being cured (e.g., proceeding through an amorphous and/or hydrogenated stage).
• FIGS. 5A-5D One exemplary method of forming an epitaxial structure 500 according to embodiments of the present invention is shown in FIGS. 5A-5D.
• a liquid-phase (poly)silane ink as described herein is coated on the crystalline, poly crystalline or microcrystalline material 515 exposed on the substrate 510.
• Coating a doped (poly)silane ink allows for better control of doped film thickness than diffusion processes. In certain applications such as solar cell manufacturing, it is desirable to make the doped films as thin as possible for a given target conductivity, and coating a doped ink enables one to have control of the film thickness.
• the crystalline, polycrystalline or microcrystalline material 515 is exposed by any of the cleaning and/or etching methods discussed herein, before the coating of the (poly)silane ink.
• the exposed surface of crystalline, polycrystalline or microcrystalline material 515 in FIGS. 5A-D depicts a feature of certain solar cells sometimes known as "pyramid texturing," in which the surface is modified to reduce the reflection of light back into the environment, and hence, increase light absorption and, as a result, the power conversion efficiency of such solar cell.
• pyramid texturing a feature of certain solar cells sometimes known as "pyramid texturing," in which the surface is modified to reduce the reflection of light back into the environment, and hence, increase light absorption and, as a result, the power conversion efficiency of such solar cell.
• such surface modification is not required in the present invention.
• the (poly)silane ink further comprises a dopant.
• the deposited (doped) (poly)silane, (poly)germane, and/or (poly)germasilane is then dried, cured, and/or annealed (e.g., by heating as described herein) to form a (doped) Group IVA semiconductor element film 520 on the substrate 510/515, which may be amorphous and/or hydrogenated.
• the (doped) Group IVA semiconductor element film 520 is heated at a temperature and for a length of time sufficient for the Group IVA semiconductor element film 520 to adopt the same crystalline structure as the crystalline, polycrystalline, or microcrystalline material 515 of the substrate surface (e.g., for epitaxial crystallization of the Group IVA semiconductor element film 520).
• a second (poly)silane ink 525a-c containing a dopant is printed onto the Group IVA semiconductor element film 520 in a predetermined pattern.
• the second doped ink 525 a-c is a dielectric- or polymer-based ink, and the dopant from the second ink 525a-c is then diffused into the Group IVA semiconductor element film 520 to form doped regions 530a-c, as shown in FIG. 5C.
• the dielectric or polymer-based ink 525a-c is subsequently removed from the structure, as shown in FIG. 5C.
• Printing the doped features 535a-c also avoids the possibility of outdiffusion from printed organic or dielectric dopant inks (see the paragraph immediately above), and the inadvertent doping of regions of the structure not intended to be doped.
• Printing a doped (poly)silane ink has the additional advantage of minimizing or eliminating outdiffusion of dopant and inadvertent contamination of adjacent areas (e.g., of the film 520) after forming the doped films 520 and features 535a-c (whether the films are epitaxial or not).
• the contacts 540a-c in FIG. 5D may comprise any metal or other material appropriate for forming ohmic contacts to a Group IVA semiconductor elemental conductor and/or semiconductor.
• Such metal contacts can be formed by printing an ink or paste comprising one or more metal precursors on the selectively doped regions 530a-c.
• the metal precursor(s) may comprise one or more (organo)metallic compounds, (organo)metallic complexes, (organo)metallic clusters, metal nanoparticles, metal particles or flakes or a combination thereof.
• the (organo)metallic compounds, complexes and clusters, as well as the metal nanoparticles, metal particles or flakes may include known compounds, complexes, clusters, particles or flakes, and/or nanoparticles of metals such as aluminum, titanium, zirconium, hafnium, vanadium, niobium, tantalum, chromium, molybdenum, tungsten, manganese, rhenium, iron, ruthenium, osmium, cobalt, rhodium, iridium, nickel, palladium, platinum, copper, silver, gold, zinc, cadmium, gallium, indium, thallium, tin, lead or bismuth, or a combination thereof.
• metals such as aluminum, titanium, zirconium, hafnium, vanadium, niobium, tantalum, chromium, molybdenum, tungsten, manganese, rhenium, iron, ruthenium,
• the ink may comprise or consist essentially of a conventional paste of one or more such metals or alloys or combinations thereof in a conventional binder and/or flux (e.g., suitable for screen printing).
• the metal ink may further include one or more passivating agents or other species included in or combined with such metal compounds, complexes, clusters and/or nanoparticles that are capable of providing an electrically active film upon further processing of the ink.
• the metal contacts can be formed by printing an ink comprising a salt, compound, cluster or complex of a silicide-forming metal (e.g., Ti, Ta, Cr, Mo, W, Ni, Co, Pd, or Pt), preferably a Group 6-12 silicide-forming metal (e.g., Mo, W, Ni, Co, Pd, or Pt), and more preferably a Group 9-10 silicide-forming metal (e.g., Ni, Co, Pd, or Pt).
• a silicide-forming metal e.g., Ti, Ta, Cr, Mo, W, Ni, Co, Pd, or Pt
• a Group 6-12 silicide-forming metal e.g., Mo, W, Ni, Co, Pd, or Pt
• a Group 9-10 silicide-forming metal e.g., Ni, Co, Pd, or Pt.
• a metal-containing ink may be printed by essentially any printing technology discussed herein.
• printing may comprise inkjet printing, gravure printing, flexographic printing, offset lithography, screen printing, slit coating, slit die coating, pen coating, meniscus coating, microspotting, stenciling, stamping, syringe dispensing, and/or pump dispensing the metal-containing ink in a predetermined pattern.
• the ink may comprise or consist essentially of the metal precursor material and a solvent, as described herein.
• the metal contacts can be formed by electro(less)plating.
• plating may comprise printing a seed layer of metal (e.g., Pd, Ni, etc) using nanoparticles or an organometallic compound of the metal, and then selectively depositing (e.g., by electroless or electroplating) a bulk conductor (e.g., Ag, Al, Co, Ni, Cu, etc.) onto the printed seed layer.
• metal e.g., Pd, Ni, etc
• a bulk conductor e.g., Ag, Al, Co, Ni, Cu, etc.
• the contacts may be formed by conventional metal deposition (e.g., conventional sputtering or evaporation) or coating of a liquid-phase ink as described herein (e.g., spin coating, extrusion coating, spray coating, etc.) and photolithography, by conventionally dispensing or printing a commercial metal paste, by conventional electro- or electroless plating onto a previously printed or patterned seed layer (see, e.g., U.S. Patent Application No. 12/131,002, filed on May 30, 2008 [Attorney Docket No. IDR1263], the relevant portions of which are incorporated by reference herein), or alternatively, by laser patterning techniques (see, e.g., U.S.
• deposition may include sputtering a relatively thin barrier and/or adhesive layer such as Ti, TiN or a TiN-on-Ti bilayer, then depositing a relatively thick bulk conductor layer, such as Al or Al-Cu alloy [0.5-4 wt.% Cu], followed by conventional photolithographic definition of contacts and metal features that are subsequently etched.
• a relatively thin barrier and/or adhesive layer such as Ti, TiN or a TiN-on-Ti bilayer
• a relatively thick bulk conductor layer such as Al or Al-Cu alloy [0.5-4 wt.% Cu]
• the metal is wet etched using a conventional NH 4 OH/H 2 O 2 etch composition that selectively etches metals such as Al, TiN and Ti.
• the blanket depositing step may comprise spin-coating an ink containing the metal-containing material, in which the metal-containing material may comprise metal nanoparticles and/or organometallic precursors of one or more of the metals disclosed herein.
• the method may further comprise curing and/or annealing the metal, organometallic precursor(s) and/or metal nanoparticles under conditions (e.g., under an atmosphere [e.g., a reducing atmosphere], at a temperature and for a length of time) sufficient to form a conductive film.
• a metal precursor material layer may be coated or printed, and locally exposed to laser radiation such that it changes its solubility characteristics in the exposed areas. Upon washing away the unexposed area, the irradiated metal precursor stays behind to form a metal layer, optionally after an additional curing or annealing step (so-called "negative” patterning and developing). Alternatively, "positive" patterning and developing may be employed, in which the area exposed to radiation is washed away.
• Laser patterning may further comprise the substeps of depositing a resist material on a blanket deposited metal-containing layer, selectively irradiating portions of the resist material with a beam of light from a laser having (i) a predetermined width and/or (ii) a predetermined wavelength or wavelength band absorbed by the resist (or by an absorptive dye in the resist), developing the selectively irradiated resist with a developer to leave a pattern corresponding to the structure being formed (note that these steps apply to both positive and negative resists), removing those portions of the blanket deposited material not corresponding to the desired or predetermined pattern (typically by dry or wet etching), and removing the remaining resist material (see co-pending U.S. Patent Application No.
• the light has a wavelength in the infrared (IR) band (although it could also comprise a wavelength or wavelength band in the ultraviolet (UV) and/or visible band of the spectrum), the resist (or dye) absorbs and/or is sensitive to that wavelength or band of light, and the light beam is focused on or directed at the desired or predetermined portions of the resist.
• IR infrared
• UV ultraviolet
• UV ultraviolet
• any residual antireflective material, dielectric or passivation remaining over the doped features 535a-c can be removed by a short etch process.
• the etch process can selectively remove the antireflective material, dielectric or passivation relative to the doped features 535a-c, or it can be nonselective.
• a conventional silicon nitride (SiN) antireflective coating (ARC) and/or a conventional oxide (e.g., Si0 2 ) passivation layer is deposited on the surface of the structure (e.g., the front surface, as shown), then the metal contacts are formed by screen printing a metal paste formulated to dissolve or etch through the dielectric (e.g., SiN and/or oxide) film(s) to make contact with the underlying doped features 535a-c.
• metal contacts 540a-c can be formed in contact with the doped features 535a-c as shown in FIG. 5F.
• the liquid-phase (poly)silane ink is then heated at a temperature and for a length of time sufficient for a film 620 formed from the (poly)silane, (poly)germane, and/or (poly)germasilane to adopt a crystalline structure of the material 615, as described herein.
• a patterned mask 625a-d is then formed on the film 620, as shown in FIG. 6B.
• the patterned mask 625 a-d may comprise a conventional photoresist or a dielectric and be formed using any suitable method known in the art (e.g., conventional deposition and photolithographic processes, printing, laser ablation etc.).
• a dopant is then introduced into regions of the film 620 not covered by the patterned mask 625a-d (e.g., by implantation, gas phase diffusion [e.g., a POCL process, etc.], printing of a dopant source etc.) to form doped regions 630a-c, as shown in FIG. 6C.
• the resulting structure has one or more regions 630a-c in areas not covered by the mask 625 a-d that are more highly doped than the covered regions of film 620 where the dopant was not introduced.
• a solar cell architecture can be made that has local contacts on the backside.
• both n- and p-contacts may be formed on the backside, and no contacts made on the front side (a so-called "backcontact" cell).
• both the front and backside of the cell may have local contacts.
• the local contacts may be made by the method(s) disclosed herein for forming a doped semiconductor film or a heavily doped semiconductor feature (e.g., printing directly on an exposed crystalline, polycrystalline or multicrystalline material, or diffusing a dopant through a mask [e.g., a dielectric]).
• a mask e.g., a dielectric
• local epitaxial contacts can be made on the front and/or backside of the substrate, and such local epitaxial contacts may be N+ or N++ only, P+ or P++ only, or a combination thereof (e.g., N+ and P+).
• metal contacts 640a-c may then be formed on or adjacent to one or more doped regions 630a-c using any suitable material(s) and/or method(s) described herein (e.g., as described with regard to FIG. 5D).
• the resulting structure 600 has one or more highly doped regions 630a-c in areas contacting the metallization 640a-c relative to the regions of the film 620 between the metal contacts 640a-c.
• FIGS. 7A-7C Another method for forming an epitaxial structure 700 according to embodiments of the present invention is shown in FIGS. 7A-7C. In FIG.
• a (heavily) doped liquid-phase (poly)silane ink as described herein is selectively deposited on the crystalline, polycrystalline, or microcrystalline material 715 on the surface of substrate 710 by printing (e.g., ink jet printing, gravure printing, screen printing, slit coating, slit die coating, etc.) the ink in a predetermined pattern to form (heavily) doped features 720.
• the Group IVA semiconductor element precursor contains one or more dopant atoms as described herein, preferably in an amount providing a heavily-doped (e.g., N++) (patterned) semiconductor film or feature.
• the doped liquid-phase (poly)silane ink is dried, optionally cured and annealed to form a patterned, doped epitaxial Group IVA semiconductor element feature 720, although curing and annealing can be conducted after one or more additional inks are deposited onto the surface material 715 of the substrate 710.
• a second ink e.g., a (poly)silane ink containing the same or different Group IVA semiconductor element precursor and/or the same or different dopant as the first ink
• the second ink comprises a dopant in a concentration that is less than that of the first liquid-phase ink, preferably in an amount providing a doped (e.g., N or N+) semiconductor film.
• the printed ink(s) are then heated at a temperature and for a length of time sufficient for features 720 and/or film 730 formed from the (poly)silane inks to adopt a crystalline structure of the exposed crystalline, polycrystalline, or microcrystalline material 715 of the substrate 710 (e.g., to form an epitaxial layer on the substrate).
• an anti-reflective coating and/or surface passivation film As shown in FIG. 7C, an anti-reflective coating and/or surface passivation film
• the metal ink may be formulated such that it etches through the anti-reflective coating 750 (e.g., after deposition or during a high-temperature curing step).
• the anti-reflective coating 750 can be selectively or non-selectively deposited on the exposed regions of the film 730 after the metal contacts 740 are formed.
• P+, P++, N+ or N++ films may be formed on the underside of the substrate 710.
• additional features e.g., the anti-reflective coating and/or surface passivation layer 750 and/or the back contact 760
• may be formed using any suitable method known in the art e.g., blanket deposition, PVD, CVD, ALD, coating, printing and etching, printing, etc.
• a global contact such as back contact 760 in FIG. 7C (or back contact 860 in FIG.
• a metal paste e.g., an aluminum paste
• a dopant or dopant precursor e.g., aluminum oxide
• these additional features e.g., anti- reflective coating 750 and/or back contact 760
• FIGS. 5A-5F and FIGS. 6A-6D such features can be formed in the embodiments of FIGS. 5A-5F and FIGS. 6A- 6D in accordance with the description herein.
• the dopant may be selectively introduced to desired areas of the exposed crystalline surface of the substrate 710 (e.g., regions of film 620 in FIG. 6B exposed by mask 625) by gas-phase diffusion (e.g., a POC1 process, etc.).
• gas-phase diffusion e.g., a POC1 process, etc.
• a glassy deposit or film containing the dopant species may form on the exposed surface of the substrate 710.
• the dopant is then driven into the Group IVA semiconductor element film (e.g., 620 in FIG. 6B) or substrate (e.g., 710 in FIG. 7C) via a high-temperature diffusion process.
• the glassy film formed during the gas-phase diffusion process is subsequently removed (e.g., by an oxide etching process).
• the gas-phase diffusion process includes a cleaning or etching step to remove any residue from the surface(s) of the structure.
• the structure of FIG. 7A is exposed to a gas-phase dopant species (e.g., POCI3) via a conventional gas phase diffusion process (e.g., a POC1 process, etc.).
• a gas-phase dopant species e.g., POCI3
• a conventional gas phase diffusion process e.g., a POC1 process, etc.
• the structure of this process equivalent to that of FIG. 7B looks like FIG. 7A, but the doped part of surface material 715 (indicated by dots) is only in the areas between the printed contacts 720.
• the advantages of printed, doped (poly)silane inks compared to conventional doping processes include: • Avoiding any cleaning step to remove residue from the surface of the structure following doping (e.g., as is necessitated by the POC1 process outlined above). Using a printed, doped (poly)silane ink, the doped (epitaxial) layer becomes part of the substrate and can be left in place.
• Coating processes allow for better control of film thickness than diffusion processes. In certain applications such as solar cell manufacturing, it is desirable to make the doped layers as thin as possible, as long as the conductivity is high enough for the application.
• a doped (poly)silane ink is coated on the substrate to form an unpatterned, epitaxial doped silicon film should be quite beneficial compared to conventional doping processes, such as the POC1 process, laser doping, etc.
• aspects of the present invention also relate to exemplary structures generally comprising (a) a substrate having a surface, the surface having an exposed crystalline, polycrystalline or microcrystalline material (e.g., in the absence of an overlying material); (b) a film or feature comprising a Group IVA semiconductor element on the crystalline, polycrystalline or microcrystalline material, the film or feature having (i) a crystalline structure of the exposed material, and (ii) a first doped region; and (c) one or more contacts on the first doped region of the film or feature.
• the Group IVA semiconductor element film or feature comprises a second doped region in areas not under the contacts.
• the first doped region under the contact(s) has a higher dopant concentration than the second doped region not under the contact(s).
• the structures of the present invention may be beneficial for use in photovoltaic devices (e.g., solar cell architectures such as conventional N+/P/P+ cells with and without selective emitter[s] [e.g., features 535a-c in FIG. 5E, features 630a-c in FIG. 6C, and features 720 in FIG. 7B], solar cells based on N-type wafers [e.g., P+/N/N+ cells], solar cells including localized P+ and N+ contacts on the backside of the substrate, etc.), light sensors, image sensors, light emitting devices, and/or MEMS devices.
• photovoltaic devices e.g., solar cell architectures such as conventional N+/P/P+ cells with and without selective emitter[s] [e.g., features 535a-c in FIG. 5E, features 630a-c in FIG. 6C,
• the substrate 810 may comprise any suitable Group IVA element-containing support structure having a surface that exposes a crystalline, polycrystalline, or microcrystalline material 815.
• the substrate comprises a polycrystalline wafer, a multi- crystalline wafer, a metallurgical-grade wafer, a ribbon or a band consisting essentially of a Group IVA semiconductor element (which may be the same or different Group IVA element as the epitaxial film), a ceramic substrate (as described herein), or a porous silicon substrate.
• the substrate comprises an exposed (e.g., cleaned and/or etched) crystalline or polycrystalline material 815.
• one or more single crystalline or polycrystalline thin films are on the surface of a conductive or non-conductive substrate (e.g., as described above with regard to exemplary methods of forming epitaxial structures; see also FIGS. 4B and 4C).
• the substrate preferably comprises a "self-standing" silicon substrate (e.g., a silicon wafer, silicon ribbon, etc.).
• the crystalline, polycrystalline, or microcrystalline material exposed on the surface of the substrate has a thickness less than 100 ⁇ , or in some embodiments, less than 50 ⁇ .
• the substrate 810 may comprise a doped wafer, such as a P-type or N-type single-crystalline, multi-crystalline etc. silicon wafer.
• the structures of the present invention include at least one feature 820 and/or 825 on the cleaned and/or etched crystalline, polycrystalline, or microcrystalline surface of the substrate 815/810.
• the film or feature 820/825 comprises a Group IVA semiconductor element (e.g., Si and/or Ge) and at least one dopant.
• the film or feature 820/825 preferably has the same crystalline structure of the exposed crystalline, polycrystalline, or microcrystalline material 815 on the substrate surface.
• some embodiments of the invention use a doped (poly)silane ink to make a patterned or unpatterned doped epitaxial layer by coating and curing/annealing as discussed above with respect to FIG.
• Fabrication of a solar cell utilizing such an embodiment may not include a selective emitter 825, but instead, may follow a conventional solar cell fabrication and design scheme as depicted in FIG. 1A, in which the layer 120 may be formed by coating or printing a doped (poly)silane ink onto substrate surface 110 and subsequently curing and/or annealing the coated or printed (poly)silane to form an epitaxial layer 120. Subsequent surface passivation, antirefiective coating formation, and/or metallization may be implemented by conventional techniques, as are known in the art.
• the Group IVA semiconductor element film or feature preferably includes one or more dopants selected from the group consisting of boron, phosphorous, arsenic, and antimony. Suitable dopants are described in detail above with regard to exemplary methods of forming epitaxial structures.
• the Group IVA semiconductor element film or feature includes a first doped region 825 and a second doped region 820.
• the first doped region 825 has a high dopant concentration (e.g., a very highly doped region such as an N++ region) relative to the dopant concentration of the second doped region 820 (e.g., a highly doped, or N+, region).
• the structure 800 generally comprises one or more contacts 840, preferably on the first doped region 825 of the Group IVA semiconductor film or feature.
• the contacts 840 may have any suitable shape and/or size, and may comprise any metal or other conductive material suitable for ohmic contacts to a doped Group IVA semiconductor.
• the contacts may comprise a metal selected from the group consisting of Zr, Hf, V, Nb, Ta, Cr, Mo, W, Mn, Re, Fe, Ru, Os, Co, Rh, Ir, Ni, Pd, Pt, Cu, Ag, Au, Zn, Cd, Al, Ti, Ga, In, Sn, Pb, Bi, and combinations thereof.
• the contacts may comprise a silicide-forming metal (e.g., Ti, Ta, Cr, Mo, W, Ni, Co, Pd, or Pt), and a metal silicide (e.g. of the silicide-forming metal) between the silicide-forming metal and the doped region 820.
• the structure 800 of the present invention may further include one or more back or backside contacts 860 on the underside of the substrate 810.
• the backside contacts 860 may comprise any of the conductive materials described herein (e.g. a conventional aluminum paste for backside metallization, etc.).
• the structure 800 may include an anti-reflective coating 850.
• the anti-reflective coating 850 may comprise an inorganic insulator, such as silicon oxide, silicon nitride, silicon oxynitride, alumina, titania, germania (Ge0 2 ), hafnia, zirconia, ceria, one or more other metal oxides, or a combination and/or nanolaminate thereof.
• the anti-reflective coating 850 may have a thickness of from 50 A to 100,000 A (e.g., 50 to 200 A, or any other range of values therein).
• the antireflective coating comprises a layer of silicon nitride.
• the selective epitaxial contacts and structures of the present invention may be used in various devices and applications such as light sensors, image sensors, light emitting devices, MEMS devices, analog devices and circuits, etc., as well as photovoltaic devices, including solar cell architectures such as conventional N+/P/P+ cells, cells based on N-type wafers (P+/N/N+ cells), back contact cells, front emitter wrap through cells, etc.
• solar cell architectures such as conventional N+/P/P+ cells, cells based on N-type wafers (P+/N/N+ cells), back contact cells, front emitter wrap through cells, etc.
• a silicon film having a thickness of 220 nm was formed on a Si wafer (100) and annealed for 1 minute at 800 °C to form Sample 2.
• the silicon films were characterized by x-ray diffraction (XRD) using a Bruker axs x-ray diffractometer, and the film thicknesses were measured using a Tencor profilometer.
• silicon films on oxides (thermal or native) formed from polysilane inks are polycrystalline.
• Silicon films on silicon wafers that are treated with a standard buffered oxide etch (BOE) solution prior to coating with a polysilane ink are single crystalline. This shows that silicon films can be formed or grown on a clean surface of crystalline silicon by epitaxial crystallization.
• the samples in Table 1 that were annealed by RTA showed ⁇ 1 1 1> and ⁇ 220> reflections, in addition to substrate refiections. Samples that were shock furnace annealed or slow RTA annealed did not show any additional refiections.
• 7,485,691 was coated onto single crystal ⁇ 100> and ⁇ 1 1 1> silicon wafers, and crystallized at 850 °C in a furnace or by RTA to form a silicon film.
• the silicon films were characterized by x- ray diffraction (XRD) using the Bruker axs x-ray diffractometer. Experimental parameters and results are shown below in Table 2.
• the present invention provides epitaxial films and structures, methods of making epitaxial structures, and devices incorporating such epitaxial structures.
• Forming epitaxial contacts and structures from semiconductor films or features made using a liquid-phase Group IVA semiconductor element precursor ink may be beneficial because a relatively good film is formed in terms of smoothness, density, and purity, particularly when compared to films formed from nanoparticle-based inks.
• liquid-phase (poly)silane inks described herein form epitaxial films or features when the ink is deposited on a substrate having a cleaned or etched (poly)crystalline surface and is heated sufficiently for the film or feature formed from the Group IVA semiconductor element precursor to adopt the same crystalline structure of the exposed material on the substrate surface (e.g., an epitaxial film).
• the epitaxial films or features can be useful for emitter contacts, collector contacts, source/drain contacts, and/or other ohmic contacts.

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