WO2011016392A1 - Procédé de fabrication d’un dispositif à semi-conducteur de carbure de silicium - Google Patents

Procédé de fabrication d’un dispositif à semi-conducteur de carbure de silicium Download PDF

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Publication number
WO2011016392A1
WO2011016392A1 PCT/JP2010/062866 JP2010062866W WO2011016392A1 WO 2011016392 A1 WO2011016392 A1 WO 2011016392A1 JP 2010062866 W JP2010062866 W JP 2010062866W WO 2011016392 A1 WO2011016392 A1 WO 2011016392A1
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silicon carbide
substrate
semiconductor device
film
front surface
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PCT/JP2010/062866
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English (en)
Japanese (ja)
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賢二 鈴木
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昭和電工株式会社
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/0445Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising crystalline silicon carbide
    • H01L21/0455Making n or p doped regions or layers, e.g. using diffusion
    • H01L21/046Making n or p doped regions or layers, e.g. using diffusion using ion implantation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/16Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table
    • H01L29/1608Silicon carbide

Definitions

  • the present invention relates to a method for manufacturing a silicon carbide semiconductor device, and more particularly to activation heat treatment after impurity ions are implanted into a silicon carbide substrate.
  • Silicon carbide semiconductors have superior characteristics such as higher breakdown voltage, wider energy band gap, and higher thermal conductivity than silicon semiconductors, so light emitting elements, high power power devices, high temperature resistant elements, radiation resistant elements Applications to devices, high frequency devices, etc. are expected.
  • an epitaxial growth layer is formed as an active region of a semiconductor element on a silicon carbide substrate (SiC substrate), and this epitaxial growth layer is selected. It is necessary to control the conductivity type and carrier concentration in the region. Therefore, it is possible to form various p-type or n-type impurity doped regions by partially injecting impurity dopant atoms into the epitaxial growth layer, which is an active region, and to configure semiconductor elements such as transistors and diodes. Become.
  • Patent Documents 1 to 3 disclose a high-temperature annealing method that can suppress surface roughness of the silicon carbide substrate.
  • Patent Document 1 discloses that an SiC substrate is formed by depositing a diamond-like carbon (DLC) film or an organic film as a protective film on an epitaxial layer serving as an active region and performing activation annealing (activation heat treatment).
  • DLC diamond-like carbon
  • activation heat treatment activation heat treatment
  • Patent Document 2 discloses a high-temperature annealing method that prevents the occurrence of surface roughness by performing activation annealing using a film obtained by carbonizing a resist layer formed on an active region as a protective film.
  • Patent Document 3 discloses a high-temperature annealing method for preventing the occurrence of surface roughness due to activation annealing by forming a carbon film by sputtering on an active region and using it as a protective film, and defining the purity of the carbon film. Is disclosed.
  • a protective film is formed only on the front surface (activated surface or epi surface) of the silicon carbide substrate before the high-temperature annealing treatment that is the activation heat treatment. It was. However, in this case, thermal stress due to the difference in thermal expansion coefficient between the protective film and the silicon carbide substrate exists only on the front surface side of the silicon carbide substrate, and there is no thermal stress on the back surface. Further, the front surface side of the silicon carbide substrate is affected by the residual stress (internal stress) of the protective film, but is not affected by the back surface side having no protective film.
  • the protective film when the protective film is formed only on the front surface of the silicon carbide substrate, stress due to the film formation exists asymmetrically on both surfaces of the substrate, resulting in high temperature activation annealing. Sometimes the substrate warps.
  • the front surface and the back surface of the silicon carbide substrate are heated differently, so the front surface A difference in temperature occurs between the back surface and the back surface, and this temperature difference causes a difference in thermal expansion, which causes warpage of the substrate.
  • the warpage of the substrate becomes particularly noticeable as the diameter of the substrate increases.
  • the back surface is used as an element function, such as the back electrode of the silicon carbide substrate, it is necessary to suppress surface roughness on the back surface side of the silicon carbide substrate.
  • the present invention has been made in view of the above circumstances, and not only surface roughening and bunching due to high-temperature annealing treatment, but also warping of the substrate is suppressed, and carbonization is smoother than before while maintaining a high impurity activation rate. It is an object of the present invention to provide a method for manufacturing a silicon carbide semiconductor device having a silicon surface.
  • FIG. 1 the conceptual diagram of the heating of the board
  • reference numeral 1 is a silicon carbide substrate provided with a protective film
  • reference numeral 2 is a susceptor
  • reference numeral 2A is a susceptor body
  • reference numeral 2B is a susceptor lid
  • reference numeral 2a is a sample stage.
  • the protective film is absorbed and heated, and the front surface is heated by heat conduction from the heated protective film.
  • silicon carbide substrate 1 is translucent on the surface (back surface) that does not have a protective film, radiant heat passes through the back surface. Therefore, the back surface is heated by heat conducted from the front surface through the substrate.
  • the surface of the silicon carbide substrate 1 that has the protective film and the surface that does not have a different mode of heating resulting in a temperature difference between the two surfaces. Since the difference in thermal expansion between the respective surfaces occurs in accordance with this temperature difference, as described above, it causes the warpage of the substrate during high-temperature annealing.
  • the protective film is provided on both surfaces of silicon carbide substrate 1, there is no difference in the mode of heating by the surface, so that the substrate can be uniformly heated.
  • the present invention provides the following means. (1) A method of manufacturing a silicon carbide semiconductor device having an impurity doped region on a front surface of a silicon carbide substrate, the step of implanting impurity ions into the front surface of the silicon carbide substrate, and the silicon carbide substrate After the step of forming a carbon film on the front surface and the back surface, the step of activating heat treatment of the silicon carbide substrate using the carbon film as a protective film, and the step of activating heat treatment, the front surface And a step of removing the carbon film on the back surface in order.
  • the carbon film is any one of a carbon film formed by sputtering or CVD, a DLC (diamond-like carbon) film, or a carbon film formed by carbonizing an organic film ( A method for manufacturing a silicon carbide semiconductor device according to 1).
  • the activation heat treatment is heating by any one of a high-frequency heating method, a lamp heating method, and a vacuum thermoelectron impact method, according to any one of the above items (1) to (3), A method for manufacturing a silicon carbide semiconductor device.
  • the back surface of the substrate is smooth and the surface roughness is suppressed, the back surface can be used as an element function like a back electrode.
  • FIG. 1 It is a conceptual diagram of the heating of the board
  • (A)-(d) is process sectional drawing which shows the manufacturing method of the silicon carbide semiconductor device of this embodiment. It is a figure which shows the curvature before and behind annealing of a 3 inch silicon carbide substrate, and the measurement result of WARP. It is a figure which shows the result of the surface morphology by atomic force microscope (AFM) observation of the front surface and back surface of a silicon carbide substrate.
  • AFM atomic force microscope
  • the method for manufacturing a silicon carbide semiconductor device of this embodiment includes a step of implanting impurity ions into the front surface of a silicon carbide substrate (impurity implantation step), and a step of forming carbon films on both surfaces of the silicon carbide substrate (protection). Film formation step), a step of activating heat treatment of the silicon carbide substrate using the carbon film as a protective film (activation heat treatment step), and a step of removing the carbon film (protective film removal step). These steps are sequentially performed to manufacture a silicon carbide semiconductor device having an impurity doped region on the front surface of the silicon carbide substrate.
  • impurity implantation process First, in the impurity implantation step, impurities are implanted into the front surface of the silicon carbide substrate. Specifically, first, as shown in FIG. 2A, an epitaxial substrate 1 in which an n type epitaxial layer 2 is grown on an n + type silicon carbide substrate 3 is used as a silicon carbide substrate.
  • the epitaxial substrate 1 is preferably a smooth surface with a small surface roughness, for example, Ra ⁇ 1 nm or less.
  • a mask for impurity ion implantation is formed on the surface of the epitaxial layer.
  • This mask covers a part of the surface of the epitaxial layer, and an opening is provided in a region where a p-type region (impurity region) is to be formed by impurity ion implantation.
  • impurity ions for example, aluminum (Al) ions 6 for forming a p-type region are implanted into the surface layer of the epitaxial layer exposed from the opening in multiple stages using six types of acceleration voltages.
  • a total of six stages of ion implantation are performed with acceleration voltages of 240 kV, 150 kV, 95 kV, 55 kV, 27 kV, and 10 kV (six-stage implantation method).
  • the implanted Al concentration is, for example, 2 ⁇ 10 19 cm ⁇ 3 or 2 ⁇ 10 20 cm ⁇ 3 .
  • an impurity ion implantation layer is formed as shown in the figure.
  • carbon films 4 and 5 are formed on the front surface and the back surface of the epitaxial substrate (silicon carbide substrate) in the protective film forming step. Specifically, first, the mask used for impurity ion implantation is removed. Subsequently, a carbon film as a protective film is formed on both the front surface and the back surface of the epitaxial substrate.
  • the carbon films 4 and 5 as protective films are formed by sputtering or CVD, formed by DLC (diamond-like carbon) film by high-frequency plasma CVD, or carbon film obtained by carbonizing an organic film such as a resist. Can be used.
  • the film thickness of the carbon film is preferably 10 to 500 nm, more preferably 30 to 200 nm, and particularly preferably 50 to 150 nm when formed by sputtering or CVD. If the film thickness of the carbon film is less than 10 nm, the function as a protective film becomes insufficient in the activation heat treatment step described later, which is not preferable. Further, if the carbon film thickness exceeds 500 nm, it is not preferable because the substrate is warped or cracked. Furthermore, it is not preferable because it becomes difficult to remove the carbon film in the protective film removing step described later.
  • the substrate can be prevented from warping or cracking during the activation heat treatment, and the sublimation of Si atoms from the surface of the epitaxial substrate 1 can be suppressed and protected. It is preferable because removal is easy in the film removal step.
  • the carbon films 4 and 5 are formed on the front surface and the back surface of an epitaxial substrate (silicon carbide substrate) as follows, for example.
  • an epitaxial substrate silicon carbide substrate
  • a carbon film is formed on the substrate.
  • the substrate is turned over, and the back surface side is directed to the sputtering source side, the front surface side is placed in contact with the substrate mounting side, and film formation is performed on the back surface side.
  • plasma atmosphere side gas phase reaction atmosphere side
  • a carbon film is formed on the front surface side.
  • the substrate is turned over, and the back side is directed to the gas phase reaction atmosphere side (plasma atmosphere side) and the front side is in contact with the substrate placement side, and film formation is performed on the back side.
  • the organic film is applied to both the front surface side and the back surface side of the epitaxial substrate 1 to about 3 ⁇ m and baked under predetermined conditions. Thereafter, a carbon film is formed under a predetermined heating condition in a heating furnace in an argon atmosphere.
  • the impurity doped region is formed by activating heat treatment of the epitaxial substrate 1 using the carbon films 4 and 5 as protective films on both sides.
  • the activation heat treatment is performed by a vacuum annealing method of less than 1 ⁇ 10 ⁇ 2 Pa.
  • the heating temperature is preferably in the range of 1600 to 2000 ° C, more preferably in the range of 1700 to 1900 ° C, and most preferably in the range of 1700 to 1850 ° C.
  • the heating temperature is less than 1600 ° C., the activation of the implanted impurities becomes insufficient, which is not preferable.
  • the temperature exceeds 2000 ° C. the surface of the epitaxial substrate 1 may be carbonized and roughened even if there is a protective film.
  • the heating time is preferably 1 to 10 minutes, more preferably 1 to 7 minutes, and particularly preferably 1 to 5 minutes.
  • the heating time is less than 1 minute, the activation of impurities becomes insufficient, which is not preferable.
  • the heating time exceeds 10 minutes, the surface of the epitaxial substrate may be carbonized and roughened even if a protective film is present, which is not preferable.
  • the carbon film used as the protective film is removed.
  • the carbon film is removed by ashing the carbon film by thermal oxidation in an oxygen atmosphere.
  • the epitaxial layer 2 and the impurity ion-implanted layer are formed by using a condition that a substrate is placed in a thermal oxidation furnace and oxygen is supplied at a flow rate of 3.5 L / min and heated at 1125 ° C. for 90 minutes. 7 and the carbon film 5 on the back surface of the epitaxial substrate can be removed.
  • the epitaxial substrate 1 is placed on a substrate mounting (quartz boat or the like) in an oxidation furnace so that both surfaces of the substrate are sufficiently exposed to an oxygen atmosphere, and the carbon films on both surfaces of the substrate can be simultaneously ashed and removed.
  • the activation rate of aluminum is about 80%, and sufficient activation is performed.
  • a silicon carbide semiconductor substrate (wafer) having an impurity doped region 8 with a high activation rate as shown in FIG. 1 and a smooth surface can be manufactured.
  • a silicon carbide semiconductor device can be manufactured, for example, by forming a Schottky diode on the silicon carbide semiconductor substrate including such a surface.
  • the activation heat treatment step is performed using a reduced pressure heating furnace, but a heating furnace in an inert gas atmosphere such as argon (Ar) may be used.
  • a heating furnace in an inert gas atmosphere such as argon (Ar)
  • Ar argon
  • a lamp heating or a high frequency method may be used, or an electron beam heating method may be used.
  • the carbon film is removed using thermal oxidation, but the carbon film can also be removed by plasma treatment using oxygen or ozone treatment.
  • the growth of the epitaxial film on the SiC single crystal wafer was performed using a high-frequency induction heating horizontal CVD (Chemical Vapor Deposition) apparatus. Specifically, a SiC single crystal wafer was placed horizontally on a susceptor, heated to 1620 ° C. in a 200 mbar hydrogen gas decompression atmosphere, and a SiC epitaxial film having a thickness of 8 ⁇ m was formed. Hydrogen was used as the carrier gas, and a mixed gas of SiH 4 and C 3 H 8 was used as the source gas. Thus, an epitaxial substrate in which an epitaxial film having a thickness of 8 ⁇ m was formed on a SiC single crystal substrate having a diameter of 3 inches and a thickness of 380 ⁇ m was produced.
  • a SiC single crystal wafer was placed horizontally on a susceptor, heated to 1620 ° C. in a 200 mbar hydrogen gas decompression atmosphere, and a SiC epitaxial film having a thickness of 8 ⁇ m was formed.
  • Al ions were implanted into the SiC epitaxial substrate having a diameter of 3 inches.
  • Al ion implantation conditions a six-stage implantation method (acceleration voltages of 240 kV, 150 kV, 95 kV, 55 kV, 27 kV, and 10 kV in total 6 stages) was used.
  • the Al concentration after the implantation was 2 ⁇ 10 19 cm ⁇ 3 .
  • carbon films were formed on both the front surface and the back surface of the SiC substrate by carbon films obtained by carbonizing the resist coating film.
  • a resist film was applied to the front surface of the SiC substrate by about 3 ⁇ m and then baked, and then a resist film was applied to the back surface of the SiC substrate by about 3 ⁇ m and baked. Thereafter, carbonization was performed under the following conditions.
  • the conditions for the carbonization treatment were as follows: in an argon atmosphere, the temperature was raised from room temperature to 800 ° C. over 1 hour, then held at 800 ° C. for 10 minutes, and then lowered to room temperature in about 7 hours.
  • the pressure was reduced to 5 ⁇ 10 ⁇ 4 to 5 ⁇ 10 ⁇ 3 Pa or lower, and an impurity activation heat treatment was performed at a temperature of 1830 ° C. and a holding time of 5 minutes.
  • the carbon film was ashed and removed by thermal oxidation (1125 ° C., 90 minutes) in an oxygen atmosphere, and the silicon carbide semiconductor device of Example 1 was manufactured.
  • FIG. 3 shows the results of Example 1.
  • “warp” and “WARP” before annealing are 26.215 ⁇ m and 27.215 ⁇ m, respectively, but after annealing, they are 76.293 ⁇ m and 76.377 ⁇ m, respectively. Warpage is recognized.
  • warp and “WARP” before annealing are 15.593 ⁇ m and 14.408 ⁇ m, respectively, and 16.498 ⁇ m and 14.001 ⁇ m after annealing, respectively. It was confirmed that the warpage was suppressed.
  • FIG. 4 shows the results of surface morphology (Rms) observed by atomic force microscope (AFM) observation of the front and back surfaces of the 3-inch silicon carbide semiconductor device of Example 1 above.
  • the scanning area in FIG. 4 is 2 ⁇ m ⁇ 2 ⁇ m.
  • the height scale is shown in the figure.
  • the Rms of the front surface and the back surface of the substrate were both 0.3 nm or less, and the same surface roughness suppressing effect as that of the front surface was confirmed for the back surface.
  • the method for manufacturing a silicon carbide semiconductor device of the present invention is not limited to surface roughness and bunching due to high-temperature annealing treatment, but also suppresses warping of the substrate, while maintaining a high impurity activation rate and smoothing silicon carbide. It can be used for manufacturing a silicon carbide semiconductor device having a surface.
  • a substrate having a large diameter can be kept free from warping after the activation heat treatment, and thus is particularly effective for manufacturing a silicon carbide semiconductor device using a large diameter substrate.
  • the back surface of the silicon carbide substrate can also be used for manufacturing a silicon carbide semiconductor device in which the element function is used.

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Abstract

La présente invention a trait à un procédé de fabrication d’un dispositif à semi-conducteur de carbure de silicium permettant de supprimer le gauchissement d’un substrat et d’obtenir une surface de carbure de silicium plus lisse que les surfaces de carbure de silicium classiques, tout en maintenant un taux d’activation des impuretés élevé. Le procédé de fabrication du dispositif à semi-conducteur de carbure de silicium permettant de fournir une zone dopée en impuretés sur la surface avant du substrat de carbure de silicium est caractérisé en ce qu’on effectue de façon séquentielle les étapes suivantes : une étape consistant à implanter des ions d’impureté dans la surface avant du substrat de carbure de silicium ; une étape consistant à former des films de carbone sur la surface avant et la surface arrière du substrat de carbure de silicium, respectivement ; une étape consistant à effectuer un traitement thermique d’activation sur le substrat de carbure de silicium en utilisant le film de carbone en tant que couche de protection ; et une étape consistant à supprimer les films de carbone formés sur la surface avant et la surface arrière après l’étape consistant à effectuer un traitement thermique d’activation.
PCT/JP2010/062866 2009-08-04 2010-07-30 Procédé de fabrication d’un dispositif à semi-conducteur de carbure de silicium WO2011016392A1 (fr)

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CN103782389A (zh) * 2011-09-28 2014-05-07 住友电气工业株式会社 制造碳化硅半导体器件的方法
WO2015045627A1 (fr) * 2013-09-25 2015-04-02 住友電気工業株式会社 Procédé de fabrication de dispositif à semi-conducteur au carbure de silicium

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JP2016086131A (ja) * 2014-10-28 2016-05-19 国立研究開発法人産業技術総合研究所 炭化珪素半導体装置の製造方法
JP6348430B2 (ja) * 2015-02-23 2018-06-27 トヨタ自動車株式会社 半導体装置の製造方法
CN106298471A (zh) * 2015-06-02 2017-01-04 中国科学院苏州纳米技术与纳米仿生研究所 碳化硅半导体器件的退火方法
JP6758097B2 (ja) * 2016-06-10 2020-09-23 株式会社アルバック シリコン酸化層形成方法
JP2017220653A (ja) * 2016-06-10 2017-12-14 昭和電工株式会社 炭化珪素半導体装置の製造方法
JP6948842B2 (ja) * 2017-06-02 2021-10-13 昭和電工株式会社 アニール装置及び半導体ウェハの製造方法

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WO2015045627A1 (fr) * 2013-09-25 2015-04-02 住友電気工業株式会社 Procédé de fabrication de dispositif à semi-conducteur au carbure de silicium
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