WO2010129002A1 - Method and apparatus for improving power and loss for interconect configurations - Google Patents
Method and apparatus for improving power and loss for interconect configurations Download PDFInfo
- Publication number
- WO2010129002A1 WO2010129002A1 PCT/US2010/000043 US2010000043W WO2010129002A1 WO 2010129002 A1 WO2010129002 A1 WO 2010129002A1 US 2010000043 W US2010000043 W US 2010000043W WO 2010129002 A1 WO2010129002 A1 WO 2010129002A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- power
- pads
- vias
- blinds
- capacitance
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/18—Printed circuits structurally associated with non-printed electric components
- H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
- H05K1/185—Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/18—Printed circuits structurally associated with non-printed electric components
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
- H05K1/0216—Reduction of cross-talk, noise or electromagnetic interference
- H05K1/023—Reduction of cross-talk, noise or electromagnetic interference using auxiliary mounted passive components or auxiliary substances
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
- H05K1/0216—Reduction of cross-talk, noise or electromagnetic interference
- H05K1/023—Reduction of cross-talk, noise or electromagnetic interference using auxiliary mounted passive components or auxiliary substances
- H05K1/0231—Capacitors or dielectric substances
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
- H05K1/0216—Reduction of cross-talk, noise or electromagnetic interference
- H05K1/023—Reduction of cross-talk, noise or electromagnetic interference using auxiliary mounted passive components or auxiliary substances
- H05K1/0234—Resistors or by disposing resistive or lossy substances in or near power planes
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/111—Pads for surface mounting, e.g. lay-out
- H05K1/112—Pads for surface mounting, e.g. lay-out directly combined with via connections
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/095—Conductive through-holes or vias
- H05K2201/096—Vertically aligned vias, holes or stacked vias
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
- H05K2201/10621—Components characterised by their electrical contacts
- H05K2201/10636—Leadless chip, e.g. chip capacitor or resistor
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/4038—Through-connections; Vertical interconnect access [VIA] connections
- H05K3/4046—Through-connections; Vertical interconnect access [VIA] connections using auxiliary conductive elements, e.g. metallic spheres, eyelets, pieces of wire
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
Definitions
- the present disclosure provides for attaching and embedding a capacitance or a resistance directly to the bottom side of pads that are located to extend over and beyond the vias of the PCB so that a portion of the pad containing the embedded power modification component (capacitance or resistance) is located beyond where the visa are located.
- Each of the pads will be connected to the endpoints of the power modification component located underneath it through an opening in the dielectric material under the pads to permit conduction through the opening. In this way the capacitance and the resistance will have a closer contact point with the electrical component.
- FIG.1 is a an illustration of standard interconnect configuration showing placement of a capacitance or resistance
- FIG.2 A is illustrates the interconnect configuration with placement of the capacitance or resistance in accordance with the present disclosure
- FIG 2B is another embodiment of the present disclosure showing the vias aligned vertically one on top of another for a finer pitch;
- FIG. 3 is another embodiment of the present disclosure in which the embedded component is a component aligned vertically within the board;
- FIG. 4 is an embodiment of the present disclosure showing an embedded resistance and an embedded capacitance within the board aligned vertically and horizontally.
- FIG.1 illustrates the typical interconnect configuration where the capacitance or resistance is placed a considerable distance away from the electrical test structure housing of an IC chip (not shown).
- FIG.2 illustrates the interconnect configuration of the present disclosure.
- the power modification component 5 which can be, but is not limited to, either the capacitance 5c (FIG. 4) or the resistance 5a (FIG. 3) is embedded under pads 7 within the footprint of the electrical test structure housing of an IC chip (not shown).
- the pads 7 are located with the embedded portion not covering the vias or blinds 11 but placed in proximity of the electrical component.
- the placement can provide for better power distribution by being close to the electrical component so that there is little power dissipation and the capacitance does not become inductive. Similarly by the same close proximity of the resistance to the electrical component power dissipation is provided when required. Distant placement of the resistance from the electrical component results in a reduction of the power dissipation, a problem addressed and resolved by the present disclosure as shown in FIG. 3 of the drawings.
- FIG.2A illustrates an embodiment of the present disclosure showing an interconnect configuration in which a power modification component 5 e.g. resistance 5a (FIG. 3) or capacitance 5c (FIG. 4) is attached to the bottom sides of the pads 7 formed by preferably a copper layer of a printed circuit board (PCB).
- the embedded power modification component 5 (such as but not limited to a capacitance or resistance) is located below a layer of copper foil followed by dielectric layer.
- the power modification component 5 is surrounded on its sides by Prepreg material e.g. fiber reinforced or unreinforced epoxy or plastic material.
- the power modification component 5 is attached to the pads 7 layer by solder paste, conductive epoxy, or metallic plating 14.
- the present disclosure also is not limited to the particular materials of copper foil, dielectric layer and Prepreg material described herein.
- the power modification component 5 is embedded so as to be near but not block the vias or blinds 11 for the PCB 8.
- the capacitance 5c will be a 0201 cap. However any desired capacitance value or size that can be accommodated can be used.
- the capacitance 5c is attached by a conductive epoxy, solder paste, or metallic plating 14.
- FIG.3 shows another embodiment of improved power dissipation by embedding a resistor 5a in a pc board 8.
- An opening is created beneath the pad 7a at the top of the interposer board and the pad 7b at the bottom of the pc board 10 and a resistor 5a is vertically positioned within the opening in-between the top and bottom pads 7 a and 7b, respectively, and in effect acts as a via for the effected layers of the pc board 10, which it is assumed can be a multilayer pc board, so that the electrical connection is through the resistance 5a embedded in the pc board 10.
- the pads 7a and 7b, respectively, are connected to the resistance 5a. Openings between the ends points of the resistance 5a and the pads 7a and 7b, respectively, in the pc board 8 can be filled with solder, metallic plating or conductive epoxy 14.
- FIG. 4 shows another embodiment of the present disclosure with an embedded capacitance 5c and the embedded resistance 5a of FIG.3 together in the same pc board 8.
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2012509780A JP2012526380A (ja) | 2009-05-04 | 2010-01-08 | 層間接続構成に対して電力利得及び損失を改善するための方法及び装置 |
EP10772351.2A EP2428105A4 (en) | 2009-05-04 | 2010-01-08 | METHOD AND DEVICE FOR INCREASED PERFORMANCE AND LESS LOSS IN NETWORK CONFIGURATIONS |
SG2012005781A SG178121A1 (en) | 2009-05-04 | 2010-01-08 | Method and apparatus for improving power and loss for interconect configurations |
CN2010800197895A CN102415224A (zh) | 2009-05-04 | 2010-01-08 | 用于改善互连结构的功率增益和损耗的方法和设备 |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US21536909P | 2009-05-04 | 2009-05-04 | |
US61/215,369 | 2009-05-04 |
Publications (1)
Publication Number | Publication Date |
---|---|
WO2010129002A1 true WO2010129002A1 (en) | 2010-11-11 |
Family
ID=43050319
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/US2010/000043 WO2010129002A1 (en) | 2009-05-04 | 2010-01-08 | Method and apparatus for improving power and loss for interconect configurations |
Country Status (6)
Country | Link |
---|---|
EP (1) | EP2428105A4 (ko) |
JP (1) | JP2012526380A (ko) |
KR (1) | KR20120007521A (ko) |
CN (1) | CN102415224A (ko) |
SG (1) | SG178121A1 (ko) |
WO (1) | WO2010129002A1 (ko) |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9406462B2 (en) * | 2013-06-28 | 2016-08-02 | The Boeing Company | Truss interconnect |
WO2018044788A1 (en) * | 2016-09-02 | 2018-03-08 | R&D Circuits, Inc. | Method and structure for a 3d wire block |
CN107255784A (zh) * | 2017-07-10 | 2017-10-17 | 深圳崇达多层线路板有限公司 | 一种线路板的多物理量测量系统及测量方法 |
CN109669059B (zh) * | 2017-10-17 | 2021-03-16 | 中华精测科技股份有限公司 | 调整电源信号阻抗之电路结构及其半导体测试接口系统 |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH11103170A (ja) * | 1997-09-29 | 1999-04-13 | Kyocera Corp | 抵抗体内蔵多層セラミック回路基板 |
JP2001217337A (ja) * | 2000-01-31 | 2001-08-10 | Shinko Electric Ind Co Ltd | 半導体装置及びその製造方法 |
JP2002100875A (ja) * | 1999-09-02 | 2002-04-05 | Ibiden Co Ltd | プリント配線板およびコンデンサ |
JP2002359319A (ja) * | 2001-05-31 | 2002-12-13 | Kyocera Corp | 電気素子内蔵配線基板およびその製法 |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP1098368B1 (en) * | 1999-04-16 | 2011-12-21 | Panasonic Corporation | Module component and method of manufacturing the same |
JP4854345B2 (ja) * | 2006-03-16 | 2012-01-18 | 富士通株式会社 | コンデンサシート及び電子回路基板 |
-
2010
- 2010-01-08 WO PCT/US2010/000043 patent/WO2010129002A1/en active Application Filing
- 2010-01-08 KR KR1020117025869A patent/KR20120007521A/ko not_active Application Discontinuation
- 2010-01-08 CN CN2010800197895A patent/CN102415224A/zh active Pending
- 2010-01-08 SG SG2012005781A patent/SG178121A1/en unknown
- 2010-01-08 EP EP10772351.2A patent/EP2428105A4/en not_active Withdrawn
- 2010-01-08 JP JP2012509780A patent/JP2012526380A/ja not_active Withdrawn
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH11103170A (ja) * | 1997-09-29 | 1999-04-13 | Kyocera Corp | 抵抗体内蔵多層セラミック回路基板 |
JP2002100875A (ja) * | 1999-09-02 | 2002-04-05 | Ibiden Co Ltd | プリント配線板およびコンデンサ |
JP2001217337A (ja) * | 2000-01-31 | 2001-08-10 | Shinko Electric Ind Co Ltd | 半導体装置及びその製造方法 |
JP2002359319A (ja) * | 2001-05-31 | 2002-12-13 | Kyocera Corp | 電気素子内蔵配線基板およびその製法 |
Non-Patent Citations (1)
Title |
---|
See also references of EP2428105A4 * |
Also Published As
Publication number | Publication date |
---|---|
CN102415224A (zh) | 2012-04-11 |
EP2428105A4 (en) | 2013-05-29 |
EP2428105A1 (en) | 2012-03-14 |
KR20120007521A (ko) | 2012-01-20 |
SG178121A1 (en) | 2012-03-29 |
JP2012526380A (ja) | 2012-10-25 |
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