US20100276188A1 - Method and apparatus for improving power gain and loss for interconect configurations - Google Patents

Method and apparatus for improving power gain and loss for interconect configurations Download PDF

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Publication number
US20100276188A1
US20100276188A1 US12/655,858 US65585810A US2010276188A1 US 20100276188 A1 US20100276188 A1 US 20100276188A1 US 65585810 A US65585810 A US 65585810A US 2010276188 A1 US2010276188 A1 US 2010276188A1
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power
pads
vias
blinds
capacitance
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US12/655,858
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James V. Russell
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ABACUS FINANCE GROUP LLC
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R&D Circuits Inc
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Priority to US12/655,858 priority Critical patent/US20100276188A1/en
Assigned to R&D CIRCUITS INC. reassignment R&D CIRCUITS INC. ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: RUSSELL, JAMES V.
Publication of US20100276188A1 publication Critical patent/US20100276188A1/en
Assigned to CITIZENS BANK OF PENNSYLVANIA reassignment CITIZENS BANK OF PENNSYLVANIA INTELLECTUAL PROPERTY SECURITY AGREEMENT EFFECTIVE APRIL 29, 2011 Assignors: R & D CIRCUITS, R&D CIRCUITS HOLDINGS LLC
Assigned to PATRIOT CAPITAL II, L.P., CITIZENS BANK OF PENNSYLVANIA reassignment PATRIOT CAPITAL II, L.P. SECURITY AGREEMENT Assignors: R & D CIRCUITS, R&D CIRCUITS HOLDINGS LLC
Assigned to R & D CIRCUITS, R&D CIRCUITS HOLDINGS LLC, R&D SOCKETS, INC., R&D ALTANOVA, INC., R&D ALTANOVA TAIWAN LLC reassignment R & D CIRCUITS RELEASE BY SECURED PARTY (SEE DOCUMENT FOR DETAILS). Assignors: CITIZENS BANK OF PENNSYLVANIA
Assigned to R & D CIRCUITS, R&D CIRCUITS HOLDINGS LLC, R&D SOCKETS, INC., R&D ALTANOVA, INC., R&D ALTANOVA TAIWAN LLC reassignment R & D CIRCUITS RELEASE BY SECURED PARTY (SEE DOCUMENT FOR DETAILS). Assignors: PATRIOT CAPITAL II, L.P.
Assigned to ABACUS FINANCE GROUP, LLC reassignment ABACUS FINANCE GROUP, LLC ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: R & D CIRCUITS, R&D ALTANOVA, INC.
Assigned to ABACUS FINANCE GROUP, LLC reassignment ABACUS FINANCE GROUP, LLC CORRECTIVE ASSIGNMENT TO CORRECT THE NATURE OF CONVEYANCE PREVIOUSLY RECORDED AT REEL: 035302 FRAME: 0394. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Assignors: R & D CIRCUITS, R&D ALTANOVA, INC.
Assigned to R & D CIRCUITS, R&D ALTANOVA, INC. reassignment R & D CIRCUITS RELEASE BY SECURED PARTY (SEE DOCUMENT FOR DETAILS). Assignors: ABACUS FINANCE GROUP, LLC
Abandoned legal-status Critical Current

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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
    • H05K1/185—Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0213—Electrical arrangements not otherwise provided for
    • H05K1/0216—Reduction of cross-talk, noise or electromagnetic interference
    • H05K1/023—Reduction of cross-talk, noise or electromagnetic interference using auxiliary mounted passive components or auxiliary substances
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0213—Electrical arrangements not otherwise provided for
    • H05K1/0216—Reduction of cross-talk, noise or electromagnetic interference
    • H05K1/023—Reduction of cross-talk, noise or electromagnetic interference using auxiliary mounted passive components or auxiliary substances
    • H05K1/0231—Capacitors or dielectric substances
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0213—Electrical arrangements not otherwise provided for
    • H05K1/0216—Reduction of cross-talk, noise or electromagnetic interference
    • H05K1/023—Reduction of cross-talk, noise or electromagnetic interference using auxiliary mounted passive components or auxiliary substances
    • H05K1/0234—Resistors or by disposing resistive or lossy substances in or near power planes
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/095—Conductive through-holes or vias
    • H05K2201/096—Vertically aligned vias, holes or stacked vias
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621—Components characterised by their electrical contacts
    • H05K2201/10636—Leadless chip, e.g. chip capacitor or resistor
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4038—Through-connections; Vertical interconnect access [VIA] connections
    • H05K3/4046—Through-connections; Vertical interconnect access [VIA] connections using auxiliary conductive elements, e.g. metallic spheres, eyelets, pieces of wire
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/4913—Assembling to base an electrical component, e.g., capacitor, etc.
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/4913—Assembling to base an electrical component, e.g., capacitor, etc.
    • Y10T29/49139—Assembling to base an electrical component, e.g., capacitor, etc. by inserting component lead or terminal into base aperture
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/4913—Assembling to base an electrical component, e.g., capacitor, etc.
    • Y10T29/49146—Assembling to base an electrical component, e.g., capacitor, etc. with encapsulating, e.g., potting, etc.
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/53—Means to assemble or disassemble
    • Y10T29/5313—Means to assemble electrical device
    • Y10T29/53174—Means to fasten electrical component to wiring board, base, or substrate

Definitions

  • a method and apparatus that provides for close proximate placement of the capacitance or of the resistance which shall be referred to as a power modification component since it either better dissipates power (power loss) (resistance) or better distributes power (power gain) (capacitance) to the IC or other electrical component on a PCB to provide better power gain or distribution or power loss or dissipation.
  • the present disclosure provides for attaching and embedding a capacitance or a resistance directly to the bottom side of pads that are located to extend over and beyond the vias of the PCB so that a portion of the pad containing the embedded power modification component (capacitance or resistance) is located beyond where the visa are located.
  • Each of the pads will be connected to the endpoints of the power modification component located underneath it through an opening in the dielectric material under the pads to permit conduction through the opening. In this way the capacitance and the resistance will have a closer contact point with the electrical component.
  • FIG. 1 is a an illustration of standard interconnect configuration showing placement of a capacitance or resistance
  • FIG. 2 A is illustrates the interconnect configuration with placement of the capacitance or resistance in accordance with the present disclosure
  • FIG. 2B is another embodiment of the present disclosure showing the vias aligned vertically one on top of another for a finer pitch;
  • FIG. 3 is another embodiment of the present disclosure in which the embedded component is a component aligned vertically within the board;
  • FIG. 4 is an embodiment of the present disclosure showing an embedded resistance and an embedded capacitance within the board aligned vertically and horizontally.
  • FIG. 1 illustrates the typical interconnect configuration where the capacitance or resistance is placed a considerable distance away from the electrical test structure housing of an IC chip (not shown).
  • FIG. 2 illustrates the interconnect configuration of the present disclosure.
  • the power modification component 5 which can be, but is not limited to, either the capacitance 5 c ( FIG. 4 ) or the resistance 5 a ( FIG. 3 ) is embedded under pads 7 within the footprint of the electrical test structure housing of an IC chip (not shown).
  • the pads 7 are located with the embedded portion not covering the vias or blinds 11 but placed in proximity of the electrical component.
  • the placement can provide for better power distribution by being close to the electrical component so that there is little power dissipation and the capacitance does not become inductive. Similarly by the same close proximity of the resistance to the electrical component power dissipation is provided when required. Distant placement of the resistance from the electrical component results in a reduction of the power dissipation, a problem addressed and resolved by the present disclosure as shown in FIG. 3 of the drawings.
  • FIG. 2A illustrates an embodiment of the present disclosure showing an interconnect configuration in which a power modification component 5 e.g. resistance 5 a ( FIG. 3 ) or capacitance 5 c ( FIG. 4 ) is attached to the bottom sides of the pads 7 formed by preferably a copper layer of a printed circuit board (PCB).
  • the embedded power modification component 5 (such as but not limited to a capacitance or resistance) is located below a layer of copper foil followed by dielectric layer.
  • the power modification component 5 is surrounded on its sides by Prepreg material e.g. fiber reinforced or unreinforced epoxy or plastic material.
  • the power modification component 5 is attached to the pads 7 layer by solder paste, conductive epoxy, or metallic plating 14 .
  • the present disclosure also is not limited to the particular materials of copper foil, dielectric layer and Prepreg material described herein.
  • the power modification component 5 is embedded so as to be near but not block the vias or blinds 11 for the PCB 8 .
  • the capacitance 5 c will be a 0201 cap. However any desired capacitance value or size that can be accommodated can be used.
  • the capacitance 5 c is attached by a conductive epoxy, solder paste, or metallic plating 14 .
  • FIG. 3 shows another embodiment of improved power dissipation by embedding a resistor 5 a in a pc board 8 .
  • An opening is created beneath the pad 7 a at the top of the interposer board and the pad 7 b at the bottom of the pc board 10 and a resistor 5 a is vertically positioned within the opening in-between the top and bottom pads 7 a and 7 b, respectively, and in effect acts as a via for the effected layers of the pc board 10 , which it is assumed can be a multilayer pc board, so that the electrical connection is through the resistance 5 a embedded in the pc board 10 .
  • the pads 7 a and 7 b, respectively, are connected to the resistance 5 a. Openings between the ends points of the resistance 5 a and the pads 7 a and 7 b, respectively, in the pc board 8 can be filled with solder, metallic plating or conductive epoxy 14 .
  • FIG. 4 shows another embodiment of the present disclosure with an embedded capacitance 5 c and the embedded resistance 5 a of FIG. 3 together in the same pc board 8 .

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • Combinations Of Printed Boards (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Coupling Device And Connection With Printed Circuit (AREA)

Abstract

The present disclosure relates to embedding a power modification component such as a capacitance or a resistance inside of pads that are located to extend over and beyond the vias of the PCB so that a portion of the pad containing the embedded capacitance or resistance is located beyond where the vias or blinds are located. Each of the pads will include an opening that is located over a given one of the vias or blinds to permit that via to conduct through the opening. In this way the capacitance and the resistance will have a closer contact point the electrical component.

Description

    RELATED APPLICATIONS
  • This is a non provisional application of a provisional application Ser. No. 61/215,369 by James V. Russell filed May 4, 2009
    • BACKGROUND
  • 1. Field
  • In attaching an electrical component to the bottom side and/or the top side of a printed circuit board (PCB), there is the problem of power loss or due to the distance of the capacitance to the points on a corresponding integrated circuit (IC) for which it is intended. It is not possible to physically locate the capacitance directly to the contact pads on the printed circuit which correspond to the input output points of an integrated circuit or in the case of a test board the corresponding points of the test socket. Similarly there is the problem of inadequate dissipation due to the distance of a resistance to the electrical component. Again, it is not very likely to physically locate the resistance at the contact pads on the printed circuit board.
  • It would therefore be desirable to have a method and apparatus that provides for close proximate placement of the capacitance or of the resistance which shall be referred to as a power modification component since it either better dissipates power (power loss) (resistance) or better distributes power (power gain) (capacitance) to the IC or other electrical component on a PCB to provide better power gain or distribution or power loss or dissipation.
    • SUMMARY
  • The present disclosure provides for attaching and embedding a capacitance or a resistance directly to the bottom side of pads that are located to extend over and beyond the vias of the PCB so that a portion of the pad containing the embedded power modification component (capacitance or resistance) is located beyond where the visa are located. Each of the pads will be connected to the endpoints of the power modification component located underneath it through an opening in the dielectric material under the pads to permit conduction through the opening. In this way the capacitance and the resistance will have a closer contact point with the electrical component.
    • BRIEF DESCRIPTION OF THE DRAWINGS
  • FIG. 1 is a an illustration of standard interconnect configuration showing placement of a capacitance or resistance;
  • FIG. 2 A is illustrates the interconnect configuration with placement of the capacitance or resistance in accordance with the present disclosure;
  • FIG. 2B is another embodiment of the present disclosure showing the vias aligned vertically one on top of another for a finer pitch;
  • FIG. 3 is another embodiment of the present disclosure in which the embedded component is a component aligned vertically within the board; and
  • FIG. 4 is an embodiment of the present disclosure showing an embedded resistance and an embedded capacitance within the board aligned vertically and horizontally.
    •  DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT(S)
  • Referring now to the drawings, FIG. 1 illustrates the typical interconnect configuration where the capacitance or resistance is placed a considerable distance away from the electrical test structure housing of an IC chip (not shown). FIG. 2 illustrates the interconnect configuration of the present disclosure. In this configuration, the power modification component 5 which can be, but is not limited to, either the capacitance 5 c (FIG. 4) or the resistance 5 a (FIG. 3) is embedded under pads 7 within the footprint of the electrical test structure housing of an IC chip (not shown). The pads 7 are located with the embedded portion not covering the vias or blinds 11 but placed in proximity of the electrical component. In this way the placement can provide for better power distribution by being close to the electrical component so that there is little power dissipation and the capacitance does not become inductive. Similarly by the same close proximity of the resistance to the electrical component power dissipation is provided when required. Distant placement of the resistance from the electrical component results in a reduction of the power dissipation, a problem addressed and resolved by the present disclosure as shown in FIG. 3 of the drawings.
  • FIG. 2A illustrates an embodiment of the present disclosure showing an interconnect configuration in which a power modification component 5 e.g. resistance 5 a (FIG. 3) or capacitance 5 c (FIG. 4) is attached to the bottom sides of the pads 7 formed by preferably a copper layer of a printed circuit board (PCB). The embedded power modification component 5 (such as but not limited to a capacitance or resistance) is located below a layer of copper foil followed by dielectric layer. The power modification component 5 is surrounded on its sides by Prepreg material e.g. fiber reinforced or unreinforced epoxy or plastic material. The power modification component 5 is attached to the pads 7 layer by solder paste, conductive epoxy, or metallic plating 14. It is understood that any other known means of attachment can be used as well and that the present disclosure also is not limited to the particular materials of copper foil, dielectric layer and Prepreg material described herein. As shown in FIG. 2A the power modification component 5 is embedded so as to be near but not block the vias or blinds 11 for the PCB 8. Preferably the capacitance 5 c will be a 0201 cap. However any desired capacitance value or size that can be accommodated can be used. As seen in FIG. 4, the capacitance 5 c is attached by a conductive epoxy, solder paste, or metallic plating 14.
  • FIG. 3 shows another embodiment of improved power dissipation by embedding a resistor 5 a in a pc board 8. An opening is created beneath the pad 7 a at the top of the interposer board and the pad 7 b at the bottom of the pc board 10 and a resistor 5 a is vertically positioned within the opening in-between the top and bottom pads 7 a and 7 b, respectively, and in effect acts as a via for the effected layers of the pc board 10, which it is assumed can be a multilayer pc board, so that the electrical connection is through the resistance 5 a embedded in the pc board 10. The pads 7 a and 7 b, respectively, are connected to the resistance 5 a. Openings between the ends points of the resistance 5 a and the pads 7 a and 7 b, respectively, in the pc board 8 can be filled with solder, metallic plating or conductive epoxy 14.
  • FIG. 4 shows another embodiment of the present disclosure with an embedded capacitance 5 c and the embedded resistance 5 a of FIG. 3 together in the same pc board 8.
  • While certain embodiments have been shown and described, it is distinctly understood that the present disclosure is not limited thereto but may be otherwise embodied within the scope of the appended claims.

Claims (6)

1. A method for providing improved power distribution or power dissipation to an electrical component on a printed circuit board (PCB), the steps comprising:
embedding a power modification component inside of one or more pads;
locating said one or more embedded pads to extend over and beyond the vias or blinds of said PCB so that a portion of the pad containing the embedded power modification component is located beyond where the visa or blinds are located, said one or more pads include an opening that is located over a given one of the vias or blinds to permit that via to conduct through the opening so that said power modification component will have a closer contact point to said electrical component thereby increasing power distribution or power dissipation, respectively.
2. The method according to claim 1 wherein said power modification component is a capacitance.
3. The method according to claim 1 wherein said power modification component is a resistance.
4. An apparatus for improved power distribution or power dissipation to an electrical component on a printed circuit board (PCB), comprising:
a power modification component embedded inside of one or more pads;
a PCB having one or more vias or blinds, said one or more embedded pads being located to extend over and beyond the vias or blinds of said PCB so that a portion of the pad containing the embedded power modification is located beyond where the vias or blinds are located, said one or more pads include an opening that is located over a given one of the vias or blinds to permit that via or blind to conduct through the opening so that said power modification component will have a closer contact point to said electrical component thereby increasing power distribution or power dissipation, respectively.
5. The apparatus according to claim 4 wherein said power modification component is a capacitance.
6. The apparatus according to claim 4 wherein said power modification component is a resistance.
US12/655,858 2009-05-04 2010-01-08 Method and apparatus for improving power gain and loss for interconect configurations Abandoned US20100276188A1 (en)

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US21536909P 2009-05-04 2009-05-04
US27666109P 2009-09-15 2009-09-15
US12/655,858 US20100276188A1 (en) 2009-05-04 2010-01-08 Method and apparatus for improving power gain and loss for interconect configurations

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US12/655,858 Abandoned US20100276188A1 (en) 2009-05-04 2010-01-08 Method and apparatus for improving power gain and loss for interconect configurations
US13/507,380 Active US8792248B2 (en) 2009-05-04 2012-06-22 Method for providing improved power distribution or power dissipation to an electrical component attached to main circuit board

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US20070056766A1 (en) * 2005-09-13 2007-03-15 Shinko Electric Industries Co., Ltd. Electronic component embedded board and its manufacturing method

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WO2015168370A1 (en) * 2014-05-02 2015-11-05 R&D Circuits, Inc A structure for accepting a component for an embedded component printed circuit board
US11573264B2 (en) * 2019-04-10 2023-02-07 Mediatek Inc. Device for testing chip or die with better system IR drop

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US20120285011A1 (en) 2012-11-15
US8743554B2 (en) 2014-06-03
US8792248B2 (en) 2014-07-29
US20100277881A1 (en) 2010-11-04

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