WO2010091660A2 - Verfahren zur schaffung einer hochtemperatur- und temperaturwechselfesten verbindung eines baugruppen-halbleiters und eines halbleiterbausteins mit einem temperaturbeaufschlagenden verfahren - Google Patents
Verfahren zur schaffung einer hochtemperatur- und temperaturwechselfesten verbindung eines baugruppen-halbleiters und eines halbleiterbausteins mit einem temperaturbeaufschlagenden verfahren Download PDFInfo
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- WO2010091660A2 WO2010091660A2 PCT/DE2010/000127 DE2010000127W WO2010091660A2 WO 2010091660 A2 WO2010091660 A2 WO 2010091660A2 DE 2010000127 W DE2010000127 W DE 2010000127W WO 2010091660 A2 WO2010091660 A2 WO 2010091660A2
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- temperature
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- sintering
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- 238000000034 method Methods 0.000 title claims abstract description 28
- 239000004065 semiconductor Substances 0.000 title claims abstract description 24
- 238000004519 manufacturing process Methods 0.000 title abstract description 8
- 239000000725 suspension Substances 0.000 claims abstract description 23
- 238000005245 sintering Methods 0.000 claims abstract description 22
- 229910052751 metal Inorganic materials 0.000 claims abstract description 18
- 239000002184 metal Substances 0.000 claims abstract description 18
- 239000000843 powder Substances 0.000 claims abstract description 9
- 239000000758 substrate Substances 0.000 claims abstract description 7
- 238000010943 off-gassing Methods 0.000 claims abstract description 4
- 239000007787 solid Substances 0.000 claims abstract description 3
- 239000007789 gas Substances 0.000 claims description 8
- 150000001875 compounds Chemical class 0.000 claims description 7
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims description 6
- 238000001035 drying Methods 0.000 claims description 5
- 229910052757 nitrogen Inorganic materials 0.000 claims description 3
- 230000000149 penetrating effect Effects 0.000 claims description 2
- 238000003825 pressing Methods 0.000 claims description 2
- 230000001737 promoting effect Effects 0.000 claims 1
- 239000003039 volatile agent Substances 0.000 claims 1
- 230000006835 compression Effects 0.000 abstract 2
- 238000007906 compression Methods 0.000 abstract 2
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 8
- 239000000463 material Substances 0.000 description 7
- 229910052709 silver Inorganic materials 0.000 description 7
- 239000004332 silver Substances 0.000 description 7
- 238000010438 heat treatment Methods 0.000 description 5
- 238000005304 joining Methods 0.000 description 5
- 239000000919 ceramic Substances 0.000 description 4
- 239000000470 constituent Substances 0.000 description 3
- 239000011261 inert gas Substances 0.000 description 3
- 238000009766 low-temperature sintering Methods 0.000 description 3
- 239000002245 particle Substances 0.000 description 3
- 238000005496 tempering Methods 0.000 description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- 235000019013 Viburnum opulus Nutrition 0.000 description 2
- 244000071378 Viburnum opulus Species 0.000 description 2
- 230000003213 activating effect Effects 0.000 description 2
- 210000000078 claw Anatomy 0.000 description 2
- 238000005056 compaction Methods 0.000 description 2
- 230000006378 damage Effects 0.000 description 2
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 2
- 229910052737 gold Inorganic materials 0.000 description 2
- 239000010931 gold Substances 0.000 description 2
- BDAGIHXWWSANSR-UHFFFAOYSA-N methanoic acid Natural products OC=O BDAGIHXWWSANSR-UHFFFAOYSA-N 0.000 description 2
- 239000000203 mixture Substances 0.000 description 2
- 238000005476 soldering Methods 0.000 description 2
- 239000002904 solvent Substances 0.000 description 2
- OSWFIVFLDKOXQC-UHFFFAOYSA-N 4-(3-methoxyphenyl)aniline Chemical compound COC1=CC=CC(C=2C=CC(N)=CC=2)=C1 OSWFIVFLDKOXQC-UHFFFAOYSA-N 0.000 description 1
- 238000005299 abrasion Methods 0.000 description 1
- 230000000712 assembly Effects 0.000 description 1
- 238000000429 assembly Methods 0.000 description 1
- 230000002146 bilateral effect Effects 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 239000004568 cement Substances 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 238000005336 cracking Methods 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 230000001419 dependent effect Effects 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 230000001066 destructive effect Effects 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 230000009189 diving Effects 0.000 description 1
- 235000019253 formic acid Nutrition 0.000 description 1
- 238000000462 isostatic pressing Methods 0.000 description 1
- 230000033001 locomotion Effects 0.000 description 1
- 238000002844 melting Methods 0.000 description 1
- 230000008018 melting Effects 0.000 description 1
- 238000001465 metallisation Methods 0.000 description 1
- 230000002028 premature Effects 0.000 description 1
- 238000003672 processing method Methods 0.000 description 1
- 238000005096 rolling process Methods 0.000 description 1
- 229920006395 saturated elastomer Polymers 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 229910000679 solder Inorganic materials 0.000 description 1
- 238000005507 spraying Methods 0.000 description 1
- 230000003068 static effect Effects 0.000 description 1
- 238000011282 treatment Methods 0.000 description 1
- 239000012855 volatile organic compound Substances 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
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- H01L24/33—Structure, shape, material or disposition of the layer connectors after the connecting process of a plurality of layer connectors
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- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
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- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/29101—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
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- H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
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- H01L2224/29299—Base material
- H01L2224/293—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/29338—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
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- H01L2224/321—Disposition
- H01L2224/32135—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
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- H01L2224/4847—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
- H01L2224/48472—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01082—Lead [Pb]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/014—Solder alloys
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/102—Material of the semiconductor or solid state bodies
- H01L2924/1025—Semiconducting materials
- H01L2924/10251—Elemental semiconductors, i.e. Group IV
- H01L2924/10253—Silicon [Si]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/1901—Structure
- H01L2924/1904—Component type
- H01L2924/19041—Component type being a capacitor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/1901—Structure
- H01L2924/1904—Component type
- H01L2924/19043—Component type being a resistor
Definitions
- the invention relates to a method for creating a high-temperature and temperature-resistant connection of a module semiconductor and a semiconductor device with a temperature-applying method.
- a complex step in the production of sintered compounds as described for example in DE 10 2006 033 073 B3 of the Applicant, are in the actual sintering (the so-called final sintering) required pressures of more than 30 MPa, by a special apparatus have to be applied for a few seconds to a few minutes.
- the invention is based on the finding that by selecting a suitable metal powder suspension by activating this, either by local, low pressure of for example 5 MPa or by heating to z. B. 25O 0 C, the sintering process can be initiated so far that a transport-resistant fixation for processing by further manufacturing steps takes place.
- an electrical component with metallic contact surfaces with either a silver or a gold surface by materially joined to a substrate material in several stages of production, without a critical sintering pressure is applied.
- circuit substrate can be used as a substrate material, such as.
- a substrate material such as.
- organic printed circuit boards PCB, ceramic circuit boards, DCB, metal core circuit boards, IMS or conductor leadframes, stamped grid, hybrid ceramic circuit carrier, etc.
- the electrotechnical component can be an inexhaustible Halbeiterbauelement or a gemoldetes, d. H. be cased semiconductor device.
- Electrical contact terminals SMD-B auimplantation or the like can also be connected to each other with the cohesive joining method according to the invention.
- connection tact-fast ie when heated for a few seconds.
- Fixing and sintering are separate processes. The fixing takes place predominantly by a clawing in the surface of the joining partners or the silver joining layers.
- the subsequent sintering is carried out without pressure in a heating furnace at temperatures between 170 ° C to 300 ° C, so it may be easily inserted in a transport line for components.
- the atmosphere for certain metal suspension layers can optionally be adjusted with an inert or reactive gas. Nitrogen is suitable as the inert gas, for example, and forming gas or inert gas saturated with formic acid can be used as the reactive gas.
- FIG. 1 shows a metallized device placed over a precoated and dried metal suspension layer.
- FIG. 3 shows the elements of FIG. 2 after an unpressurised temperature control step, which ensures preferably complete volume sintering, FIG.
- FIG. 4 shows a lower and further metallized component on a previously applied and dried metal suspension layer as in Fig. 1,
- FIG. 6 shows the elements of FIG. 5, wherein the contact tab with the other elements is fixed by low pressure
- FIG. 7 shows the elements of FIG. 6 after a pressure-free tempering step, which ensures a preferably complete volume sintering of all fixed contact positions
- a substrate material or a chip backside, or in a preferred embodiment on both surfaces to be joined, is applied in a uniform layer thickness by means of a layer containing silver particles, preferably with a stencil printer. This is done selectively at the points where the device is to be placed or, if applied to the chip, a full surface.
- Other application techniques, in particular spraying, are conceivable.
- diving or spin-on of a silver particle solution would cause problems with layer-wide variance.
- the layer After application, the layer is dried and freed from the volatile organic compounds. Temperatures of up to 150 0 C support the process to ensure high clock rates. The dried layer produced thereby has a large porosity and a large roughness.
- the electrotechnical component is brought to a predetermined position by a component gripping and depositing device and unilateral or bilateral silver layers applied to the components are pressed together by the force applied during the application and clawed together. This is a short 0.1 to 3 second placement process, with the required force only enough to reshape the rough surface and claw each other.
- the bracket by Verkrallen does not have to meet the requirements for later use but only be so strong that during the process of locomotion in the manufacture of the components no longer slip.
- the two-dimensional clawing of the rough dried metal layer in a silver or gold surface provides for easy adhesion.
- a snowball sticks to a cement wall, or even snow, when a snowball is formed.
- the adhesion can be improved again by increasing the temperature up to, for example, 150 ° C. In the example "snow" this would be equivalent to a wet snow.
- Step 4 In a fourth step, the component thus fixed is finally subjected to a subsequent heat process without further pressure, wherein a diffusion of the silver atoms into the interface of the joining partner and vice versa takes place, so that the desired high temperature and temperature change resistant, for motor vehicle applications also stable connection over many years.
- FIG. 1 shows a pre-metallized component which is precoated with an example of about 50 micrometers and at a temperature of about 50 micrometers. temperature of less than 140 ° C for a few minutes (preferably 1-3 minutes) dried metal suspension layer is placed. A suitable pre-compaction of the layer in order to store it better, and to avoid abrasion, may have already taken place on the layer before the component is fixed.
- a layer produced in the same or a similar way - even in order to use it as similar to a pre-metallization - may also have already been sintered. It is sufficient if a layer still consists only of dried, non-sintered paste / suspension.
- a pressure of 1-10 MPa, preferably 2-6 MPa, and herein more preferably for a second less than 5 MPa can be exercised.
- Fig. 3 shows the elements of FIG . 2 after a non-pressurized tempering, at paste-dependent temperatures of typically more than 230 0 C, which ensures a preferably complete volume sintering. Reactive process gases can accelerate sintering.
- Figs. 4 to 7 show, as representative of many possible elements, a contact tab is fixed by low pressure with the assembly in the same way.
- the erfmdungshacke method for creating a high-temperature and tempe- ratur pizzafesten connection of a module semiconductor and a semiconductor device with a temperaturbeetzier waveden method in which a metal powder suspension is applied to the areas of the individual semiconductor devices to be joined later, the suspension layer with outgassing of the volatile constituents and dried to form a porous layer, then precompressed the porous layer, without a complete, the Sus- pensionstik penetrating sintering takes place, wherein to obtain a solid electrically and thermally well-conductive compound of a semiconductor device on a connection partner from the group: substrate, further semiconductor or circuit carrier, the compound is a sintered compound produced without pressing pressure by increasing the temperature, which consists of a dried metal powder suspension consists, in a Vorverdichtungsuze with the connection partner has undergone a first transport-resistant contact with the connection partner, and was solidified under temperature Ausausung unpressurized in a preferred embodiment can be extended daurch that more than one side of
- the atmosphere in a sealed chamber
- the atmosphere may be enriched with an inert or reactive gas during heating.
- the inert gas may preferably contain nitrogen as a main component.
- the reactive gas proposed is one with a predominant constituent of forming gas.
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Die Bonding (AREA)
- Powder Metallurgy (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
- Filtering Materials (AREA)
Abstract
Description
Claims
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2011549430A JP5731990B2 (ja) | 2009-02-13 | 2010-02-04 | 半導体モジュールと接続相手との間に高温および温度変化に強い接続を形成する方法 |
CN201080016442.5A CN102396057B (zh) | 2009-02-13 | 2010-02-04 | 用于在半导体模块和连接配合件之间产生耐高温和耐温度变化的连接的方法 |
EP10710533A EP2396814A2 (de) | 2009-02-13 | 2010-02-04 | Verfahren zur schaffung einer hochtemperatur- und temperaturwechselfesten verbindung eines baugruppen-halbleiters und eines halbleiterbausteins mit einem temperaturbeaufschlagenden verfahren |
US13/148,848 US9287232B2 (en) | 2009-02-13 | 2010-02-04 | Method for producing a high-temperature and temperature-change resistant connection between a semiconductor module and a connection partner |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE102009008926.8 | 2009-02-13 | ||
DE102009008926.8A DE102009008926B4 (de) | 2009-02-13 | 2009-02-13 | Verfahren zur Schaffung einer hochtemperatur- und temperaturwechselfesten Verbindung eines Halbleiterbausteins mit einem Verbindungspartner und einer Kontaktlasche unter Verwendung eines temperaturbeaufschlagenden Verfahrens |
Publications (2)
Publication Number | Publication Date |
---|---|
WO2010091660A2 true WO2010091660A2 (de) | 2010-08-19 |
WO2010091660A3 WO2010091660A3 (de) | 2011-06-03 |
Family
ID=42271896
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/DE2010/000127 WO2010091660A2 (de) | 2009-02-13 | 2010-02-04 | Verfahren zur schaffung einer hochtemperatur- und temperaturwechselfesten verbindung eines baugruppen-halbleiters und eines halbleiterbausteins mit einem temperaturbeaufschlagenden verfahren |
Country Status (6)
Country | Link |
---|---|
US (1) | US9287232B2 (de) |
EP (1) | EP2396814A2 (de) |
JP (1) | JP5731990B2 (de) |
CN (1) | CN102396057B (de) |
DE (1) | DE102009008926B4 (de) |
WO (1) | WO2010091660A2 (de) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2013045369A1 (de) * | 2011-09-30 | 2013-04-04 | Osram Opto Semiconductors Gmbh | Bauelement und verfahren zum herstellen dieses bauelementes mittels drucklosen sinternprozesses durch einwirken von wärme und ultraschall |
DE102015210061A1 (de) * | 2015-06-01 | 2016-12-01 | Siemens Aktiengesellschaft | Verfahren zur elektrischen Kontaktierung eines Bauteils und Bauteilmodul |
DE102016108000B3 (de) * | 2016-04-29 | 2016-12-15 | Danfoss Silicon Power Gmbh | Verfahren zum stoffschlüssigen Verbinden einer ersten Komponente eines Leistungshalbleitermoduls mit einer zweiten Komponente eines Leistungshalbleitermoduls |
WO2022200748A1 (fr) * | 2021-03-26 | 2022-09-29 | Safran Electronics & Defense | Procédé pour assembler un composant électronique à un substrat par pressage au moyen d'un matériau de frittage |
Families Citing this family (16)
Publication number | Priority date | Publication date | Assignee | Title |
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DE102012207652A1 (de) | 2012-05-08 | 2013-11-14 | Robert Bosch Gmbh | Zweistufiges Verfahren zum Fügen eines Halbleiters auf ein Substrat mit Verbindungsmaterial auf Silberbasis |
US8835299B2 (en) | 2012-08-29 | 2014-09-16 | Infineon Technologies Ag | Pre-sintered semiconductor die structure |
JP5664625B2 (ja) * | 2012-10-09 | 2015-02-04 | 三菱マテリアル株式会社 | 半導体装置、セラミックス回路基板及び半導体装置の製造方法 |
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DE102014104272A1 (de) * | 2014-03-26 | 2015-10-01 | Heraeus Deutschland GmbH & Co. KG | Träger und Clip jeweils für ein Halbleiterelement, Verfahren zur Herstellung, Verwendung und Sinterpaste |
DE102014206606A1 (de) * | 2014-04-04 | 2015-10-08 | Siemens Aktiengesellschaft | Verfahren zum Montieren eines elektrischen Bauelements auf einem Substrat |
DE102014114093B4 (de) * | 2014-09-29 | 2017-03-23 | Danfoss Silicon Power Gmbh | Verfahren zum Niedertemperatur-Drucksintern |
DE102014114097B4 (de) | 2014-09-29 | 2017-06-01 | Danfoss Silicon Power Gmbh | Sinterwerkzeug und Verfahren zum Sintern einer elektronischen Baugruppe |
DE102014114096A1 (de) | 2014-09-29 | 2016-03-31 | Danfoss Silicon Power Gmbh | Sinterwerkzeug für den Unterstempel einer Sintervorrichtung |
TWI655693B (zh) * | 2017-02-28 | 2019-04-01 | 日商京瓷股份有限公司 | 半導體裝置之製造方法 |
DE102017113153B4 (de) * | 2017-06-14 | 2022-06-15 | Infineon Technologies Ag | Elektronisches Gerät mit Chip mit gesintertem Oberflächenmaterial |
EP3787012A4 (de) * | 2018-04-27 | 2022-05-11 | Nitto Denko Corporation | Herstellungsverfahren für halbleiterbauelement |
JP7143156B2 (ja) | 2018-04-27 | 2022-09-28 | 日東電工株式会社 | 半導体装置製造方法 |
DE102021116053A1 (de) | 2021-06-22 | 2022-12-22 | Danfoss Silicon Power Gmbh | Elektrischer Leiter, elektronische Baugruppe mit elektrischem Leiter und Verfahren zum Herstellen einer elektronischen Baugruppe mit einem elektrischen Leiter |
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EP4224521A1 (de) | 2022-02-07 | 2023-08-09 | Siemens Aktiengesellschaft | Halbleiteranordnung mit einem halbleiterelement mit einem durch thermisches spritzen hergestellten kontaktierungselement sowie ein verfahren zur herstellung desselben |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE102006033073B3 (de) | 2006-07-14 | 2008-02-14 | Danfoss Silicon Power Gmbh | Verfahren zur Schaffung einer hitze- und stoßfesten Verbindung des Baugruppen-Halbleiters und zur Drucksinterung vorbereiteter Halbleiterbaustein |
Family Cites Families (24)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6077178A (ja) * | 1983-09-30 | 1985-05-01 | 株式会社東芝 | 窒化物セラミックス接合体およびその製造方法 |
IN168174B (de) * | 1986-04-22 | 1991-02-16 | Siemens Ag | |
DE3777995D1 (de) * | 1986-12-22 | 1992-05-07 | Siemens Ag | Verfahren zur befestigung von elektronischen bauelementen auf einem substrat, folie zur durchfuehrung des verfahrens und verfahren zur herstellung der folie. |
JPS6412404A (en) * | 1987-07-06 | 1989-01-17 | Hitachi Ltd | Conductor material |
US4902648A (en) * | 1988-01-05 | 1990-02-20 | Agency Of Industrial Science And Technology | Process for producing a thermoelectric module |
US6069380A (en) * | 1997-07-25 | 2000-05-30 | Regents Of The University Of Minnesota | Single-electron floating-gate MOS memory |
US6930451B2 (en) * | 2001-01-16 | 2005-08-16 | Samsung Sdi Co., Ltd. | Plasma display and manufacturing method thereof |
US7296727B2 (en) * | 2001-06-27 | 2007-11-20 | Matsushita Electric Industrial Co., Ltd. | Apparatus and method for mounting electronic components |
EP1280196A1 (de) * | 2001-07-18 | 2003-01-29 | Abb Research Ltd. | Verfahren zum Befestigen von elektronischen Bauelementen auf Substraten |
KR20050084845A (ko) * | 2002-10-11 | 2005-08-29 | 치엔 민 성 | 탄소질 열 확산기 및 관련 방법 |
US7247588B2 (en) * | 2002-11-22 | 2007-07-24 | Saint-Gobain Ceramics & Plastics, Inc. | Zirconia toughened alumina ESD safe ceramic composition, component, and methods for making same |
US20050127134A1 (en) | 2003-09-15 | 2005-06-16 | Guo-Quan Lu | Nano-metal composite made by deposition from colloidal suspensions |
WO2005079353A2 (en) | 2004-02-18 | 2005-09-01 | Virginia Tech Intellectual Properties, Inc. | Nanoscale metal paste for interconnect and method of use |
JP2006202586A (ja) * | 2005-01-20 | 2006-08-03 | Nissan Motor Co Ltd | 接合方法及び接合構造 |
JP4770533B2 (ja) | 2005-05-16 | 2011-09-14 | 富士電機株式会社 | 半導体装置の製造方法および半導体装置 |
JP4638382B2 (ja) * | 2006-06-05 | 2011-02-23 | 田中貴金属工業株式会社 | 接合方法 |
JP2008010703A (ja) * | 2006-06-30 | 2008-01-17 | Fuji Electric Holdings Co Ltd | 半導体装置の部品間接合方法 |
JP2008153470A (ja) | 2006-12-18 | 2008-07-03 | Renesas Technology Corp | 半導体装置および半導体装置の製造方法 |
WO2008081758A1 (ja) | 2006-12-28 | 2008-07-10 | Tokuyama Corporation | 窒化アルミニウムメタライズド基板の製造方法 |
JP4872663B2 (ja) * | 2006-12-28 | 2012-02-08 | 株式会社日立製作所 | 接合用材料及び接合方法 |
JP5151150B2 (ja) * | 2006-12-28 | 2013-02-27 | 株式会社日立製作所 | 導電性焼結層形成用組成物、これを用いた導電性被膜形成法および接合法 |
JP4873160B2 (ja) * | 2007-02-08 | 2012-02-08 | トヨタ自動車株式会社 | 接合方法 |
US8555491B2 (en) | 2007-07-19 | 2013-10-15 | Alpha Metals, Inc. | Methods of attaching a die to a substrate |
DE102007035788A1 (de) | 2007-07-31 | 2009-02-05 | Robert Bosch Gmbh | Waferfügeverfahren, Waferverbund sowie Chip |
-
2009
- 2009-02-13 DE DE102009008926.8A patent/DE102009008926B4/de active Active
-
2010
- 2010-02-04 WO PCT/DE2010/000127 patent/WO2010091660A2/de active Application Filing
- 2010-02-04 JP JP2011549430A patent/JP5731990B2/ja active Active
- 2010-02-04 US US13/148,848 patent/US9287232B2/en active Active
- 2010-02-04 CN CN201080016442.5A patent/CN102396057B/zh active Active
- 2010-02-04 EP EP10710533A patent/EP2396814A2/de not_active Ceased
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE102006033073B3 (de) | 2006-07-14 | 2008-02-14 | Danfoss Silicon Power Gmbh | Verfahren zur Schaffung einer hitze- und stoßfesten Verbindung des Baugruppen-Halbleiters und zur Drucksinterung vorbereiteter Halbleiterbaustein |
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2013045369A1 (de) * | 2011-09-30 | 2013-04-04 | Osram Opto Semiconductors Gmbh | Bauelement und verfahren zum herstellen dieses bauelementes mittels drucklosen sinternprozesses durch einwirken von wärme und ultraschall |
DE102015210061A1 (de) * | 2015-06-01 | 2016-12-01 | Siemens Aktiengesellschaft | Verfahren zur elektrischen Kontaktierung eines Bauteils und Bauteilmodul |
US11037862B2 (en) | 2015-06-01 | 2021-06-15 | Siemens Aktiengesellschaft | Method for electrically contacting a component by galvanic connection of an open-pored contact piece, and corresponding component module |
DE102016108000B3 (de) * | 2016-04-29 | 2016-12-15 | Danfoss Silicon Power Gmbh | Verfahren zum stoffschlüssigen Verbinden einer ersten Komponente eines Leistungshalbleitermoduls mit einer zweiten Komponente eines Leistungshalbleitermoduls |
US10438924B2 (en) | 2016-04-29 | 2019-10-08 | Danfoss Silicon Power Gmbh | Method for cohesively connecting a first component of a power semiconductor module to a second component of a power semiconductor module |
WO2022200748A1 (fr) * | 2021-03-26 | 2022-09-29 | Safran Electronics & Defense | Procédé pour assembler un composant électronique à un substrat par pressage au moyen d'un matériau de frittage |
FR3121278A1 (fr) * | 2021-03-26 | 2022-09-30 | Safran Electronics & Defense | Procédé pour assembler un composant électronique à un substrat par pressage |
Also Published As
Publication number | Publication date |
---|---|
US9287232B2 (en) | 2016-03-15 |
JP5731990B2 (ja) | 2015-06-10 |
CN102396057B (zh) | 2014-04-02 |
DE102009008926B4 (de) | 2022-06-15 |
WO2010091660A3 (de) | 2011-06-03 |
CN102396057A (zh) | 2012-03-28 |
EP2396814A2 (de) | 2011-12-21 |
JP2012517704A (ja) | 2012-08-02 |
US20120037688A1 (en) | 2012-02-16 |
DE102009008926A1 (de) | 2010-08-19 |
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