WO2010059131A1 - Procédé de libération au moins partielle d'une couche épitaxiale - Google Patents
Procédé de libération au moins partielle d'une couche épitaxiale Download PDFInfo
- Publication number
- WO2010059131A1 WO2010059131A1 PCT/SG2009/000435 SG2009000435W WO2010059131A1 WO 2010059131 A1 WO2010059131 A1 WO 2010059131A1 SG 2009000435 W SG2009000435 W SG 2009000435W WO 2010059131 A1 WO2010059131 A1 WO 2010059131A1
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- Prior art keywords
- layer
- sacrificial layer
- epitaxial
- epitaxial layer
- patterned sacrificial
- Prior art date
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- 238000000034 method Methods 0.000 title claims abstract description 73
- 239000000758 substrate Substances 0.000 claims abstract description 71
- 239000000463 material Substances 0.000 claims abstract description 34
- 238000005530 etching Methods 0.000 claims abstract description 26
- 208000012868 Overgrowth Diseases 0.000 claims abstract description 10
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 claims description 104
- 229910002601 GaN Inorganic materials 0.000 claims description 99
- 238000002248 hydride vapour-phase epitaxy Methods 0.000 claims description 14
- 150000004767 nitrides Chemical class 0.000 claims description 14
- 229910052594 sapphire Inorganic materials 0.000 claims description 14
- 239000010980 sapphire Substances 0.000 claims description 14
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 13
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 11
- 230000003287 optical effect Effects 0.000 claims description 11
- 229910052710 silicon Inorganic materials 0.000 claims description 11
- 239000010703 silicon Substances 0.000 claims description 11
- PMHQVHHXPFUNSP-UHFFFAOYSA-M copper(1+);methylsulfanylmethane;bromide Chemical compound Br[Cu].CSC PMHQVHHXPFUNSP-UHFFFAOYSA-M 0.000 claims description 8
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 7
- 238000005229 chemical vapour deposition Methods 0.000 claims description 7
- 238000001451 molecular beam epitaxy Methods 0.000 claims description 7
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 7
- 238000001127 nanoimprint lithography Methods 0.000 claims description 6
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 claims description 6
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 claims description 5
- 239000011148 porous material Substances 0.000 claims description 5
- 230000003746 surface roughness Effects 0.000 claims description 5
- GWEVSGVZZGPLCZ-UHFFFAOYSA-N Titan oxide Chemical compound O=[Ti]=O GWEVSGVZZGPLCZ-UHFFFAOYSA-N 0.000 claims description 4
- RNQKDQAVIXDKAG-UHFFFAOYSA-N aluminum gallium Chemical compound [Al].[Ga] RNQKDQAVIXDKAG-UHFFFAOYSA-N 0.000 claims description 4
- NWAIGJYBQQYSPW-UHFFFAOYSA-N azanylidyneindigane Chemical compound [In]#N NWAIGJYBQQYSPW-UHFFFAOYSA-N 0.000 claims description 4
- 229910052738 indium Inorganic materials 0.000 claims description 4
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 claims description 4
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- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 claims description 4
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- QPJSUIGXIBEQAC-UHFFFAOYSA-N n-(2,4-dichloro-5-propan-2-yloxyphenyl)acetamide Chemical compound CC(C)OC1=CC(NC(C)=O)=C(Cl)C=C1Cl QPJSUIGXIBEQAC-UHFFFAOYSA-N 0.000 description 12
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- 229910052782 aluminium Inorganic materials 0.000 description 4
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 4
- 238000004630 atomic force microscopy Methods 0.000 description 4
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- MUBZPKHOEPUJKR-UHFFFAOYSA-N Oxalic acid Chemical compound OC(=O)C(O)=O MUBZPKHOEPUJKR-UHFFFAOYSA-N 0.000 description 3
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- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 2
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- AWGBKZRMLNVLAF-UHFFFAOYSA-N 3,5-dibromo-n,2-dihydroxybenzamide Chemical compound ONC(=O)C1=CC(Br)=CC(Br)=C1O AWGBKZRMLNVLAF-UHFFFAOYSA-N 0.000 description 1
- VHUUQVKOLVNVRT-UHFFFAOYSA-N Ammonium hydroxide Chemical compound [NH4+].[OH-] VHUUQVKOLVNVRT-UHFFFAOYSA-N 0.000 description 1
- 229910004613 CdTe Inorganic materials 0.000 description 1
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- XPDWGBQVDMORPB-UHFFFAOYSA-N Fluoroform Chemical compound FC(F)F XPDWGBQVDMORPB-UHFFFAOYSA-N 0.000 description 1
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 1
- 229910000530 Gallium indium arsenide Inorganic materials 0.000 description 1
- 229910000673 Indium arsenide Inorganic materials 0.000 description 1
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 1
- 229910000147 aluminium phosphate Inorganic materials 0.000 description 1
- 238000002048 anodisation reaction Methods 0.000 description 1
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- 238000001657 homoepitaxy Methods 0.000 description 1
- 238000011065 in-situ storage Methods 0.000 description 1
- RPQDHPTXJYYUPQ-UHFFFAOYSA-N indium arsenide Chemical compound [In]#[As] RPQDHPTXJYYUPQ-UHFFFAOYSA-N 0.000 description 1
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- 238000013532 laser treatment Methods 0.000 description 1
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- OGIDPMRJRNCKJF-UHFFFAOYSA-N titanium oxide Inorganic materials [Ti]=O OGIDPMRJRNCKJF-UHFFFAOYSA-N 0.000 description 1
- 230000001052 transient effect Effects 0.000 description 1
- 238000011282 treatment Methods 0.000 description 1
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- 229910052984 zinc sulfide Inorganic materials 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/0237—Materials
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02439—Materials
- H01L21/02455—Group 13/15 materials
- H01L21/02458—Nitrides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02538—Group 13/15 materials
- H01L21/0254—Nitrides
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02612—Formation types
- H01L21/02617—Deposition types
- H01L21/02636—Selective deposition, e.g. simultaneous growth of mono- and non-monocrystalline semiconductor materials
- H01L21/02639—Preparation of substrate for selective deposition
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02612—Formation types
- H01L21/02617—Deposition types
- H01L21/02636—Selective deposition, e.g. simultaneous growth of mono- and non-monocrystalline semiconductor materials
- H01L21/02639—Preparation of substrate for selective deposition
- H01L21/02642—Mask materials other than SiO2 or SiN
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02612—Formation types
- H01L21/02617—Deposition types
- H01L21/02636—Selective deposition, e.g. simultaneous growth of mono- and non-monocrystalline semiconductor materials
- H01L21/02647—Lateral overgrowth
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02656—Special treatments
- H01L21/02664—Aftertreatments
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0093—Wafer bonding; Removal of the growth substrate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0062—Processes for devices with an active region comprising only III-V compounds
- H01L33/0066—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound
- H01L33/007—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound comprising nitride compounds
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/20—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S977/00—Nanotechnology
- Y10S977/70—Nanostructure
- Y10S977/734—Fullerenes, i.e. graphene-based structures, such as nanohorns, nanococoons, nanoscrolls or fullerene-like structures, e.g. WS2 or MoS2 chalcogenide nanotubes, planar C3N4, etc.
- Y10S977/742—Carbon nanotubes, CNTs
Definitions
- the invention broadly relates to a method of at least partially releasing an epitaxial layer.
- semiconductor materials can be in the form of epitaxial layer materials suitable for a range of potential applications including ultraviolet to visible optoelectronics (e.g. LEDs and lasers) and high temperature electronics (e.g. transistors).
- Group Ul-V nitride semiconductor materials include aluminum nitride (AIN), gallium nitride (GaN), and indium nitride (InN) and their related ternary and quaternary alloys such as aluminum gallium nitride (AIGaN) and indium gallium nitride (InGaN).
- GaN a direct-bandgap semiconductor material of wurtzite crystal structure with a wide (3.4 eV) band gap
- optoelectronics e.g. LEDs from UV to green-blue and white for solid state lighting, laser diodes
- high power and high frequency electronic devices e.g. High Electron Mobility Transistors (HEMT)
- HEMT High Electron Mobility Transistors
- GaN has the advantages of being mechanically hard and chemically inert. However, due to the high melting temperature and the high equilibrium vapor pressure of nitrogen (N 2 ) at the growth temperature to synthesize Hl-V nitrides, large bulk single crystals for homoepitaxy are costly to produce in. high temperature, high pressure conditions and are currently limited to 2 inch wafers. Crystalline GaN is usually grown epitaxially on substrates of dissimilar materials.
- Si silicon
- SiC silicon carbide
- sapphire GaN fiims are deposited via methods such as, but are not limited to, metal-organic chemical vapor deposition (MOCVD), molecular beam epitaxy (MBE) or hydride vapour phase epitaxy (HVPE).
- MOCVD metal-organic chemical vapor deposition
- MBE molecular beam epitaxy
- HVPE hydride vapour phase epitaxy
- the physical characteristics of sapphire such as being electrical insulating and its relatively poor thermal conductivity, render it unsuitable for device fabrication.
- these substrates are used for commercial products, there are still issues which degrade the quality of epilayers grown on them.
- the epilayers exhibit a crystalline defect level of around 10 ⁇ ⁇ 10 9 cm "2 due to lattice and thermal mismatches. This high level of crystalline defects is an obstacle to device performance. For example, it leads to low internal light emission efficiency and short life times.
- One removal technique of a GaN epiiayer structure from the sapphire substrate involves the use of a laser to lift off the GaN film that is epitaxially grown on a sapphire substrate.
- a laser beam irradiates the epiiayer through the backside of the substrate, which locally heats the epiiayer near the substrate interface and decomposes the epiiayer into its constituents, Ga metal and nitrogen gas. After irradiation, the epiiayer and the substrate can be separated by heating above the melting point of Ga metal of 30 degrees Celsius.
- an intense lightbeam in the UV wavelength range is required, which can only be produced by an expensive high power laser, such as an excimer laser.
- the limited beam spot size of a laser means that the beam has to be scanned across a relatively large application area, which can generate transient spatial nonuniformities in heating and thermal expansion across the wafer, thereby cracking the epiiayer during laser lift-off.
- the relatively expensive laser equipment and short life-time of the laser equipment with low production efficiency render this technique inappropriate for large quantity production.
- high energy laser treatment can also cause surface roughness and interdiffusion of aluminum and oxygen into GaN and post polishing is usually required to achieve the desired surface roughness and film thickness.
- the high energy laser in the process increases the cost of the product.
- a second removal method of a GaN epilayer structure from the sapphire substrate is the technique of Epitaxial Lift-Off, which involves the use of a sacrificial layer to be disposed . between the epilayer layer and the substrate.
- a typical sacrificial layer is made of a compound that is chemically distinct from the remaining layers and which can be selectively etched, removed or decomposed, thereby releasing the GaN epilayer structure from the growth substrate.
- the ELO method has the following disadvantages. Firstly, it requires the use of a material system that is compatible with the epitaxial growth of GaN, and which can be selectively removed by chemical etching. While there are some reports of using • sacrificial layers, for example, GaN / ZnO (as sacrificial layer) / sapphire, or GaN / CrN (as sacrificial layer) / sapphire, however, the material quality is far less optimized. Secondly, the formation of bubbles at the etch site due to a redox reaction during etch layer dissolution may cause the thin GaN layer above to warp and crack, which affects its electrical and optical characteristics. The use of electrochemical etching technique in ELO resolves the bubble formation issue,, as reduction is carried out at a remote electrode (cathode).
- One variation of the above method comprises the step of applying an electrochemical potential between the layered material/substrate and a counter electrode to oxidize and dissolve a thin etch layer positioned between the film and substrate, which frees the layered material from the substrate.
- PEC Photoelectrochemical
- the PEC processes reported to-date result in a rough etched interface with the formation of facet islands or whiskers, thus, post etching or polishing process is needed.
- the electrolytes usually HCI or KOH used in the PEC etching attack the structure layers near the threading dislocations as well, resulting in a damaged lift-off film on the top surface.
- the etching selectivity between the sacrificial layer and structured layers is poor, which makes it difficult to lift-off of the electrically driven device structure with doped GaN and active layers in it.
- a method of at least partially releasing an epitaxial layer of a material from a substrate comprising the steps of: forming a patterned sacrificial layer on the substrate such that the substrate is partially exposed and partially covered by the sacrificial layer; growing the epitaxial layer on the patterned sacrificial layer by nano- epitaxial lateral overgrowth .such that the epitaxial layer is formed above an intermediate layer comprising the patterned sacrificial layer and said material; and selectively etching the patterned sacrificial layer such that the epitaxial layer is at least partially released from the substrate.
- the patterned sacrificial layer may be selectively etched such that the epitaxial layer debonds from the template layer for lift-off.
- the epitaxial layer may debond at an interface between the template layer and nano-structures of said material formed on the template layer as part of the nano-epitaxial growth of the epitaxial layer.
- the patterned sacrificial layer may be selectively etched such that the epitaxial layer is undercut or such that a cavity is formed underneath the epitaxial layer.
- the substrate may comprise a template layer for promoting the non-epitaxial overgrowth.
- the template layer and epitaxial layer may comprise a Group Hl-V nitride; or a Group Hl-V nitride ternary or quaternary alloy.
- the Group Hl-V nitride may comprise one or more of a group consisting of aluminum nitride (AIN), gallium nitride (GaN), indium nitride (InN), aluminum gallium nitride (AIGaN) and indium gallium nitride (InGaN).
- AIN aluminum nitride
- GaN gallium nitride
- InN aluminum gallium nitride
- AIGaN aluminum gallium nitride
- InGaN indium gallium nitride
- the substrate may comprise one or more of a group consisting of silicon (Si), silicon carbide (SiC) and sapphire.
- the template layer may be formed by a method comprising one or more of a group consisting of metal-organic chemical vapor deposition (MOCVD), molecular beam epitaxy (MBE) or hydride vapour phase epitaxy (HVPE).
- MOCVD metal-organic chemical vapor deposition
- MBE molecular beam epitaxy
- HVPE hydride vapour phase epitaxy
- the patterned sacrificial layer may be formed by a method comprising one or more of a group consisting of plasma enhanced chemical vapor deposition (PECVD), sputtering or spin-o ⁇ giass.
- PECVD plasma enhanced chemical vapor deposition
- the patterned sacrificial layer may comprise one or more of a group consisting of silicon dioxide (SiO 2 ), silicon nitride (Si 3 N 4 ), and titanium oxide (TiO 2 ).
- the patterned sacrificial layer may be patterned by a method comprising one or more of a group consisting of nanoimprint lithography (NIL), use of anodized aluminum oxide (AAO) as an etch mask, electron beam lithography and interference lithography.
- NIL nanoimprint lithography
- AAO anodized aluminum oxide
- the nano-epitaxial lateral overgrowth may be formed by a method comprising one or more of a group consisting of metal-organic chemical vapor deposition (MOCVD), molecular beam epitaxy (MBE) or hydride vapour phase epitaxy (HVPE).
- MOCVD metal-organic chemical vapor deposition
- MBE molecular beam epitaxy
- HVPE hydride vapour phase epitaxy
- the patterned sacrificial layer may comprise a plurality of pores, dots or strips.
- the method may further comprise,- prior to etching the patterned sacrificial layer, forming trenches in the substrate to define mesa structures on the substrate, whereby etching of the patterned sacrificial layer in the regions of the mesa structures is facilitated.
- the step of forming the patterned sacrificial layer may comprise selecting a pattern based on desired optical characteristics of the lift-off epitaxial layer.
- the pattern may be selected to increase a surface roughness of the lift-off epitaxial layer.
- the pattern may be selected to provide a diffraction grating on a surface of the lift-off epitaxial layer.
- a device comprising an epitaxial layer at least partially released using the method as described above.
- the device may comprise an LED structure, a Laser Diode or a High Electron Mobility Transistor.
- Figures 1(a) - (d) are schematic cross-sectional diagrams illustrating the nanofabrication and growth process of a nano-epitaxial lateral overgrown (nano-ELO) GaN epitaxial layer, according to an embodiment of the present invention.
- Figure 2 is a scanning electron microscope (SEM) image of the surface morphology of a nanostructured SiO 2 sacrificial layer fabricated using an AAO layer as an etch mask.
- Figure 3 is a top-view schematic of a nanostructured sacrificial layer comprising nanopores, according to an embodiment of the present invention.
- Figure 4(a) is a the schematic cross-sectional diagram of a fabricated nano-epitaxial lateral overgrown (nano-ELO) GaN epitaxial structure, according to an embodiment of the present invention.
- Figure 4(b) is a corresponding SEM image of the schematic diagram of Figure 4(a).
- Figures 5(a) - (b) are perspective views of a self lift-off nano-ELO GaN structure, according to an embodiment of the present invention.
- Figure 6(a) is a SEM image of a de-bonded nano-ELO GaN epitaxial layer after a short period of etching.
- Figure 6(b) is a zoomed-out SEM image, of Figure 6(a).
- Figure 7(a) is an optical microscopy image of the top surface of a nano-ELO GaN epitaxial layer after immersing in 20% HF solution for 10mins.
- Figure 7(b) is an enlarged image of Figure 7(a).
- Figures 8(a) and (b) show atomic force microscopy (AFM) plan view and perspective view images respectively of the surface morphology of the debo ⁇ ded nano-ELO GaN epitaxial layer towards the nanostructured patterned sacrificial layer.
- AFM atomic force microscopy
- Figure 9 is photoiuminescence (PL) mapping image of a lifted-off nano-ELO GaN epitaxial layer on a silicon transfer substrate.
- Figures 10(a) and (b) are perspective views of a self lift-off nano-ELO GaN structure, according to another alternative embodiment of the present invention.
- Figures 11 (a) and (b) are perspective views of a self lift-off nano-ELO GaN structure, according another alternative embodiment of the present invention.
- Figures 12(a) and (b) are schematic cross-sectional diagrams of a self lift-off nano- ELO GaN structure, according to another embodiment of the present invention.
- Figure 12(c) is a top view schematic of a wafer comprising trenches, according to the embodiment described above.
- Figure 13 is a cross-sectional schematic diagram of a vertical GaN LED device.
- Figure 14 is a flow-chart illustrating a method of at least partially releasing an epitaxial layer of a material from a substrate, according to an embodiment of the present invention.
- the present invention relates to a method of at least partially releasing an epitaxial layer from foreign substrates via a combination of nano-epitaxy and wet chemical etching.
- gallium nitride GaN
- a Group Hl-V nitride compound is used in the foregoing description. It will be appreciated, however, that this invention can also be applied to other compounds, such as, but are not limited to, Group IK-V nitride compounds and their related ternary and quaternary alloys.
- AIN aluminum nitride
- InN aluminum gallium nitride
- AIGaN aluminum gallium nitride
- InGaN indium gallium nitride
- Hl-V semiconductors such as, but are not limited to, GaAs, InP, InAs, AIGaAs, InGaAs
- H-IV semiconductors such as, but are not limited to, CdTe, CdS.
- Figures 1(a) - (d) are schematic cross-sectional diagrams illustrating the nanofabrication and growth process of a nano-epitaxial lateral overgrown (nano-ELO) GaN epitaxial layer, according to an embodiment of the present invention.
- a thin layer of GaN template 104 is grown on a substrate 102.
- Suitable substrate materials include, but are not limited to, sapphire, silicon carbide (SiC) and silicon (Si).
- MOCVD metal-organic chemical vapor deposition
- MBE molecular beam epitaxy
- HVPE hydride vapour phase epitaxy
- a sacrificial layer 106 is deposited on the surface of the GaN template 104.
- Suitable sacrificial layer materials include, but are not limited to, silicon oxide (SiO 2 ), silicon nitride (Si 3 N 4 ), and titanium oxide (TiO 2 ).
- the sacrificial layer 106 is preferably deposited on the GaN template 104 via methods such as, but are not limited to, plasma enhanced chemical vapor deposition (PECVD), sputtering or spin-on glass.
- PECVD plasma enhanced chemical vapor deposition
- a nanostructured patterned sacrificial layer 108 is formed from the sacrificial layer 106 (shown in Figure 1(b)) using nanofabrication and subsequent etchingsuch that the template layer 104 is partially exposed and partially covered by the sacrificial layer 108.
- Suitable nanofabrication methods include, but are not limited to, nanoimprint lithography (NIL), use of anodized aluminum oxide (AAO) as an etch mask, electron beam lithography and interference lithography.
- the sacrificial layer 106 is created by first depositing an aluminum film (not shown), approximately 1 ⁇ m in thickness, by electron beam evaporation on the sacrificial layer 106 (shown in Figure 1(b)).
- the aluminum film forms an anodized aluminum oxide (AAO) layer via a two-step anodization process in which the aluminum fiim is first anodized at about 3°C in about*0.3M oxalic acid and subsequently subjected to wet treatment with about 5 wt % phosphoric acid (H 3 PO 4 ) for about 70 minutes to enlarge the nanopores in the AAO layer.
- AAO aluminum oxide
- CHF 3 -based inductively coupled plasma (ICP) etching conditions can then be employed to transfer the nanopores in the anodized aluminum oxide (AAO) layer onto the sacrificial layer 106.
- the AAO layer can then be removed by a suitable chemical etchant, resulting in closed packed ⁇ anopore arrays in the sacrificial layer 106 to form the nanostructured patterned sacrificial layer 108 on the surface of the GaN template 104.
- Figure 2 is a scanning electron microscope (SEM) image, designated generally as reference numeral 200, of the surface morphology of a nanostructured SiO 2 patterned sacrificial layer fabricated in accordance with an embodiment of the present invention, using an AAO layer as an etch mask.
- SEM scanning electron microscope
- Figure 3 is a top-view schematic of a nanostructured patterned sacrificial layer, designated generally as reference numeral 300, comprising nanopores, according to an embodiment of the present invention.
- the pore radius and interpore distance are designated by r and d respectively.
- Patterns (e.g. pores, stripes, dots, etc) on the nanostructured patterned sacrificial layer are advantageously in nanometer scale (i.e.: about less than 1 ⁇ m) so as to facilitate subsequent self lifting- off of an epitaxial layer and enhance light output from the epitaxial layer.
- the patterned sacrificial layer is formed by selecting a pattern based on desired optical characteristics of the lift-off epitaxial layer.
- the pattern selected can be a network of stripes which form a diffraction grating. Surface roughness can be another factor in selecting a pattern.
- a continuous GaN epitaxial layer 110 is grown by a nano-epitaxial lateral overgrown (nano-ELO) method over the nanopatterned patterned sacrificial layer 108.
- the nano-epitaxial lateral overgrowth is advantageously carried out using methods such as, but are not limited to, metal- organic chemical vapor deposition (MOCVD), molecular beam epitaxy (MBE) ' or hydride vapour phase epitaxy (HVPE).
- MOCVD metal- organic chemical vapor deposition
- MBE molecular beam epitaxy
- HVPE hydride vapour phase epitaxy
- Figure 4(a) is a schematic cross-sectional diagram of a fabricated nano- epitaxial lateral overgrown (nano-ELO) GaN epitaxial structure, designated generally as reference numeral 400, according to an embodiment of the present invention.
- the fabricated nano-epitaxial lateral overgrown (nano-ELO) GaN epitaxial structure 400 comprises a substrate 402, a GaN template 404, a nanostructured patterned sacrificial layer 408 and a nano-ELO GaN epitaxial layer 410.
- Figure 4(b) is a corresponding SEM image, designated generally as reference numeral 401 , of the schematic diagram of. Figure 4(a).
- the inset 420 is an enlarged SEM image near the nanostructured patterned sacrificial layer 408.
- Figure 5(a) is a perspective view of a self lift-off nano-ELO GaN structure, designated generally as reference numeral 500, according to an embodiment of the present invention, which comprises a substrate 502, a GaN template 504, a nanostructured patterned sacrificial layer 508 and a nano-ELO GaN epitaxial layer 510.
- the nano-ELO GaN epitaxial layer 510 is preferably bonded to a silicon substrate (not shown) using epoxy as an adhesive. When the nano-ELO GaN epitaxial layer 510 is lifted off, it is attached to the bonded silicon substrate.
- Figure 5(b) is a perspective view of a self lift-off nano-ELO GaN structure, designated generally as reference numeral 501 , according to an embodiment of the present invention, illustrating the lifting-off process at the interface between the nano-ELO GaN epitaxial layer 510 and the GaN template 504 after immersion in a suitable chemical solution.
- the nano-ELO GaN structure 500 can be immersed in suitable chemical solutions which can selectively remove the nanostructured patterned sacrificial layer 508 located between the GaN template 504 and the nano-ELO GaN epitaxial layer 510.
- HF hydrofluoric acid
- BHF to etch SiO 2 sacrificial layers
- HsPO 4 to etch Si 3 N 4 sacrificial layers
- NH 4 OH and H 2 O 2 to etch TiO 2 sacrificial layers
- the nano-ELO GaN epitaxial layer 510 advantageously self-debonds at the interface between the nano-ELO GaN epitaxial layer 510 and the GaN template 504 and can then be lifted-off and separated from the substrate 502 and GaN template 504.
- the self-debonding is aided by the stress field produced during nano-epitaxy at the nano- ELO GaN epitaxial layer 510 and weak bonds at the interface.
- Figure 6(a) is a SEM image, designated generally as reference numeral 600, of a de-bonded nano-ELO GaN epitaxial layer 610 after a short period of etching (e.g. about IOmins in about 20% HF solution).
- the nano-ELO GaN epitaxial layer 610 is de-bonded from a GaN template 604 and a substrate 602.
- a debonded air gap 612 (approximately 500nm) is observed at the interface of the de-bonded nano-ELO GaN epitaxial layer 610 and the GaN template 604.
- Figure 6(b) is a zoomed-out SEM image, designated generally as reference numeral 601 , of SEM image 600.
- Figure 7(a) is an optical microscopy image, designated generally as reference numeral 700, of the top surface of a nano-ELO GaN epitaxial layer after immersing in about 20% HF solution for about IOmins.
- the area bounded by the dashed rectangle 702 indicates the lift-off region of the GaN epitaxial layer at the debonded interface.
- the etching speed is estimated at about 10 ⁇ m/mins and the etching starts at the edge, where the HF reacts with the nanostructured patterned sacrificial layer.
- the etching rate can be increased if pure HF or higher concentration HF is used, instead of 20% HF.
- Figure 7(b), designated generally as reference numeral 704 is an enlarged image of Figure 7(a).
- Figures 8(a) and (b) show atomic force microscopy (AFM) plan view 800 and perspective view 802 images respectively of the surface morphology of the debonded nano-ELO GaN epitaxial layer towards the . nanostructured patterned sacrificial layer. Dense nanorod arrays 804 are observed on the surface. The diameter of a nanorod is approximately 60nm, and the height is approximately 100nm, which are of substantially the same dimensions as the nanopores of the nanostructured patterned sacrificial layer. This indicates that the de-bonding starts at the interface of the nano- ELO GaN epitaxial layer and the GaN template, as illustrated previously in Figure 5.
- the nanostructures on the lift-off surface advantageously offer a rough surface, which may improve the light extraction efficiency for GaN based optoelectronic devices.
- Figure 9 is photoluminescence (PL) mapping image, designated generally as reference numeral 900, of a lifted-off nano-ELO GaN epitaxial layer on a silicon transfer substrate.
- PL photoluminescence
- Figures 10(a) and (b) are perspective views of a nano-ELO GaN structure, designated generally as reference numerals 1000 and 1001 respectively, according to another alternative embodiment of the present invention, comprising a substrate 1002, a GaN template 1004, a nanostructured patterned sacrificial layer 1008, nano- ELO GaN epitaxial layers 1010a, b that sandwich a quantum well 1012, and a plurality of photonic holes (e.g.:1014) that are formed e.g. by patterning and dry etching.
- Figure 10b) is a perspective view of a nano-ELO GaN structure in which an etchant (e.g.
- the lateral size of the optical cavity 1016 can be controlled by controlling the etching time and the thickness of the patterned sacrificial layer 1008, and the vertical dimension of the optical cavity 1016 can be controlled by the thickness of the nano-ELO GaN epitaxial layers 1010a, b.
- the photonic holes advantageously provide in-plane modal confinement for the optical cavity 1016 due to distributed Bragg reflection, and the undercut 1018 advantageously provides the vertical optical confinement by total internal reflection.
- the material for the patterned sacrificial layer in example embodiments can be chosen based on exhibiting an optimized quality which can provide the desired device performance, for example, better output power for laser devices.
- an optical cavity may be fabricated in the form of an undercut disk using the method in accordance with an embodiment of the present invention, where the wet etch of the patterned sacrificial layer underneath the starts from the edge of the disk, the disk having been formed initially e.g. by patterning and dry etching.
- Figures 11 (a) and (b) are perspective views of a self lift-off nano-ELO GaN structure, designated generally as reference numerals 1100 and 1101 respectively, according to another alternative embodiment of the present invention, comprising a substrate 1102, a GaN template 1104, a nanostructured patterned sacrificial layer 1108, and a nano-ELO GaN epitaxial layer 1110.
- the nanostructured patterned sacrificial layer 1108 is in the form of networks of stripe lines, resulting in the formation of diffraction gratings on the surface of the lifted-off nano-ELO structure.
- the diffraction gratings can provide advantages in micro-optical systems.
- Figure 11 (a) is a cross-sectional view of the nano-ELO GaN epitaxial layer 1110 prior to lifting-off from the substrate 1102 and GaN template 1104.
- Figure 11 (b) is a cross-sectional view of the nano-ELO GaN epitaxial layer 1210 that has been lifted off from the substrate 1102 and GaN template 1104.
- each mesa 1252 on the wafer 1250 comprises a structure as e.g. described above with reference to Figure 1(d).
- the trenches e.g. 1254 to define the e.g. about 300 ⁇ m ⁇ 300 ⁇ m mesas 1252 are formed by using Induced Coupled Plasma (ICP) etching in one embodiment.
- ICP Induced Coupled Plasma
- the width of the trench can be from about 2 ⁇ m to about 100 ⁇ m and the depth of the trench can be from the sample surface to -the sacrificial layer depending on the sample thickness, for example, it can be about 8 ⁇ m).
- the actual lift-off time can thus be greatly reduced to about 20mins in one example. Therefore, as device size in e.g. the LED and transistor industry continues to reduce, and thus more devices can be formed on each single wafer, and in particular if larger wafers are used in the future, the etching rate and the etching scale will not affected by the wafer size. It was observed that the etching starts at the edge of each mesa 1252, i.e. from the trenches e.g.
- the lateral etch rate was estimated to be about 15 ⁇ m/min for lifting off an about 300 ⁇ m ⁇ 300 ⁇ m mesa area in one example, and the about 300 ⁇ m ⁇ 300 ⁇ m mesa was found completely lifted off within 20 minutes.
- FIGS 12(b) and (c) are schematic cross-sectional diagrams of a self lift-off nano-ELO GaN structure, designated generally as reference numerals 1200 and 1201 respectively, according to such an embodiment of the present invention.
- the self lift-off nano-ELO GaN structures 1200/1201 comprise a substrate 1202, a GaN template 1204, a nanostructured patterned sacrificial layer 1208 and a nano-ELO GaN epitaxial mesas 1210 that are bonded to a silicon substrate 1214 using epoxy 1212 as an adhesive, for lift-off.
- Each mesa 1210 may comprise a structure as e.g. described above with reference to Figure 1 (d).
- Figure 12(a) is a cross-sectional view of the nano-ELO GaN epitaxial mesas 1210 prior to lifting-off from the substrate 1202 and GaN template 1204.
- Figure 12(b) is a cross-sectional view of the nano-ELO GaN epitaxial mesas 1210 after lifting-off from the substrate 1202 and GaN template 1204.
- FIG. 13a is a cross-sectional schematic diagram of a vertical GaN LED device, designated generally as reference numeral 1300, after lift-off.
- the device in this example comprises a copper (transfer) substrate 1302, a silver epoxy bonding layer 1304, a back-contact 1305, a mirror layer 1306, a p-GaN layer 1308, an InGaN MQWs layer 1310, and a n-GaN layer 1312.
- An n-metal contact 1314 is disposed on the n-GaN layer 1312 (after lift-off).
- Materials for the back-contact 1305 can include, but are not limited to a Ni/Au bilayer.
- Materials for the mirror layer 1306 can include, but are not limited to Ti/AI, or Ti/Ag bilayers.
- Figure 13b shows the Blue electro luminescence (EL) emission measured from a fabricated example device according to Figure 13a).
- Figure 14 is a flow-chart, designated generally as reference numeral 1400, illustrating a method of at least partially releasing an epitaxial layer of a material from a substrate, according to an embodiment of the present invention.
- a patterned sacrificial layer is formed on the substrate- such that the substrate is partially exposed and partially covered by the sacrificial layer.
- the epitaxial layer is grown on the patterned sacrificial layer by nano-epitaxial lateral overgrowth such that the epitaxial layer is formed above an intermediate layer comprising the patterned sacrificial layer and said material.
- the patterned sacrificial layer is selectively etched such that the epitaxial layer is at least partially released from the substrate.
- Embodiments of the present invention provide a method of lifting-off Group III- V Nitride based epitaxial layers, which is advantageously simple in design, enables accurate control, inexpensive and can be scaled up to a larger wafer size and used in batch processing.
- the method according to embodiments of the present invention also advantageously enable the production of Group Hl-V nitride epilayers, in particular GaN epilayers, with a high crystal quality and low defect density as a result of nano-epitaxial growth. This can enable the fabrication of high-efficiency and high power optoelectronic including light emitting diodes, laser diodes, or High Electron Mobility Transistors (HEMTs) on a large scale.
- HEMTs High Electron Mobility Transistors
- the method according to embodiments of the present invention can also be used to lift-off Group Hl-V nitride based optoelectronic devices, i.e. light emitting diodes and laser diodes, on a large scale for mounting onto a heat sink for better heat dissipation and better crystal quality for high power usage.
- Group Hl-V nitride based optoelectronic devices i.e. light emitting diodes and laser diodes
- Embodiments of the present invention also provide a method which does not damage the separated substrate, advantageously enabling the substrate to be recycled.
- Characteristics of the method of iifting-off Group Hl-V Nitride based epitaxial layers are (i) patterned sacrificial layer materials that can be selectively removed by wet chemicals (e.g. HF solution) and (ii) a nanostructured patterned sacrificial layer enabling the self de-bonding of a nano-ELO Group Hl-V Nitride layer at the interface after removal of a patterned sacrificial layer.
- wet chemicals e.g. HF solution
- the invention is not limited to the material systems described in the above example embodiments.
- the present invention can apply more generally to materials that can be grown on a patterned sacrificial layer by nano-epitaxial lateral overgrowth such that an epitaxial layer is formed above an intermediate layer comprising the patterned sacrificial layer and the material; and selectively etching the patterned sacrificial layer such that the epitaxial layer is at least partially released from the substrate.
- the mechanical force at the interface can be exploited to separate the epitaxial layer leaving with nano-column structures for lift-off from the substrate.
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Abstract
L'invention concerne un procédé de libération au moins partielle d'une couche épitaxiale de matériau par rapport à un substrat. Le procédé consiste à : former une couche sacrificielle à motifs sur le substrat de sorte que ce dernier se trouve partiellement exposé et partiellement recouvert par la couche sacrificielle; faire croître la couche épitaxiale sur la couche sacrificielle à motifs par surcroissance latérale nano-épitaxiale de sorte que ladite couche épitaxiale se trouve formée au-dessus d'une couche intermédiaire comprenant la couche sacrificielle à motifs et ledit matériau; et graver sélectivement la couche sacrificielle à motifs de sorte que la couche épitaxiale est au moins partiellement libérée du substrat.
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US13/130,173 US8859399B2 (en) | 2008-11-19 | 2009-11-19 | Method of at least partially releasing an epitaxial layer |
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TW201246599A (en) * | 2011-05-06 | 2012-11-16 | Nanocrystal Asia Inc Taiwan | Semiconductor substrate and fabricating method thereof |
US9000464B2 (en) * | 2012-03-01 | 2015-04-07 | Design Express Limited | Semiconductor structure for substrate separation and method for manufacturing the same |
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- 2009-11-19 US US13/130,173 patent/US8859399B2/en not_active Expired - Fee Related
- 2009-11-19 WO PCT/SG2009/000435 patent/WO2010059131A1/fr active Application Filing
- 2009-11-19 SG SG2011036290A patent/SG171762A1/en unknown
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WO2012063045A1 (fr) * | 2010-11-08 | 2012-05-18 | Nanogan Limited | Tirage de dispositifs de qualité supérieure sur des modèles présentant un motif pixelisé |
US9355840B2 (en) | 2010-11-08 | 2016-05-31 | Nanogan Limited | High quality devices growth on pixelated patterned templates |
CN102214750A (zh) * | 2011-04-26 | 2011-10-12 | 财团法人交大思源基金会 | 纳米级侧向成长磊晶的薄膜发光二极体及其制作方法 |
CN102760801A (zh) * | 2011-04-29 | 2012-10-31 | 清华大学 | 发光二极管的制备方法 |
CN102201332A (zh) * | 2011-05-08 | 2011-09-28 | 北京燕园中镓半导体工程研发中心有限公司 | 一种GaN衬底的制备方法 |
KR101781438B1 (ko) * | 2011-06-14 | 2017-09-25 | 삼성전자주식회사 | 반도체 발광소자의 제조방법 |
CN102222734A (zh) * | 2011-07-07 | 2011-10-19 | 厦门市三安光电科技有限公司 | 一种倒置太阳能电池制作方法 |
CN102244162A (zh) * | 2011-07-14 | 2011-11-16 | 北京燕园中镓半导体工程研发中心有限公司 | 一种发光二极管的制备方法 |
WO2014056762A3 (fr) * | 2012-10-09 | 2014-06-19 | Osram Opto Semiconductors Gmbh | Procédé de fabrication d'un composant semi-conducteur optoélectronique et composant semi-conducteur optoélectronique |
US9691815B2 (en) | 2012-10-09 | 2017-06-27 | Osram Opto Semiconductors Gmbh | Method for producing an optoelectronic semiconductor component, and optoelectronic semiconductor component |
Also Published As
Publication number | Publication date |
---|---|
TWI520206B (zh) | 2016-02-01 |
US8859399B2 (en) | 2014-10-14 |
TW201030837A (en) | 2010-08-16 |
US20110294281A1 (en) | 2011-12-01 |
SG171762A1 (en) | 2011-07-28 |
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